WO2017080339A1 - 阵列基板及其制备方法、显示装置 - Google Patents

阵列基板及其制备方法、显示装置 Download PDF

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Publication number
WO2017080339A1
WO2017080339A1 PCT/CN2016/102006 CN2016102006W WO2017080339A1 WO 2017080339 A1 WO2017080339 A1 WO 2017080339A1 CN 2016102006 W CN2016102006 W CN 2016102006W WO 2017080339 A1 WO2017080339 A1 WO 2017080339A1
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Prior art keywords
organic electroluminescent
array substrate
electroluminescent diode
passive
forming
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PCT/CN2016/102006
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English (en)
French (fr)
Inventor
郭易东
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京东方科技集团股份有限公司
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Priority to US15/533,813 priority Critical patent/US20170338293A1/en
Publication of WO2017080339A1 publication Critical patent/WO2017080339A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/128—Active-matrix OLED [AMOLED] displays comprising two independent displays, e.g. for emitting information from two major sides of the display
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/176—Passive-matrix OLED displays comprising two independent displays, e.g. for emitting information from two major sides of the display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/179—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the present invention belongs to the field of display technologies, and in particular, to an array substrate, a preparation method thereof, and a display device.
  • OLED Organic Light-Emitting Diode
  • A-OLED active driving OLED
  • PM-OLED passive driving OLED
  • the typical structure of the PM-OLED is composed of a glass substrate, an ITO (indium tin oxide) anode (Anode), an organic light-emitting layer (Emitting Material Layer) and a cathode (Cathode), and has a simple structure and a driving lead. Less, the peripheral circuit occupies less area and other characteristics.
  • the AM-OLED is applied to each sub-pixel of the display panel, and a Low Temperature Poly-Si Thin Film Transistor (LTP-Si TFT) and a charge having a switching function are also provided in each sub-pixel.
  • LTP-Si TFT Low Temperature Poly-Si Thin Film Transistor
  • the storage capacitor, peripheral drive circuit and display array are integrated on the same glass substrate. It has the advantages of fast response, high contrast, wide color gamut, energy saving, etc. It is the mainstream direction of OLED technology development.
  • each low-temperature polysilicon thin film transistor is equipped with at least a plurality of peripheral leads such as a gate driving line, a source drain driving line, and the like, and the lead regions cannot be illuminated, the final display device necessarily has a certain width of black which cannot be displayed.
  • the area, which is the border area of the display panel causes the display panel to be narrow-edged.
  • the present disclosure provides an array substrate which can realize narrowing and a preparation method thereof, and a display device.
  • the present disclosure provides an array substrate including a display area and a peripheral area at a periphery of the display area, in which a plurality of active organic electroluminescent diodes are disposed, the array substrate further A plurality of passive organic electroluminescent diodes disposed in the peripheral region are included; wherein the active organic electroluminescent diode and the passive organic electroluminescent diode are both electrically connected to a power driving unit.
  • the top electrode of the active organic electroluminescent diode is disposed in the same layer as the top electrode of the passive organic electroluminescent diode and has the same material;
  • the bottom electrode of the active organic electroluminescent diode is disposed in the same layer as the bottom electrode of the passive organic electroluminescent diode and has the same material;
  • the luminescent layer of the active organic electroluminescent diode is disposed in the same layer as the luminescent layer of the passive organic electroluminescent diode and has the same material.
  • a plurality of the passive organic electroluminescent diodes are arranged in a matrix, and bottom electrodes of the passive organic electroluminescent diodes disposed in the same row are integrally connected; the passive organic electroluminescence disposed in the same column The top electrodes of the diodes are connected in one body.
  • the array substrate further includes: a gate driving circuit located under the layer of the passive organic electroluminescent diode in the peripheral region, configured to drive a plurality of the active organic electroluminescent diodes.
  • the array substrate further includes: a plurality of switching transistors located under the layer of the active organic electroluminescent diode in the display area; wherein a drain of each of the switching transistors is connected to a corresponding one A bottom electrode of the active organic electroluminescent diode.
  • the array substrate further includes a plurality of first spacer pillars located above the pixel defining layer of the active organic electroluminescent diode in the display region; and the passive type located in the peripheral region
  • the pixels of the organic electroluminescent diode define a plurality of second spacer pillars above the layer.
  • the shape of the first spacer column is a positive trapezoid; and the shape of the second spacer column is an inverted trapezoid.
  • the top electrode of the active organic electroluminescent diode is formed in one body.
  • the array substrate further includes a non-display area located at an outermost circumference of the array substrate, which corresponds to a frame of the array substrate.
  • the present disclosure provides a method of fabricating an array substrate including a display region and a peripheral region surrounding the display region, the preparation method comprising: forming over a substrate located within the display region Multiple active organic electroluminescent diodes, and
  • the active organic electroluminescent diode and the passive organic electroluminescent diode are both electrically connected to a power driving unit.
  • the light-emitting layer of the active organic electroluminescent diode and the light-emitting layer of the passive organic electroluminescent diode are formed by one patterning process.
  • the method further includes:
  • the first spacer pillar formed is a positive trapezoid; the second spacer pillar formed is an inverted trapezoid.
  • the plurality of the passive organic electroluminescent diodes formed are in a moment
  • the bottom electrodes of the passive organic electroluminescent diodes disposed in the same row are integrally formed; the top electrodes of the passive organic electroluminescent diodes disposed in the same row are formed integrally.
  • the method before the step of forming the passive organic electroluminescent diode in the peripheral region, the method further includes:
  • a gate driving circuit is formed on the substrate located in the peripheral region.
  • the method before the step of forming the active organic electroluminescent diode in the display area, the method further includes:
  • a switching transistor on the substrate of the display region and a gate driving circuit on the substrate of the peripheral region are formed by the same patterning process.
  • the method before the step of forming the active organic electroluminescent diode in the display area, the method further includes:
  • a drain of each of the switching transistors is connected to a bottom electrode of a corresponding one of the active organic electroluminescent diodes through the via.
  • the present disclosure provides a display device including the array substrate described above.
  • the peripheral region of the array substrate of the present invention is provided with a plurality of passive organic electroluminescent diodes, so that the peripheral region of the array substrate can be illuminated, so that the display effect of the narrow bezel can be achieved.
  • the method for preparing the array substrate of the present invention has simple steps and is easy to handle.
  • the frame is narrow.
  • FIG. 1 is a plan view of an array substrate in accordance with an embodiment of the present invention.
  • Figure 2 is a cross-sectional view taken along line A-A' of Figure 1;
  • step 6 is a schematic diagram of step 6 of a method of fabricating an array substrate according to an embodiment of the present invention.
  • step 7 is a schematic diagram of step 7 of a method of fabricating an array substrate according to an embodiment of the present invention.
  • step 8 is a schematic diagram of step 8 of a method of fabricating an array substrate according to an embodiment of the present invention.
  • step IX is a schematic diagram of step IX of a method of fabricating an array substrate in accordance with an embodiment of the present invention.
  • the organic electroluminescent diode includes an upright type and an inverted type; wherein, the positive type OLED has a cathode disposed above the anode, that is, the top electrode is a cathode, and the bottom electrode is an anode;
  • the inverted OLED has an anode disposed above the cathode, that is, the bottom electrode is a cathode and the top electrode is an anode.
  • an OLED having an upright type is taken as an example, but this is not intended to limit the scope of the present invention, and an inverted OLED is also within the scope of the present invention.
  • the patterning process described in the following embodiments may include only a photolithography process, or alternatively, not only a photolithography process and an etching step, but also may include other processes for forming a predetermined pattern, such as printing, inkjet, and the like.
  • the lithography process refers to a process of forming a pattern by using a photoresist, a reticle, an exposure machine, or the like, including a process of film formation, exposure, development, and the like.
  • the corresponding patterning process can be selected according to the structure formed in this embodiment.
  • an embodiment of the present invention provides an array substrate including a display area AR and a peripheral area AR' at the periphery of the display area AR (wherein The PR shown in the figure is an entire non-display area), in which a plurality of active organic electroluminescent diodes are disposed, and a plurality of passive organic electroluminescent diodes are disposed in the peripheral area AR';
  • the active organic electroluminescent diode and the passive organic electroluminescent diode are both electrically connected to a power driving unit.
  • the peripheral area AR' is located on both sides of the display area AR, the present invention is not limited thereto.
  • the peripheral area AR' may also be located on all sides or any one or more sides of the display area AR.
  • the array substrate includes the substrate 10, and a plurality of gate lines and a plurality of data lines (not shown) that are crossed and insulated over the substrate, wherein adjacent gate lines The position intersecting the adjacent data lines will define a pixel, each of which includes a light emitting element and a switching transistor for driving the light emitting element to emit light.
  • the light-emitting element is a plurality of active (active) organic electroluminescent diodes (AM-OLEDs) in the embodiments of the present invention, and the light-emitting of each of the light-emitting elements is controlled by a switching transistor connected thereto (each The drain 16B of the switching transistor is connected to the anode 18) of a corresponding one of the AM-OLEDs.
  • the position of the pixel on the array substrate is suitable for the display screen, so this part is called the display area AR.
  • the area outside the display area AR is the peripheral area AR'.
  • the display area is usually directly surrounded by a bezel area that does not have a display function.
  • the peripheral area AR' is disposed adjacent to one or more sides of the display area AR, and a plurality of passive organic electroluminescent diodes (PM-OLEDs) are disposed in the peripheral area AR', wherein The voltages of the cathode 27 and the anode 25 of the PM-OLED are both applied by the power supply driving unit without the control of the switching transistor. Since the PM-OLED is disposed in the peripheral region AR', the peripheral region AR' of the array substrate can also emit light, effectively reducing the width of the non-displayed bezel, improving the overall range of the display for display, and achieving narrowness. The effect of the border.
  • PM-OLEDs passive organic electroluminescent diodes
  • the anode 18 of the AM-OLED is disposed in the same layer as the anode 25 of the PM-OLED and the materials are the same, that is, the two can be prepared by one patterning process.
  • the cathode 26 of the AM-OLED is disposed in the same layer as the cathode 27 of the PM-OLED and is of the same material, that is, both can be prepared by one patterning process.
  • AM-OLED The light-emitting layer 21 is disposed in the same layer as the light-emitting layer 22 of the PM-OLED and has the same material, that is, the two can be prepared by one patterning process. It can be seen that the number of patterning processes of the array substrate of the embodiment of the present invention is not increased, so that the production efficiency can be improved and the production cost can be saved.
  • the plurality of PM-OLEDs disposed in the peripheral region AR' may be arranged in a matrix, wherein the anodes 25 of the PM-OLEDs disposed in the same row are integrally connected; and the cathodes 27 of the PM-OLEDs disposed in the same column Connected into one.
  • the power driving unit applies voltage to the anode of the first row and the cathode of the first column
  • the first PM-OLED of the first row can be controlled to emit light, thereby knowing that the setting method can not only save process steps. And it is also possible to achieve individual control of each PM-OLED.
  • the peripheral region AR' of the array substrate in the embodiment of the present invention is further provided with a gate driving circuit under the layer where the PM-OLED is located, which is a GOA circuit for driving the AM-OLED, thereby further reducing the frame region of the array substrate.
  • a gate driving circuit under the layer where the PM-OLED is located which is a GOA circuit for driving the AM-OLED, thereby further reducing the frame region of the array substrate.
  • the array substrate further includes a plurality of first spacer pillars 20 above the pixel defining layer of the AM-OLED of the display area AR; and a plurality of second layers above the pixel defining layer of the PM-OLED of the peripheral region AR' Septum column 24.
  • the shape of the first spacer post 20 is a positive trapezoid; the shape of the second spacer post 24 is an inverted trapezoid.
  • first spacer pillar 20 of the trapezoidal shape and the second spacer pillar 24 of the inverted trapezoid are disposed is that when the cathode 26 of the AM-OLED and the cathode 27 of the PM-OLED are formed by the same vapor deposition process, each AM- The cathode of the OLED is formed as a unitary structure, and the side of the first trapezoidal spacer pillar extends gently outward without causing the cathode 26 of each AM-OLED to be broken; and the cathode 27 of the PM-OLED located in the same row Separately disposed, the inverted trapezoidal second spacer column can help form a plurality of cathodes 27 that are disconnected from the PM-OLED.
  • the peripheral region AR' of the array substrate of the embodiment of the present invention is provided with a PM-OLED, which can cause the peripheral region AR' of the array substrate to emit light, so that the display effect of the narrow bezel can be achieved.
  • an embodiment of the present invention provides a method for preparing an array substrate.
  • the array substrate may be the array substrate in the above embodiment.
  • the preparation method of the embodiment of the present invention specifically includes the following steps:
  • Step 1 sequentially depositing a buffer layer 11 and an active layer film on the substrate 10, and forming a pattern of the active layer 12 including the switching transistor in the display region AR by a patterning process, and forming a gate driving circuit in the peripheral region AR'. A pattern of the active layer 12 of each transistor. Then, a gate insulating layer 13 is formed on the substrate on which the active layer is formed.
  • the material of the buffer layer 11 and the gate insulating layer 13 may be silicon oxide (SiOx), silicon nitride (SiNx), germanium oxide (HfOx), silicon oxynitride (SiOxNy), aluminum.
  • the material of the active layer may be an amorphous silicon (a-Si) film or a polycrystalline silicon (p-Si) film.
  • Step 2 on the substrate on which the step 1 is completed, depositing a gate metal film, and forming a pattern of the gate electrode 14 of the switching transistor in the display region AR by a patterning process, and forming a gate of each transistor in the gate driving circuit in the peripheral region AR' A pattern of 14 and a pattern forming a gate metal line extending from the display area AR to the peripheral area AR'.
  • the material of the gate metal film is one of molybdenum (Mo), molybdenum-niobium alloy (MoNb), aluminum (Al), aluminum-niobium alloy (AlNd), titanium (Ti), and copper (Cu) or among them.
  • Mo molybdenum
  • MoNb molybdenum-niobium alloy
  • Al aluminum
  • AlNd aluminum-niobium alloy
  • Ti titanium
  • Cu copper
  • Step 3 on the substrate on which the step 2 is completed, depositing the interlayer insulating layer 15 and forming contact vias for connecting the active layer to the source and the drain, the contact vias penetrating the interlayer insulating layer 15 and Gate insulating layer 13.
  • the material of the interlayer insulating layer 15 may be silicon oxide (SiOx), silicon nitride (SiNx), germanium oxide (HfOx), silicon oxynitride (SiOxNy), aluminum oxide (AlOx), or the like. Or consist of a multilayer film composed of two or three of them.
  • Step 4 depositing a source/drain metal film on the substrate on which the step 3 is completed, and forming a pattern of the source 16A and the drain 16B of the switching transistor in the display region AR by a patterning process, and forming a gate driving circuit in the peripheral region AR' Individual transistor A pattern of the source 16A and the drain 16B, and a pattern forming a data line extending from the display area AR to the peripheral area AR'.
  • the material of the source/drain metal film may be one of molybdenum (Mo), molybdenum-niobium alloy (MoNb), aluminum (Al), aluminum-niobium alloy (AlNd), titanium (Ti), and copper (Cu) or a plurality of them.
  • Mo molybdenum
  • MoNb molybdenum-niobium alloy
  • Al aluminum
  • AlNd aluminum-niobium alloy
  • Ti titanium
  • Cu copper
  • the single or multi-layer composite laminate formed of the material is preferably a single layer or a multilayer composite film composed of Mo, Al or an alloy containing Mo or Al.
  • Step 5 On the substrate on which the step 4 is completed, the planarization layer 17 is deposited, and contact vias for connecting the pixel electrode (anode) 18 and the drain electrode 16B are formed in the planarization layer.
  • the material of the planarization layer 17 may be silicon oxide (SiOx), silicon nitride (SiNx), germanium oxide (HfOx), silicon oxynitride (SiOxNy), aluminum oxide (AlOx), or the like. It consists of a multilayer film composed of two or three of them.
  • Step 6 On the substrate on which the step 5 is completed, deposit a first conductive metal layer, and form a pattern of the anode 18 of the AM-OLED of each pixel in the display region AR by a patterning process (each anode 18 is separately disposed), in the periphery
  • the area AR' forms a pattern of the anodes 25 of each PM-OLED (the anodes 25 provided in the same row are formed integrally) as shown in FIG.
  • the material of the first conductive metal layer may be any one of ITO (indium tin oxide) / Ag (silver) / ITO (indium tin oxide) or Ag (silver) / ITO (indium tin oxide) structure; or, The ITO in the structure is replaced with any one of IZO (indium zinc oxide), IGZO (indium gallium zinc oxide) or InGaSnO (indium gallium oxide).
  • Step 7 On the substrate on which the step 6 is completed, a pattern of the pixel defining layer is formed by a patterning process, and the pixel defining layer includes the pixel defining layer 19 of the AM-OLED and the pixel defining layer 23 of the PM-OLED. Then, a pattern of the light-emitting layer 21 of the AM-OLED and the light-emitting layer 22 of the PM-OLED is formed by a single evaporation process, as shown in FIG.
  • the material of the pixel defining layer may be silicon oxide (SiOx), silicon nitride (SiNx), germanium oxide (HfOx), silicon oxynitride (SiOxNy), aluminum oxide (AlOx), or the like.
  • SiOx silicon oxide
  • SiNx silicon nitride
  • HfOx germanium oxide
  • SiOxNy silicon oxynitride
  • AlOx aluminum oxide
  • the material of the luminescent layer can be made of an organic material which is undoped with fluorescent light. Or made of an organic material doped with a fluorescent material composed of a fluorescent dopant and a host material, or an organic material doped with a phosphorescent material composed of a phosphorescent dopant and a host material.
  • Step 8 On the substrate on which the step 7 is completed, a plurality of first spacer pillars 20 are formed on the pixel defining layer 19 of the AM-OLED of the display area AR by a patterning process; the shape of the first spacer pillar 20 may be a positive trapezoid As shown in Figure 5.
  • the material of the first spacer 20 is a resin material, and may be polyimide, acrylic, or phenolic resin.
  • Step 9 On the substrate on which the step 8 is completed, a plurality of second spacer posts 24 are formed over the pixel defining layer 23 of the PM-OLED of the peripheral region AR' by a patterning process.
  • the second spacer post 24 can be an inverted trapezoid.
  • a negative photoresist is used in forming the second spacer, as shown in FIG.
  • the material of the second spacer 24 is a resin material, and may be polyimide, acrylic, or phenolic resin.
  • Step 10 On the substrate on which the step 9 is completed, the pattern of the cathodes 26 of the respective AM-OLEDs and the pattern of the cathodes 27 of the respective PM-OLEDs are formed by one evaporation process. Wherein, the cathodes 26 of the respective AM-OLEDs are formed integrally, and the cathodes 27 of the respective PM-OLEDs in the same column are formed integrally, as shown in FIG.
  • the cathode layer serves as a connection layer for the negative voltage of the organic electroluminescent device, and has good electrical conductivity and a low work function.
  • the cathode layer is usually made of a low work function metal material such as lithium, magnesium, calcium, barium, aluminum, indium or the like or an alloy of the above metal with copper, gold or silver; or a very thin buffer insulating layer (such as Lithium fluoride LiF, cesium carbonate CsCO 3 , etc.) and the above metals or alloys.
  • Embodiments of the present invention provide a display device including the array substrate of the embodiment of the present invention.
  • the display device can be any product or component having a display function, such as an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

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Abstract

一种阵列基板及其制备方法、显示装置，属于显示技术领域。该阵列基板包括显示区域和在显示区域外围的周边区域，在所述显示区域设置有多个主动式有机电致发光二极管，所述阵列基板还包括设置在所述周边区域的多个被动式有机电致发光二极管；其中，主动式有机电致发光二极管和被动式有机电致发光二极管均与电源驱动单元电连接。由于在周边区域设置有能够发光的多个被动式有机电致发光二极管，因此该阵列基板实现了窄边化，其可解决现有的显示装置边框较宽的问题。

Description

阵列基板及其制备方法、显示装置 技术领域
本发明属于显示技术领域，具体涉及一种阵列基板及其制备方法、显示装置。
背景技术
有机电致发光二极管(Organic Light-Emitting Diode；OLED)器件作为一种新型的平板显示，由于具有主动发光、发光亮度高、宽视角、响应速度快、低能耗以及可柔性化等特点，受到了越来越多的关注，成为可能取代液晶显示的下一代显示技术。OLED以驱动方式分为主动式驱动OLED(AM-OLED)和被动式驱动OLED(PM-OLED)。
PM-OLED的典型结构是由玻璃基板、ITO(indium tin oxide；铟锡氧化物)阳极(Anode)、有机发光层(Emitting Material Layer)与阴极(Cathode)等所组成，具有结构简单，驱动引线少，外围电路占用区域少等特性。
AM-OLED则被应用于显示面板的每一个子像素中，且在每一个子像素中还配备具有开关功能的低温多晶硅薄膜晶体管(Low Temperature Poly-Si Thin Film Transistor，LTP-Si TFT)和电荷存储电容，外围驱动电路和显示阵列整个系统集成在同一玻璃基板上。具有响应速度快、高对比度、色域广、节能等优点，是OLED技术发展的主流方向。但是，由于每个低温多晶硅薄膜晶体管都至少配备有栅极驱动线，源漏极驱动线等大量的外围引线，而这些引线区域无法发光，导致最终显示装置必然存在一定宽度的无法显示画面的黑色区域，也就是显示面板的边框区域，造成显示面板无法实现窄边化。
发明内容
针对现有的阵列基板存在的上述问题，本公开提供一种可以实现窄边化的阵列基板及其制备方法、显示装置。
在一个方面，本公开提供了一种阵列基板，包括显示区域和在所述显示区域外围的周边区域，在所述显示区域内设置有多个主动式有机电致发光二极管，所述阵列基板还包括设置在所述周边区域内的多个被动式有机电致发光二极管；其中，所述主动式有机电致发光二极管和被动式有机电致发光二极管均与电源驱动单元电连接。
可选地，所述主动式有机电致发光二极管的顶电极与所述被动式有机电致发光二极管的顶电极同层设置且材料相同；
所述主动式有机电致发光二极管的底电极与所述被动式有机电致发光二极管的底电极同层设置且材料相同；
所述主动式有机电致发光二极管的发光层与所述被动式有机电致发光二极管的发光层同层设置且材料相同。
可选地，多个所述被动式有机电致发光二极管呈矩阵排列，设于同一行的所述被动式有机电致发光二极管的底电极连接成一体；设于同一列的所述被动式有机电致发光二极管的顶电极连接成一体。
可选地，所述阵列基板还包括：位于在周边区域内的所述被动式有机电致发光二极管所在层下方的栅极驱动电路，其用于驱动多个所述主动式有机电致发光二极管。
可选地，所述阵列基板还包括：位于在显示区域内的所述主动式有机电致发光二极管所在层下方的多个开关晶体管；其中，每一个所述开关晶体管的漏极连接对应的一个所述主动式有机电致发光二极管的底电极。
可选地，所述阵列基板还包括位于在显示区域内的所述主动式有机电致发光二极管的像素限定层上方的多个第一隔垫柱；以及，位于在周边区域内的所述被动式有机电致发光二极管的像素限定层上方的多个第二隔垫柱。
可选地，所述第一隔垫柱的形状为正梯形；所述第二隔垫柱的形状为倒梯形。
可选地，所述主动式有机电致发光二极管的顶电极形成为一体。
可选地，所述阵列基板还包括位于所述阵列基板最外周的非显示区域，其对应于所述阵列基板的边框。
在另一方面，本公开提供了一种阵列基板的制备方法，所述阵列基板包括显示区域和围绕所述显示区域的周边区域，所述制备方法包括：在位于显示区域内的基底上方，形成多个主动式有机电致发光二极管，以及，
在位于周边区域内的基底上方，形成多个被动式有机电致发光二极管；其中，
所述主动式有机电致发光二极管和被动式有机电致发光二极管均与电源驱动单元电连接。
可选地，通过一次构图工艺形成所述主动式有机电致发光二极管的顶电极与所述被动式有机电致发光二极管的顶电极；
通过一次构图工艺形成所述主动式有机电致发光二极管的底电极与所述被动式有机电致发光二极管的底电极；
通过一次构图工艺形成所述主动式有机电致发光二极管的发光层与所述被动式有机电致发光二极管的发光层。
可选地，在通过一次构图工艺形成所述主动式有机电致发光二极管的顶电极与所述被动式有机电致发光二极管的顶电极之前，还包括：
在位于显示区域的所述主动式有机电致发光二极管的像素限定层上方形成多个第一隔垫柱；以及，在位于周边区域的所述被动式有机电致发光二极管的像素限定层上方形成多个第二隔垫柱。
可选地，所形成的所述第一隔垫柱为正梯形；所形成的所述第二隔垫柱为倒梯形。
可选地，所形成的多个所述被动式有机电致发光二极管呈矩 阵排列，设于同一行的所述被动式有机电致发光二极管的底电极形成为一体；设于同一列的所述被动式有机电致发光二极管的顶电极形成为一体。
可选地，在周边区域形成所述被动式有机电致发光二极管的步骤之前，还包括：
在位于周边区域的基底上形成栅极驱动电路。
可选地，在显示区域形成所述主动式有机电致发光二极管的步骤之前，还包括：
在位于显示区域的基底上形成开关晶体管，并且
通过相同的构图工艺形成位于显示区域的基底上的开关晶体管以及位于周边区域的基底上的栅极驱动电路。
可选地，在显示区域形成所述主动式有机电致发光二极管的步骤之前，还包括：
在位于所述显示区域的基底上形成多个开关晶体管；以及，
在所述开关晶体管的上方形成平坦化层，并在每个开关晶体管的漏极上方形成贯穿平坦化层的过孔；其中，
每个开关晶体管的漏极通过所述过孔连接对应的一个主动式有机电致发光二极管的底电极。
在又一方面，本公开提供了一种显示装置，其包括上述的阵列基板。
本发明具有如下有益效果：
本发明的阵列基板的周边区域设置有多个被动式有机电致发光二极管，能够使得阵列基板的周边区域进行发光，因此可以实现窄边框的显示效果。
本发明的阵列基板的制备方法，步骤简单、易于操作。
本发明的显示装置由于包括上述的阵列基板，故其边框较窄。
附图说明
图1为根据本发明的实施例的阵列基板的平面示意图；
图2为图1的A-A′的剖视图；
图3为根据本发明的实施例的阵列基板的制备方法的步骤六的示意图；
图4为根据本发明的实施例的阵列基板的制备方法的步骤七的示意图；
图5为根据本发明的实施例的阵列基板的制备方法的步骤八的示意图；
图6为根据本发明的实施例的阵列基板的制备方法的步骤九的示意图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
首先，在此需要说明的是，有机电致发光二极管(OLED)包括正置型和倒置型；其中，正置型的OLED其阴极设置于阳极上方，也就是说顶电极为阴极，底电极为阳极；而倒置型的OLED其阳极设置于阴极上方，也就是说底电极为阴极，顶电极为阳极。在以下实施例中均以正置型的OLED为例进行说明，但是这并不作为对本发明的保护范围的限定，倒置型的OLED也在本发明的保护范围内。
其中，以下实施例中所述的构图工艺可只包括光刻工艺，或可替代地，不仅包括光刻工艺以及刻蚀步骤，同时还可以包括打印、喷墨等其他用于形成预定图形的工艺，其中光刻工艺是指包括成膜、曝光、显影等工艺过程的利用光刻胶、掩模板、曝光机等形成图形的工艺。可根据本实施例中所形成的结构选择相应的构图工艺。
接下来，结合下述实施例对本发明的阵列基板及其制备方法，显示装置进行说明。
如图1和图2所示，本发明实施例提供一种阵列基板，包括显示区域AR和在所述显示区域AR外围的周边区域AR′(其中 图中所示的PR为整个非显示区域)，在所述显示区域AR设置有多个主动式有机电致发光二极管，在所述周边区域AR′设置有多个被动式有机电致发光二极管；其中，所述主动式有机电致发光二极管和被动式有机电致发光二极管均与电源驱动单元电连接。需要说明的是，虽然在图1中，周边区域AR′位于显示区域AR的两侧，但是本发明不限于此。周边区域AR′也可以位于显示区域AR的所有侧或者任意的一侧或多侧。
具体的，本领域技术人员可以理解的是，阵列基板包括基底10、以及交叉且绝缘设置在基底上方的多条栅线和多条数据线(图中未示出)，其中在相邻栅线和相邻数据线交叉的位置将限定出一个像素，每个像素中都包括一个发光元件和用于驱动该发光元件发光的开关晶体管。所述发光元件即为本发明实施例中的多个主动式(有源)有机电致发光二极管(AM-OLED)，每个发光元件的发光与否由与其连接的开关晶体管所控制(每一个所述开关晶体管的漏极16B连接对应的一个AM-OLED的阳极18)。阵列基板上的像素所在位置适用于显示画面所用，故称这部分区域为显示区域AR。在该显示区域AR外围的区域为周边区域AR′。在现有技术中，通常由不具有显示功能的边框区域直接包围显示区域。但是，在本发明实施例中，邻接于显示区域AR的一侧或多侧设置了周边区域AR′，并且周边区域AR′中设置了多个被动式有机电致发光二极管(PM-OLED)，其中，PM-OLED的阴极27和阳极25的电压均是通过电源驱动单元所施加的，无需开关晶体管的控制。由于在周边区域AR′设置有PM-OLED，因此阵列基板的周边区域AR′也可以发光，有效的减小了非显示的边框的宽度，提高了整体的用于显示的区域范围，实现了窄边框的效果。
在本发明实施例中AM-OLED的阳极18与PM-OLED的阳极25同层设置且材料相同，也就是说这两者可以采用一次构图工艺制备。AM-OLED的阴极26与PM-OLED的阴极27同层设置且材料相同，也就是说这两者可以采用一次构图工艺制备。AM-OLED 的发光层21与PM-OLED的发光层22同层设置且材料相同，也就是说这两者可以采用一次构图工艺制备。由此可知，本发明实施例的阵列基板的构图工艺次数并没有增加，因此可以提高生产效率，节约生产成本。
在本发明实施例中设于周边区域AR′的多个PM-OLED可以成矩阵排列，其中设于同一行的PM-OLED的阳极25连接成一体；设于同一列的PM-OLED的阴极27连接成一体。如此设置，当电源驱动单元给第一行的阳极和给第一列的阴极施加电压时，可以控制第一行第一个PM-OLED发光，由此可知，该种设置方式不仅可以节约工艺步骤，而且还可以实现每个PM-OLED的单独控制。
在本发明实施例的阵列基板的周边区域AR′还设置有位于PM-OLED所在层下方的栅极驱动电路，其为用于驱动AM-OLED的GOA电路，从而进一步减小阵列基板的边框区域的宽度。
所述阵列基板还包括位于显示区域AR的AM-OLED的像素限定层上方的多个第一隔垫柱20；以及，位于周边区域AR′的PM-OLED的像素限定层上方的多个第二隔垫柱24。
优选的，第一隔垫柱20的形状为正梯形；第二隔垫柱24的形状为倒梯形。
设置正梯形的第一隔垫柱20和倒梯形的第二隔垫柱24的原因是，在采用同一次蒸镀工艺形成AM-OLED的阴极26与PM-OLED的阴极27时，各个AM-OLED的阴极是形成为一体的结构，正梯形的第一隔垫柱的侧边平缓向外延伸，不会导致各个AM-OLED的阴极26断裂；而位于同一行中的PM-OLED的阴极27是分开设置的，倒梯形的第二隔垫柱可以有助于形成多个断开设置PM-OLED的阴极27。
综上所述，本发明实施例的阵列基板的周边区域AR′设置有PM-OLED，能够使得阵列基板的周边区域AR′发光，因此可以实现窄边框的显示效果。
结合图2-图6，本发明实施例提供一种阵列基板的制备方法， 其中，该阵列基板可以为上述实施例中的阵列基板，本发明实施例的制备方法具体包括如下步骤：
步骤一、在基底10上依次沉积缓冲层11和有源层薄膜，并采用构图工艺在显示区域AR形成包括开关晶体管的有源层12的图形，以及在周边区域AR′形成栅极驱动电路中各个晶体管的有源层12的图形。然后，在形成有源层的基底上形成栅极绝缘层13。
其中，缓冲层11和栅极绝缘层13的材料均可以为硅的氧化物(SiOx)、硅的氮化物(SiNx)、铪的氧化物(HfOx)、硅的氮氧化物(SiOxNy)、铝的氧化物(AlOx)等或由其中两种或三种组成的多层膜组成。
其中，有源层的材料可以为非晶硅(a-Si)膜、多晶硅(p-Si)膜。
步骤二、在完成步骤一的基底上，沉积栅金属薄膜，并通过构图工艺在显示区域AR形成开关晶体管的栅极14的图形，在周边区域AR′形成栅极驱动电路中各个晶体管的栅极14的图形，以及形成从显示区域AR延伸至周边区域AR′的栅极金属线的图形。
其中，栅极金属薄膜的材料采用钼(Mo)、钼铌合金(MoNb)、铝(Al)、铝钕合金(AlNd)、钛(Ti)和铜(Cu)中的一种或它们中的多种材料形成的单层或多层复合叠层，优选为Mo、Al或含Mo、Al的合金组成的单层或多层复合膜。
步骤三、在完成步骤二的基底上，沉积层间绝缘层15，并形成用于有源层与源极和漏极连接的接触过孔，所述接触过孔穿透层间绝缘层15和栅极绝缘层13。
层间绝缘层15的材料可以为硅的氧化物(SiOx)、硅的氮化物(SiNx)、铪的氧化物(HfOx)、硅的氮氧化物(SiOxNy)、铝的氧化物(AlOx)等或由其中两种或三种组成的多层膜组成。
步骤四、在完成步骤三的基底上，沉积源漏金属薄膜，并通过构图工艺在显示区域AR形成开关晶体管的源极16A和漏极16B的图形，在周边区域AR′形成栅极驱动电路中各个晶体管的 源极16A和漏极16B的图形，以及形成从显示区域AR延伸至周边区域AR′的数据线的图形。
源漏金属薄膜的材料可以为钼(Mo)、钼铌合金(MoNb)、铝(Al)、铝钕合金(AlNd)、钛(Ti)和铜(Cu)中的一种或它们中多种材料形成的单层或多层复合叠层，优选为Mo、Al或含Mo、Al的合金组成的单层或多层复合膜。
步骤五、在完成步骤四的基底上，沉积平坦化层17，并在平坦化层中形成用于像素电极(阳极)18与漏极16B连接的接触过孔。
平坦化层17的材料可以为硅的氧化物(SiOx)、硅的氮化物(SiNx)、铪的氧化物(HfOx)、硅的氮氧化物(SiOxNy)、铝的氧化物(AlOx)等或由其中两种或三种组成的多层膜组成。
步骤六、在完成步骤五的基底上，沉积第一导电金属层，并通过一次构图工艺在显示区域AR形成每个像素的AM-OLED的阳极18的图形(各个阳极18单独设置)，在周边区域AR′形成每个PM-OLED的阳极25的图形(设于同一行的阳极25形成为一体)，如图3所示。
第一导电金属层的材料可以为ITO(氧化铟锡)/Ag(银)/ITO(氧化铟锡)或者Ag(银)/ITO(氧化铟锡)结构中的任意一种；或者，把上述结构中的ITO换成IZO(氧化铟锌)、IGZO(氧化铟镓锌)或InGaSnO(氧化铟镓锡)中的任意一种。
步骤七、在完成步骤六的基底上，通过构图工艺形成像素限定层的图形，所述像素限定层包括AM-OLED的像素限定层19和PM-OLED的像素限定层23。然后，采用一次蒸镀工艺形成AM-OLED的发光层21和PM-OLED的发光层22的图形，如图4所示。
像素限定层的材料可以为硅的氧化物(SiOx)、硅的氮化物(SiNx)、铪的氧化物(HfOx)、硅的氮氧化物(SiOxNy)、铝的氧化物(AlOx)等或由其中两种或三种组成的多层膜组成。
发光层的材料可以采用无掺杂的荧光发光的有机材料制成， 或采用由荧光掺杂剂与基质材料组成的掺杂荧光材料的有机材料制成，或采用由磷光掺杂剂与基质材料组成的掺杂磷光材料的有机材料制成。
步骤八、在完成步骤七的基底上，通过构图工艺在显示区域AR的AM-OLED的像素限定层19上方形成多个第一隔垫柱20；第一隔垫柱20的形状可为正梯形，如图5所示。
第一隔垫物20的材料为树脂材料，可以为聚酰亚胺、亚克力、酚醛树脂。
步骤九、在完成步骤八的基底上，通过构图工艺在周边区域AR′的PM-OLED的像素限定层23上方形成多个第二隔垫柱24。第二隔垫柱24可为倒梯形。其中在形成第二隔垫柱时采用的是负性光刻胶，如图6所示。
第二隔垫物24的材料为树脂材料，可以为聚酰亚胺、亚克力、酚醛树脂。
步骤十、在完成步骤九的基底上，通过一次蒸镀工艺形成各个AM-OLED的阴极26的图形，以及各个PM-OLED的阴极27的图形。其中，各个AM-OLED的阴极26形成为一体，处于同一列的各个PM-OLED的阴极27形成为一体，如图2所示。
阴极层作为有机电致发光器件负向电压的连接层，具有较好的导电性能和较低的功函数。阴极层通常采用低功函数金属材料，比如：锂、镁、钙、锶、铝、铟等或上述金属与铜、金、银的合金制成；或者采用一层很薄的缓冲绝缘层(如氟化锂LiF、碳酸铯CsCO3等)和上述金属或合金制成。
至此完成阵列基板的制备。
本发明实施例提供了在一种显示装置，其包括本发明实施例的阵列基板。该显示装置可以为：OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (18)

  1. 一种阵列基板，包括显示区域和在所述显示区域外围的周边区域，在所述显示区域内设置有多个主动式有机电致发光二极管，其中，所述阵列基板还包括设置在所述周边区域内的多个被动式有机电致发光二极管；所述主动式有机电致发光二极管和被动式有机电致发光二极管均与电源驱动单元电连接。
  2. 根据权利要求1所述的阵列基板，其中，所述主动式有机电致发光二极管的顶电极与所述被动式有机电致发光二极管的顶电极同层设置且材料相同；
    所述主动式有机电致发光二极管的底电极与所述被动式有机电致发光二极管的底电极同层设置且材料相同；并且
    所述主动式有机电致发光二极管的发光层与所述被动式有机电致发光二极管的发光层同层设置且材料相同。
  3. 根据权利要求1所述的阵列基板，其中，多个所述被动式有机电致发光二极管呈矩阵排列，设于同一行的所述被动式有机电致发光二极管的底电极连接成一体，并且设于同一列的所述被动式有机电致发光二极管的顶电极连接成一体。
  4. 根据权利要求1所述的阵列基板，还包括：位于周边区域的所述被动式有机电致发光二极管所在层下方的栅极驱动电路，所述栅极驱动电路用于驱动多个所述主动式有机电致发光二极管。
  5. 根据权利要求1所述的阵列基板，还包括：位于显示区域的所述主动式有机电致发光二极管所在层下方的多个开关晶体管；其中，每一个所述开关晶体管的漏极连接对应的一个所述主动式有机电致发光二极管的底电极。
  6. 根据权利要求1所述的阵列基板，还包括位于在显示区域内的所述主动式有机电致发光二极管的像素限定层上方的多个第一隔垫柱；以及，位于在周边区域内的所述被动式有机电致发光二极管的像素限定层上方的多个第二隔垫柱。
  7. 根据权利要求6所述的阵列基板，其中，所述第一隔垫柱的形状为正梯形；所述第二隔垫柱的形状为倒梯形。
  8. 根据权利要求1所述的阵列基板，其中，所述主动式有机电致发光二极管的顶电极形成为一体。
  9. 根据权利要求1所述的阵列基板，还包括位于所述阵列基板最外周的非显示区域，其对应于所述阵列基板的边框。
  10. 一种阵列基板的制备方法，所述阵列基板包括显示区域和在所述显示区域外围的周边区域，所述制备方法包括：
    在位于显示区域内的基底上方，形成多个主动式有机电致发光二极管的步骤；以及
    在位于周边区域内的基底上方，形成多个被动式有机电致发光二极管的步骤；其中，
    所述主动式有机电致发光二极管和被动式有机电致发光二极管均与电源驱动单元电连接。
  11. 根据权利要求10所述的阵列基板的制备方法，其中，通过一次构图工艺形成所述主动式有机电致发光二极管的顶电极与所述被动式有机电致发光二极管的顶电极；
    通过一次构图工艺形成所述主动式有机电致发光二极管的底电极与所述被动式有机电致发光二极管的底电极；以及
    通过一次构图工艺形成所述主动式有机电致发光二极管的发 光层与所述被动式有机电致发光二极管的发光层。
  12. 根据权利要求11所述的阵列基板的制备方法，其中，在通过一次构图工艺形成所述主动式有机电致发光二极管的顶电极与所述被动式有机电致发光二极管的顶电极之前，还包括：
    在位于显示区域的所述主动式有机电致发光二极管的像素限定层上方形成多个第一隔垫柱；以及，在位于周边区域的所述被动式有机电致发光二极管的像素限定层上方形成多个第二隔垫柱。
  13. 根据权利要求12所述的阵列基板的制备方法，其中，所形成的所述第一隔垫柱为正梯形；所形成的所述第二隔垫柱为倒梯形。
  14. 根据权利要求10所述的阵列基板的制备方法，其中，所形成的多个所述被动式有机电致发光二极管呈矩阵排列，设于同一行的所述被动式有机电致发光二极管的底电极形成为一体；设于同一列的所述被动式有机电致发光二极管的顶电极形成为一体。
  15. 根据权利要求10所述的阵列基板的制备方法，其中，在周边区域形成所述被动式有机电致发光二极管的步骤之前，还包括：
    在位于周边区域的基底上形成栅极驱动电路。
  16. 根据权利要求15所述的阵列基板的制备方法，其中，在显示区域形成所述主动式有机电致发光二极管的步骤之前，还包括：
    在位于显示区域的基底上形成开关晶体管，并且
    通过相同的构图工艺形成位于显示区域的基底上的开关晶体 管以及位于周边区域的基底上的栅极驱动电路。
  17. 根据权利要求10所述的阵列基板的制备方法，其中，在显示区域形成所述主动式有机电致发光二极管的步骤之前，还包括：
    在位于所述显示区域的基底上形成多个开关晶体管；以及，
    在所述开关晶体管的上方形成平坦化层，并在每个开关晶体管的漏极上方形成贯穿平坦化层的过孔；其中，
    每个开关晶体管的漏极通过所述过孔连接对应的一个主动式有机电致发光二极管的底电极。
  18. 一种显示装置，其中，所述显示装置包括权利要求1-9中任一项所述的阵列基板。
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