WO2017066896A1 - 芯片正背面之间的电性连接结构及其制造方法 - Google Patents

芯片正背面之间的电性连接结构及其制造方法 Download PDF

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Publication number
WO2017066896A1
WO2017066896A1 PCT/CN2015/000712 CN2015000712W WO2017066896A1 WO 2017066896 A1 WO2017066896 A1 WO 2017066896A1 CN 2015000712 W CN2015000712 W CN 2015000712W WO 2017066896 A1 WO2017066896 A1 WO 2017066896A1
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Prior art keywords
chip
circuit board
pads
flexible circuit
connection pads
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PCT/CN2015/000712
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English (en)
French (fr)
Inventor
朱贵武
卢旋瑜
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璩泽明
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Application filed by 璩泽明 filed Critical 璩泽明
Priority to PCT/CN2015/000712 priority Critical patent/WO2017066896A1/zh
Publication of WO2017066896A1 publication Critical patent/WO2017066896A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details

Definitions

  • the invention relates to an electrical connection structure between a front and a back of a chip and a manufacturing method thereof, in particular to a single-sided flexible circuit board (FPC) provided with a connection pad on one side thereof. It is bent by the front side of a chip to bypass one side edge of the chip and then folded back to be positioned on the back surface of the chip, so that the die pads provided on the front side of the chip can be moved by the single-sided FPC.
  • the back side of the chip is electrically connected and mounted on a printed circuit board so that the active area provided on the front side of the chip can match the printed circuit board to achieve the function of the active area.
  • the chip Using a surface mount technology (SMT) to electrically connect a chip in a flip-chip manner and mount it on a printed circuit board (PCB), which is a common state of use and current technology of the current chip, at this time, the chip A plurality of die pads disposed on the front surface face the printed circuit board (PCB) and are electrically connected to respective preset contacts of the circuit layer disposed on the surface of the printed circuit board.
  • SMT surface mount technology
  • a fingerprint identification chip such as the chip 10 shown in FIG. 1
  • the front surface 11 of the chip 10 is provided with a plurality of die pads 110 and an active area 111, such as fingerprint identification.
  • a sensor active area (111) for sensing a fingerprint image such as pressing a finger on the surface of the active area 111 and converting it into an electronic signal, and passing through the plurality of die pads
  • the electronic signal is transmitted to a printed circuit board 50 (shown in FIG.
  • the active area 111 such as the fingerprint recognition sensing area, is externally sensed, the surface of the active area 111 must face the opposite side of the printed circuit board 50 (shown in FIG. 2) (ie, the front side 11 of the chip 10), otherwise The printed circuit board 50 is covered, so that a plurality of die pads 110 on the front surface 11 of the chip 10 cannot be electrically connected and mounted on the printed circuit board 50 in a flip-chip manner.
  • a plurality of bonding pads 110 on the front surface 11 of the chip 10 and the printed circuit board 50 may be electrically connected by other bonding methods, such as a wire bond method
  • the wire is drawn from the surface of the die pad 110 to the arc (if over the One side edge of the chip 13) the printed circuit board 50 at the back side 12 of the chip 10, so that the highest point of the wire is relatively higher than the front surface 11 of the chip 10 or a die pad 110 thereon, and
  • the plurality of wires are generally coated with an insulating outer cover to cover and protect the plurality of wires so that the plurality of wires or outer sheath thereof are opposite to the action.
  • the difference between the sensing faces of the active area 111 is increased. As illustrated by FIG.
  • the drop is like the sensing surface of the second surface 22 and the active area 111 in FIG. 2 (eg, the front side 11 of the chip 10).
  • the actual drop will be larger than the 50 ⁇ m shown in Figure 2, causing the difference and unevenness between the surface of the active area 111 and the surrounding surface, affecting the active area 111 (such as the fingerprint identification sensing area) Inductive function and use efficiency;
  • the insulating outer sheath coated on the periphery of the plurality of wires also enlarges the surface area of the package of the chip 10 relatively outward, which is disadvantageous for the requirements of lightness and shortness.
  • electrical conductive vias are arranged between the front side 11 and the back side 12. The design of such vias is common in chip packaging and related prior art, but the manufacturing process is relatively cumbersome and Complex and not cost effective.
  • a double-sided FPC (which is provided with a connection pad on both sides) may be used between the plurality of die pads 110 on the front surface 11 of the chip 10 and the printed circuit board (PCB), although The trouble of arranging the via holes between the front surface 11 and the back surface 12 of the chip 10 can be avoided, but the package structure on the front surface of the chip 10 still has a large drop and unevenness between the surface of the active region 111 and the surrounding surface.
  • the disadvantage is that the active area 111, such as the identification sensing area, cannot approach the object to be tested, and relatively affects the sensing capability and the use efficiency of the active area 111; in addition, since the double-sided FPC is provided with connection pads on both sides thereof, Moreover, a separate conduction circuit is required between the connection pads provided on both sides. Therefore, the thickness of the double-sided FPC is relatively large, which affects the total thickness of the package (e.g., larger than 400 ⁇ m as shown in FIG. 2), and also affects the package. The total width of completion (e.g., the width of the outward expansion of the chip is larger than 120 ⁇ m as shown in Fig. 2), and there is also a trouble that the manufacturing process is cumbersome and the cost is increased.
  • the total thickness of completion e.g., the width of the outward expansion of the chip is larger than 120 ⁇ m as shown in Fig. 2
  • the main purpose of the present invention is to provide an electrical connection structure between a front and a back of a chip and a manufacturing method thereof, which are provided on only one surface thereof by using a flexible printed circuit (FPC).
  • FPC flexible printed circuit
  • a plurality of first connection pads and a plurality of points corresponding to the crystal pad provided on the front side of the chip a second connection pad corresponding to each of the first connection pads, and then each of the first connection pads provided on the single-sided FPC is electrically connected to each of the crystal pads provided on the front surface of the chip, and then the single connection pad is
  • the FPC of the surface is bent around one edge of the chip to extend to the back of the chip, and is folded back once again to be positioned on the back surface of the chip, so that the second connection pads provided on the single-sided FPC can be electrically Connected and mounted on a printed circuit board so that the pads provided on the front side of the chip can be moved to the back of the chip through the circuit of the single-sided FPC for electrical connection and
  • the function area of the front side of the chip can be matched with the printed circuit board to achieve the function of the active area, and the manufacturing cost of the single-sided FPC is reduced, and the package on the front side of the chip is relatively thinned to improve The efficiency of use of the active area on the front side.
  • the electrical connection structure between the front and back sides of the chip includes a chip and a single-sided flexible circuit board, and the chip has a plurality of die pads and at least one on the front surface thereof.
  • An active area such as a fingerprint active area;
  • the single-sided flexible circuit board has a first surface and a second surface, but only a plurality of the first surface Corresponding to a first connection pad of the chip pad and a plurality of second connection pads respectively connected to the first connection pads, the plurality of second connection pads being used for pre-prepared on a printed circuit board
  • the exposed contacts of the circuit are respectively connected to enable the chip to be mounted on the printed circuit board and electrically connected through the plurality of second connection pads provided on the single-sided flexible circuit board.
  • the single-sided flexible circuit board is bent from the front surface of the chip and bypasses one side edge of the chip to extend to the back surface of the chip and adheres to the back surface, and is folded back once again to be positioned on the chip.
  • the second connecting pads provided on the first surface are electrically connected and mounted on the printed circuit board, so that the crystal pads provided on the front surface of the chip can pass through the single-sided flexible circuit board.
  • the mobile device is moved to the back side of the chip and faces outward to be electrically connected and mounted on the printed circuit board.
  • the method for manufacturing an electrical connection structure between the front and back sides of a chip comprises the following steps:
  • Step 1 Providing a chip having a plurality of die pads and at least one active area on the front side of the chip.
  • Step 2 providing a single-sided flexible circuit board having a first surface and a second surface, wherein a plurality of front portions of the first surface are provided corresponding to the chip a first connection pad of the crystal pad and a plurality of second connection pads respectively connected to the first connection pads, wherein the plurality of second connection pads are connected to the contacts of the preset circuit on the printed circuit board,
  • the chip can be mounted on the printed circuit board through the plurality of second connection pads to achieve electrical connection.
  • Step 3 The first connection pads disposed on the first surface of the single-sided flexible circuit board are electrically connected to each of the crystal pads on the front surface of the chip.
  • Step 4 The single-sided flexible circuit board is bent around one side edge of the chip to extend to the back surface of the chip, and folded back once to be positioned on the back surface of the chip, and then the single-sided flexible circuit
  • Each of the second connection pads disposed on the board can be electrically connected and mounted on a printed circuit board, so that the second connection pads provided on the single-sided flexible circuit board can face outward. It can be electrically connected and mounted on a phase-matched printed circuit board by subsequent operations, so that the active area provided on the front side of the chip can be used in conjunction with the printed circuit board to achieve the function of the active area.
  • an active area disposed on a front surface of the chip is a sensor active area, and a high transmittance is further disposed on the upper surface of the sensing area. a dielectric layer for protecting the sensing area.
  • the height of the high transmittance dielectric layer disposed on the sensor active area is electrically connected to the first connection pads on the single-sided FPC.
  • the height after each pad is flush, that is, the same height as the top surface (second surface) of the single-sided FPC.
  • FIG. 1 is a top plan view of an embodiment of a chip in the present invention.
  • FIG. 2 is a cross-sectional view showing an embodiment of an electrical connection structure between a front and a back of a chip according to the present invention
  • 3A-3E are schematic flow charts of a method for manufacturing an electrical connection structure between a front and a back of a chip according to the present invention
  • FIG. 4 is a cross-sectional view showing a dielectric layer having a high transmittance disposed on the front surface of the sensing region provided on the front surface of the chip of FIG. 1;
  • FIG. 5 is a cross-sectional view showing the height of the high transmittance dielectric layer in FIG. 4 being flush with the height of the flexible circuit board.
  • the electrical connection structure between the front and back sides of the chip provided by the present invention comprises a chip 10 and a single-sided flexible circuit board (FPC) 20.
  • the chip 10 can be a fingerprint identification chip, and the active area can be a fingerprint active area but not limited.
  • the front surface 11 of the chip 10 is provided with a plurality of die pads 110 and at least one sensor active area 111 (such as a fingerprint identification sensing area), as shown in FIG.
  • the front surface 11 of the chip 10 is provided with four die pads 110 adjacent to one side edge 13 of the chip 10 and arranged in a row, but is not limited, so only one is shown in FIG. A die pad 110. Taking the chip 10 in FIG.
  • the chip 10 is a fingerprint identification chip
  • the active area 111 is a fingerprint active area, which occupies a large area on the front surface 11 of the chip 10.
  • For sensing a fingerprint image externally such as sensing a fingerprint image generated by pressing a finger on the surface of the active area 111 and converting it into an electronic signal, and then transmitting the electronic signal to the connected by the die pad 110 Printed circuit board 50 for identification.
  • the single-sided flexible circuit board 20 can be a long rectangular flexible circuit board and has a predetermined circuit according to the needs of use.
  • the design has a first surface 21 and a second surface 22; a portion of the single-sided flexible circuit board 20, as shown in the front portion of FIG. 2, is bonded to the front surface 11 of the chip 10, and then The front side 11 of the chip 10 is bent around one side edge of the chip 10 to extend to the back side 12 of the chip 10, and then folded back once to be positioned on the back side 12 of the chip 10; wherein the single-sided flexible circuit
  • the board 20 needs to cover all of the back side 12 of the chip 10, as shown in FIG. 2, but is not limited, that is, the single-sided flexible circuit board 20 can also cover a portion of the back side 12 of the chip 10 as needed for design.
  • the single-sided flexible circuit board 20 has a first surface 21 and a second surface 22, but only a plurality of first connection pads 210 and a plurality of first connection pads are respectively disposed on the first surface 21 Correspondingly connected to the second connection pad 211.
  • the plurality of first connection pads 210 are respectively corresponding to a plurality of die pads 110 disposed on the front surface 11 of the chip 10.
  • the plurality of second connection pads 211 are respectively connected to the contacts of the preset circuit on the printed circuit board 50 through the single-sided circuit of the single-sided flexible circuit board 20, so that the chip 10 can pass the multiple Second connection pads 211 are mounted on the printed circuit On the board 50, an electrical connection is made.
  • connection relationship between the plurality of second connection pads 211 and the plurality of first connection pads 210 is established on the circuit design of the single-sided flexible circuit board 20, and the existing circuit is utilized for the present invention.
  • the board circuit design technology can be achieved, so it will not be described here.
  • the plurality of first connection pads 210 are separated from the plurality of second connection pads 211 by a distance and are disposed on the same surface of the single-sided flexible circuit board 20 The surface 21, as shown in FIGS.
  • connection pad 210 and the plurality of second connection pads 211 are respectively located at the front portion and the rear portion of the single-sided flexible circuit board 20, but are not limited, so that the front portion of the single-sided flexible circuit board 20 can be Falling on the front side 11 of the chip 10, and allowing the single-sided flexible circuit board 20 to be bent from the front side 11 of the chip 10 around the side edge 13 of the chip 10 to extend to the back side 12 of the chip 10,
  • the middle portion of the first surface 21 can be adhesively attached to the back surface 12 and then folded back once so that the rear portion of the second surface 22 can be adhesively applied to the back surface 12
  • the middle portion of the second surface 22, in turn, enables the rear portion of the first surface 21 to be positioned on the back side 12 of the chip 10.
  • the plurality of second connection pads 211 disposed on the rear portion of the first surface 21 can be connected to the exposed contacts on the printed circuit board 50, such as the arrow in FIG. As shown in A, the chip 10 can be mounted on the printed circuit board 50 and electrically connected through the plurality of second connection pads 211 provided in the single-sided flexible circuit board 20.
  • the design of the printed circuit board or the corresponding connection method employed is considered to be prior art in the present invention and will not be further described.
  • an electroless nickel/immersion gold (ENIG) 30 may be disposed on the surface of each die pad 110, but is not limited; the chemical nickel gold layer (ENIG) 30 It is used to prevent oxidation of the die pad 110 and to improve the solder joint connection efficiency between the first connection pad 210 and the die pad 110.
  • an adhesive layer 40 such as a double-sided adhesive, may be preset at an appropriate position in the middle portion of the first surface 21 of the single-sided flexible circuit board 20, but
  • the single-sided flexible circuit board is not limited so that the single-sided flexible circuit board 20 is bent from the front surface 11 of the chip 10 around the side edge 13 of the chip 10 to the back surface 12 of the chip 10.
  • the middle portion of the first surface 21 of the film 20 can be adhered to the side edge 13 and the back surface 12 of the chip 10 by the adhesive layer 40.
  • an adhesive layer 40 such as a double-sided adhesive, may be preset at an appropriate position of the rear portion of the second surface 21 of the single-sided flexible circuit board 20.
  • the second surface 22 is not limited, so that the middle portion of the first surface 21 of the single-sided flexible circuit board 20 is adhered to the back surface 12 of the chip 10 and then folded again.
  • the segment portion can be adhered to the middle portion of the second surface 22 that has been attached to the back surface 12 by the adhesive layer 40, and the plurality of portions provided in the rear portion of the first surface 21
  • Two connection pads 211 can be positioned on the back side 12.
  • the electrical connection structure between the front and back sides of the chip provided by the present invention is compared with the existing wire bond method, and the surface area of the chip 10 package in the present invention is as shown in FIG.
  • the width of the chip 10 plus the width of the adhesive layer 40 and the width of the single-sided flexible circuit board 20 can be effectively reduced; even with the double-sided FPC (FPC is provided on both sides of the circuit)
  • the surface area (width) of the chip 10 package in the present invention ) also relatively reduced, such as the width of the outward expansion of the side edge 13 of the chip is equal to or smaller than 120 ⁇ m as shown in FIG. 2, which is advantageous for making the invention light, thin and short in the application of the technical field. Claim.
  • the manufacturing method of the electrical connection structure between the front and back sides of the chip provided by the invention comprises the following steps:
  • Step 1 provide a chip 10, as shown in FIG. 3A, the front surface 11 of the chip 10 is provided with a plurality of crystal pads 110 and at least one active region 111; and each of the crystal pads 110 can be preset with a chemical nickel gold layer (ENIG) 30, as shown in Figure 3B.
  • ENIG chemical nickel gold layer
  • Step 2 providing a single-sided flexible circuit board 20, as shown in FIG. 3C, the single-sided flexible circuit board 20 has a first surface 21 and a second surface 22, and is disposed on the first surface 21 a plurality of first connection pads 210 corresponding to the pad 110 of the chip 10 and a plurality of second connection pads 211 respectively corresponding to the first connection pads 210, the plurality of first connection pads 210 respectively corresponding to the a plurality of crystal pads 110, wherein the plurality of second connection pads 211 are connected to the contacts of the preset circuit on the printed circuit board (50) for use, so that the chip 10 can pass the plurality of second
  • the connection pad 211 is mounted on the printed circuit board (50) to achieve electrical connection; wherein, at a suitable position on the first surface 21 and the second surface 22 of the single-sided flexible circuit board 20, as in At a suitable position of the middle portion of the first surface 21 and the rear portion of the second surface 21 of the single-sided flexible circuit board 20, an adhesive layer 40, such as a double-sided adhesive
  • Step 3 setting the first connection pads on the first surface 21 of the single-sided flexible circuit board 20 210 corresponds to each of the crystal pads 110 on the front surface 11 of the chip 10 or its chemical nickel gold layer (ENIG) 30, as shown in FIGS. 3C and 3D.
  • ENIG chemical nickel gold layer
  • Step 4 As shown in FIG. 2, FIG. 3D-3E, the single-sided flexible circuit board 20 is bent and bypassed on one side edge 13 of the chip 10 to extend onto the back surface 12 of the chip 10, and the single The middle portion of the first surface 21 of the surface flexible circuit board 20 is adhesively attached (for example, by using the adhesive layer 40) on the back surface 12, and then folded back once, so that the rear portion of the second surface 22 can be Adhesively attaching (e.g., using the adhesive layer 40) to the midsection of the second surface 22 that has been applied to the back surface 12, thereby enabling the rear portion of the first surface 21 to be positioned on the back of the chip 10.
  • the second connection pads 211 provided on the first surface 21 of the single-sided flexible circuit board 20 can face outward (as indicated by an arrow A in FIG. 2) for subsequent operations.
  • Electrically connected and mounted on a phase-matched printed circuit board 50 such that the active area 111 provided on the front side 11 of the chip 10 can be used in conjunction with the printed circuit board 50 to achieve the function of the chip 10, such as a fingerprint. Identify the fingerprint recognition function of the chip.
  • a high transmittance dielectric layer 60 is further disposed on the surface of the active region 111 to protect the active region 111 without affecting its function of use; as shown in FIG.
  • the dielectric layer 60 is disposed on the front surface 11 of the chip 10 for comprehensively shielding the active region 111 but exposing the chemical nickel provided on each of the die pads 110 and/or the die pads 110.
  • Gold layer (ENIG) 30 is provided on each of the die pads 110 and/or the die pads 110.
  • the height of the high transmittance dielectric layer 60 disposed on the inductive active region 111 in FIG. 4 is further the height of the single-sided flexible circuit board 20 falling on the front surface 11 of the chip 10 (ie, FIG. 4 5, the surface of the second surface 22 of the single-sided flexible circuit board 20 is flush, as shown in FIG. 5, so that the front surface 11 of the chip 10 forms the same plane to conform to the chip 10 such as a fingerprint identification chip. Assembly needs in practical applications.

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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
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  • General Physics & Mathematics (AREA)
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Abstract

一种芯片正背面之间的电性连接结构及其制造方法，芯片正背面之间的电性连接结构包含一芯片（10）及一只在其一表面上设有连接垫的单面式软性电路板（20），该芯片（10）的正面（11）上设有多个晶垫（110）及至少一作用区（111）；该单面式软性电路板（20）具有一第一表面（21）及一第二表面（22），但只在该第一表面（21）上设有多个对应于该芯片晶垫（110）的第一连接垫（210）及多个分别与各第一连接垫（210）对应连接的第二连接垫（211），该多个第二连接垫（211）用以与一印刷电路板（50）上所预设电路的各接点对应连接；制造时，利用该单面式软性电路板（20）将其第一表面（21）上所设的各第一连接垫（210）对应电性连接在该芯片正面的各晶垫（110）上，再使该单面式软性电路板（20）弯曲绕过该芯片一侧边缘（13）以延伸至该芯片的背面（12），并再反折一次以定位在该芯片的背面（12）上。

Description

芯片正背面之间的电性连接结构及其制造方法 技术领域
本发明涉及一种芯片正背面之间的电性连接结构及其制造方法，尤指一种利用一只在其一单面上设有连接垫的单面式软性电路板(FPC)，使其由一芯片的正面弯曲绕过该芯片一侧边缘并再反折以定位在该芯片的背面上，使芯片正面上所设的各晶垫(die pad)能通过该单面式FPC而移动至芯片的背面供可电性连接并安装在一印刷电路板上，以使该芯片正面上所设的作用区能配合该印刷电路板而达到作用区的使用功能。
背景技术
利用表面黏着技术(SMT)将一芯片以覆晶(flip-chip)方式电性连接并安装在一印刷电路板(PCB)上，为目前芯片常见的使用状态及现有技术，此时该芯片的正面上所设的多个晶垫(die pad)即面对该印刷电路板(PCB)且能对应电性连接于该印刷电路板表面上所设电路层的各预设接点上。
但当一芯片的正面上除了多个晶垫(die pad)之外，还设有其他作用区(active area)时，即无法以现有覆晶(flip-chip)方式电性连接并安装在一印刷电路板(PCB)上。在此以一指纹辨识芯片，如图1所示的芯片10为例，该芯片10的正面11上设有多个晶垫(die pad)110及一作用区(active area)111，如指纹辨识感应作用区(sensor active area)，该感应作用区111用以对外感应一指纹影像(如将手指按在作用区111表面上)并转换成电子信号，再通过该多个晶垫(die pad)110将电子信号传输至所电性连接的一印刷电路板50(如图2所示，其位于该芯片10的背面12的外方)供进行辨识功能或相关作业。由于该作用区111如指纹辨识感应作用区是对外感应，故该作用区111的表面须朝向该印刷电路板50(如图2所示)的相对侧(即芯片10的正面11)，否则会被该印刷电路板50遮住，因此该芯片10的正面11上的多个晶垫(die pad)110无法以覆晶(flip-chip)方式电性连接并安装在印刷电路板50上。
虽然，该芯片10的正面11上多个晶垫(die pad)110与印刷电路板50之间可采用其他接合方式来进行电性连接，如采用导线连接(wire bond)方式，但所使用的导线是从晶垫(die pad)110表面呈弧状拉引至(如越过该 芯片的一侧边缘13)该芯片10的背面12处的印刷电路板50，因此导线的最高点相对会高出该芯片10的正面11或其上的晶垫(die pad)110一段距离，又该多根导线(wire)外围一般会再涂覆一绝缘外护层用以盖住并保护该多根导线(wire)，以使该多根导线(wire)或其外护层相对于该作用区(active area)111的感应面之间的落差加大，以图2为例说明，该落差就像是图2中第二表面22与该作用区111的感应面(如芯片10的正面11)之间的落差，但实际落差会比图2中所示的50μm大，造成作用区111的表面与周遭表面之间的落差及不平整，相对影响该作用区111(如指纹辨识感应作用区)的感应功能及使用效率；此外，涂覆在该多根导线(wire)外围的绝缘外护层亦相对向外扩大该芯片10封装的表面积，不利于轻薄短小的要求。另，如在芯片10的封装中在正面11及背面12之间安排电性导通用导通孔，此类导通孔的设计常见于芯片封装及相关现有技术中，但制造过程相对麻烦且复杂，不符合成本效益。
此外，该芯片10的正面11上的多个晶垫(die pad)110与印刷电路板(PCB)之间可采用双面式FPC(其在双面上皆设有连接垫)连接方式，虽可避免在芯片10的正面11及背面12之间安排导通孔的麻烦，但芯片10正面上的封装结构仍存在该作用区111的表面与周遭表面之间会产生较大落差及不平整现象的缺点，致使作用区111如辨识感应作用区无法接近待测物，相对影响该作用区111的感测能力及使用效率；此外，由于双面式FPC是在其双面各设有连接垫，且双面所设连接垫之间须另外增设导通电路，因此双面式FPC的厚度较大，相对影响封装完成的总厚度(如比图2中所示的400μm大)，亦相对影响封装完成的总宽度(如芯片向外扩增的宽度大于如图2中所示的120μm)，且还存在制造过程繁琐及成本增加的麻烦。
由上可知，对一正面上同时设有多个晶垫(die pad)及其他作用区(active area)的芯片如指纹辨识芯片而言，本领域的现有技术的结构及/或制程实难以符合实际使用时的需求，因此仍存在进一步改进空间。
发明内容
本发明的主要目的在于提供一种芯片正背面之间的电性连接结构及其制造方法，其利用一单面式软性电路板(FPC，Flexible Printed Circuit)，只在其一表面上设有多个对应于一芯片正面所设晶垫的第一连接垫及多个分 别与各第一连接垫对应连接的第二连接垫，再使该单面式FPC上所设的各第一连接垫对应电性连接在该芯片正面所设的各晶垫上，再使该单面式FPC弯曲绕过该芯片一侧边缘以延伸至该芯片的背面，并再反折一次以定位在该芯片的背面上，使该单面式FPC上所设的各第二连接垫能电性连接并安装在一印刷电路板上，以使芯片正面上所设的各晶垫能通过该单面式FPC的电路连通而移动至芯片的背面供可电性连接并安装在该印刷电路板上，以使该芯片正面上所设的作用区能配合该印刷电路板而达到作用区的使用功能，并降低该单面式FPC的制作成本，且相对薄化该芯片正面上的封装以增进其正面上所设作用区的使用效率。
为了达到上述目的，本发明提供的芯片正背面之间的电性连接结构包含一芯片及一单面式软性电路板，该芯片的正面上设有多个晶垫(die pad)及至少一作用区(active area)，如指纹辨识感应作用区(sensor active area)；该单面式软性电路板具有一第一表面及一第二表面，但只在该第一表面上设有多个对应于该芯片晶垫的第一连接垫及多个分别与各第一连接垫对应连接的第二连接垫，该多个第二连接垫用以与一相配合使用的印刷电路板上所预设的电路的各外露接点分别对应连接，以使该芯片能通过该单面式软性电路板所设的该多个第二连接垫而安装在该印刷电路板上并实现电性连接。
其中，该单面式软性电路板由该芯片的正面弯曲并绕过该芯片一侧边缘以延伸至该芯片的背面并黏着贴覆在该背面上，并再反折一次以定位在该芯片的背面上，使该第一表面上所设的各第二连接垫电性连接并安装在印刷电路板上，以使芯片正面上所设的各晶垫能通过该单面式软性电路板而移动至芯片的背面并面朝向外以供电性连接并安装在该印刷电路板上。
为了达到上述目的，本发明提供的芯片正背面之间的电性连接结构的制造方法包含下列步骤：
步骤1：提供一芯片，该芯片的正面上设有多个晶垫(die pad)及至少一作用区(active area)。
步骤2：提供一单面式软性电路板，该单面式软性电路板具有一第一表面及一第二表面，其中，在该第一表面的前段部分设有多个对应于该芯片晶垫的第一连接垫及多个分别与各第一连接垫对应连接的第二连接垫，该多个第二连接垫用以与一印刷电路板上所预设电路的各接点对应连接，以使该芯片能通过该多个第二连接垫而安装在该印刷电路板上以实现电性连接。
步骤3：将该单面式软性电路板的第一表面上所设的各第一连接垫对应电性连接在该芯片正面的各晶垫上。
步骤4：使该单面式软性电路板弯曲绕过该芯片一侧边缘以延伸至该芯片的背面，并反折一次以定位在该芯片的背面上，再使该单面式软性电路板上所设的各第二连接垫能电性连接并安装在一印刷电路板上，藉此使该单面式软性电路板上所设的各第二连接垫能面对向外，供可通过后续作业以电性连接并安装在一相配合印刷电路板上，使该芯片的正面上所设的作用区能配合该印刷电路板使用而达到作用区的使用功能。
在本发明一实施例中，其中该芯片的正面上所设的作用区(active area)为一指纹辨识感应作用区(sensor active area)，且该感应作用区的上面进一步设置一高透光度介质层，用以保护该感应作用区。
在本发明一实施例中，其中该感应作用区(sensor active area)上所设置的高透光度介质层的高度与该单面式FPC上各第一连接垫对应电性连接在该芯片正面的各晶垫上之后的高度齐平，即与该单面式FPC的顶面(第二表面)形成同一高度。
附图说明
图1为本发明中的芯片一实施例的上视示意图；
图2为本发明提供的芯片正背面之间的电性连接结构一实施例的剖视示意图；
图3A～图3E为本发明提供的芯片正背面之间电性连接结构的制造方法的流程示意图；
图4为图1中本发明中的芯片正面上所设感应作用区的上面设置一高透光度的介质层的剖视示意图；
图5为图4中该高透光度介质层的高度与该软性电路板的高度齐平的剖视示意图。
附图标记说明：10-芯片；11-正面；12-背面；13-侧边缘；110-晶垫；111-作用区；20-单面式软性电路板；21-第一表面；210-第一连接垫；211-第二连接垫；22-第二表面；30-化学镍金层(ENIG)；40-黏胶层；50-印刷电路板；60-高透光度介质层。
具体实施方式
为使本发明更加明确详实，兹列举较佳实施例并配合下列图示，将本发明的结构及其技术特征详述如后(在此说明，图1～5只是示意图而非实际的尺寸或比例)：
如图2所示，本发明提供的芯片正背面之间的电性连接结构包含一芯片10及一单面式软性电路板(FPC)20。该芯片10可为一指纹辨识芯片，该作用区(active area)可为一指纹辨识感应作用区(sensor active area)但不限制。该芯片10的正面11上设有多个晶垫(die pad)110及至少一作用区(sensor active area)111(如指纹辨识感应作用区)，如图1所示。在图1中，该芯片10的正面11上设有四个靠近该芯片10的一侧边缘13的晶垫(die pad)110并排列成一排，但不限制，因此在图2中只显示一晶垫(die pad)110。又以图1中的芯片10为例说明，该芯片10为一指纹辨识芯片，该作用区111为一指纹辨识感应作用区(sensor active area)，其占有该芯片10的正面11上较大面积，用以对外感应一指纹影像，如感应将手指按压在该作用区111的表面产生的指纹影像并转换成电子信号，再通过该些晶垫(die pad)110以将电子信号传输至所连接的印刷电路板50，以供进行辨识。
如图2所示，但图2所示的尺寸及比例并非用以限制本发明，该单面式软性电路板20可采用一长矩形软性电路板，并依使用需要而具有预定的电路设计，其具有一第一表面21及一第二表面22；该单面式软性电路板20的一部分，如图2所示的前段部分，是固结在该芯片10的正面11上，再由该芯片10的正面11弯曲绕过该芯片10一侧边缘以延伸至该芯片10的背面12，之后再反折一次以定位在该芯片10的背面12上；其中该单面式软性电路板20需要盖住该芯片10的背面12的全部，如图2所示但不限制，即该单面式软性电路板20亦可视设计需要而盖住该芯片10的背面12的一部分。
该单面式软性电路板20具有一第一表面21及一第二表面22，但只在该第一表面21上设有多个第一连接垫210及多个分别与各第一连接垫对应连接的第二连接垫211。该多个第一连接垫210用以分别对应于该芯片10的正面11上所设的多个晶垫(die pad)110。该多个第二连接垫211通过该单面式软性电路板20的单面电路而分别与一印刷电路板50上所预设电路的各接点对应连接，以使该芯片10能通过该多个第二连接垫211而安装在该印刷电路 板50上，以实现电性连接。该多个第二连接垫211与该多个第一连接垫210之间的对应连接关系是建立在该单面式软性电路板20的电路设计上，对本发明而言是利用现有的电路板线路设计技术可达成，故在此不再赘述。
以图2或图3C-3D为例说明，该多个第一连接垫210与该多个第二连接垫211分开一段距离而设在该单面式软性电路板20的同一表面即第一表面21上，如图3C-3D所示，其分别位于靠近该长矩形单面式软性电路板20的长度向(前后向)两个相对端处而分开一段距离，如该多个第一连接垫210及该多个第二连接垫211分别位于该单面式软性电路板20的前段部分及后段部分，但不限制，如此可使该单面式软性电路板20的前段部分落在该芯片10的正面11上，并使该单面式软性电路板20能由该芯片10的正面11弯曲绕过该芯片10一侧边缘13以延伸至该芯片10的背面12，以使其第一表面21的中段部分能黏着贴覆在该背面12上，之后再反折一次，以使其第二表面22的后段部分能黏着贴覆于已贴覆在该背面12上的第二表面22的中段部分上，进而使该第一表面21的后段部分能定位在该芯片10的背面12上，藉此设在该第一表面21的后段部分上的多个第二连接垫211即能与一相配合使用的印刷电路板50上所预设的各外露接点对应连接，如图2中箭头A所示，以使该芯片10能通过该单面式软性电路板20所设的该多个第二连接垫211而安装在该印刷电路板50上并实现电性连接。至于该印刷电路板的设计或所采用的对应连接方法，在本发明中视为现有技术，故不另再说明。
此外，如图2所示，在该单面式软性电路板20的第一表面21上所设的多个第一连接垫210与该芯片10的正面11上所设的多个晶垫(die pad)110对应连接之前，各晶垫(die pad)110的表面上可先设一化学镍金层(ENIG，electroless nickel/immersion gold)30但不限制；该化学镍金层(ENIG)30用于防止各晶垫(die pad)110氧化，并可增进该第一连接垫210与晶垫(die pad)110之间的焊结连接效率。
此外，如图2、图3C-3D所示，在该单面式软性电路板20的第一表面21的中段部分适当位置处可预设一黏胶层40，如双面背胶，但不限制，以使该单面式软性电路板20由该芯片10的正面11弯曲绕过该芯片10一侧边缘13而延伸至该芯片10的背面12时，该单面式软性电路板20的第一表面21的中段部分即能通过该黏胶层40而黏着贴覆在该芯片10的侧边缘13及背面12上。
此外，如图2、图3C-3D所示，在该单面式软性电路板20的第二表面21的后段部分适当位置处可预设一黏胶层40，如双面背胶，但不限制，以使该单面式软性电路板20的第一表面21的中段部分在黏着贴覆在该芯片10的背面12上之后并再反折一次时，该第二表面22的后段部分即能通过该黏胶层40而黏着贴覆于已贴覆在该背面12上的第二表面22的中段部分上，进而使设在该第一表面21的后段部分的多个第二连接垫211能定位在该背面12上。
此外，本发明提供的芯片正背面之间的电性连接结构与现有的采用导线连接(wire bond)方式相比，本发明中的芯片10封装的表面积，在此以图2所示的宽度为例说明，该芯片10的宽度加上黏胶层40的宽度及单面式软性电路板20的宽度会有效地减少；甚至与采用双面式FPC(FPC的双面上皆设有电路层及连接垫)连接方式相比，因单面式软性电路板20的宽度本就较双面式FPC至少减少一面的电路层及连接垫，故本发明中的芯片10封装的表面积(宽度)也相对减少，如由该芯片的侧边缘13向外扩增的宽度等于或小于如图2中所示的120μm，有利于使本发明在本技术领域的应用中达到轻、薄、短小的要求。
本发明提供的芯片正背面之间的电性连接结构的制造方法包含下列步骤：
步骤1：提供一芯片10，如图3A所示，该芯片10的正面11上设有多个晶垫110及至少一作用区111；又各晶垫110可预设一化学镍金层(ENIG)30，如图3B所示。
步骤2：提供一单面式软性电路板20，如图3C所示，该单面式软性电路板20具有一第一表面21及一第二表面22，在该第一表面21上设有多个对应于该芯片10的晶垫110的第一连接垫210及多个分别与各第一连接垫210对应连接的第二连接垫211，该多个第一连接垫210分别对应于该多个晶垫110，该多个第二连接垫211用以与一配合使用的印刷电路板(50)上所预设电路的各接点对应连接，以使该芯片10能通过该多个第二连接垫211而安装在该印刷电路板(50)上以实现电性连接；其中，在该单面式软性电路板20的第一表面21及第二表面22上的适当位置处，如在该单面式软性电路板20的第一表面21的中段部分及第二表面21的后段部分适当位置处，可预设一黏胶层40，如双面背胶，如图3C、3D所示，以利后续的黏着贴覆作业。
步骤3：将该单面式软性电路板20的第一表面21上所设各第一连接垫 210对应电性连接在该芯片10的正面11上的各晶垫110或其化学镍金层(ENIG)30上，如图3C、3D所示。
步骤4：如图2、图3D-3E所示，使该单面式软性电路板20弯曲并绕过该芯片10一侧边缘13以延伸至该芯片10的背面12上，并使该单面式软性电路板20的第一表面21的中段部分黏着贴覆(如利用该黏胶层40)在该背面12上，之后再反折一次，使该第二表面22的后段部分能黏着贴覆(如利用该黏胶层40)于已贴覆在该背面12上的第二表面22的中段部分上，进而使该第一表面21的后段部分能定位在该芯片10的背面12上；藉此，使该单面式软性电路板20的第一表面21上所设的各第二连接垫211能面朝向外(如图2中箭头A所示)，供可通过后续作业以电性连接并安装在一相配合印刷电路板50上，以使该芯片10的正面11上所设的作用区111能配合该印刷电路板50使用而达到该芯片10的使用功能，如指纹辨识芯片的指纹辨识功能。
此外，如图4所示，该作用区111的表面上进一步设置一高透光度介质层60，用以保护该作用区111且不影响其使用功能；如图4所示，该高透光度介质层60设置在该芯片10的正面11上，用以全面遮护该作用区111但露出各晶垫(die pad)110及/或各晶垫(die pad)110上所设的化学镍金层(ENIG)30。
此外，在图4中该感应作用区111上所设置的高透光度介质层60的高度进一步与该单面式软性电路板20落在该芯片10的正面11上的高度(即图4、5中该单面式软性电路板20的第二表面22的表面)齐平，如图5所示，以使该芯片10的正面11形成同一平面，以符合该芯片10如指纹辨识芯片在实际应用上的组装需要。
以上所述仅为本发明的优选实施例，对本发明而言仅是说明性的，而非限制性的；本领域普通技术人员理解，在本发明权利要求所限定的精神和范围内可对其进行许多改变，修改，甚至等效变更，但都将落入本发明的保护范围内。

Claims (8)

  1. 一种芯片正背面之间的电性连接结构，其特征在于，包含：
    一芯片，其正面上设有多个晶垫及至少一作用区；及
    一单面式软性电路板，其具有一第一表面及一第二表面，该第一表面上设有多个第一连接垫和多个第二连接垫，多个第一连接垫供分别对应于该芯片正面所设的各晶垫，多个第二连接垫供分别与各第一连接垫对应连接，其中该多个第二连接垫用以与一相配合使用的印刷电路板上所预设的电路的各外露接点分别对应连接，以使该芯片能通过该单面式软性电路板所设的该多个第二连接垫而安装在该印刷电路板上并实现电性连接；
    其中，该单面式软性电路板由该芯片的正面弯曲并绕过该芯片一侧边缘以延伸至该芯片的背面并黏着贴覆在该背面上，并再反折一次以定位在该芯片的背面上，使该第一表面上所设的各第二连接垫电性连接并安装在印刷电路板上，以使芯片正面上所设的各晶垫能通过该单面式软性电路板而移动至芯片的背面并面朝向外以供电性连接并安装在该印刷电路板上。
  2. 根据权利要求1所述的芯片正背面之间的电性连接结构，其特征在于，该芯片为一指纹辨识芯片且其正面上设有一指纹辨识感应作用区。
  3. 根据权利要求1所述的芯片正背面之间的电性连接结构，其特征在于，该多个第一连接垫与该多个第二连接垫分开一段距离，且该多个第一连接垫设在该单面式软性电路板的第一表面上，其中该多个第一连接垫位于该单面式软性电路板的前段部分，该多个第二连接垫位于该单面式软性电路板的后段部分。
  4. 根据权利要求1所述的芯片正背面之间的电性连接结构，其特征在于，在该单面式软性电路板的第一表面的中段部分及第二表面的后段部分预设有一黏胶层，以使该单面式软性电路板弯曲并绕过该芯片一侧边缘以延伸至该芯片的背面上时，该第一表面的中段部分能通过该黏胶层以黏着贴覆在该芯片的侧边缘及背面上，之后在反折一次时，该第二表面的后段部分能通过该黏胶层以黏着贴覆于已贴覆在该背面上的第二表面的中段部分上，进而使该第一表面的后段部分定位在该芯片的背面上。
  5. 根据权利要求1所述的芯片正背面之间的电性连接结构，其特征在于，该芯片正面所设的作用区的上表面进一步设置一高透光度介质层。
  6. 根据权利要求5所述的芯片正背面之间的电性连接结构，其特征在于，该高透光度介质层设置在该芯片的正面上并完全遮护该作用区但露出各晶垫。
  7. 根据权利要求5所述的芯片正背面之间的电性连接结构，其特征在于，该作用区上所设置的高透光度介质层的高度进一步与该单面式软性电路板落在该芯片的正面上的高度齐平，以使该芯片的正面形成一平面。
  8. 一种芯片正背面之间的电性连接结构的制造方法，其特征在于，包含下列步骤：
    步骤1：提供一芯片，该芯片的正面上设有多个晶垫及至少一作用区；
    步骤2：提供一单面式软性电路板，该单面式软性电路板具有一第一表面及一第二表面，其中在该第一表面上的前段部分设有多个第一连接垫，多个第一连接垫供分别对应于该芯片的正面上所设的各晶垫，其中在该第一表面上的后段部分设有多个第二连接垫，多个第二连接垫供分别与各第一连接垫对应连接，其中该多个第二连接垫用以与一配合使用的印刷电路板上所预设电路的各外露接点对应连接；
    步骤3：使该单面式软性电路板的第一表面上所设的各第一连接垫与该芯片的正面上所设的各晶垫对应电性连接；
    步骤4：使该单面式软性电路板弯曲并绕过该芯片一侧边缘以延伸至该芯片的背面上，以使该第一表面的中段部分黏着贴覆在该背面上，之后反折一次，以使该第二表面的后段部分黏着贴覆于已贴覆在该背面上的第二表面的中段部分上，进而使该第一表面的后段部分所设的各第二连接垫向外面对该印刷电路板。
PCT/CN2015/000712 2015-10-23 2015-10-23 芯片正背面之间的电性连接结构及其制造方法 WO2017066896A1 (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108987352A (zh) * 2017-05-30 2018-12-11 英飞凌科技股份有限公司 具有连接在载体层级处的部件的封装

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1649470A (zh) * 2004-01-28 2005-08-03 夏普株式会社 柔性基板、其连接方法及其连接构造
CN201066417Y (zh) * 2007-06-15 2008-05-28 群康科技(深圳)有限公司 触控式液晶显示装置
CN202262060U (zh) * 2011-08-30 2012-05-30 Tcl显示科技（惠州）有限公司 一种反折式柔性印刷线路板
CN202773168U (zh) * 2012-08-07 2013-03-06 富葵精密组件(深圳)有限公司 柔性电路板
CN103972201A (zh) * 2013-01-30 2014-08-06 奇景光电股份有限公司 封装结构与显示模组
US20140306348A1 (en) * 2013-04-15 2014-10-16 Samsung Display Co., Ltd. Chip on film and display device having the same
CN204067348U (zh) * 2014-08-08 2014-12-31 茂邦电子有限公司 晶片的正、背面间电性连接结构
CN205177820U (zh) * 2015-10-23 2016-04-20 茂邦电子有限公司 芯片正背面之间的电性连接结构

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1649470A (zh) * 2004-01-28 2005-08-03 夏普株式会社 柔性基板、其连接方法及其连接构造
CN201066417Y (zh) * 2007-06-15 2008-05-28 群康科技(深圳)有限公司 触控式液晶显示装置
CN202262060U (zh) * 2011-08-30 2012-05-30 Tcl显示科技（惠州）有限公司 一种反折式柔性印刷线路板
CN202773168U (zh) * 2012-08-07 2013-03-06 富葵精密组件(深圳)有限公司 柔性电路板
CN103972201A (zh) * 2013-01-30 2014-08-06 奇景光电股份有限公司 封装结构与显示模组
US20140306348A1 (en) * 2013-04-15 2014-10-16 Samsung Display Co., Ltd. Chip on film and display device having the same
CN204067348U (zh) * 2014-08-08 2014-12-31 茂邦电子有限公司 晶片的正、背面间电性连接结构
CN205177820U (zh) * 2015-10-23 2016-04-20 茂邦电子有限公司 芯片正背面之间的电性连接结构

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108987352A (zh) * 2017-05-30 2018-12-11 英飞凌科技股份有限公司 具有连接在载体层级处的部件的封装
CN108987352B (zh) * 2017-05-30 2023-10-20 英飞凌科技股份有限公司 具有连接在载体层级处的部件的封装

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