WO2017047011A1

WO2017047011A1 - Method of mounting light-emitting element

Info

Publication number: WO2017047011A1
Application number: PCT/JP2016/003914
Authority: WO
Inventors: 順也石崎; 翔吾古屋
Original assignee: 信越半導体株式会社
Priority date: 2015-09-15
Filing date: 2016-08-29
Publication date: 2017-03-23
Also published as: JPWO2017047011A1; CN107851699B; CN107851699A; JP6575603B2; TW201724551A; TWI702733B

Abstract

The present invention provides a method of mounting a light-emitting element, including: employing epitaxial growth to grow and form a first semiconductor layer, an active layer, a second semiconductor layer and a buffer layer successively on a starting substrate using a material that is lattice-matched to the starting substrate; employing epitaxial growth to form, on the buffer layer, a window layer/support substrate using a material that is not lattice-matched to the starting substrate; removing the starting substrate; forming a first ohmic electrode on the first semiconductor layer; forming a partial removed portion exposing the second semiconductor layer, the buffer layer or the window layer/support substrate, to provide a step; forming a second ohmic electrode in the removed portion; fabricating a light-emitting element chip by separating a light-emitting element in which the first and second ohmic electrodes are formed; and flip-mounting the light-emitting element chip onto a mounting substrate in such a way that the side of the light-emitting element chip on which the first and second ohmic electrodes are formed is closest to the mounting substrate. The present invention thus provides a method of mounting a light emitting element with which it is possible for a light-emitting element chip to be mounted easily even if there is a large step between the first and second ohmic electrodes.

Description

Mounting method of light emitting element

The present invention relates to a light emitting element mounting method, and more particularly to a light emitting element mounting method in which a light emitting element chip is flip-mounted on a mounting substrate.

Products such as chip-on-board (COB) are excellent in heat dissipation from LED elements, and are LED chip mounting methods that are employed in applications such as lighting. When mounting an LED on a COB or the like, flip mounting in which a chip is directly bonded to a board is essential. When flip-mounting LED elements, there are methods such as Au—Au bonding by ultrasonic waves and eutectic solder by alloys.

When producing a flip chip with yellow to red LEDs, an AlGaInP-based material is used for the light emitting layer. Since the AlGaInP-based material has no bulk crystal and the LED portion is formed by an epitaxial method, a material different from that of AlGaInP is selected for the starting substrate. In many cases, GaAs or Ge is selected as the starting substrate, and these substrates have a property of absorbing light with respect to visible light. Therefore, when a flip chip is manufactured, the starting substrate is removed.

However, since the epitaxial layer forming the light emitting layer is an extremely thin film, it cannot stand by itself after the starting substrate is removed. Therefore, it is necessary to replace the starting substrate with a material / structure having a function as a support substrate having a thickness sufficient to make the light emitting layer substantially transparent to the emission wavelength and function as a window layer and to be self-supporting. There is.

As described above, since the AlGaInP-based material does not have a bulk crystal, GaP, GaAsP, sapphire, or the like is selected as the material having the function of the window layer / supporting substrate. Whichever material is selected, since it is different from the AlGaInP-based material, mechanical properties such as a thermal expansion coefficient and Young's modulus are different from those of the AlGaInP-based material.

As described in Non-Patent Document 1, ultrasonic Au-Au bonding is difficult to hold the chip without tilting, the ultrasonic wave cannot be efficiently propagated to the chip, and the chip is damaged during ultrasonic propagation. , Etc.

In order to solve the above problems, a technique is disclosed in which AuSn eutectic bumps are formed and bonded to a substrate by thermal melting (reflow temperature 211 to 280 ° C.). The eutectic method is less susceptible to physical destruction due to ultrasonic propagation than the ultrasonic method. However, the eutectic metal itself undergoes thermal shrinkage in the process of eutectic solder melting and solidifying. As a result, there is a problem that stress is generated in the vicinity of the interface on the semiconductor side where the eutectic metal and the LED are bonded, and this stress causes chip destruction.

Also, the difference in the thermal expansion coefficient caused by the material difference between the window layer / supporting substrate material and the AlGaInP light emitting layer also increases the problem that occurs in the thermal melting step. That is, the linear expansion coefficient of GaP is 4.5E-6 [/ k] and the linear expansion coefficient of sapphire is 7.0E-6 [/ k], whereas the linear expansion coefficient of AlGaInP-based material is 5.4E-6 [/ k]. / K]. Therefore, when mounted by a thermal melting process, when the window layer / support substrate is GaP, compressive stress is generated in the AlGaInP light emitting layer, and tensile stress is generated in the window layer / support substrate. In the case of sapphire in the AlGaInP light emitting layer, tensile stress is generated in the AlGaInP light emitting layer, and compressive stress is generated in the window layer / support substrate. This stress also causes chip breakage.

At the time of flip mounting, the first and second ohmic electrode side surfaces formed on the light emitting element chip are pressed against the mounting substrate side. At this time, since the metal portion on the mounting surface side is deformed by the pressure of the light emitting element chip, the light emitting element chip sinks to the mounting surface side, but this deformation is not significant. Therefore, when the step between the first ohmic electrode and the second ohmic electrode on the light emitting element chip provided on the mounting surface is large, the amount of deformation of the metal in contact with the first ohmic electrode on the mounting surface is insufficient, and the surface of the first ohmic electrode is A phenomenon occurs in which the second ohmic electrode does not contact the mounting surface, although the mounting surface is sufficiently in contact. As a result, there is a problem that the circuit is short-circuited and cannot be mounted as it is. Therefore, it is common to provide bumps on the first ohmic electrode and the second ohmic electrode so that the amount of deformation at the electrode increases. However, it is necessary to form a thick Au (gold) by using a plating method or the like, and the material cost becomes very expensive.

The present invention has been made in view of the above-described problems, and can prevent damage associated with flip mounting using ultrasonic waves, and stress breakdown due to thermal shrinkage in flip mounting using eutectic solder, Furthermore, it aims at providing the mounting method of the light emitting element which can mount a light emitting element chip | tip easily even if the level | step difference of a 1st ohmic electrode and a 2nd ohmic electrode is large.

To achieve the above object, according to the present invention, a first semiconductor layer, an active layer, a second semiconductor layer, and a buffer layer are sequentially grown on a starting substrate by epitaxial growth using a lattice-matched material with the starting substrate. Forming a window layer and supporting substrate by epitaxial growth on the buffer layer with a non-lattice matching material with respect to the starting substrate, removing the starting substrate, A step of forming a first ohmic electrode on one semiconductor layer, a step of forming a removed portion in which the second semiconductor layer, the buffer layer or the window layer / supporting substrate is exposed in part and providing a step, Forming a second ohmic electrode in the removal portion, separating the light emitting element on which the first and second ohmic electrodes are formed to produce a light emitting element chip, and the first and second of the light emitting element chip As the side where two ohmic electrodes are formed is a mounting substrate, provides a method of mounting the light emitting element characterized by a step of flip-chip mounted on the mounting substrate.

In this way, since the window layer / support substrate is formed by epitaxial growth and many dislocations are inserted into the window layer / support substrate, stress due to pressure applied to the chip during ultrasonic mounting can be obtained. When received, the window layer / support substrate is deformed along the dislocation surface, so that stress breakage of the chip can be suppressed. Also, in flip mounting using eutectic metal, the window layer / support substrate is deformed along the dislocation surface in the expansion due to heating and the contraction when returning to room temperature, thereby suppressing the stress breakdown of the chip. it can. Furthermore, even when the step between the first ohmic electrode and the second ohmic electrode is large, the light emitting element chip can be easily mounted while preventing the light emitting element from being damaged during flip mounting.

At this time, the first semiconductor layer, the active layer, and the second semiconductor layer are preferably made of AlGaInP or AlGaAs.

Thus, the above materials can be suitably used as the first semiconductor layer, the active layer, and the second semiconductor layer.

At this time, the window layer / support substrate is preferably made of GaP or GaAsP.

As described above, the use of the above-mentioned materials as the window layer / supporting substrate is suitable as the window layer and can surely suppress the stress breakdown of the chip during flip mounting.

Further, at this time, the step between the first ohmic electrode and the second ohmic electrode can be set to 3 μm or more and 11 μm or less.

Thus, even if the step between the first ohmic electrode and the second ohmic electrode is large as described above, the effect can be sufficiently exerted.

In the light emitting device mounting method of the present invention, since many dislocations are inserted into the window layer / support substrate by forming the window layer / support substrate by epitaxial growth, pressure is applied to the chip during ultrasonic mounting. When the window layer / support substrate is deformed along the dislocation surface when subjected to stress due to application of stress, the stress breakdown of the chip can be suppressed, and in flip mounting using a eutectic metal, by heating In expansion and contraction when returning to room temperature, the window layer / supporting substrate is deformed along the dislocation surface, so that stress breakdown of the chip can be suppressed. Furthermore, even when the step between the first ohmic electrode and the second ohmic electrode is large, the light emitting element chip can be easily mounted while preventing the light emitting element from being damaged during flip mounting.

It is process drawing which showed an example of the mounting method of the light emitting element of this invention. It is the schematic which shows the epitaxial substrate which grew the selective etching layer, the light emission part, and the window layer and support substrate on the starting board | substrate in the mounting method of the light emitting element of this invention. It is the schematic which shows the light emitting element substrate which removed the starting board | substrate and the 2nd selective etching layer from the epitaxial substrate in the mounting method of the light emitting element of this invention. It is the schematic which shows the light emitting element substrate in which the 1st ohmic electrode was formed in the mounting method of the light emitting element of this invention. It is the schematic which shows the light emitting element substrate in which the 1st surface roughening process was performed in the mounting method of the light emitting element of this invention. It is the schematic which shows the light emitting element substrate which performed the removal part and level | step difference formation process in the mounting method of the light emitting element of this invention. It is the schematic which shows the light emitting element substrate which formed the 2nd ohmic electrode in the mounting method of the light emitting element of this invention, and formed the insulating protective film. It is the schematic which shows the light emitting element chip | tip produced by isolate | separating the light emitting element in the mounting method of the light emitting element of this invention. It is the schematic which shows the light emitting element substrate in which the 1st surface roughening process in the Example was performed. It is the schematic which shows the light emitting element substrate which performed the removal part and level | step difference formation process in an Example. It is the schematic which shows the light emitting element substrate in which the 2nd ohmic electrode in an Example was formed and the insulating protective film was formed. It is the schematic which shows the light emitting element chip | tip produced by isolate | separating the light emitting element in an Example. It is the schematic which shows the epitaxial substrate which made the selective etching layer, the light emission part, the window layer and support substrate grow on the starting substrate in a comparative example. It is the schematic which shows the board | substrate which joined the GaP single crystal substrate to the epitaxial substrate in a comparative example. It is the schematic which shows the joining board | substrate which removed the starting board | substrate and the 2nd selective etching layer from the epitaxial substrate in a comparative example. It is the schematic which shows the joining board | substrate with which the 1st ohmic electrode in a comparative example was formed. It is the schematic which shows the bonded substrate in which the 1st surface roughening process in the comparative example was performed. It is the schematic which shows the bonded substrate which performed the removal part and level | step difference formation process in a comparative example, and formed the 2nd ohmic electrode. It is the schematic which shows the bonded substrate in which the insulating protective film in the comparative example was formed. It is the schematic which shows the light emitting element chip | tip produced by isolate | separating the light emitting element in a comparative example. In an Example and a comparative example, it is the graph which showed the defect occurrence rate at the time of mounting using an ultrasonic wave. In an Example and a comparative example, it is the graph which showed the defect incidence at the time of mounting using the eutectic metal layer. It is the graph which showed the relationship with the yield when changing the level | step difference of a 1st ohmic electrode and a 2nd ohmic electrode in an Example and a comparative example.

Hereinafter, although an embodiment is described about the present invention, the present invention is not limited to this.
As described above, there has been a problem that the light emitting element chip is destroyed during flip mounting. Therefore, the present inventors have intensively studied to solve such problems. As a result, it has been found that many dislocations are inserted into the window layer / support substrate by epitaxially growing the window layer / support substrate with a non-lattice-matched material with respect to the starting substrate. As a result, chip breakage can be suppressed during ultrasonic mounting and flip mounting using eutectic metal, and even if the step between the first ohmic electrode and the second ohmic electrode is large, the flip It was found that the light emitting element chip can be easily mounted while preventing the light emitting element from being damaged during the mounting.

Hereinafter, a method for mounting the light emitting device of the present invention will be described with reference to FIGS.

First, a starting substrate 101 is prepared as shown in FIG. 2 (SP1 in FIG. 1).
As the starting substrate 101, it is preferable to use a starting substrate 101 whose crystal axis is inclined in the [110] direction from the [001] direction. As the starting substrate 101, GaAs or Ge can be preferably used. In this way, since the material of the active layer 104 to be described later can be epitaxially grown in a lattice matching system, the quality of the active layer 104 can be easily improved, and the luminance can be increased and the life characteristics can be improved.

Next, a selective etching layer 102 may be formed on the starting substrate 101 (SP2 in FIG. 1).
The selective etching layer 102 can be formed on the starting substrate 101 by, for example, MOVPE method (metal organic vapor phase epitaxy), MBE (molecular beam epitaxy), or CBE (chemical beam epitaxy).

The selective etching layer 102 has a layer structure of two or more layers, and preferably includes at least a second selective etching layer 102A in contact with the starting substrate 101 and a first selective etching layer 102B in contact with the first semiconductor layer 103 described later. The second selective etching layer 102A and the first selective etching layer 102B may be made of different materials or compositions.

Next, a light-emitting portion 108 and a buffer layer 106 composed of a starting substrate 101 and a lattice-matched first-conductivity-type first semiconductor layer 103, an active layer 104, and a second-conductivity-type second semiconductor layer 105 are sequentially grown by epitaxial growth. (SP3 in FIG. 1).

The first semiconductor layer 103, the active layer 104, and the second semiconductor layer 105 are preferably made of AlGaInP or AlGaAs.
Thus, the above materials can be suitably used for the first semiconductor layer, the active layer, and the second semiconductor layer.

The buffer layer 106 is preferably formed of InGaP.

The first semiconductor layer 103 or the second semiconductor layer 105 generally includes a plurality of layers in order to improve characteristics, and the first semiconductor layer 103 or the second semiconductor layer 105 is a single layer. Needless to say, it is not limited to.

At this time, the first semiconductor layer 103 may have a structure of two or more layers. The low Al composition layer 103A on the side of the first semiconductor layer 103 on which the roughening process described later is performed may be formed of a material having a lower Al composition than the high Al composition layer 103B on the active layer side. it can.

In this way, while maintaining the carrier confinement effect of the clad layer, the mechanical strength of the pad electrode part due to excessive etching is reduced, and chip cracks are prevented from occurring during wire bonding, and the size of the unevenness required A light-emitting element that obtains a rough surface can be manufactured.

Next, a window layer / support substrate 107 is formed by epitaxial growth on the buffer layer 106 with a non-lattice matching material with respect to the starting substrate 101 to produce an epitaxial substrate 109 (SP4 in FIG. 1).
The window layer / support substrate 107 is preferably GaP or GaAsP.

Next, the starting substrate 101 and the second selective etching layer 102A are removed from the epitaxial substrate 109, and only the first selective etching layer 102B remains on the surface of the first semiconductor layer 103 of the light emitting element substrate 110 as shown in FIG. (SP5 in FIG. 1).
Specifically, only the first selective etching layer 102B remains on the surface of the first semiconductor layer 103 by removing the starting substrate 101 from the epitaxial substrate 109 using the second selective etching layer 102A by the wet etching method. Can do.

Next, as shown in FIG. 4, a first ohmic electrode 121 for supplying a potential to the light emitting element is formed on the surface of the first selective etching layer 102B on the first semiconductor layer 103 (SP6 in FIG. 1). .

Next, as shown in FIG. 4, the first selective etching layer 102B in a region other than the lower portion of the first ohmic electrode 121 is removed (SP7 in FIG. 1).
Specifically, using the first ohmic electrode 121 as an etching mask, the first selective etching layer 102B in a region other than the lower portion of the first ohmic electrode 121 can be removed by etching.

Next, as shown in FIG. 5, a first roughening treatment step of roughening at least a portion other than the formation portion of the first ohmic electrode 121 on the surface of the first semiconductor layer 103 can be performed (FIG. 5). 1 SP8).

Specifically, for example, in the first rough surface liquid composed of a mixed liquid of an inorganic acid and an organic acid, the first rough surface liquid is removed from the portion of the first semiconductor layer 103 where the first ohmic electrode 121 is formed. Surface treatment can be performed.

Next, as shown in FIG. 6, a step (removal portion / step formation step) of forming a step by partially forming the removal portion 170 exposing the second semiconductor layer, the buffer layer, or the window layer / support substrate. Perform (SP9 in FIG. 1). As shown in FIG. 6, a step is provided between the removal unit 170 and the other non-removal unit 180.

Specifically, for example, etching can be performed from the first semiconductor layer in the region 140 to a part of the window layer / supporting substrate by an ICP dry etching method with low material selectivity. In this manner, a portion (removal portion 170) where the window layer / support substrate 107 is exposed as shown in FIG. 6 can be formed. The removing unit 170 has a rough surface pattern in order to follow the rough surface pattern formed in the first roughening process.

Next, as shown in FIG. 7, the second ohmic electrode 122 is formed on the surface of the window layer / support substrate 107 of the removal portion 170 (SP10 in FIG. 1).
Thus, the first ohmic electrode 121 and the second ohmic electrode 122 are formed with a step. In the present invention, for example, the step between the first ohmic electrode 121 and the second ohmic electrode 122 can be 3 μm or more and 11 μm or less. Thus, even when the step difference between the first ohmic electrode and the second ohmic electrode is large, the light emitting element chip can be easily mounted while preventing damage to the light emitting element during flip mounting, as will be described later. it can.

Next, as shown in FIG. 7, at least a part of the surface of the first semiconductor layer 103 and the side surface of the light emitting unit 108 can be covered with an insulating protective film 150 (SP <b> 11 in FIG. 1).
The insulating protective film 150 can be any material as long as it is transparent and has insulating properties. As the insulating protective film 150, for example, SiO ₂ or SiN _x is preferably used. If it is such, the process which opens the upper part of the 1st ohmic electrode 121 and the 2nd ohmic electrode 122 with the photolithographic method and the etching liquid containing a hydrofluoric acid can be performed easily.

Next, the process of separating the light emitting element in which the 1st and 2nd

ohmic electrodes

121 and 122 were formed and manufacturing a light emitting element chip is performed (SP12 of FIG. 1).
Specifically, the light-emitting element chip 1 (die) can be manufactured by separating the light-emitting elements by scribing and braking along the scribe region 142 (see FIG. 7).

Next, as shown in FIG. 8, a second roughening treatment step of roughening the side and back surfaces of the window layer / supporting substrate 107 with a second roughening liquid can be performed (SP13 in FIG. 1). .
In addition, since a light distribution angle spreads by performing a 2nd surface roughening process, when it is not desired to widen a light distribution angle, it is not necessary to perform a process.

Next, a step (SP14 in FIG. 1) of performing flip mounting on the mounting substrate is performed such that the side on which the first and second ohmic electrodes of the light emitting element chip 1 are formed becomes the mounting substrate (not shown) side.

(First embodiment)
In the above-described flip mounting process (SP14), in the first embodiment, after die attachment to the mounting substrate (mounting board), flip mounting can be performed by ultrasonic bonding. At this time, the mounting joint of the first ohmic electrode is provided at the end of the chip.

In the first embodiment, at the time of ultrasonic mounting, since ultrasonic propagation propagates through a single crystal part other than a sliding surface (threading dislocation surface), it is efficiently performed. Since the support substrate portion is easily deformed along the sliding surface, it is not easily damaged.

(Second embodiment)
In the flip mounting step (SP14) described above, in the second embodiment, a structure in which a eutectic metal is further laminated on the first ohmic electrode and the second ohmic electrode is used, and a heating / cooling process is performed after die bonding. Thus, flip mounting can be performed.

The first ohmic electrode and the second ohmic electrode have a eutectic solder layer such as AuSn having a low melting point, and the window layer / supporting substrate has a flip chip structure having a high density of threading dislocations. In the second embodiment, during the thermal shrinkage of the eutectic solder, a tensile stress is applied to the window layer / support substrate, but since it has a sliding surface (threading dislocation surface), it is greatly deformed compared to a single crystal, Stress is not concentrated and chip breakage can be avoided.

As described above, the window layer / support substrate is epitaxially grown with a non-lattice matching material with respect to the starting substrate, so that many dislocations (dislocation density of 10 / cm ² or more) are inserted into the window layer / support substrate. ing. Since the window layer / support substrate has high-density dislocations, when flip mounting is performed using ultrasonic waves (first embodiment), the window layer / support substrate is supported when stress is applied by applying pressure to the chip. Since the substrate is deformed along the dislocation surface, breakage of the chip can be suppressed. In flip mounting using a eutectic metal (second embodiment), the window layer / support substrate is deformed along the dislocation surface during expansion due to heating and contraction when returning to room temperature. Damage can be suppressed.

Furthermore, since the removal portion is formed and the step is provided as in the present invention, even when the step between the first ohmic electrode and the second ohmic electrode is large, the light emitting device chip is pressed when the light emitting device chip is pressed during flip mounting. Therefore, the light emitting element can be prevented from being damaged during flip mounting. In particular, since the window layer / support substrate has a sliding surface, it easily deforms due to the light emitting element chip compression, and the first ohmic electrode 121 contacts the mounting surface and the second ohmic electrode 122 also contacts the mounting surface. Therefore, bumps are not necessarily required in flip mounting. Thereby, the light emitting element chip can be easily mounted.

Specifically, as described above, the step between the first ohmic electrode and the second ohmic electrode can be 3 μm or more and 11 μm or less. Thus, even if the level | step difference of a 1st ohmic electrode and a 2nd ohmic electrode is large, this invention can fully exhibit an effect.

Hereinafter, the present invention will be described more specifically with reference to Examples and Comparative Examples of the present invention, but the present invention is not limited to these.

(Example)
An n-type GaAs buffer layer (not shown) is formed on the starting substrate 101 made of n-type GaAs having a thickness of 280 μm whose crystal axis is inclined by 15 ° in the [110] direction from the [001] direction by MOVPE (metal organic chemical vapor deposition). ), 0.5 μm, a second selective etching layer 102A made of an n-type AlInP layer 1 μm, and a first selective etching layer 102B made of an n-type GaAs layer 1 μm. A light emitting portion 108 composed of a semiconductor layer 103), an active layer 104, and a p-type cladding layer (second semiconductor layer 105) is formed to 5.5 μm, and a buffer layer 106 made of p-type GaInP is further formed to 0.3 μm. Then, a part of the window layer / supporting substrate 107 made of p-type GaP was grown by 1.0 μm. Next, the substrate was transferred to an HVPE furnace, and a window layer / support substrate 107 made of p-type GaP was grown to 120 μm to obtain an epitaxial substrate 109 (see FIG. 2).

Next, the starting substrate 101, the GaAs buffer layer, and the second selective etching layer 102A were removed from the epitaxial substrate 109 by etching to produce a light emitting device substrate 110 in which only the first selective etching layer 102B remained (see FIG. 3). ). Specifically, the starting substrate 101 was removed from the epitaxial substrate 109 using the second selective etching layer 102A as a selective etching layer by a wet etching method, whereby a light emitting element substrate 110 was obtained.

Next, a first ohmic electrode 121 which is an electrode for supplying a potential to the light emitting element was formed. Specifically, as shown in FIG. 4, the first ohmic electrode 121 was formed on the first selective etching layer 102 </ b> B of the light emitting element substrate 110. Then, using the first ohmic electrode 121 as a mask, the first selective etching layer 102B in a region other than the first ohmic electrode 121 was removed by etching.

Next, as shown in FIG. 9, a resist mask 123 is provided in the second ohmic electrode formation scheduled region 122a by photolithography, and a first roughening treatment is performed with a first roughening solution. The first rough surface solution was roughened by preparing a mixed solution of acetic acid and hydrochloric acid and etching at room temperature for 1 minute.

Next, a pattern in which the region 140 (see FIG. 9) is opened is formed by photolithography, and a removal portion / step formation step is performed by an ICP plasma etching method containing hydrochloric acid gas. 106 is removed to form a removed portion 170 where the window layer / support substrate 107 is exposed, and a non-removed portion 180 other than that (see FIG. 10). At this time, the removal unit 170 follows the rough surface pattern formed in the first roughening treatment step, but the portion of the second ohmic electrode forming portion 141 forms a rough surface in the first roughening treatment step. Thus, a flat surface is formed without forming a rough surface pattern.

Next, the second ohmic electrode 122 was formed on the second ohmic electrode forming portion 141 of FIG. 10 (see FIG. 11). Next, the insulating protective film 150 made of SiO ₂ was laminated, and the insulating protective film 150 made of SiO ₂ covering the surface of the first semiconductor layer 103 and the side surface of the light emitting unit 108 was formed.

Next, the scribe line was scribed along the scribe region 142, the crack line was extended along the scribe line, and then the elements were separated by braking to form the light emitting element chip 11.

After the light emitting element chip 11 is formed, the light emitting element chip 11 is transferred to the holding tape so that the surface on which the first ohmic electrode 121 is provided is on the tape surface side, and then the side surface and the back surface of the window layer / support substrate 107 are removed. The 2nd roughening process process roughened with a 2nd roughening liquid was implemented (refer FIG. 12). A mixed liquid of acetic acid, hydrofluoric acid and iodine was prepared as the second rough surface liquid. And the 2nd roughening process was performed by etching for 1 minute at normal temperature.

(Comparative example)
An n-type GaAs buffer layer (not shown) of 0.5 μm and n-type is formed on a starting substrate 301 made of n-type GaAs having a thickness of 280 μm whose crystal axis is inclined by 15 ° in the [110] direction from the [001] direction by the MOVPE method. After the first selective etching layer 302A made of an AlInP layer is grown by 1 μm and the first selective etching layer 302B made by an n-type GaAs layer is grown by 1 μm, the second selective etching layer 302A and the first selective etching layer 302B are selectively etched. On the layer 302, a light emitting portion 308 composed of an n-type cladding layer (first semiconductor layer 303) made of AlGaInP, an active layer 304, and a p-type cladding layer (second semiconductor layer 305) is formed to have a thickness of 5.5 μm. On top, a buffer layer 306 made of p-type GaInP is formed to a thickness of 0.3 μm, and a current diffusion layer 307 is epitaxially grown to a thickness of 1.0 μm. Thus, an epitaxial substrate 309 was produced (see FIG. 13).

Next, as shown in FIG. 14, a GaP single crystal substrate 310 having a thickness of 300 μm was bonded to the epitaxial substrate 309. For bonding the epitaxial substrate 309 and the GaP single crystal substrate 310, both the epitaxial substrate 309 and the GaP single crystal substrate 310 were washed with an alkaline solution and bonded using a BCB adhesive.

Next, the starting substrate 301, the GaAs buffer layer, and the second selective etching layer 302A were removed from the epitaxial substrate 309 by etching to produce a bonded substrate 311 in which only the first selective etching layer 302B remained (see FIG. 15). . Specifically, the starting substrate 301 was removed from the epitaxial substrate 309 using the second selective etching layer 302 </ b> A as a selective etching layer by a wet etching method, whereby a bonded substrate 311 was obtained.

Next, a first ohmic electrode 321 which is an electrode for supplying a potential to the light emitting element was formed. Specifically, as shown in FIG. 16, the first ohmic electrode 321 is formed on the first selective etching layer 302 </ b> B of the bonding substrate 311. Then, using the first ohmic electrode 321 as a mask, the first selective etching layer 302B in a region other than the first ohmic electrode 321 was removed by etching.

Next, as shown in FIG. 17, the first roughening treatment was performed with the first roughening solution. The first rough surface solution was roughened by preparing a mixed solution of acetic acid and hydrochloric acid and etching at room temperature for 1 minute.

Next, a pattern having an opening in the region 340 (see FIG. 17) is formed by a photolithography method, and a removal portion / step formation process is performed by an ICP plasma etching method containing hydrochloric acid gas to etch the layer in the region 340. Then, the removal part 370 where the current spreading layer 307 was exposed and the other non-removal part 380 were formed (see FIG. 18).

Next, a second ohmic electrode 322 was formed as shown in FIG. Next, as shown in FIG. 19, an insulating protective film 350 made of SiO ₂ was laminated, and an insulating protective film 350 made of SiO ₂ covering the surface of the first semiconductor layer 303 and the side surface of the light emitting unit 308 was formed.

Next, the scribe line is scribed along the scribe region 342 (see FIG. 19), the crack line is extended along the scribe line, and then the device is separated by braking to emit light as shown in FIG. An element chip 201 was formed.

After the light emitting element chip 201 is formed, the light emitting element chip 201 is transferred to the holding tape so that the surface on which the first ohmic electrode 321 is provided is on the tape surface side. The 2nd roughening process process roughened with two roughening liquids was implemented (refer FIG. 20). A mixed liquid of acetic acid, hydrofluoric acid and iodine was prepared as the second rough surface liquid. And the 2nd roughening process was performed by etching for 1 minute at normal temperature.

FIG. 21 shows the result of comparison of 100 light-emitting element chips manufactured in Examples and Comparative Examples by Au—Au ultrasonic mounting. In the comparative example, damage caused by chip crimping or vibration during application of ultrasonic waves occurred, and the defect rate increased. On the other hand, in the example, the incidence of chip breakage due to the same cause is smaller than in the comparative example.

Next, AuSn layers are provided on 100 electrodes and mounting substrates for each of the light emitting element chips manufactured in the examples and comparative examples, mounted by thermal melting (220 ° C. or higher), and the comparison results are shown in FIG. 22 shows. In the comparative example and the example, the damage that seems to be caused by the thermal shrinkage of AuSn after heat melting occurs, but as shown in FIG. 22, the damage rate in the example is smaller than that in the comparative example. Yes.

In the embodiment, since the window layer / supporting substrate 107 is formed by epitaxial growth, it is formed in a temperature range of about 600 to 800 ° C. The linear expansion coefficient of AlGaInP is larger than that of GaP, and when the temperature is lowered to room temperature after growth, a concave warp occurs on the substrate removal surface due to the difference in expansion coefficient. Further, there is a 3.7% lattice constant difference between AlGaInP / GaP, and this lattice constant difference also increases the warpage. On the other hand, high density dislocations exist in the window layer / support substrate due to the difference in lattice constant. Thus, the window layer / support substrate of the example has high-density threading dislocations. Since the dislocation surface has the property of generating slip when a force is applied to the crystal, when the vibration or pressure stress is applied to the crystal, the crystal moves along the slip surface before breaking the crystal. By slipping, the stress at the time of mounting is released, and as a result, the chip breakage rate is considered to have decreased.

On the other hand, in the comparative example, warping similar to that of the example occurs due to the difference in linear expansion, but the bonding temperature is 350 ° C., which is relatively low compared to the case of the example, so that warping is 1 in comparison with the example. / 10 or less.

Next, in the example and the comparative example, a light emitting element chip is manufactured by changing a step between the first ohmic electrode and the second ohmic electrode, and the manufactured light emitting element chip is flipped without providing bumps. Measurement of distillation was performed. The results at this time are shown in FIG. In FIG. 23, the horizontal axis indicates the step between the first ohmic electrode and the second ohmic electrode in the example and the comparative example, and the vertical axis indicates the yield of the number of chips that can be mounted at the time of mounting.

¡Press the light emitting element chip against the mounting surface during flip mounting. Since the metal part on the mounting surface side is deformed by the pressure of the light emitting element chip, the light emitting element chip sinks to the mounting surface side, but this deformation is not significant. Therefore, in the comparative example, as shown in FIG. 23, when the step between the first ohmic electrode 321 and the second ohmic electrode 322 on the light emitting element chip provided on the mounting surface is 3 μm or more, the first ohmic electrode on the mounting surface. The amount of deformation of the metal in contact with 321 is insufficient, and the surface of the first ohmic electrode 321 is in sufficient contact with the mounting surface, but the second ohmic electrode 322 does not contact the mounting surface. As a result, it is short-circuited and cannot be mounted. Therefore, it is common to provide bumps on the first ohmic electrode 321 and the second ohmic electrode 322 so that the amount of deformation at the electrode is large. However, it is necessary to form a thick Au (gold) by using a plating method or the like, and the material cost becomes very expensive.

On the other hand, in the embodiment, the window layer / supporting substrate has a sliding surface, and as a result, the shape is variable, which has another effect. Specifically, since the light emitting element chip is deformed when the light emitting element chip is pressed during the flip mounting, the bump is not necessarily required in the flip mounting. That is, since the window layer / support substrate has a sliding surface, it easily deforms against the light emitting element chip compression, and the first ohmic electrode 121 contacts the mounting surface, and the second ohmic electrode 122 also contacts the mounting surface. Because. Since both the first ohmic electrode 121 and the second ohmic electrode 122 are in contact with the mounting surface, a strong bond can be formed between the mounting surface and the electrode by an ultrasonic bonding method or the like. Therefore, as shown in FIG. 23, in the embodiment, even when the step between the first ohmic electrode and the second ohmic electrode is 3 μm or more and 11 μm or less, flip mounting can be performed with high yield without using expensive bumps. did it.

Note that the present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

Claims

Forming a first semiconductor layer, an active layer, a second semiconductor layer, and a buffer layer on the starting substrate by epitaxial growth with a material of a lattice matching system with the starting substrate; and Forming a window layer / support substrate by epitaxial growth with a non-lattice matching material with respect to the starting substrate; removing the starting substrate; and forming a first ohmic electrode on the first semiconductor layer; Forming a step by partially forming a removal portion exposing the second semiconductor layer, the buffer layer or the window layer / supporting substrate; and forming a second ohmic electrode in the removal portion; A step of fabricating a light emitting element chip by separating the light emitting element on which the first and second ohmic electrodes are formed, and a side of the light emitting element chip on which the first and second ohmic electrodes are formed is a mounting substrate. As a method for mounting the light emitting element characterized by a step of flip-chip mounted on the mounting substrate.
2. The light emitting element mounting method according to claim 1, wherein the first semiconductor layer, the active layer, and the second semiconductor layer are made of AlGaInP or AlGaAs.
3. The light emitting element mounting method according to claim 1, wherein the window layer / support substrate is made of GaP or GaAsP.
4. The light emitting element mounting method according to claim 1, wherein a step between the first ohmic electrode and the second ohmic electrode is 3 μm or more and 11 μm or less. 5.