WO2017045246A1 - 一种电容屏的检测装置 - Google Patents

一种电容屏的检测装置 Download PDF

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WO2017045246A1
WO2017045246A1 PCT/CN2015/092922 CN2015092922W WO2017045246A1 WO 2017045246 A1 WO2017045246 A1 WO 2017045246A1 CN 2015092922 W CN2015092922 W CN 2015092922W WO 2017045246 A1 WO2017045246 A1 WO 2017045246A1
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signal
electrode
common
detecting device
common electrode
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PCT/CN2015/092922
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English (en)
French (fr)
Inventor
谢剑星
曹昌
蔡育徵
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深圳市华星光电技术有限公司
武汉华星光电技术有限公司
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Priority to US14/905,097 priority Critical patent/US20170255292A1/en
Publication of WO2017045246A1 publication Critical patent/WO2017045246A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/52—Testing for short-circuits, leakage current or ground faults
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/54—Testing for continuity
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes

Definitions

  • the present invention relates to the field of electronic technologies, and in particular, to a detecting device for a capacitive screen.
  • capacitive touch screens are widely used in various electronic products, such as smart phones, tablets and so on.
  • the existing capacitive screen can be divided into G+G (Glass+Glass, double glass), GF (Glass Film, glass single film), GFF (Glass Film Film), OGS (One Glass Solution, single chip) External capacitive screens such as glass), and embedded capacitive screens such as On cell and In cell.
  • G+G Glass+Glass, double glass
  • GF Glass Film, glass single film
  • GFF Glass Film Film Film
  • OGS One Glass Solution, single chip
  • External capacitive screens such as glass
  • embedded capacitive screens such as On cell and In cell.
  • a design scheme of the In cell capacitive screen is to divide the common (general) electrode of the display into a block-like checkerboard structure, as shown in FIG.
  • the independent segmented common electrode is formed by cutting from a complete panel, so the cutting process may cause the problem of the common electrode breaking, and how to detect whether the common electrode is open is an urgent problem to be solved.
  • Embodiments of the present invention provide a detecting device for a capacitive screen, which can detect a common electrode of a capacitive screen interrupt path.
  • Embodiments of the present invention provide a detecting device for a capacitive screen, the capacitive screen includes a plurality of common electrodes, each of the common electrodes corresponding to a plurality of pixel electrodes, and the detecting device includes a signal transmitting module and a signal receiving module. among them:
  • the signal transmitting module is connected to the universal electrode for inputting a signal to the universal electrode;
  • the signal receiving module is connected to the pixel electrode, and is configured to collect a received signal from the pixel electrode, and calculate, between the common electrode and the corresponding pixel electrode, according to the received signal.
  • the capacitance value and further determining whether the corresponding common electrode is open according to the capacitance value.
  • the plurality of common electrodes are arranged in a matrix of N*M, and each of the pixel electrodes is obtained by crossing a horizontal gate line and a longitudinal data line;
  • the signal transmitting module includes N transmitting ends, each of which is connected to a column of the common electrodes, and the signal transmitting module is configured to input a transmitting signal to each column of the common electrodes;
  • the signal receiving module includes N receiving ends, each of which is connected to a data line of a column of pixel electrodes corresponding to the common electrode, and the signal receiving module is configured to collect and receive signals from data lines of each column. And calculating, according to the received signal, a capacitance value between each of the common electrode and the corresponding pixel electrode, and further determining, according to the capacitance value, whether the corresponding common electrode is open.
  • the detecting apparatus further includes a signal control module, where the signal control module includes an M group control end, each set of the control end and a row of the common electrode The gate lines of the corresponding pixel electrodes are connected, and the signal control module is configured to sequentially input switching signals to the gate lines of the respective rows to sequentially turn on the gate lines of the respective rows, wherein when the gate lines are turned on, the gate lines The pixel electrode on the line is electrically connected to the data line passing through the pixel electrode.
  • the transmitting end includes a first test pad, a first shorting bar, and at least two wires, the first test pad and the first a shorting bar connection, the first shorting bar being connected to the same end of the at least two wires, the at least two wires being connected to a column of the common electrode.
  • the first shorting bar comprises a thin film field effect transistor TFT.
  • the signal control module is an array substrate row driven GOA controller.
  • the switching signal is a high gate voltage value VGH / a low gate voltage value VGL, or a clock signal.
  • the receiving end includes a second test solder joint and a second shorting bar, and the second test solder joint is connected to the second shorting bar.
  • the second shorting bar is connected to the same end of the data line of the pixel electrode corresponding to one column of the common electrode.
  • the second shorting bar comprises a thin film field effect transistor TFT.
  • each of the common electrodes The corresponding plurality of pixel electrodes are shorted to each other.
  • the detecting device of the capacitive screen in the embodiment of the present invention includes a signal transmitting module and a signal receiving module, wherein the signal transmitting module is configured to input a transmitting signal to the universal electrode, and the signal receiving module is configured to collect the received signal from the pixel electrode. And calculating a capacitance value between each common electrode and the corresponding pixel electrode according to the received signal, and determining whether the corresponding common electrode is open according to the capacitance value, so that the common electrode of the capacitive screen interruption path can be detected.
  • FIG. 1 is a schematic structural view of a general-purpose electrode according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a detecting device for a capacitive screen according to an embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of another detecting device for a capacitive screen according to an embodiment of the present invention.
  • FIG. 4 is a schematic flow chart of a method for detecting a capacitive screen according to an embodiment of the present invention.
  • the capacitive screen in the embodiment of the present invention especially refers to the In cell capacitive screen, which is widely used in electronic products with touch display screens such as smart phones, tablet computers, super notebooks, audio and video players, handheld game terminals, and vehicle mobile terminals. .
  • the capacitive screen in the embodiment of the present invention includes a plurality of common electrodes arranged in a matrix of N*M.
  • N and M are positive integers
  • N represents a column
  • M represents a row.
  • the matrix rehearsing form of the general-purpose electrode is not limited thereto.
  • each of the common electrodes corresponds to a plurality of pixel electrodes each of which is obtained by crossing a lateral gate line and a longitudinal data line.
  • FIG. 2 is a schematic structural diagram of a detecting device for a capacitive screen according to an embodiment of the present invention.
  • the detecting device in the embodiment of the present invention as shown in the figure includes a signal transmitting module 110 and a signal receiving module 130, wherein:
  • the signal transmitting module 110 is connected to the common electrode for inputting a signal to the common electrode.
  • the signal receiving module 130 is connected to the pixel electrode for collecting the received signal from the pixel electrode, and calculating the capacitance value between each common electrode and the corresponding pixel electrode according to the received signal, and determining whether the corresponding common electrode is open according to the capacitance value. .
  • the common electrode and the pixel electrode are close to each other but insulated, so that there is a certain capacitance value between the two. If an electrical signal (ie, the above-mentioned emission signal) is input to the common electrode, the pixel electrode is correspondingly generated according to the characteristics of the capacitor. The electrical signal (ie, the received signal) can calculate the capacitance value between the common electrode and the pixel electrode according to the two electrical signals, and determine whether the corresponding universal electrode is open by determining whether the capacitance value falls within a normal interval range. .
  • the common electrodes of the capacitive screen are arranged in a matrix of N*M.
  • a row and column scanning detection method may be adopted.
  • the detecting apparatus in the embodiment of the present invention as shown in FIG. 2 may further include a signal control module 120, where:
  • the signal transmitting module 110 includes N transmitting ends, each transmitting end is connected to a column of common electrodes, and the signal transmitting module 110 is configured to input a transmitting signal to each column of common electrodes.
  • the number of the transmitting ends of the signal transmitting module 110 is equal to the number of columns N of the common electrodes.
  • the embodiment of the present invention uses three columns of common electrodes as an example, and thus the signal transmitting module 110 includes three transmitting ends, three The transmitting ends are respectively connected to the three columns of common electrodes.
  • the signal transmitting module 110 inputs the transmitting signals to the three columns of common electrodes through the three transmitting ends.
  • the signal control module 120 includes M groups of control terminals. Each group of control terminals is connected to a gate line of a pixel electrode corresponding to a row of common electrodes, and the signal control module 120 is configured to sequentially input the gate lines of each row. Switching signals to sequentially turn on the gate lines of each row, wherein when a certain gate line is turned on, A pixel electrode on the gate line is electrically connected to a data line passing through the pixel electrode.
  • each of the common electrodes has 2 gate lines and 3 data lines passing through, it should be noted that The common electrode, the gate line and the data line are insulated from each other. Since the pixel electrode is obtained by crossing the gate line and the data line, each of the common electrodes corresponds to 6 pixel electrodes.
  • the number of groups of the control terminals of the signal control module 120 is equal to the number of rows M of the common electrodes.
  • the embodiment of the present invention uses five rows of common electrodes as an example, and thus the signal control module 120 includes five groups of control terminals, each group.
  • the control terminals are respectively connected to the two gate lines of each row of common electrodes.
  • the first group of control terminals is connected to the first and second gate lines, and the second group of control terminals and the third group are connected.
  • Four gate lines are connected, ..., the fifth group of control terminals is connected to the ninth and tenth gate lines.
  • the signal control module 120 inputs the switch signals to the gate lines of the 5 rows of common electrodes through the 5 sets of control terminals in sequence (such as the order of the first group to the fifth group), it should be understood that if the input switch signals are When the voltage reaches a preset threshold, the gate line will be turned on, and the pixel electrode on the gate line is turned on and the data line passing through the pixel electrode.
  • different data lines can be obtained to receive signals on pixel electrodes corresponding to different common electrodes, for example, when the gate line of the common electrode of the third row is turned on, the first column
  • the data line of the common electrode can acquire the received signal on the pixel electrode corresponding to the first common electrode of the third row
  • the data line of the common electrode of the second row can acquire the corresponding second electrode of the third row.
  • the signal receiving module 130 includes N receiving ends, each receiving end is connected with a data line of a pixel electrode corresponding to a column of common electrodes, and the signal receiving module is used for collecting and receiving 130 data lines of each column.
  • the signal is calculated according to the received signal, and the capacitance value between each common electrode and the corresponding pixel electrode is calculated, and then the corresponding common electrode is determined to be open according to the capacitance value.
  • the number of receiving ends of the signal receiving module 130 is equal to the number N of the common electrodes, and the above-mentioned general electrode is taken as an example.
  • the signal control module 130 includes three receiving ends, and each receiving end is respectively associated with each column of common electrodes. The three data lines are connected. As shown in FIG. 2(B), the first receiving end is connected to the first, second, and third data lines, and the second receiving end is connected to the fourth, fifth, and sixth data lines. The third receiving end is connected to the seventh, eighth, and nine data lines. In a specific implementation process, the signal receiving module 130 collects the received signals from the data lines of the common electrodes of the columns.
  • the signal receiving module 130 calculates the common electrodes according to the received signals. And a capacitance value between the corresponding pixel electrode, and determining whether the capacitance value is less than a preset normal value, if less than a preset value The normal value determines that the common electrode corresponding to the capacitance value is disconnected. Since the gate lines are sequentially turned on, and the data lines for collecting the received signals are known, it is possible to calculate between all the common electrodes and the corresponding pixel electrodes. The capacitance value, so that the open circuit condition of all common electrodes can be determined.
  • the capacitance between the common electrode and the corresponding pixel electrode may be increased.
  • the plurality of pixel electrodes corresponding to each common electrode are short-circuited with each other, which is equivalent to A plurality of pixel electrodes corresponding to the same common electrode are regarded as a whole, and the capacitance value between the whole and the corresponding common electrode is calculated, without separately calculating a plurality of pixel electrodes corresponding to the same common electrode and the common electrode respectively The value of the capacitance between.
  • the detecting device of the capacitive screen in the embodiment of the present invention includes a signal transmitting module and a signal receiving module, wherein the signal transmitting module is configured to input a transmitting signal to the universal electrode, and the signal receiving module is configured to collect the received signal from the pixel electrode. And calculating a capacitance value between each common electrode and the corresponding pixel electrode according to the received signal, and determining whether the corresponding common electrode is open according to the capacitance value, so that the common electrode of the capacitive screen interruption path can be detected.
  • FIG. 3 is a schematic structural diagram of another detecting device for a capacitive screen according to an embodiment of the present invention. This schematic is a further refinement of the detection device shown in Figure 2. As shown in the illustrated embodiment of the present invention, in the detecting device:
  • the transmitting end of the signal transmitting module 110 includes a first test pad for common 111, a first shorting bar 112 and at least two traces 113.
  • the strip wire 113 is an example.
  • the first test pad 111 is connected to the first shorting bar 112, the first shorting bar 112 is connected to the same end of the five wires 113, and the five wires 113 are connected to a column of common electrodes.
  • the first shorting bar 112 may be a wire or a TFT (Thin Film Transistor).
  • the signal control module 120 is a GOA (Gate driver ON Array) controller.
  • the switching signal output by the GOA controller is VGH (Voltage of Gate High) / VGL (Voltage of Gate Low), or a clock signal.
  • VGH Voltage of Gate High
  • VGL Voltage of Gate Low
  • the voltage value of the VGH is greater than the preset threshold, and the gate line can be turned on.
  • the VGL voltage is less than a preset threshold, and the gate line can be turned off; the high level voltage of the clock signal is greater than a preset threshold, and the gate line can be turned on.
  • the signal control module 120 can be implemented by using a switch signal of the above type with a certain timing.
  • control end of the signal control module 120 includes at least one third test pad for GOA 121 and a GOA circuit 122.
  • the third test pad 121 and the control GOA circuit 122 together implement the output of the switching signal.
  • the receiving end of the signal receiving module 130 includes a second test pad for data line 131 and a second shorting bar 132.
  • the second test pad 131 is connected to the second shorting bar 132, and the second shorting bar 132 is connected to the same end of the data line of the pixel electrode corresponding to one column of common electrodes, for example, one second shorting bar 132 is connected to the same end of the three data lines.
  • the second shorting bar 132 may be a wire or a TFT.
  • FIG. 4 is a schematic flow chart of a method for detecting a capacitive screen according to an embodiment of the present invention.
  • the detection method is implemented in the detecting device of the capacitive screen described in FIG. 1 to FIG.
  • the flow of the detection method of the capacitive screen in this embodiment may include:
  • the capacitive screen in the embodiment of the present invention as shown in FIG. 1 includes a plurality of common electrodes arranged in a matrix of N*M.
  • N and M are positive integers, N represents a column, and M represents a row.
  • the present invention is exemplified by a matrix of 3*5 (3 columns and 5 rows) as shown in the drawing, but it is to be noted that the matrix rehearsing form of the general-purpose electrode is not limited to this example.
  • each of the common electrodes corresponds to a plurality of pixel electrodes each of which is obtained by crossing one lateral gate line and one longitudinal data line. Specifically, the transmission signals are input to the three columns of common electrodes, respectively.
  • each of the common electrodes has 2 gate lines and 3 data lines passing through
  • the common electrode, the gate line and the data line are insulated from each other. Since the pixel electrode is obtained by crossing the gate line and the data line, each of the common electrodes corresponds to 6 pixel electrodes.
  • five rows of common electrodes are taken as an example, so that five sets of control terminals can be used, and each group of control terminals is respectively connected with two gate lines of each row of common electrodes, as shown in FIG. 2(B), the first The group control terminal is connected to the first and second gate lines, the second group control terminal is connected to the third and fourth gate lines, ..., and the fifth group control terminal is connected to the ninth and tenth gate lines.
  • the five groups of control terminals are sequentially (for example, the order of the first group to the fifth group) to five rows of general-purpose electricity.
  • the gate line input switch signal it should be understood that if the voltage of the input switch signal reaches a preset threshold, the gate line will be turned on, the pixel electrode on the gate line and the data line through the pixel electrode through.
  • different data lines can be obtained to receive signals on pixel electrodes corresponding to different common electrodes, for example, when the gate line of the common electrode of the third row is turned on, the first column The data line can acquire the received signal on the pixel electrode corresponding to the first common electrode of the third row, and the second column of the data line can acquire the received signal on the pixel electrode corresponding to the second common electrode of the third row, This type of push.
  • the switch signal is output by a GOA (Gate driver ON Array) controller.
  • the switching signal may be VGH (Voltage of Gate High) / VGL (Voltage of Gate Low), or a clock signal.
  • VGH Voltage of Gate High
  • VGL Voltage of Gate Low
  • the voltage value of the VGH is greater than the preset threshold, and the gate line can be turned on.
  • the VGL voltage is less than a preset threshold, and the gate line can be turned off; the high level voltage of the clock signal is greater than a preset threshold, and the gate line can be turned on.
  • the gate line can be turned off. Therefore, the gate lines of the common electrodes of the respective rows are sequentially turned on by the switching signals of the above types in accordance with a certain timing.
  • the received signals are respectively collected from the data lines of the three columns of the common electrodes.
  • the capacitance value between each common electrode and the corresponding pixel electrode is calculated according to the received signal, and it is determined whether the capacitance value is less than a preset normal value, and if it is less than a preset normal value, determining the corresponding capacitance value
  • the common electrode is disconnected. Since the gate lines are sequentially turned on, and the data lines for collecting the received signals are known, the capacitance values between all the common electrodes and the corresponding pixel electrodes can be calculated, so that the disconnection of all the common electrodes is performed. It is all ok.
  • the capacitance between the common electrode and the corresponding pixel electrode may be increased.
  • the plurality of pixel electrodes corresponding to each common electrode are short-circuited with each other, which is equivalent to A plurality of pixel electrodes corresponding to the same common electrode are regarded as a whole, and the capacitance value between the whole and the corresponding common electrode is calculated.
  • the detecting device of the capacitive screen in the embodiment of the present invention includes a signal transmitting module and a signal receiving module, wherein the signal transmitting module is configured to input a transmitting signal to the universal electrode, and the signal receiving module is configured to collect the received signal from the pixel electrode. And calculating a capacitance value between each common electrode and the corresponding pixel electrode according to the received signal, and determining whether the corresponding common electrode is open according to the capacitance value, so that the common electrode of the capacitive screen interruption path can be detected.
  • the modules in the apparatus of the embodiment of the present invention may be combined, divided, and deleted according to actual needs.
  • the module in the embodiment of the present invention may be implemented by a general-purpose integrated circuit, such as a CPU (Central Processing Unit) or an ASIC (Application Specific Integrated Circuit).
  • a general-purpose integrated circuit such as a CPU (Central Processing Unit) or an ASIC (Application Specific Integrated Circuit).
  • the storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

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Abstract

一种电容屏的检测装置，所述电容屏包括多个通用电极，每个所述通用电极对应于多个像素电极，所述检测装置包括信号发射模块（110）和信号接收模块（130），其中：所述信号发射模块（110）与所述通用电极连接，用于向所述通用电极输入发射信号；所述信号接收模块（130）与所述像素电极连接，用于从所述像素电极上采集接收信号，并根据所述接收信号计算出各个所述通用电极与对应的像素电极之间的电容值，进而根据所述电容值确定所述对应的通用电极是否断路。采用该装置，可以检测出电容屏中断路的通用电极。

Description

一种电容屏的检测装置
本申请要求于2015年9月15日提交中国专利局，申请号为201510587227.5、发明名称为“一种电容屏的检测装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电子技术领域，尤其涉及一种电容屏的检测装置。
背景技术
随着电子产品的普及，电容式触摸屏(简称为“电容屏”)广泛应用于各类电子产品，如智能手机、平板电脑等。现有的电容屏可分为G+G(Glass+Glass，双片玻璃)、GF(Glass Film，玻璃单膜)、GFF(Glass Film Film，玻璃双膜)、OGS(One Glass Solution，单片玻璃)等的外挂式电容屏，和On cell、In cell等的嵌入式电容屏。随着用户对电子产品体验的不断要求，最具轻薄化特点的In cell势必成为未来主流的电容屏。
目前，In cell电容屏的一种设计方案是将显示屏的common(通用)电极分割成块状的棋盘格结构，如图1所示。其中，独立分块的common电极是从一块完整面板上切割形成的，因而切割过程可能会产生common电极断路的问题，如何检测common电极是否断路，是目前亟待解决的问题。
发明内容
本发明实施例提供了一种电容屏的检测装置，可以检测出电容屏中断路的通用电极。
本发明实施例提供了一种电容屏的检测装置，所述电容屏包括多个通用电极，每个所述通用电极对应于多个像素电极，所述检测装置包括信号发射模块和信号接收模块，其中：
所述信号发射模块与所述通用电极连接，用于向所述通用电极输入发射信号；
所述信号接收模块与所述像素电极连接，用于从所述像素电极上采集接收信号，并根据所述接收信号计算出各个所述通用电极与对应的像素电极之间的 电容值，进而根据所述电容值确定所述对应的通用电极是否断路。
在第一种可能实现方式中，所述多个通用电极以N*M的矩阵排列，每个所述像素电极由一条横向的栅极线和一条纵向的数据线交叉得到；
所述信号发射模块包括N个发射端，每个所述发射端与一列所述通用电极连接，所述信号发射模块用于向各列所述通用电极输入发射信号；
所述信号接收模块包括N个接收端，每个所述接收端与一列所述通用电极对应的像素电极的数据线连接，所述信号接收模块用于从各列的数据线上采集接收信号，并根据所述接收信号计算出各个所述通用电极与对应的像素电极之间的电容值，进而根据所述电容值确定所述对应的通用电极是否断路。
结合第一种可能实现方式，在第二种可能实现方式中，所述检测装置还包括信号控制模块，所述信号控制模块包括M组控制端，每组所述控制端与一行所述通用电极对应的像素电极的栅极线连接，所述信号控制模块用于向各行的栅极线依次输入开关信号以依次打开各行的栅极线，其中，当所述栅极线打开时，该栅极线上的像素电极和与通过该像素电极的数据线导通。
结合第二种可能实现方式，在第三种可能实现方式中，所述发射端包括第一测试焊点、第一短路棒和至少两条导线，所述第一测试焊点与所述第一短路棒连接，所述第一短路棒与所述至少两条导线的同一端连接，所述至少两条导线与一列所述通用电极连接。
结合第三种可能实现方式，在第四种可能实现方式中，所述第一短路棒包括薄膜场效应晶体管TFT。
结合第二种可能实现方式，在第五种可能实现方式中，所述信号控制模块是阵列基板行驱动GOA控制器。
结合第五种可能实现方式，在第六种可能实现方式中，所述开关信号是高栅极电压值VGH/低栅极电压值VGL，或时钟信号。
结合第二种可能实现方式，在第七种可能实现方式中，所述接收端包括第二测试焊点和第二短路棒，所述第二测试焊点与所述第二短路棒连接，所述第二短路棒与一列所述通用电极对应的像素电极的数据线的同一端连接。
结合第七种可能实现方式，在第八种可能实现方式中，所述第二短路棒包括薄膜场效应晶体管TFT。
结合第二种可能实现方式，在第九种可能实现方式中，每个所述通用电极 对应的多个像素电极之间相互短接。
由上可见，本发明实施例中的电容屏的检测装置包括信号发射模块和信号接收模块，其中，信号发射模块用于向通用电极输入发射信号，信号接收模块用于从像素电极上采集接收信号，并根据接收信号计算出各个通用电极与对应的像素电极之间的电容值，进而根据电容值确定对应的通用电极是否断路，从而可以检测出电容屏中断路的通用电极。
附图说明
为了更清楚地说明本发明实施例，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的一种通用电极的结构示意图；
图2是本发明实施例提供的一种电容屏的检测装置的结构示意图；
图3是本发明实施例提供的另一种电容屏的检测装置的结构示意图；
图4是本发明实施例提供的一种电容屏的检测方法的流程示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例中的电容屏，尤其是指In cell电容屏，其广泛应用于智能手机、平板电脑、超级笔记本、音视频播放器、手持游戏终端和车载移动终端等携带触摸显示屏的电子产品。
图1是本发明实施例中一种通用电极的结构示意图。如图所示本发明实施例中的所述电容屏包括多个通用(common)电极，所述多个通用电极以N*M的矩阵排列。其中，N、M为正整数，N表示列，M表示行。为便于说明，本 发明以如图所示的3*5(3列5行)的矩阵作为示例，但需要指出的是，通用电极的矩阵排练形式不限于此。应理解地，每个通用电极对应于多个像素(pixel)电极，每个像素电极由一条横向的栅极线(gate line)和一条纵向的数据线(data line)交叉得到。
图2是本发明实施例中一种电容屏的检测装置的结构示意图。如图所示本发明实施例中的所述检测装置包括信号发射模块110和信号接收模块130，其中：
信号发射模块110与通用电极连接，用于向通用电极输入发射信号。
信号接收模块130与像素电极连接，用于从像素电极上采集接收信号，并根据接收信号计算出各个通用电极与对应的像素电极之间的电容值，进而根据电容值确定对应的通用电极是否断路。
具体地，通用电极与像素电极相互紧靠但绝缘，因而两者间存在一定的电容值，若向通用电极输入电信号(即上述发射信号)，根据电容的特征，像素电极上会相应地产生电信号(即上述接收信号)，根据这两个电信号可以算出通用电极与像素电极之间的电容值，通过判断该电容值是否落在正常的区间范围内即可确定对应的通用电极是否断路。
需要指出的是，由图1可知，电容屏的通用电极是以N*M的矩阵排列的，为了准确定位矩阵中发生断路的一个或多个通用电极，可以采用行、列扫描的检测方式。作为一种可选的实施方式，如图2所示本发明实施例中的检测装置还可以包括信号控制模块120，其中：
请参阅图2(A)，信号发射模块110包括N个发射端，每个发射端与一列通用电极连接，信号发射模块110用于向各列通用电极输入发射信号。
具体地，信号发射模块110的发射端的个数等于通用电极的列数N，为了便于说明，本发明实施例以3列的通用电极作为示例，因此信号发射模块110包括3个发射端，3个发射端分别与3列通用电极连接。具体实现过程中，信号发射模块110通过3个发射端分别向3列通用电极输入发射信号。
请参阅图2(B)，信号控制模块120包括M组控制端，每组控制端与一行通用电极对应的像素电极的栅极线连接，信号控制模块120用于向各行的栅极线依次输入开关信号以依次打开各行的栅极线，其中，当某栅极线打开时， 该栅极线上的像素电极和与通过该像素电极的数据线导通。
为了便于理解，本发明实施例以10条横向的栅极线和9条纵向的数据线为示例，其中每个通用电极上有2条栅极线和3条数据线通过，需要指出的是，通用电极、栅极线和数据线两两之间相互绝缘。由于像素电极由栅极线和数据线交叉得到，因此每个通用电极对应于6个像素电极。
具体地，信号控制模块120的控制端的组数等于通用电极的行数M，为了便于理解，本发明实施例以5行的通用电极作为示例，因此信号控制模块120包括5组控制端，每组控制端分别与每行通用电极的2条栅极线连接，如图2(B)所示，第1组控制端与第1、2条栅极线连接，第2组控制端与第3、4条栅极线连接，……，第5组控制端与第9、10条栅极线连接。具体实现过程中，信号控制模块120通过5组控制端依次(如第1组到第5组的顺序)向5行通用电极的栅极线输入开关信号，应理解地，若输入的开关信号的电压达到预设阈值，栅极线将被打开，该栅极线上的像素电极和与通过该像素电极的数据线导通。通过依次打开不同的栅极线，可以让不同的数据线获取到不同的通用电极对应的像素电极上的接收信号，例如，当第3行的通用电极的栅极线被打开时，第1列的通用电极的数据线可以获取到第3行的第1个通用电极对应的像素电极上的接收信号，第2列的通用电极的数据线可以获取到第3行的第2个通用电极对应的像素电极上的接收信号，以此类推。
请参阅图2(B)，信号接收模块130包括N个接收端，每个接收端与一列通用电极对应的像素电极的数据线连接，信号接收模块用于130从各列的数据线上采集接收信号，并根据接收信号计算出各个通用电极与对应的像素电极之间的电容值，进而根据电容值确定对应的通用电极是否断路。
具体地，信号接收模块130的接收端的个数等于通用电极的列数N，仍以上述的通用电极为示例，则信号控制模块130包括3个接收端，每个接收端分别与每列通用电极的3条数据线连接，如图2(B)所示，第1个接收端与第1、2、3条数据线连接，第2个接收端与第4、5、6条数据线连接，第3个接收端与第7、8、9条数据线连接。具体实现过程中，信号接收模块130从各列的通用电极的数据线上采集接收信号，由于每个通用电极与像素电极之间存在一个电容值，信号接收模块130根据接收信号计算出各个通用电极与对应的像素电极之间的电容值，并判断该电容值是否小于预设的正常值，若小于预设的 正常值，则确定该电容值对应的通用电极发生断路，由于栅极线是依次打开的，并且采集接收信号的数据线是已知，因此可以计算出所有通用电极与对应的像素电极之间的电容值，从而所有通用电极的断路情况都是可以确定的。可选地，为了加大测试效果，可以增大通用电极与对应的像素电极之间的电容值，具体实现过程中，将每个通用电极对应的多个像素电极之间相互短接，相当于将对应于同一通用电极的多个像素电极视为一个整体，进而计算这个整体与对应的通用电极之间的电容值，而不用分别计算对应于同一通用电极的多个像素电极分别与该通用电极之间的电容值。
由上可见，本发明实施例中的电容屏的检测装置包括信号发射模块和信号接收模块，其中，信号发射模块用于向通用电极输入发射信号，信号接收模块用于从像素电极上采集接收信号，并根据接收信号计算出各个通用电极与对应的像素电极之间的电容值，进而根据电容值确定对应的通用电极是否断路，从而可以检测出电容屏中断路的通用电极。
图3是本发明实施例中另一种电容屏的检测装置的结构示意图。该示意图是对图2所示的检测装置的进一步细化。如图所示本发明实施例中的所述检测装置中：
信号发射模块110的发射端包括第一测试焊点(test pad for common)111、第一短路棒(shorting bar)112和至少两条导线(trace)113，为了便于说明，本发明实施例以5条导线113为示例。其中，第一测试焊点111与第一短路棒112连接，第一短路棒112与5条导线113的同一端连接，5条导线113与一列通用电极连接。可选地，第一短路棒112可以是导线，也可以是TFT(Thin Film Transistor，薄膜场效应晶体管)。
信号控制模块120是GOA(Gate driver ON Array，阵列基板行驱动)控制器。可选地，GOA控制器输出的开关信号是VGH(Voltage of Gate High，高栅极电压值)/VGL(Voltage of Gate Low，低栅极电压值)，或时钟信号(clock)。应理解地，VGH的电压值大于上述预设阈值，可以打开栅极线，VGL电压小于预设阈值，可以关闭栅极线；时钟信号的高电平电压大于预设阈值，可以打开栅极线，反之低电平电压小于预设阈值，可以关闭栅极线。因此，通过上述类型的开关信号，配合一定的时序，信号控制模块120可以实现 依次打开各行的通用电极的栅极线。进一步地，信号控制模块120的控制端包括至少一个第三测试焊点(test pad for GOA)121和GOA电路122，第三测试焊点121和控制GOA电路122一并实现开关信号的输出。
信号接收模块130的接收端包括第二测试焊点(test pad for data line)131和第二短路棒(shorting bar)132，第二测试焊点131与第二短路棒132连接，第二短路棒132与一列通用电极对应的像素电极的数据线的同一端连接，如1个第二短路棒132与3条数据线的同一端连接。可选地，第二短路棒132可以是导线，也可以是TFT。
图4是本发明实施例中一种电容屏的检测方法的流程示意图，该检测方法实现于图1至图3所述的电容屏的检测装置。如图所示本实施例中的电容屏的检测方法的流程可以包括：
S101，向N列所述通用电极输入发射信号。
如图1所示本发明实施例中的所述电容屏包括多个通用电极，所述多个通用电极以N*M的矩阵排列。其中，N、M为正整数，N表示列，M表示行。为便于说明，本发明以如图所示的3*5(3列5行)的矩阵作为示例，但需要指出的是，通用电极的矩阵排练形式不限于此示例。应理解地，每个通用电极对应于多个像素电极，每个像素电极由一条横向的栅极线和一条纵向的数据线交叉得到。具体地，分别向3列通用电极输入发射信号。
S102，向M行所述通用电极对应的像素电极的栅极线依次输入开关信号以依次打开各行的栅极线，打开后的栅极线与交叉的数据线导通。
为了便于理解，本发明实施例以10条横向的栅极线和9条纵向的数据线为示例，其中每个通用电极上有2条栅极线和3条数据线通过，需要指出的是，通用电极、栅极线和数据线两两之间相互绝缘。由于像素电极由栅极线和数据线交叉得到，因此每个通用电极对应于6个像素电极。本发明实施例以5行的通用电极作为示例，因此可以使用5组控制端，每组控制端分别与每行通用电极的2条栅极线连接，如图2(B)所示，第1组控制端与第1、2条栅极线连接，第2组控制端与第3、4条栅极线连接，……，第5组控制端与第9、10条栅极线连接。
具体地，通过5组控制端依次(如第1组到第5组的顺序)向5行通用电 极的栅极线输入开关信号，应理解地，若输入的开关信号的电压达到预设阈值，栅极线将被打开，该栅极线上的像素电极和与通过该像素电极的数据线导通。通过依次打开不同的栅极线，可以让不同的数据线获取到不同的通用电极对应的像素电极上的接收信号，例如，当第3行的通用电极的栅极线被打开时，第1列数据线可以获取到第3行的第1个通用电极对应的像素电极上的接收信号，第2列数据线可以获取到第3行的第2个通用电极对应的像素电极上的接收信号，以此类推。
可选地，所述开关信号是由GOA(Gate driver ON Array，阵列基板行驱动)控制器输出的。进一步地，开关信号可以是VGH(Voltage of Gate High，高栅极电压值)/VGL(Voltage of Gate Low，低栅极电压值)，或时钟信号(clock)。应理解地，VGH的电压值大于上述预设阈值，可以打开栅极线，VGL电压小于预设阈值，可以关闭栅极线；时钟信号的高电平电压大于预设阈值，可以打开栅极线，反之低电平电压小于预设阈值，可以关闭栅极线。因此，通过上述类型的开关信号，配合一定的时序，可以实现依次打开各行的通用电极的栅极线。
S103，从N列所述通用电极对应的像素电极的数据线上采集接收信号。
仍以上述的通用电极为示例，具体地，分别从3列的通用电极的数据线上采集接收信号。
S104，根据所述接收信号，计算出各个所述通用电极与对应的像素电极之间的电容值，进而根据所述电容值确定所述对应的通用电极是否断路。
具体地，根据接收信号计算出各个通用电极与对应的像素电极之间的电容值，并判断该电容值是否小于预设的正常值，若小于预设的正常值，则确定该电容值对应的通用电极发生断路，由于栅极线是依次打开的，并且采集接收信号的数据线是已知，因此可以计算出所有通用电极与对应的像素电极之间的电容值，从而所有通用电极的断路情况都是可以确定的。可选地，为了加大测试效果，可以增大通用电极与对应的像素电极之间的电容值，具体实现过程中，将每个通用电极对应的多个像素电极之间相互短接，相当于将对应于同一通用电极的多个像素电极视为一个整体，进而计算这个整体与对应的通用电极之间的电容值。
由上可见，本发明实施例中的电容屏的检测装置包括信号发射模块和信号接收模块，其中，信号发射模块用于向通用电极输入发射信号，信号接收模块用于从像素电极上采集接收信号，并根据接收信号计算出各个通用电极与对应的像素电极之间的电容值，进而根据电容值确定对应的通用电极是否断路，从而可以检测出电容屏中断路的通用电极。
本发明实施例装置中的模块，可以根据实际需要进行合并、划分和删减。
本发明实施例中所述模块，可以通过通用集成电路，例如CPU(Central Processing Unit，中央处理器)，或通过ASIC(Application Specific Integrated Circuit，专用集成电路)来实现。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，所述的存储介质可为磁碟、光盘、只读存储记忆体(Read-Only Memory，ROM)或随机存储记忆体(Random Access Memory，RAM)等。
以上所揭露的仅为本发明较佳实施例而已，当然不能以此来限定本发明之权利范围，因此依本发明权利要求所作的等同变化，仍属本发明所涵盖的范围。

Claims (10)

  1. 一种电容屏的检测装置，其中，所述电容屏包括多个通用电极，每个所述通用电极对应于多个像素电极，所述检测装置包括信号发射模块和信号接收模块，其中：
    所述信号发射模块与所述通用电极连接，用于向所述通用电极输入发射信号；
    所述信号接收模块与所述像素电极连接，用于从所述像素电极上采集接收信号，并根据所述接收信号计算出各个所述通用电极与对应的像素电极之间的电容值，进而根据所述电容值确定所述对应的通用电极是否断路。
  2. 如权利要求1所述的检测装置，其中，所述多个通用电极以N*M的矩阵排列，每个所述像素电极由一条横向的栅极线和一条纵向的数据线交叉得到；
    所述信号发射模块包括N个发射端，每个所述发射端与一列所述通用电极连接，所述信号发射模块用于向各列所述通用电极输入发射信号；
    所述信号接收模块包括N个接收端，每个所述接收端与一列所述通用电极对应的像素电极的数据线连接，所述信号接收模块用于从各列的数据线上采集接收信号，并根据所述接收信号计算出各个所述通用电极与对应的像素电极之间的电容值，进而根据所述电容值确定所述对应的通用电极是否断路。
  3. 如权利要求2所述的检测装置，其中，所述检测装置还包括信号控制模块，所述信号控制模块包括M组控制端，每组所述控制端与一行所述通用电极对应的像素电极的栅极线连接，所述信号控制模块用于向各行的栅极线依次输入开关信号以依次打开各行的栅极线，其中，当所述栅极线打开时，该栅极线上的像素电极和与通过该像素电极的数据线导通。
  4. 如权利要求3所述的检测装置，其中，所述发射端包括第一测试焊点、第一短路棒和至少两条导线，所述第一测试焊点与所述第一短路棒连接，所述第一短路棒与所述至少两条导线的同一端连接，所述至少两条导线与一列所述 通用电极连接。
  5. 如权利要求4所述的检测装置，其中，所述第一短路棒包括薄膜场效应晶体管TFT。
  6. 如权利要求3所述的检测装置，其中，所述信号控制模块是阵列基板行驱动GOA控制器。
  7. 如权利要求6所述的检测装置，其中，所述开关信号是高栅极电压值VGH/低栅极电压值VGL，或时钟信号。
  8. 如权利要求3所述的检测装置，其中，所述接收端包括第二测试焊点和第二短路棒，所述第二测试焊点与所述第二短路棒连接，所述第二短路棒与一列所述通用电极对应的像素电极的数据线的同一端连接。
  9. 如权利要求8所述的检测装置，其中，所述第二短路棒包括薄膜场效应晶体管TFT。
  10. 如权利要求3所述的检测装置，其中，每个所述通用电极对应的多个像素电极之间相互短接。
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