WO2017016521A1 - 能降低功耗的电子装置及降低电子装置功耗的方法 - Google Patents

能降低功耗的电子装置及降低电子装置功耗的方法 Download PDF

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Publication number
WO2017016521A1
WO2017016521A1 PCT/CN2016/092335 CN2016092335W WO2017016521A1 WO 2017016521 A1 WO2017016521 A1 WO 2017016521A1 CN 2016092335 W CN2016092335 W CN 2016092335W WO 2017016521 A1 WO2017016521 A1 WO 2017016521A1
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Prior art keywords
volatile memory
electronic device
data
working mode
operating system
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PCT/CN2016/092335
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English (en)
French (fr)
Inventor
杨任花
赵俊峰
杨伟
肖世海
林殷茵
韦祎
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华为技术有限公司
复旦大学
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Publication of WO2017016521A1 publication Critical patent/WO2017016521A1/zh
Priority to US15/882,612 priority Critical patent/US10976800B2/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0625—Power saving in storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0634—Configuration or reconfiguration of storage systems by changing the state or mode of one or more devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0647—Migration mechanisms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/068—Hybrid storage device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0685—Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4418—Suspend and resume; Hibernate and awake
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868—Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to the field of power management technologies, and in particular, to an electronic device capable of reducing power consumption and a method for reducing power consumption of the electronic device.
  • the power consumption of the memory accounts for about one-third of the power consumption of the entire mobile device.
  • the memory ratio of the entire portable mobile device will become larger and larger, so in order to extend the standby time of the mobile device, the memory power consumption can be reduced.
  • each memory cell is composed of a MOS transistor and a capacitor, and is externally powered. Each storage unit is powered to store data. Since the charge stored in the capacitor will leak through the MOS transistor after a period of time, the circuit must be refreshed at intervals to replenish the capacitor to preserve the data stored in the cell.
  • the DRAM refreshes the circuit through an external clock, so that the refresh speed is faster, but the power consumption is relatively high.
  • a low power consumption state such as a black screen standby state
  • the DRAM enters a self-refresh state, that is, the circuit is refreshed by the clock of the DRAM itself, without an external clock, which can further reduce the power consumption of the electronic device in a low power consumption state.
  • the DRAM still needs to refresh all the banks, so the power consumption of the electronic device in the low power state is still high.
  • Embodiments of the present invention provide an electronic device capable of reducing power consumption and a method for reducing power consumption of the electronic device, and reducing power consumption of the electronic device.
  • a first aspect of the present invention provides an electronic device capable of reducing power consumption, including a processor, a volatile memory, and a non-volatile memory, wherein the non-volatile memory stores a first operating system, and the electronic device is Working in the first working mode and the second working mode;
  • the second operating system runs in the volatile memory, and the processor detects that the electronic device reaches a preset entry into the second work
  • the non-volatile memory is turned on, and non-system data in the volatile memory is moved into the non-volatile memory, and the non-system data does not include the second operating system.
  • the volatile memory is turned off, and the first operating system is run in the non-volatile memory to cause the electronic device to enter the second working mode.
  • the processor detects that the electronic device reaches a preset entering the first
  • the volatile memory is turned on, the second operating system is loaded to the volatile memory, and non-systematic data in the non-volatile memory is moved to the volatile
  • the non-systematic data in the non-volatile memory does not include the first operating system, and after the non-systematic data movement in the non-volatile memory is completed, the non-volatile memory is turned off.
  • running the second operating system in the volatile memory to cause the electronic device to enter the first working mode.
  • the non-systematic data in the volatile memory that is moved is valid data.
  • the processor in combination with the first aspect or the first possible implementation manner or the second possible implementation manner, in a third possible implementation manner, includes a first processor and a second processor, where the electronic When the device is in the first working mode, the processor is the first processor, when the electronic device is in the second working mode, the processor is the second processor and the The frequency of the second processor is lower than the frequency of the first processor.
  • the processor detects that the electronic device reaches a condition of entering the second working mode, further calculating, in the volatile memory, the The amount of data of non-systematic data, and judge the volatility Whether the amount of data of the non-systematic data in the memory is not greater than a preset data amount threshold, and if not greater, moving the non-systematic data in the volatile memory to the non-volatile memory; If the value is greater than, the electronic device is still in the first working mode or moves a portion of the non-system data in the volatile memory that is equal to the data amount threshold to the non-volatile memory. The remaining portion is stored to an external memory of the electronic device.
  • a second aspect of the present invention provides a method for reducing power consumption of an electronic device, the electronic device including a volatile memory, a non-volatile memory, and a first operating system stored in the non-volatile memory, the electronic device Working in the first working mode and the second working mode;
  • the volatile memory is turned off, and the second operating system is run in the non-volatile memory to cause the electronic device to enter the second working mode.
  • the electronic device reaches a condition of entering the preset first working mode, turning on the volatile memory, loading the first operating system to the volatile memory, and using non-volatile memory Non-systematic data in the movement to the volatile memory;
  • the non-system data in the volatile memory that is moved is valid data.
  • the moving the non-systematic data in the volatile memory to the non-volatile memory comprises: counting the non-system in the volatile memory The amount of data;
  • the electronic device If greater than, the electronic device is still in the first mode of operation or moves a portion of the non-systematic data in the volatile memory that is equal to the data amount threshold to the non-volatile
  • the memory is stored while the remaining portion is stored to an external memory of the electronic device.
  • the electronic device capable of reducing power consumption and the method for reducing power consumption of the electronic device provided by the embodiments of the present invention
  • the electronic device is When entering the low-power working mode, after moving the non-system data in the volatile memory to the non-volatile memory, the volatile memory is turned off, and the non-volatile memory is used as the memory of the electronic device to perform the corresponding operation.
  • the volatile memory is turned off, there is no need to save data by self-refresh, thereby reducing the power consumption of the electronic device.
  • FIG. 1 is a structural diagram of an electronic device capable of reducing power consumption according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a process of switching an operation mode of the electronic device of FIG. 1;
  • FIG. 3 is a diagram of another electronic device capable of reducing power consumption according to an embodiment of the invention.
  • FIG. 4 is a flowchart of a method for reducing power consumption of an electronic device according to an embodiment of the present invention.
  • FIG. 1 is a structural diagram of an electronic device capable of reducing power consumption according to an embodiment of the present invention.
  • the electronic device 10 includes a first processor 11, a volatile memory 12, a non-volatile memory 13, and an external memory 14.
  • the first operating system 15 is stored in the non-volatile memory 13, and the second operating system 16 is stored on the external memory 14.
  • the electronic device 10 can operate in two working modes, a first working mode and a second working mode.
  • the volatile memory 12 is turned on, and the nonvolatile The memory 13 is turned off, the second operating system 16 is loaded into the volatile memory 12, and when the electronic device 10 is in the second working mode, the non-volatile memory 13 is turned on. Loss of memory 12 is turned off.
  • the electronic device 10 is a portable mobile device, such as a tablet computer, a mobile phone, or the like.
  • the volatile memory 12 is a dynamic random access memory (DRAM), which has a relatively fast access speed, but consumes a relatively large amount of power.
  • the nonvolatile memory 13 is a phase change memory (PCM) having a small power consumption but a slow access speed. Therefore, when the electronic device 10 is in the second mode of operation, it has lower power consumption.
  • DRAM dynamic random access memory
  • PCM phase change memory
  • the external memory 14 is a NAND memory for storing the second operating system 16 and other data. When the electronic device 10 is running, the data in the external memory 14 can be transferred to the volatile memory 12 for the first Processing unit 11 processes.
  • the second operating system 16 runs in the volatile memory 12, and the first processor 11 detects
  • the non-volatile memory 13 is turned on, and non-system data in the volatile memory 12 is moved to the non-volatile In the memory 13, the non-system data does not include the second operating system 16, after the non-system data movement is completed, the volatile memory 12 is turned off, and the non-volatile memory 13 is operated.
  • the first operating system 15 is configured to cause the electronic device 10 to enter the second mode of operation.
  • the opening is Loss of memory 13, loading the second operating system 16 to the volatile memory 12, and moving non-systematic data in the non-volatile memory 13 into the volatile memory 12,
  • the non-systematic data in the non-volatile memory 13 does not include the first operating system 15, and after the non-systematic data movement in the non-volatile memory 13 is completed, the non-volatile memory 13 is turned off, After the second operating system 16 is loaded, the second operating system 16 is run in the volatile memory 12 to cause the electronic device 10 to enter the first working mode.
  • the non-system data in the volatile memory 12 that is moved is valid data, that is, data marked as valid in the volatile memory 12.
  • the first operating system 15 is a low-power consumption system that occupies less memory, such as a Symbian system or a compact operating system that cuts some functions based on the second operating system 16 and can execute Basic functions such as phone, texting, and background file management.
  • the condition for entering the second working mode may be that the first processor 11 receives a request for entering the second working mode generated by the input unit (not shown) in response to the user's operation, that is, the user can manually set the electronic device to the first Two working modes.
  • the condition for entering the first working mode may be that the first processor 10 receives the request of the input unit to enter the first working mode in response to the user's operation, that is, the user may manually set the electronic device to the first working mode.
  • the condition for entering the second working mode may be that the first processor 11 detects the electronic device 10 When the power consumption per unit time is less than the power consumption threshold, the first processor 11 detects the power consumption of the electronic device 10 in real time, and compares the detected power consumption with the power consumption threshold, when the power of the electronic device 10 When the consumption is less than the power consumption threshold, the electronic device 10 may be in a black screen standby state at this time, or the low power consumption application is operated, and the electronic device 10 may be switched to the second working mode to reduce power consumption.
  • the condition for entering the first working mode may be that the first processor 11 detects that the power consumption of the electronic device 10 per unit time is greater than the power consumption threshold, that is, the first processor 11 detects the work of the electronic device 10 in real time.
  • the power consumption is compared with the power consumption threshold.
  • the electronic device 10 is configured to perform high power consumption at this time.
  • the electronic device 10 is switched to the first mode of operation to quickly respond to the high power consumption application.
  • the condition for entering the second working mode may be that the first processor 11 detects that the access frequency of the data in the volatile memory 12 is less than a frequency threshold, that is, the first processor 11 detects the volatile memory in real time. If the frequency of accessing the data in the volatile memory 12 is less than the frequency threshold, indicating that the electronic device 10 is in a relatively idle state, the electronic device 10 can be switched to the first Working mode to reduce power consumption.
  • the condition for entering the first working mode may be that the first processor 11 detects that the access frequency of the data in the non-volatile memory 13 is greater than the frequency threshold, that is, the first processor 11 detects in real time The access frequency of the data in the non-volatile memory 13 is measured. If the detected access frequency of the data in the non-volatile memory 13 is greater than the frequency threshold, the electronic device 10 is relatively busy. In the state, the electronic device 10 can be switched to the first operating mode to quickly respond to the operational request.
  • the condition of entering the second working mode may be that when the current power of the electronic device 10 detected by the first processor 11 is less than a power threshold, the first processor 11 detects the current power of the electronic device 10 in real time, if the detected When the current power of the electronic device 10 is less than the power threshold, the power of the electronic device 10 is already relatively low. To reduce the power consumption and extend the standby time of the electronic device 10, the electronic device 10 can be switched to the second work. mode.
  • the condition of entering the first working mode may be that when the current power of the electronic device detected by the first processor 11 is greater than the power threshold, the first processor 11 detects the current power of the electronic device 10 in real time, if When the current power of the detected electronic device 10 is greater than the power threshold, it indicates that the power of the electronic device 10 is relatively high enough to perform any operation. The electronic device 10 can then be switched to the first mode of operation.
  • the above exemplifies various conditions for the electronic device 10 to enter the second working mode and the first working mode.
  • the working mode switching modes corresponding to the conditions can be simultaneously set in one electronic device, and the user can select the mode switching according to the personal usage habits. the way. It is also possible to select at least one mode conversion method as needed.
  • the above is only an example of the conversion conditions of the two modes, but the conversion conditions of the two modes are not limited to the conditions listed above, and other conditions that can be converted between the two modes of operation according to the actual application are also included in the present invention. Within the scope of the disclosure.
  • the first processor 11 After the first processor 11 detects that the electronic device 10 has reached the second working mode, it further calculates the amount of data to be moved, and then determines whether the amount of data to be moved is not greater than a data amount threshold.
  • the data amount threshold is a capacity of the non-volatile memory 13, and may be a value smaller than the capacity of the non-volatile memory 13 set by the user according to actual usage.
  • the data in the volatile memory 12 is moved to the non-volatile memory 13, and if the amount of data to be moved is greater than the data amount threshold, then The electronic device 10 is still in the first mode of operation or moves a portion of the data that needs to be moved equal to the data amount threshold to the non-volatile memory 13, and stores the excess portion to the external memory 14.
  • the data to be moved is smaller than the data amount threshold, it indicates that although the electronic device 10 is currently in a low power consumption state, there are still open applications occupying memory. In this case, one way is to not work in the first mode. Switching, that is, still returning to the first working mode, waiting for the user to close the corresponding application to release some memory space, and then making the data to be moved less than the data amount threshold, then switching the mode, another way is to redundant After being partially stored in the external memory 14, the operation mode is switched.
  • the storage address of the non-systematic data in the volatile memory 12 is recorded.
  • the mapping relationship of the storage addresses in the volatile memory 13 is such that, when data access occurs, corresponding data can be found in the non-volatile memory 13 according to the mapping relationship of the recorded addresses.
  • the non-volatile memory 13 with lower power consumption is disposed in the electronic device 10, so that when the electronic device 10 does not need high performance to perform an operation request, The volatile memory 12 with higher power consumption is turned off, and the non-volatile memory 13 having lower power consumption is operated, so that power consumption can be effectively reduced.
  • FIG. 3 another structural diagram of an electronic device 30 capable of reducing power consumption according to an embodiment of the present invention is provided.
  • the structure of the electronic device 30 provided in this embodiment is similar to that of the electronic device 10 provided in the above embodiment, except that the electronic device 30 further includes a second processing unit 17, and the frequency ratio of the second processing unit 17 is The first processing unit 12 is low.
  • the second processing unit 17 controls access of data in the non-volatile memory 13 through the first operating system 15.
  • the first processor 11 detects that the electronic device 30 reaches the In the condition of the second working mode, the non-system data is moved into the non-volatile memory 13, and after the non-system data movement is completed, the volatile memory 12 and the first processor 11 are turned off, and started.
  • the second processor 17 runs the first operating system 15 to enter a second working mode; when the electronic device 10 is in the second working mode, if the first processor 11 detects the electronic device 30 After the condition of entering the first working mode is reached, the volatile memory 12 is turned on, and the second operating system 16 is loaded from the external memory 14 to the volatile memory 12, and the non-easy The non-systematic data in the memory 13 is moved into the volatile memory 12, and after the second operating system 16 is loaded and the non-system data movement is completed, the non-volatile memory 13 is turned off.
  • the second processor 17 and starting the first The processor 11 runs the second operating system 16 to cause the electronic device 30 to enter the first mode of operation.
  • the high frequency first processor 11 is turned off, and the low frequency second processor 17 is used, so that power consumption can be further reduced.
  • an embodiment of the present invention further provides a method for reducing power consumption of an electronic device, where the electronic device includes a volatile memory, a non-volatile memory, and an external memory, where the second operation is stored in the external memory.
  • the non-volatile memory stores an operating system
  • the electronic device has a first working mode and a second working mode, and when the electronic device is in the first working mode, the volatile memory is turned on, the non- Volatile memory is turned off, the second operating system is loaded into the volatile memory to operate when the electronic device is in the In the second mode of operation, the non-volatile memory is turned on, the volatile memory is turned off, and the first operating system runs in the non-volatile memory.
  • the method includes:
  • Step S401 When the electronic device is in the first working mode, detecting a condition that the electronic device enters the second working mode;
  • Step S402 if the electronic device reaches the condition of entering the second working mode, turning on the non-volatile memory
  • Step S403 moving non-systematic data in the volatile memory to the non-volatile memory; the non-systematic data is data marked as valid in the volatile memory.
  • Step S404 after the non-system data movement is completed, shutting down the volatile memory, executing the first operating system, and causing the electronic device to enter the second working mode.
  • Step S405 When the electronic device is in the second working mode, detecting whether the electronic device reaches a preset condition for entering the first working mode.
  • Step S406 if the electronic device reaches the condition of entering the first working mode, turning on the volatile memory, loading the second operating system from the external memory to the volatile memory, and Non-systematic data in the non-volatile memory is moved to the volatile memory.
  • Step S407 after the second operating system is loaded, and the non-system data is completed, the non-volatile memory is closed, and the second operating system is executed to enable the electronic device to enter the first work. mode.
  • the conditions for entering the second working mode and the conditions for entering the first working mode are the same as those described above, and details are not described herein again.
  • the method further includes, before performing step S403, determining whether the data amount of the non-systematic data is not greater than a data amount threshold, wherein the threshold of the data amount is a capacity of the non-volatile memory, or It is a value that is set by the user smaller than the capacity of the non-volatile memory according to actual usage.
  • the amount of data of the non-systematic data is not greater than the data amount threshold, moving the non-systematic data in the volatile memory to the non-volatile memory if the data of the non-systematic data is If the amount is greater than the data amount threshold, the electronic device is still in the first working mode or the non-system that will need to be moved A portion of the data that is equal to the data amount threshold is moved to the non-volatile memory, and the excess portion is stored to the external memory.

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  • General Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
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  • Computer Hardware Design (AREA)
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Abstract

一种能降低功耗的电子装置及降低电子装置功耗的方法，所述电子装置包括处理器、易失性内存、及非易失性内存，所述非易失性内存存储第一操作系统，所述电子装置在第一工作模式和第二工作模式下工作；当所述电子装置处于所述第一工作模式时，第二操作系统在所述易失性内存中运行，在所述处理器侦测到所述电子装置达到预设的进入所述第二工作模式的条件时，开启所述非易失性内存，移动所述易失性内存中的非系统数据至所述非易失性内存中，所述非系统数据不包括所述第二操作系统，在所述非系统数据移动完成后，关闭所述易失性内存，在所述非易失性内存中运行所述第一操作系统，使所述电子装置进入所述第二工作模式。从而降低电子装置的功耗。

Description

能降低功耗的电子装置及降低电子装置功耗的方法 技术领域
本发明涉及功耗管理技术领域，特别涉及能降低功耗的电子装置及降低电子装置功耗的方法。
背景技术
便携式移动设备中，例如平板电脑、手机等，存储器的功耗占到整个移动设备功耗的大约三分之一。随着内存容量的增大，内存占整个便携式移动设备功耗比例会越来越大，所以为了延长移动设备的待机时间，可以降低内存功耗。
由于动态随机存储器(Dynamic Random Access Memory,DRAM)的访问速度比较快，一般用作移动设备的内存，在DRAM中，每个存储单元(cell)由一个MOS晶体管及一个电容组成，通过外部电源给每个存储单元供电以存储数据。由于一段时间后，存储在电容中的电荷会通过MOS晶体管漏掉，所以必须每隔一段时间刷新一次电路，以给电容补充电荷，从而保存存储在cell中的数据。
一般情况下，DRAM通过外部时钟进行电路的刷新，这样刷新速度比较快，但比较耗电，现有技术中，为了节省功耗，可在电子装置进入低功耗状态后，比如黑屏待机状态后，使DRAM进入自刷新状态，即通过DRAM本身的时钟进行电路刷新，而不需要外部时钟，这样可以进一步降低电子装置在低功耗状态下的功耗。
然而，DRAM在自刷新的过程中，还是需要对所有的存储体进行刷新，所以电子装置在低功耗状态下的功耗还是偏高。
发明内容
本发明实施例提供能降低功耗的电子装置及降低电子装置功耗的方法，降低电子装置的功耗。
本发明第一方面提供一种能降低功耗的电子装置，包括处理器、易失性内存、及非易失性内存，所述非易失性内存存储第一操作系统，所述电子装置在第一工作模式和第二工作模式下工作；
当所述电子装置处于所述第一工作模式时，第二操作系统在所述易失性内存中运行，在所述处理器侦测到所述电子装置达到预设的进入所述第二工作模式的条件时，开启所述非易失性内存，移动所述易失性内存中的非系统数据至所述非易失性内存中，所述非系统数据不包括所述第二操作系统，在所述非系统数据移动完成后，关闭所述易失性内存，在所述非易失性内存中运行所述第一操作系统，使所述电子装置进入所述第二工作模式。
结合第一方面，在第一种可能实现的方式中，当所述电子装置处于所述第二工作模式时，在所述处理器侦测到所述电子装置达到预设的进入所述第一工作模式的条件时，开启所述易失性内存，加载所述第二操作系统至所述易失性内存，并将所述非易失性内存中的非系统数据移动至所述易失性内存中，所述非易失性内存中的非系统数据不包括所述第一操作系统，在所述非易失性内存中的非系统数据移动完成后，关闭所述非易失性内存，在所述第二操作系统加载完成后，在所述易失性内存中运行所述第二操作系统，使所述电子装置进入所述第一工作模式。
结合第一方面或者第一种可能实现的方式，在第二种可能实现的方式中，所移动的所述易失性内存中的非系统数据为有效数据。
结合第一方面或者第一种可能实现的方式或者第二种可能的实现方式，在第三种可能的实现方式中，所述处理器包括第一处理器及第二处理器，在所述电子装置处于所述第一工作模式时，所述处理器为所述第一处理器，在所述电子装置处于所述第二工作模式时，所述处理器为所述第二处理器且所述第二处理器的频率低于所述第一处理器的频率。
结合第一方面或者以上任意一种可能的实现方式，在所述处理器侦测到所述电子装置达到进入所述第二工作模式的条件后，还进一步统计所述易失性内存中所述非系统数据的数据量，并判断所述易失性 内存中所述非系统数据的数据量是否不大于预设的数据量阈值，如果不大于，则将所述易失性内存中的所述非系统数据移动至所述非易失性内存；如果大于，则所述电子装置仍处于所述第一工作模式或者将所述易失性内存中的所述非系统数据中与所述数据量阈值相等的部分移动至所述非易失性内存，而将剩余部分存储至所述电子装置的外部存储器。
本发明第二方面提供一种降低电子装置功耗的方法，所述电子装置包括易失性内存、非易失性内存、所述非易失性内存中存储第一操作系统，所述电子装置在第一工作模式和第二工作模式下工作；
当所述电子装置处于所述第一工作模式时，在所述易失性内存中运行所述第二操作系统，侦测所述电子装置进入所述第二工作模式的条件；
如果所述电子装置达到进入所述第二工作模式的条件，开启所述非易失性内存；
移动所述易失性内存中的非系统数据至所述非易失性内存中，所述非系统数据不包括所述第二操作系统；
在所述非系统数据移动完成后，关闭所述易失性内存，在所述非易失性内存中运行所述第二操作系统，使所述电子装置进入所述第二工作模式。
结合第二方面，在第一种可能的实现方式中，当所述电子装置处于所述第二工作模式时，侦测所述电子装置是否达到预设的进入所述第一工作模式的条件；
如果所述电子装置达到进入预设的所述第一工作模式的条件，则开启所述易失性内存，加载所述第一操作系统至所述易失性内存，并将非易失性内存中的非系统数据移动至所述易失性内存；
在所述第一操作系统加载完成后，在所述易失性内存中运行所述第二操作系统，使所述电子装置进入所述第一工作模式。
结合第二方面或者第一种可能的实现方式，在第二种可能的实现方式中，所移动的所述易失性内存中的非系统数据为有效数据。
结合第一方面或者第一种可能实现的方式或者第二种可能的实 现方式，在第三种可能的实现方式中，所述移动所述易失性内存中的非系统数据至所述非易失性内存包括：统计所述易失性内存中的所述非系统数据的数据量；
判断所述易失性内存中的所述非系统数据的数据量是否不大于预设的数据量阈值；
如果不大于，则将所述易失性内存中的所述非系统数据移动至所述非易失性内存；
如果大于，则使所述电子装置仍处于所述第一工作模式或者将所述易失性内存中的所述非系统数据中与所述数据量阈值相等的部分移动至所述非易失性内存，而将剩余部分存储至所述电子装置的外部存储器。
可见本发明实施例提供的能降低功耗的电子装置及降低电子装置功耗的方法中，通过增加一个非易失性内存，并在非易失性内存中设置一操作系统，则在电子装置进入低功耗的工作模式时，将易失性内存中的非系统数据移动至非易失性内存后，关闭易失性内存，使用非易失性内存作为电子装置的内存执行相应的操作，如此在易失性内存关闭后，无需通过自刷新保存数据，从而降低了电子装置的功耗。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的一种能降低功耗的电子装置的结构图；
图2是图1中的电子装置进行工作模式切换的过程的示意图；
图3是发明实施例提供的另外一种能降低功耗的电子装置的结 构图；
图4是本发明实施例提供的一种降低电子装置功耗的方法的流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
如图1所示，为本发明实施例提供的一种能降低功耗的电子装置的结构图。所述电子装置10包括第一处理器11、易失性内存12、非易失性内存13及外部存储器14。所述非易失性内存13中存储有第一操作系统15，所述外部存储器14上存储有第二操作系统16。所述电子装置10可在两种工作模式下工作，即第一工作模式和第二工作模式，当电子装置10处于第一工作模式时，所述易失性内存12开启，所述非易失性内存13关闭，所述第二操作系统16被加载至所述易失性内存12运行，当电子装置10处于所述第二工作模式时，所述非易失性内存13开启，所述易失性内存12关闭。
本实施例中，所述电子装置10为便携式移动设备，如平板电脑、手机等。所述易失性内存12为动态随机存储器(Dynamic Random Access Memory,DRAM)，具有较快的访问速度，但功耗比较大。所述非易失性内存13为相变存储器(phase change memory，PCM)，具有较小的功耗，但是访问速度慢。所以在电子装置10处于第二工作模式时，具有较低的功耗。
所述外部存储器14为NAND存储器，用于存储第二操作系统16及其他数据，在电子装置10运行时，可将外部存储器14中的数据调入所述易失性内存12供所述第一处理单元11处理。
下面将具体介绍第一工作模式与第二工作模式之间的切换。
如图2所示，当所述电子装置10处于所述第一工作模式时，所述第二操作系统16在所述易失性内存12中运行，在所述第一处理器11侦测到所述电子装置10达到预设的进入所述第二工作模式的条件时，开启所述非易失性内存13，移动所述易失性内存12中的非系统数据至所述非易失性内存13中，所述非系统数据不包括所述第二操作系统16，在所述非系统数据移动完成后，关闭所述易失性内存12，在所述非易失性内存13中运行所述第一操作系统15，使所述电子装置10进入所述第二工作模式。
当所述电子装置10处于所述第二工作模式时，在所述第一处理器11侦测到所述电子装置10达到预设的进入所述第一工作模式的条件时，开启所述易失性内存13，加载所述第二操作系统16至所述易失性内存12，并将所述非易失性内存13中的非系统数据移动至所述易失性内存12中，所述非易失性内存13中的非系统数据不包括所述第一操作系统15，在所述非易失性内存13中的非系统数据移动完成后，关闭所述非易失性内存13，在所述第二操作系统16加载完成后，在所述易失性内存12中运行所述第二操作系统16，使所述电子装置10进入所述第一工作模式。
所移动的所述易失性内存12中的非系统数据为有效数据，即在所述易失性内存12中被标记为有效的数据。
所述第一操作系统15为低功耗的且占用内存比较少的系统，如塞班系统或者在所述第二操作系统16的基础上裁剪一些功能后的精简版的操作系统，能够执行打电话、发短信、及后台文件管理等基本功能。
进入第二工作模式的条件可以为所述第一处理器11接收到输入单元(图中未示)响应用户的操作产生的进入第二工作模式的请求，即用户可手动将电子装置设置为第二工作模式。相应地，进入第一工作模式的条件可以为第一处理器10接收到输入单元响应用户的操作产生的进入第一工作模式的请求，即用户可手动将电子装置设置为第一工作模式。
进入第二工作模式的条件可以为第一处理器11侦测电子装置10 单位时间内的功耗小于功耗阈值时，即第一处理器11实时侦测电子装置10的功耗，并将所侦测的功耗与所述功耗阈值比较，当电子装置10的功耗小于所述功耗阈值时，说明电子装置10此时可能处于黑屏待机状态，或者运行的是低功耗的应用，则可将电子装置10切换至第二工作模式，以降低功耗。相应地，进入第一工作模式的条件可以为第一处理器11侦测电子装置10单位时间内的功耗大于所述功耗阈值时，即第一处理器11实时侦测电子装置10的功耗，并将所侦测的功耗与所述功耗阈值比较，当电子装置10的功耗大于所述功耗阈值时，说明电子装置10此时执行的是高功耗的应用，则可将电子装置10切换至第一工作模式，以快速响应所述高功耗的应用。
进入第二工作模式的条件可以为所述第一处理器11侦测所述易失性内存12中的数据的访问频率小于一频率阈值时，即第一处理器11实时侦测易失性内存12中数据的访问频率，若所侦测的易失性内存12中的数据的访问频率小于所述频率阈值时，说明电子装置10处于比较空闲的状态，则可将电子装置10切换至第一工作模式，以降低功耗。相应地，进入第一工作模式的条件可以为所述第一处理器11侦测所述非易失性内存13中的数据的访问频率大于所述频率阈值时，即第一处理器11实时侦测所述非易失性内存13中的数据的访问频率，若所侦测的所述非易失性内存13中的数据的访问频率大于所述频率阈值时，说明电子装置10处于比较繁忙的状态，则可将电子装置10切换至第一工作模式，以快速响应操作请求。
进入第二工作模式的条件可以为第一处理器11所侦测的电子装置10的当前电量小于一电量阈值时，即第一处理器11实时侦测电子装置10当前的电量，若所侦测的电子装置10的当前的电量小于所述电量阈值时，则说明电子装置10的电量已经比较低，为了降低功耗，延长电子装置10的待机时间，则可将电子装置10切换至第二工作模式。相应地，进入第一工作模式的条件可以为第一处理器11所侦测的电子装置的当前电量大于所述电量阈值时，即第一处理器11实时侦测电子装置10当前的电量，若所侦测的电子装置10的当前的电量大于所述电量阈值时，则说明电子装置10的电量已经比较高，足够执行任何操作， 则可将电子装置10切换至第一工作模式。
以上举例说明了电子装置10进入第二工作模式及第一工作模式的各种条件，这些条件对应的工作模式转换方式可同时设置在一个电子装置中，用户可根据个人的使用习惯选择模式转换的方式。也可根据需要选择至少一种模式转换的方式。以上只是举例说明两种模式的转换条件，但两种模式的转换条件并不限于上述列举的条件，其他根据实际应用设置的可在两种工作模式之间进行转换的条件也包括在本发明所揭露的范围之内。
在第一处理器11侦测到所述电子装置10达到进入第二工作模式的条件后，还进一步统计需要移动的数据量，然后判断需要移动的数据量是否不大于一数据量阈值，其中，所述数据量阈值为非易失性内存13的容量，也可以是用户根据实际使用情况设置的小于非易失性内存13的容量的值。如果所需要移动的数据量不大于所述数据量阈值，则将易失性内存12中的数据移动至非易失性内存13，如果所述需要移动的数据量大于所述数据量阈值，则电子装置10仍处于第一工作模式或者将需要移动的数据中与数据量阈值相等的部分移动至非易失性内存13，而将多余的部分存储至外部存储器14。
如果需要移动的数据小于所述数据量阈值，则说明虽然电子装置10目前处于低功耗的状态，但是仍然有打开的应用占用内存，这种情况下，一种做法是可以先不进行工作模式的切换，即仍然回到第一工作模式，等到用户关闭相应的应用释放一些内存空间后，使需要移动的数据小于所述数据量阈值时，再进行模式的切换，另外一种做法是将多余部分存储至外部存储器14后，再进行工作模式的切换。
本实施例中，在将易失性内存12中的所述非系统数据移动至所述非易失性内存13时，记录所述非系统数据在易失性内存12中的存储地址与在非易失性内存13中的存储地址的映射关系，如此，在发生数据访问时，可根据所记录的地址的映射关系在所述非易失性内存13中找到相应的数据。
在本实施例中，所述电子装置10中设置了具有较低功耗的非易失性内存13，如此在电子装置10不需要高性能执行操作请求时，可将具 有较高功耗的易失性内存12关闭，而在具有较低功耗的非易失性内存13上运行，如此，可有效的降低功耗。
如图3所示，本发明实施例提供的另外一种能降低功耗的电子装置30的结构图。本实施例提供的电子装置30的结构与上面实施例提供的电子装置10的结构相似，区别在于，所述电子装置30还包括第二处理单元17，所述第二处理单元17的频率比所述第一处理单元12低，在电子装置30处于第二工作模式时，所述第二处理单元17通过所述第操作系统15控制所述非易失性内存13中数据的访问。在第一工作模式与第二工作模式切换的过程中，当所述电子装置10处于所述第一工作模式时，在所述第一处理器11侦测到所述电子装置30达到进入所述第二工作模式的条件时，移动所述非系统数据至非易失性内存13中，在所述非系统数据移动完成后，关闭所述易失性内存12及第一处理器11，并启动所述第二处理器17运行所述第一操作系统15，以进入第二工作模式；当电子装置10处于第二工作模式时，若所述第一处理器11侦测到所述电子装置30达到进入所述第一工作模式的条件，则开启所述易失性内存12，从所述外部存储器14加载所述第二操作系统16至所述易失性内存12，并将所述非易失性内存13中的非系统数据移动至所述易失性内存12中，在所述第二操作系统16加载完且所述非系统数据移动完成后，关闭所述非易失性内存13及所述第二处理器17，并启动所述第一处理器11运行所述第二操作系统16，使所述电子装置30进入所述第一工作模式。
在本实施例中，在所述电子装置30进入所述第二工作模式后，关闭高频率的第一处理器11，而使用低频率的第二处理器17，从而可以进一步降低功耗。
如图4所示，本发明实施例还提供一种降低电子装置功耗的方法，所述电子装置包括易失性内存、非易失性内存、外部存储器，所述外部存储器中存储第二操作系统，所述非易失性内存存储第操作系统，所述电子装置具有第一工作模式及第二工作模式，当电子装置处于第一工作模式时，所述易失性内存开启，所述非易失性内存关闭，所述第二操作系统被加载至所述易失性内存运行，当所述电子装置处于所 述第二工作模式时，所述非易失性内存开启，易失性内存关闭，所述第一操作系统在所述非易失性内存中运行。
所述方法包括：
步骤S401，当所述电子装置处于所述第一工作模式时，侦测所述电子装置进入所述第二工作模式的条件；
步骤S402，如果所述电子装置达到进入所述第二工作模式的条件，则开启所述非易失性内存；
步骤S403，将所述易失性内存中的非系统数据移动至所述非易失性内存；所述非系统数据为在所述易失性内存中被标记为有效的数据。
步骤S404，所述非系统数据移动完成后，关闭所述易失性内存，执行所述第一操作系统，使所述电子装置进入所述第二工作模式。
步骤S405，当所述电子装置处于所述第二工作模式时，侦测所述电子装置是否达到预设的进入第一工作模式的条件。
步骤S406，如果所述电子装置达到进入所述第一工作模式的条件，则开启所述易失性内存，从所述外部存储器中加载所述第二操作系统至所述易失性内存，并将所述非易失性内存中的非系统数据移动至所述易失性内存。
步骤S407，所述第二操作系统加载完毕，且所述非系统数据移动完成后，关闭所述非易失性内存，运行所述第二操作系统，使所述电子装置进入所述第一工作模式。
本实施例中，进入所述第二工作模式的条件及进入所述第一工作模式的条件与前面描述的相同，在此不再赘述。
所述方法还包括，在执行步骤S403之前，判断所述非系统数据的数据量是否不大于一数据量阈值，其中，所述数据量的阈值为所述非易失性内存的容量，也可以是用户根据实际使用情况设置的小于所述非易失性内存的容量的值。如果所述非系统数据的数据量不大于所述数据量阈值，则将所述易失性内存中的非系统数据移动至所述非易失性内存，如果所述所述非系统数据的数据量大于所述数据量阈值，则所述电子装置仍处于所述第一工作模式或者将需要移动的所述非系 统数据中与所述数据量阈值相等的部分移动至所述非易失性内存，而将多余的部分存储至所述外部存储器。
本领域普通技术人员可以理解上述实施例的各种方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成，所述程序可以存储于一计算机可读存储介质中，存储介质可以包括：ROM、RAM、磁盘或光盘等。
以上对本发明实施例所提供的数据配置及其回退方法和设备，进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (9)

  1. 一种能降低功耗的电子装置，包括处理器、易失性内存、及非易失性内存，所述非易失性内存存储第一操作系统，所述电子装置在第一工作模式和第二工作模式下工作；
    当所述电子装置处于所述第一工作模式时，第二操作系统在所述易失性内存中运行，在所述处理器侦测到所述电子装置达到预设的进入所述第二工作模式的条件时，开启所述非易失性内存，移动所述易失性内存中的非系统数据至所述非易失性内存中，所述非系统数据不包括所述第二操作系统，在所述非系统数据移动完成后，关闭所述易失性内存，在所述非易失性内存中运行所述第一操作系统，使所述电子装置进入所述第二工作模式。
  2. 如权利要求1所述的电子装置，其特征在于，
    当所述电子装置处于所述第二工作模式时，在所述处理器侦测到所述电子装置达到预设的进入所述第一工作模式的条件时，开启所述易失性内存，加载所述第二操作系统至所述易失性内存，并将所述非易失性内存中的非系统数据移动至所述易失性内存中，所述非易失性内存中的非系统数据不包括所述第一操作系统，在所述非易失性内存中的非系统数据移动完成后，关闭所述非易失性内存，在所述第二操作系统加载完成后，在所述易失性内存中运行所述第二操作系统，使所述电子装置进入所述第一工作模式。
  3. 如权利要求1或2所述的电子装置，其特征在于，所移动的所述易失性内存中的非系统数据为有效数据。
  4. 如权利要求1-3中任意一项所述的电子装置，其特征在于，所述处理器包括第一处理器及第二处理器，在所述电子装置处于所述第一工作模式时，所述处理器为所述第一处理器，在所述电子装置处于所述第二工作模式时，所述处理器为所述第二处理器且所述第二处理器的频率低于所述第一处理器的频率。
  5. 如权利要求1-4中任意一项所述的电子装置，其特征在于，在所述处理器侦测到所述电子装置达到进入所述第二工作模式的条件后，还进一步统计所述易失性内存中所述非系统数据的数据量，并判 断所述易失性内存中所述非系统数据的数据量是否不大于预设的数据量阈值，如果不大于，则将所述易失性内存中的所述非系统数据移动至所述非易失性内存；如果大于，则所述电子装置仍处于所述第一工作模式或者将所述易失性内存中的所述非系统数据中与所述数据量阈值相等的部分移动至所述非易失性内存，而将剩余部分存储至所述电子装置的外部存储器。
  6. 一种降低电子装置功耗的方法，所述电子装置包括易失性内存、非易失性内存、所述非易失性内存中存储第一操作系统，所述电子装置在第一工作模式和第二工作模式下工作；
    当所述电子装置处于所述第一工作模式时，在所述易失性内存中运行所述第二操作系统，侦测所述电子装置进入所述第二工作模式的条件；
    如果所述电子装置达到进入所述第二工作模式的条件，开启所述非易失性内存；
    移动所述易失性内存中的非系统数据至所述非易失性内存中，所述非系统数据不包括所述第二操作系统；
    在所述非系统数据移动完成后，关闭所述易失性内存，在所述非易失性内存中运行所述第二操作系统，使所述电子装置进入所述第二工作模式。
  7. 如权利要求6所述的降低电子装置功耗的方法，其特征在于，
    当所述电子装置处于所述第二工作模式时，侦测所述电子装置是否达到预设的进入所述第一工作模式的条件；
    如果所述电子装置达到进入预设的所述第一工作模式的条件，则开启所述易失性内存，加载所述第一操作系统至所述易失性内存，并将非易失性内存中的非系统数据移动至所述易失性内存；
    在所述第一操作系统加载完成后，在所述易失性内存中运行所述第二操作系统，使所述电子装置进入所述第一工作模式。
  8. 如权利要求6或7所述的降低电子装置功耗的方法，其特征在于，所移动的所述易失性内存中的非系统数据为有效数据。
  9. 如权利要求6-8中任意一项所述的降低电子装置功耗的方法， 其特征在于，所述移动所述易失性内存中的非系统数据至所述非易失性内存包括：统计所述易失性内存中的所述非系统数据的数据量；
    判断所述易失性内存中的所述非系统数据的数据量是否不大于预设的数据量阈值；
    如果不大于，则将所述易失性内存中的所述非系统数据移动至所述非易失性内存；
    如果大于，则使所述电子装置仍处于所述第一工作模式或者将所述易失性内存中的所述非系统数据中与所述数据量阈值相等的部分移动至所述非易失性内存，而将剩余部分存储至所述电子装置的外部存储器。
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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110413098B (zh) * 2019-07-31 2021-11-16 联想(北京)有限公司 一种控制方法及装置
CN110716631B (zh) * 2019-09-04 2020-12-04 湖南新云网科技有限公司 供电管理方法、装置、设备及可读存储介质
US11748005B2 (en) * 2020-08-10 2023-09-05 Micron Technology, Inc. Transferring memory system data to an auxiliary array
CN114647294A (zh) * 2020-12-19 2022-06-21 Oppo广东移动通信有限公司 功耗调节方法和装置、电子设备、可读存储介质
CN114647300A (zh) * 2020-12-19 2022-06-21 Oppo广东移动通信有限公司 系统控制方法、装置、可穿戴设备和存储介质
JP2023020219A (ja) * 2021-07-30 2023-02-09 株式会社リコー 情報処理装置、方法およびプログラム

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101178690A (zh) * 2007-12-03 2008-05-14 浙江大学 低功耗高性能高速暂存器的设计方法
CN102160016A (zh) * 2008-09-23 2011-08-17 高通股份有限公司 使用非易失性磁性存储器的低电力电子系统
US20140181558A1 (en) * 2012-12-22 2014-06-26 Qualcomm Incorporated Reducing power consumption of volatile memory via use of non-volatile memory
CN104122977A (zh) * 2014-07-11 2014-10-29 华为技术有限公司 一种存储数据的方法及存储系统
CN104656870A (zh) * 2013-11-20 2015-05-27 联想(北京)有限公司 一种信息处理方法及电子设备
CN104731725A (zh) * 2013-12-24 2015-06-24 爱思开海力士有限公司 数据储存设备和包括数据储存设备的数据处理系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7730335B2 (en) * 2004-06-10 2010-06-01 Marvell World Trade Ltd. Low power computer with main and auxiliary processors
CN100456265C (zh) * 2004-12-14 2009-01-28 国际商业机器公司 移动计算机系统以及操作移动计算机系统的方法
US7779243B2 (en) 2006-12-29 2010-08-17 Intel Corporation Dual operating system computing system
CN103259924B (zh) * 2013-04-15 2015-10-21 广东欧珀移动通信有限公司 一种智能终端低电量下动态调整电量显示的方法及系统
US9195542B2 (en) * 2013-04-29 2015-11-24 Amazon Technologies, Inc. Selectively persisting application program data from system memory to non-volatile data storage
CN104156226B (zh) * 2013-05-15 2019-01-15 索尼公司 混合内存设备的挂起或关机方法
CN104460935A (zh) * 2013-09-18 2015-03-25 联想(北京)有限公司 一种信息处理方法及电子设备
CN104572511A (zh) * 2013-10-14 2015-04-29 联想(北京)有限公司 具有混合架构的存储装置和计算机系统
CN103810126B (zh) * 2014-01-27 2017-06-13 上海新储集成电路有限公司 混合dram存储器及降低该dram存储器刷新时功耗的方法
US20160055031A1 (en) * 2014-11-13 2016-02-25 Mediatek Inc. Dual-System Architecture With Fast Recover And Switching Of Operating System
US10007319B2 (en) * 2015-12-17 2018-06-26 Microsemi Solutions (U.S.), Inc. Power saving in multi-directional data transfer

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101178690A (zh) * 2007-12-03 2008-05-14 浙江大学 低功耗高性能高速暂存器的设计方法
CN102160016A (zh) * 2008-09-23 2011-08-17 高通股份有限公司 使用非易失性磁性存储器的低电力电子系统
US20140181558A1 (en) * 2012-12-22 2014-06-26 Qualcomm Incorporated Reducing power consumption of volatile memory via use of non-volatile memory
CN104656870A (zh) * 2013-11-20 2015-05-27 联想(北京)有限公司 一种信息处理方法及电子设备
CN104731725A (zh) * 2013-12-24 2015-06-24 爱思开海力士有限公司 数据储存设备和包括数据储存设备的数据处理系统
CN104122977A (zh) * 2014-07-11 2014-10-29 华为技术有限公司 一种存储数据的方法及存储系统

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