WO2017016191A1 - 数据驱动电路及其驱动方法、数据驱动系统和显示装置 - Google Patents

数据驱动电路及其驱动方法、数据驱动系统和显示装置 Download PDF

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Publication number
WO2017016191A1
WO2017016191A1 PCT/CN2016/070232 CN2016070232W WO2017016191A1 WO 2017016191 A1 WO2017016191 A1 WO 2017016191A1 CN 2016070232 W CN2016070232 W CN 2016070232W WO 2017016191 A1 WO2017016191 A1 WO 2017016191A1
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Prior art keywords
sub
pixel
digital
pixels
analog conversion
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PCT/CN2016/070232
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English (en)
French (fr)
Inventor
解红军
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京东方科技集团股份有限公司
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Priority to US15/107,837 priority Critical patent/US10546552B2/en
Publication of WO2017016191A1 publication Critical patent/WO2017016191A1/zh
Priority to US16/711,351 priority patent/US11094287B2/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/04—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using circuits for interfacing with colour displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0666—Adjustment of display parameters for control of colour parameters, e.g. colour temperature
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a data driving circuit and a driving method thereof, a data driving system, and a display device.
  • any one of the output channels of the data driving circuit corresponds to a fixed color.
  • the sub-pixels (Rm column sub-pixels, m is a positive integer) to which each data line Dm is connected have the same color (the same as R, the same B, or the same G).
  • the output channels are fixedly coupled to a corresponding color digital to analog converter (DAC), which in turn is coupled to a Gamma circuit corresponding to the color. This way different colors will not affect each other.
  • DAC color digital to analog converter
  • a data line is typically connected to sub-pixels of different colors.
  • a pixel contains sub-pixels of three colors (R, G, B). If you still use the Gamma circuit grouped by color, the output voltage value will be abnormal.
  • the currently common solution is to combine the Gamma input voltages of each color so that there is only one set of Gamma circuits in the entire chip.
  • a data driving circuit comprising a plurality of sub-circuits.
  • Each sub-circuit includes: a plurality of digital-to-analog conversion units, each of the digital-to-analog conversion units for driving only one color of the sub-pixels; a plurality of data line interface units, each of the data line interface units being connected to one of the data lines; a plurality of switching units connected between the plurality of digital to analog conversion units and the plurality of data line interface units, configured to be turned on or off under control of a control signal to cause the plurality of data line interface units Each of them connects a different digital-to-analog conversion unit when driving sub-pixels of different colors.
  • each data line interface unit includes an operational amplification module.
  • each sub-circuit includes N adjacent digital-to-analog conversion units, N adjacent data line interface units, and the N adjacent digital-to-analog conversion units and N adjacent data.
  • each digital to analog conversion unit is coupled to N adjacent data line interface units via N switching units, and each data line interface unit is coupled to N adjacent digital blocks via N switching units Conversion unit.
  • the value of N is 3.
  • the first data line interface unit is connected to the first digital-to-analog conversion unit through the first switching unit, and the second digital-to-analog conversion unit is connected through the second switching unit;
  • the second data line interface unit passes through the third switching unit Connecting a second digital-to-analog conversion unit, connecting the third digital-to-analog conversion unit through the fourth switching unit;
  • the third data line interface unit is connected to the third digital-to-analog conversion unit through the fifth switching unit, and connecting the first number through the sixth switching unit Mode conversion unit.
  • the data drive circuit includes two switch unit control interfaces for receiving the control signals.
  • Each of the switching units is configured to be turned on or off in response to a level applied to the two switching unit control interfaces, causing each of the plurality of data line interface units to be connected differently when driving sub-pixels of different colors Digital to analog conversion unit.
  • a data driven system comprising a data driving circuit as described above.
  • the data drive system further includes a timing controller.
  • the timing controller is coupled to the data driving circuit for providing the control signal such that each of the plurality of data line interface units connects different digital to analog conversion units when driving sub-pixels of different colors.
  • the data drive circuit includes two switch unit control interfaces.
  • the control signal is used to control the level state of the two switch unit control interfaces.
  • the data drive system further includes N gamma circuits, where N is the type of color of the sub-pixels.
  • N is the type of color of the sub-pixels.
  • Each digital-to-analog conversion unit that drives sub-pixels of the same color is connected to the same gamma circuit.
  • a display device comprising the number as described above According to the drive system.
  • each of the digital-to-analog conversion units of the data driving circuit connects two data line interface units via two switching units, and each of the data line interface units is connected to two digital-to-analog conversions via two switching units. unit.
  • the display device further includes a pixel array, the pixel array includes a plurality of sub-pixel arrays, each of the sub-pixel arrays comprising 3 columns of sub-pixels and three data lines, wherein the 4x+1 of the first column of sub-pixels in each sub-pixel array Row sub-pixels and 4x+3 rows of sub-pixels, 4x+2 rows of sub-pixels of the second column of sub-pixels, 4x+4 rows of sub-pixels of the third column of sub-pixels are first color sub-pixels; 4x of the first column of sub-pixels +4 rows of sub-pixels, 4x+1th row sub-pixels of the 2nd column sub-pixel and 4x+3-row sub-pixels, 4x+2-row sub-pixels of the
  • a method for driving a data driving circuit comprising: providing the control signal to the data driving circuit to cause the plurality of data line interface units Each of the different digital-to-analog conversion units is connected when driving sub-pixels of different colors.
  • one data line interface unit can be connected to different digital-to-analog conversion units when driving sub-pixels of different colors, and each digital-to-analog conversion unit is only used to drive one Subpixels of color.
  • This allows a separate physical gamma circuit to provide a reference voltage to a digital-to-analog conversion unit that drives different color displays without the use of a digital gamma circuit. Therefore, the gray scale loss caused by the adjustment using the digital gamma circuit can be fundamentally avoided.
  • 1 is a schematic diagram of a conventional pixel array
  • FIG. 2 is a schematic diagram of an SPR type pixel array
  • FIG. 3 is a block diagram showing the structure of a data driving circuit according to an embodiment of the present invention.
  • FIG. 4 is another image that can be driven by a data driving circuit in accordance with an embodiment of the present invention. Schematic diagram of a prime array
  • FIG. 5 is a schematic structural diagram of a data driving circuit according to another embodiment of the present invention.
  • Figure 6 is a schematic illustration of a data driven system in accordance with one embodiment of the present invention.
  • Figure 7 is a schematic illustration of a display device in accordance with one embodiment of the present invention.
  • FIG. 3 illustrates a data driving circuit 100 that can be used to drive a pixel array as shown in FIG. 2, in accordance with one embodiment of the present invention.
  • the data driving circuit 100 may include a plurality of sub-circuits (for example, only three of them are shown and labeled as C10, C20, C30).
  • each sub-circuit includes three data line interface units 11, 12 and 13, three digital-to-analog conversion units 21, 22 and 23, and nine switching units 31, 32, 33... 39.
  • each of the data line interface units 11, 12 and 13 is respectively connected to three digital-to-analog conversion units 21, 22 and 23 in the sub-circuit through three switching units in the sub-circuit, each of The digital-to-analog conversion units 21, 22, and 23 are also respectively connected to the three data line interface units 11, 12, and 13 in the sub-circuit through three switching units in the sub-circuit.
  • the data line interface unit 11 is connected to the digital-to-analog conversion unit 21 through the switch unit 31, to the digital-to-analog conversion unit 22 through the switch unit 34, and to the digital-to-analog conversion unit 23 via the switch unit 35, and the data line interface unit 12 is passed.
  • the switching unit 32 is connected to the digital-to-analog conversion unit 21, is connected to the digital-to-analog conversion unit 22 through the switching unit 36, and is connected to the digital-to-analog conversion unit 23 through the switching unit 38, and the data line interface unit 13 is connected to the digital-to-analog conversion unit through the switching unit 33. 21, connected to the digital-to-analog conversion unit 22 through the switch unit 37, and connected to the digital-to-analog conversion unit 23 through the switch unit 39.
  • the data line interface units 11, 12 and 13 herein may be interfaces or interface components for accessing data lines.
  • each of the data line interface units 11, 12, and 13 may include an operational amplification module OPA.
  • Operational amplification module OPA can The data voltage output by the digital-to-analog conversion unit is amplified and output to the corresponding data line.
  • the switching unit 31 between the digital-to-analog conversion unit 21 and the data line interface unit 11 is turned on, and the other switching units (switching units 32, 33) to which the digital-to-analog conversion unit 21 is connected are turned off.
  • the other switching units (switching units 34, 35) connected to the data line interface unit 11 thereby connect the data line interface unit 11 to the digital to analog converting unit 21.
  • the data line interface unit 12 is connected to the digital to analog conversion unit 22, and the data line interface unit 13 is connected to the digital to analog conversion unit 23.
  • the data line interface unit 13 When scanning the sub-pixels of the S2th row, the data line interface unit 13 is connected to the digital-to-analog conversion unit 22 by controlling the on/off of the respective switching units, and the data line interface unit 11 is connected to the digital-to-analog conversion unit 23 to The line interface unit 12 is connected to the digital to analog conversion unit 21.
  • the blue sub-pixel B of the second row and the second column R2 shown in FIG. 2 is connected to the digital-to-analog conversion unit 21, and the red sub-pixel of the second and third columns of the S3th row is connected to the digital-to-analog conversion unit 22.
  • the green sub-pixel of the second row and the R1th column is connected to the digital-to-analog conversion unit 23.
  • the data line interface unit 11 is connected to the digital-to-analog conversion unit 21 by the on/off of the respective control switch units, and the data line interface unit 12 is connected to the digital-to-analog conversion unit 22 to The line interface unit 13 is connected to the digital to analog conversion unit 23.
  • the blue sub-pixel of the S1th row and the R1th column shown in FIG. 2 is connected to the digital-to-analog conversion unit 21, and the red sub-pixel of the S3th row and the R2th column is connected to the digital-to-analog conversion unit 22, which will be The green sub-pixel of the R3th column of the S3 row is connected to the digital-to-analog conversion unit 23.
  • the data line interface unit 11 is connected to the digital-to-analog conversion unit 22 by the on/off of the respective control switch units, and the data line interface unit 12 is connected to the digital-to-analog conversion unit 23 to The line interface unit 13 is connected to the digital to analog conversion unit 21.
  • the blue sub-pixels of the S4th row and the R3th column shown in FIG. 2 are connected to the digital-to-analog conversion unit 21, and the red sub-pixels of the S4th row and the R1th column are connected to the digital-to-analog conversion unit 22, which will be The green sub-pixel of the R2 column of the S4 row is connected to the digital-to-analog conversion unit 23.
  • the driving process for the sub-pixels of the S5-S8 row may be consistent with the driving process for the sub-pixels of the S1-S4 row, and will not be described in detail herein.
  • all the blue sub-pixels B are connected to the digital-to-analog conversion unit 21 for each column of sub-pixels driven by one sub-circuit, and all the red sub-pixels R are connected to the number.
  • the mode conversion unit 22, all of the green sub-pixels G are connected to the digital-to-analog conversion unit 23.
  • the digital-to-analog conversion unit 21 needs to be connected to a physical gamma circuit for driving blue sub-pixels, and the digital-to-analog conversion unit 22 is connected to a physical gamma circuit for driving red sub-pixels, and digital-to-analog conversion is performed.
  • Unit 23 is connected to a physical gamma circuit for driving green sub-pixels. Since the digital gamma circuit is not required, the gray scale loss caused by the adjustment using the digital gamma circuit can be fundamentally avoided.
  • the specific connection manner of each switching unit in the data driving circuit according to the embodiment of the present invention may be different without departing from the spirit and scope of the present invention.
  • 4 is another pixel array that can also be driven by a data driving circuit in accordance with an embodiment of the present invention. As shown in FIG. 4, the pixel array includes a plurality of sub-pixel arrays AU, each of which includes three columns of sub-pixels and three data lines.
  • the 4x+1 (x is an integer greater than or equal to 0) row sub-pixel and the 4x of the first column sub-pixel R4.
  • 4x+2 rows of sub-pixels of the second column of sub-pixels R5, 4x+4 rows of sub-pixels of the third column of sub-pixels R6 are blue sub-pixels B; 4x+4 rows of the first column of sub-pixels R4
  • the sub-pixel, the 4x+1th row sub-pixel and the 4x+3th row sub-pixel of the second column sub-pixel R5, and the 4x+2-row sub-pixel of the third column sub-pixel R6 are red sub-pixels R; the other sub-pixels are green sub-pixels Pixel G.
  • the first data line D4 is connected to the blue sub-pixel B of the R4 column sub-pixel and the red sub-pixel R of the R3 column sub-pixel in another sub-pixel array adjacent thereto, and the second data line D5 is connected to the R5 column sub-pixel. Red sub-pixel R and red sub-pixel R and green sub-pixel G in the R4 column sub-pixel, the third data line D6 is connected to the green sub-pixel G in the R6 column sub-pixel and the blue sub-pixel B in the R5 column sub-pixel Green sub-pixel G.
  • FIG. 5 illustrates a data driving circuit 200 for driving a pixel array as shown in FIG. 4, in accordance with one embodiment of the present invention.
  • each sub-circuit of the data driving circuit 200 includes only six switching units 31, 32, 33, 34, 35, 36.
  • the data line interface unit 11 is connected to the digital-to-analog conversion unit 21 via the switch unit 31, and is connected to the digital-to-analog conversion unit 22 via the switch unit 32.
  • the data line interface unit 12 is connected to the digital-to-analog conversion unit 22 via the switch unit 33, and is connected to the digital-analog unit through the switch unit 34.
  • each of the data line interface units 11, 12, and 13 may also include an operational amplification module OPA (not shown).
  • the data line interface unit 11 When scanning the sub-pixels of the S1th row, the data line interface unit 11 is connected to the digital-to-analog conversion unit 21 by controlling the on/off of the respective switching units, and the data line interface unit 12 is connected to the digital-to-analog conversion unit 22 to The line interface unit 13 is connected to the digital to analog conversion unit 23.
  • the S1 row R4 column blue sub-pixel is connected to the digital-to-analog conversion unit 21
  • the red sub-pixel of the S1 row R5 column is connected to the digital-to-analog conversion unit 22
  • the S1 row R6 column green sub-pixel is connected to the digital-to-analog conversion. Unit 23.
  • the data line interface unit 13 When scanning the sub-pixels of the S2th row, the data line interface unit 13 is connected to the digital-to-analog conversion unit 21 by controlling the on/off of the respective switching units, and the data line interface unit 11 is connected to the digital-to-analog conversion unit 22 to The line interface unit 12 is connected to the digital to analog conversion unit 23.
  • the S3 row R3 column red sub-pixel is connected to the digital-to-analog conversion unit 22
  • the green sub-pixel of the S2 row R4 column is connected to the digital-to-analog conversion unit 23
  • the S2 row R5 column blue sub-pixel is connected to the digital-to-analog conversion. Unit 21.
  • the data line interface unit 11 is connected to the digital-to-analog conversion unit 21 by the on/off of the respective control switch units, and the data line interface unit 12 is connected to the digital-to-analog conversion unit 22 to The line interface unit 13 is connected to the digital to analog conversion unit 23.
  • the S3 row R4 column blue sub-pixel is connected to the digital-to-analog conversion unit 21
  • the red sub-pixel of the S3 row R5 column is connected to the digital-to-analog conversion unit 22
  • the S3 row R6 column green sub-pixel is connected to the digital-to-analog conversion. Unit 23.
  • the data line interface unit 11 is connected to the digital-to-analog conversion unit 21 by the on/off of the respective control switch units, and the data line interface unit 12 is connected to the digital-to-analog conversion unit 22 to The line interface unit 13 is connected to the digital to analog conversion unit 23.
  • the S3 row R3 column red sub-pixel is connected to the digital-to-analog conversion unit 22
  • the green sub-pixel of the S4 row R4 column is connected to the digital-to-analog conversion unit 23
  • the S4 row R5 column blue sub-pixel is connected to the digital-to-analog conversion. Unit 21.
  • the driving process for the sub-pixels of the 5th to 8th rows may be identical to the driving process for the sub-pixels of the 1-4th row, and will not be described in detail herein.
  • the digital-to-analog conversion unit 21 needs to be connected to a physical gamma circuit for driving blue sub-pixels, and the digital-to-analog conversion unit 22 is connected to a physical gamma circuit for driving red sub-pixels, and digital-to-analog conversion is performed.
  • Unit 23 is connected to a physical gamma circuit for driving green sub-pixels. Since the digital gamma circuit is not required, the gray scale loss caused by the adjustment using the digital gamma circuit can be fundamentally avoided.
  • the data driving circuits 100, 200 can drive a pixel array in which one data line is connected to a plurality of sub-pixels of different colors using a separate physical gamma circuit, thereby avoiding the use of a digital gamma circuit.
  • the color of the sub-pixels may also be four or More species.
  • one digital-to-analog conversion unit can still be connected to the N data line interface units through the N switching units, and one data line interface unit is connected to the N digital-to-analog conversion units through the N switching units.
  • Each of the data line interface units can be connected to the digital-to-analog conversion unit corresponding to the specific color when driving the sub-pixel of the specific color.
  • the Z-th sub-pixel and the Z+4Y (Z, Y are integer) row sub-pixels are arranged in exactly the same manner as the data line, as shown in FIGS. 2 and 4. That is to say, the pixel array is arranged in a cycle of 4 rows of sub-pixels. In this case, there may be four combinations of the switching states of all the switching units, corresponding to 4 rows of sub-pixels in one cycle, respectively.
  • the data drive circuits 100, 200 can include two switch unit control interfaces 41 and 42 for receiving control signals.
  • the two switch unit control interfaces 41 and 42 have four combinations of level states (00, 01, 10, 11, where 1 can represent a high level), corresponding to the four switch states of the switch unit, respectively.
  • level states 00, 01, 10, 11, where 1 can represent a high level
  • four different switch connection states can be realized by controlling the level states of the switch unit control interfaces 41 and 42 by using control signals.
  • each of the switching units may be configured to be turned on or off in response to a level applied to the two switching unit control interfaces 41 and 42, such that one data line interface unit connects different numbers when driving sub-pixels of different colors. Mode conversion unit.
  • the number of sub-pixel rows is generally no more than four. Therefore, a combination of four or less than four switch states can achieve the corresponding control. Of course, when more than four combinations of switch states are required, more than two switch unit control interfaces can be used.
  • FIG. 6 shows a data drive system 600 in accordance with one embodiment of the present invention.
  • the data drive system 600 includes the data drive circuit 100/200 described above. Further, data drive system 600 can also include a timing controller 610.
  • the timing controller 610 is configured to provide a control signal to the data driving circuit 100/200 to control the switching of each switching unit, so that one data line interface unit connects different digital-to-analog conversion units when driving sub-pixels of different colors.
  • the timing controller 610 can control the switching of the respective switching units by controlling the level states of the two switching unit control interfaces.
  • the data driving system 600 may further include N gamma circuits Gamma_1, Gamma_2, ..., Gamma_N.
  • the respective digital-to-analog conversion units that drive the sub-pixels of the same color are connected to the same gamma circuit, and the digital-to-analog conversion units that drive the sub-pixels of different colors are connected to different gamma circuits.
  • N is the kind of the color of the sub-pixel used for color display.
  • FIG. 7 shows a display device 700 in accordance with one embodiment of the present invention.
  • the display device 700 includes the data drive system 600 described above.
  • display device 700 can also include a pixel array 710.
  • the pixel array 710 may be a pixel array as shown in FIG. 4 and will not be described in detail herein.
  • the data driving circuit included in the data driving system 600 is the data driving circuit 200 as shown in FIG.
  • the display device 700 can be any product or component having a display function, such as an electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • a method of driving the data driving circuit comprising: providing a control signal to a data driving circuit to cause each of the plurality of data line interface units to drive sub-pixels of different colors When connecting different D/A units.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

提供了一种数据驱动电路及其驱动方法、数据驱动系统和显示装置。在一个数据驱动电路（100，200）的实施例中，每一个数模转换单元（21-23）仅用于驱动一种颜色的子像素，并且通过控制开关单元（31-39）的通断，使一个数据线接口单元（11-13）在驱动不同颜色的子像素时连接不同的数模转换单元（21-23）。这样可以由单独的物理Gamma电路（620_1至620_N）向驱动不同颜色显示的数模转换单元（21-23）提供参考电压，而无需使用数字Gamma电路。因此，能够从根本上避免因使用数字Gamma电路进行调节所导致的灰阶损失。

Description

数据驱动电路及其驱动方法、数据驱动系统和显示装置 技术领域
本发明涉及显示技术领域，尤其涉及一种数据驱动电路及其驱动方法、数据驱动系统和显示装置。
背景技术
在传统像素排列方式中，数据驱动电路的任意一个输出通道都对应一个固定的颜色。如图1所示，每一条数据线Dm所连接的子像素(Rm列子像素，m为正整数)的颜色相同(同为R、同为B或者同为G)。这些输出通道固定地连接到相应颜色的数模转换器(Digital to analog converter，DAC)上，所述数模转换器再连接该颜色对应的Gamma电路。这样不同颜色不会相互影响。
在Sub Pixel Rendering(SPR)类型的显示器中，一条数据线一般连接不同颜色的子像素。图2示出了一种可能的SPR子像素排列方式，其中任意一条数据线Dm(m＝1，2，3...)所连接的Rm(m＝1，2，3...)列子像素包含三种颜色(R、G、B)的子像素。如果仍然使用按颜色分组的Gamma电路就会导致输出电压值异常。目前常用的解决方式是将各颜色的Gamma输入电压合并，使得整个芯片内只有一组Gamma电路。此时所有DAC均连接同一组Gamma电路，并且在前段对数据进行灰阶运算，使得各色输入灰阶对应不同的电压值。这常被称为数字式Gamma调节。这种方法会造成灰阶损失，因为对于电压范围小的颜色来说无法显示所有灰阶，并且因此带来了屏幕显示质量的下降。
发明内容
本发明的一个目的在于提供一种数据驱动机制，其可以缓解或避免灰阶损失。
在第一方面中，提供了一种数据驱动电路，包括多个子电路。每一个子电路包括：多个数模转换单元，每一个数模转换单元用于仅驱动一种颜色的子像素；多个数据线接口单元，每一个数据线接口单元连接到一条数据线；以及多个开关单元，连接在所述多个数模转换单元和所述多个数据线接口单元之间，被配置成在控制信号的控制下开启或关断，使所述多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
在一个实现方式中，每一个数据线接口单元包括一个运算放大模块。
在一个实现方式中，每一个子电路包括N个相邻的数模转换单元、N个相邻的数据线接口单元以及连接所述N个相邻的数模转换单元和N个相邻的数据线接口单元的多个开关单元，其中N为子像素的颜色的种类。
在一个实现方式中，每一个数模转换单元经N个开关单元连接到N个相邻的数据线接口单元，并且每一个数据线接口单元经N个开关单元连接到N个相邻的数模转换单元。
在一个实现方式中，所述N的取值为3。在每一个子电路内：第一数据线接口单元通过第一开关单元连接第一数模转换单元，通过第二开关单元连接第二数模转换单元；第二数据线接口单元通过第三开关单元连接第二数模转换单元，通过第四开关单元连接第三数模转换单元；以及第三数据线接口单元通过第五开关单元连接第三数模转换单元，通过第六开关单元连接第一数模转换单元。
在一个实现方式中，所述数据驱动电路包括用于接收所述控制信号的两个开关单元控制接口。每一个开关单元被配置成响应于施加到两个开关单元控制接口的电平而开启或者关断，使所述多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
在另一方面中，提供了一种数据驱动系统，包括如上文所述的数据驱动电路。
在一个实现方式中，所述数据驱动系统还包括时序控制器。所述时序控制器与所述数据驱动电路相连，用于提供所述控制信号，使所述多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
在一个实现方式中，所述数据驱动电路包括两个开关单元控制接口。所述控制信号用于控制两个开关单元控制接口的电平状态。
在一个实现方式中，所述数据驱动系统还包括N个Gamma电路，其中N为子像素的颜色的种类。驱动同一种颜色的子像素的各个数模转换单元连接同一Gamma电路。
在又另一个方面中，提供了一种显示装置，包括如上文所述的数 据驱动系统。
在一个实现方式中，所述数据驱动电路中每一个数模转换单元经两个开关单元连接两个数据线接口单元，并且每一个数据线接口单元经两个开关单元连接到两个数模转换单元。所述显示装置还包括像素阵列，所述像素阵列包括多个子像素阵列，每一个子像素阵列包括3列子像素和三条数据线，其中，每一个子像素阵列中第1列子像素的第4x+1行子像素和第4x+3行子像素、第2列子像素的第4x+2行子像素、第3列子像素的4x+4行子像素为第一颜色子像素；第1列子像素的第4x+4行子像素、第2列子像素的第4x+1行子像素和第4x+3行子像素、第3列子像素的第4x+2行子像素为第二颜色子像素；并且其他子像素为第三颜色子像素，其中x为大于等于0的整数，并且其中，第一条数据线连接第1列子像素中的第一颜色子像素以及相邻的另一个子像素阵列中的第3列子像素中的第二颜色子像素，第二条数据线连接第2列子像素中的第二颜色子像素以及第1列子像素中的第二颜色子像素和第三颜色子像素，并且第三条数据线连接第3列子像素中的第三颜色子像素和第2列子像素中的第一颜色子像素和第三颜色子像素。
在又另一个方面中，提供了一种用于驱动如上文所述的数据驱动电路的方法，包括：向所述数据驱动电路提供所述控制信号，使所述多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
根据本发明的实施例，通过控制开关单元的通断，能够使一个数据线接口单元在驱动不同颜色的子像素时连接不同的数模转换单元，并且每一个数模转换单元仅用于驱动一种颜色的子像素。这样可以由单独的物理Gamma电路向驱动不同颜色显示的数模转换单元提供参考电压，而无需使用数字Gamma电路。因此，能够从根本上避免因使用数字Gamma电路进行调节所导致的灰阶损失。
附图说明
图1为一种传统像素阵列的示意图；
图2为一种SPR类型的像素阵列的示意图；
图3为根据本发明的一个实施例的数据驱动电路的结构示意图；
图4为可以由根据本发明实施例的数据驱动电路驱动的另一种像 素阵列的示意图；
图5为根据本发明的另一个实施例的数据驱动电路的结构示意图；
图6为根据本发明的一个实施例的数据驱动系统的示意图；以及
图7为根据本发明的一个实施例的显示装置的示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合附图对本发明实施例进行清楚、完整的描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他的实施例，都属于本发明保护的范围。
图2示出了一种SPR子像素排列方式，其中任意一条数据线Dm(m＝1，2，3...)所连接的Rm(m＝1，2，3...)列子像素包含三种颜色(R、G、B)的子像素。
图3示出了根据本发明的一个实施例的数据驱动电路100，其可以用于驱动如图2所示的像素阵列。如图3所示，该数据驱动电路100可以包括多个子电路(作为示例，仅示出其中三个并标记为C10、C20、C30)。在该示例中，每一个子电路包括三个数据线接口单元11、12和13，三个数模转换单元21、22和23，以及9个开关单元31、32、33......39。在每一个子电路中，每一个数据线接口单元11、12和13均通过该子电路内的3个开关单元分别连接该子电路内的三个数模转换单元21、22和23，每一个数模转换单元21、22和23也通过该子电路内的3个开关单元分别连接该子电路内的三个数据线接口单元11、12和13。具体地，数据线接口单元11通过开关单元31连接数模转换单元21，通过开关单元34连接到数模转换单元22，并且通过开关单元35连接到数模转换单元23，数据线接口单元12通过开关单元32连接数模转换单元21，通过开关单元36连接到数模转换单元22，并且通过开关单元38连接到数模转换单元23，以及数据线接口单元13通过开关单元33连接数模转换单元21，通过开关单元37连接到数模转换单元22，并且通过开关单元39连接到数模转换单元23。
这里的数据线接口单元11、12和13可以是用于接入数据线的接口或者接口组件。在一个实现方式中，数据线接口单元11、12和13中的每一个可以包括一个运算放大模块OPA。运算放大模块OPA可以 放大经数模转换单元输出的数据电压并输出到相应的数据线。
在对图3所示的数据驱动电路100进行驱动时，各组子电路的操作可以一致。下面结合图2和3对子电路C10的驱动过程进行说明。
在对第S1行子像素进行扫描时，开启数模转换单元21与数据线接口单元11之间的开关单元31，并关闭数模转换单元21所连接的其他开关单元(开关单元32、33)和数据线接口单元11所连接的其他开关单元(开关单元34、35)，从而将数据线接口单元11连接到数模转换单元21。按照同样的方式，将数据线接口单元12连接到数模转换单元22，将数据线接口单元13连接到数模转换单元23。这样将图2中所示的第S1行第R1列的蓝色子像素接入到了数模转换单元21，将第S1行第R2列的红色子像素接入到了数模转换单元22，将第S1行第R3列的绿色子像素接入到了数模转换单元23。
在对第S2行子像素进行扫描时，通过控制各个开关单元的通断，将数据线接口单元13连接到数模转换单元22，将数据线接口单元11连接到数模转换单元23，将数据线接口单元12连接到数模转换单元21。这样将图2中所示的第2行第R2列的蓝色子像素B接入到了数模转换单元21，将第S2行第R3列的红色子像素接入到了数模转换单元22，将第2行第R1列的绿色子像素接入到了数模转换单元23。
在对第S3行子像素进行扫描时，通过各个控制开关单元的通断，将数据线接口单元11连接到数模转换单元21，将数据线接口单元12连接到数模转换单元22，将数据线接口单元13连接到数模转换单元23。这样将图2中所示的第S3行第R1列的蓝色子像素接入到了数模转换单元21，将第S3行第R2列的红色子像素接入到了数模转换单元22，将第S3行第R3列的绿色子像素接入到了数模转换单元23。
在对第S4行子像素进行扫描时，通过各个控制开关单元的通断，将数据线接口单元11连接到数模转换单元22，将数据线接口单元12连接到数模转换单元23，将数据线接口单元13连接到数模转换单元21。这样将图2中所示的第S4行第R3列的蓝色子像素接入到了数模转换单元21，将第S4行第R1列的红色子像素接入到了数模转换单元22，将第S4行第R2列的绿色子像素接入到了数模转换单元23。
对第S5-S8行子像素的驱动过程可以与对第S1-S4行子像素的驱动过程一致，在此不再详述。
在上述数据驱动电路100的驱动过程中，对于一个子电路所驱动的各列子像素，所有的蓝色子像素B均接入到数模转换单元21，所有的红色子像素R均接入到数模转换单元22，所有的绿色子像素G均接入到数模转换单元23。在实际应用中，仅需将数模转换单元21连接到用于驱动蓝色子像素的物理Gamma电路，将数模转换单元22连接到用于驱动红色子像素的物理Gamma电路，将数模转换单元23连接到用于驱动绿色子像素的物理Gamma电路即可。由于无需使用数字Gamma电路，能够从根本上避免因使用数字Gamma电路进行调节所导致的灰阶损失。
需要注意，对于按照不同方式排列的像素阵列，根据本发明实施例的数据驱动电路中各个开关单元的具体连接方式可能不尽相同，而不偏离本发明的精神和范围。图4为另一种像素阵列，其也可以由根据本发明实施例的数据驱动电路驱动。如图4所示，该像素阵列包括多个子像素阵列AU，每一个子像素阵列AU包括3列子像素以及三条数据线。以包含R4、R5和R6列子像素和D4、D5和D6数据线的子像素阵列AU为例，第1列子像素R4的第4x+1(x为大于等于0的整数)行子像素和第4x+3行子像素、第2列子像素R5的第4x+2行子像素、第3列子像素R6的4x+4行子像素为蓝色子像素B；第1列子像素R4的第4x+4行子像素、第2列子像素R5的第4x+1行子像素和第4x+3行子像素、第3列子像素R6的第4x+2行子像素为红色子像素R；其他子像素为绿色子像素G。第一条数据线D4连接R4列子像素中的蓝色子像素B以及与其相邻的另一个子像素阵列中的R3列子像素中的红色子像素R，第二条数据线D5连接R5列子像素中的红色子像素R以及第R4列子像素中的红色子像素R和绿色子像素G，第三条数据线D6连接R6列子像素中的绿色子像素G和R5列子像素中的蓝色子像素B和绿色子像素G。
图5示出了根据本发明的一个实施例的用于驱动如图4所示像素阵列的数据驱动电路200。与上文实施例提供的数据驱动电路100不同的是，数据驱动电路200的每一个子电路仅包含6个开关单元31、32、33、34、35、36。数据线接口单元11通过开关单元31连接数模转换单元21，通过开关单元32连接数模转换单元22；数据线接口单元12通过开关单元33连接数模转换单元22，通过开关单元34连接数模转 换单元23；数据线接口单元13通过开关单元35连接数模转换单元23，通过开关单元36连接数模转换单元21。如上文所述，数据线接口单元11、12和13中的每一个也可以包括一个运算放大模块OPA(未示出)。
在对数据驱动电路200进行驱动时，各个子电路的操作可以一致。下面结合图4和5对子电路C20的驱动过程进行说明。
在对第S1行子像素进行扫描时，通过控制各个开关单元的通断，将数据线接口单元11连接到数模转换单元21，将数据线接口单元12连接到数模转换单元22，将数据线接口单元13连接到数模转换单元23。这样就将S1行R4列蓝色子像素接入到了数模转换单元21，S1行R5列的红色子像素接入到了数模转换单元22，S1行R6列绿色子像素接入到了数模转换单元23。
在对第S2行子像素进行扫描时，通过控制各个开关单元的通断，将数据线接口单元13连接到数模转换单元21，将数据线接口单元11连接到数模转换单元22，将数据线接口单元12连接到数模转换单元23。这样就将S2行R3列红色子像素接入到了数模转换单元22，S2行R4列的绿色子像素接入到了数模转换单元23，S2行R5列蓝色子像素接入到了数模转换单元21。
在对第S3行子像素进行扫描时，通过各个控制开关单元的通断，将数据线接口单元11连接到数模转换单元21，将数据线接口单元12连接到数模转换单元22，将数据线接口单元13连接到数模转换单元23。这样就将S3行R4列蓝色子像素接入到了数模转换单元21，S3行R5列的红色子像素接入到了数模转换单元22，S3行R6列绿色子像素接入到了数模转换单元23。
在对第S4行子像素进行扫描时，通过各个控制开关单元的通断，将数据线接口单元11连接到数模转换单元21，将数据线接口单元12连接到数模转换单元22，将数据线接口单元13连接到数模转换单元23。这样就将S4行R3列红色子像素接入到了数模转换单元22，S4行R4列的绿色子像素接入到了数模转换单元23，S4行R5列蓝色子像素接入到了数模转换单元21。
对第5-8行子像素的驱动过程可以与对第1-4行子像素的驱动过程一致，在此不再详述。
在上述数据驱动电路200的驱动过程中，对于一个子电路所驱动 的各列子像素，所有的蓝色子像素B均接入到数模转换单元21，所有的红色子像素R均接入到数模转换单元22，所有的绿色子像素G均接入到数模转换单元23。在实际应用中，仅需将数模转换单元21连接到用于驱动蓝色子像素的物理Gamma电路，将数模转换单元22连接到用于驱动红色子像素的物理Gamma电路，将数模转换单元23连接到用于驱动绿色子像素的物理Gamma电路即可。由于无需使用数字Gamma电路，能够从根本上避免因使用数字Gamma电路进行调节所导致的灰阶损失。
可以看出，根据本发明实施例的数据驱动电路100、200能够使用单独的物理的Gamma电路对其中一条数据线连接多个不同颜色的子像素的像素阵列进行驱动，从而避免因使用数字Gamma电路进行调节所导致的灰阶损失。
应当理解的是，虽然上述的各个实施例是关于子像素的颜色的种类N为三种(红、绿、蓝)进行的说明，但是在实际应用中，子像素的颜色也可以为四种或者更多种。在这种情况下，仍可以使一个数模转换单元通过N个开关单元连接N个数据线接口单元，一个数据线接口单元通过N个开关单元连接N个数模转换单元。可以使每一个数据线接口单元在驱动特定颜色的子像素时连接到该特定颜色对应的数模转换单元。这样的技术方案仍然落入本发明的范围。
此外，在以上实施例中，第Z行子像素和第Z+4Y(Z，Y均为整数)行子像素的排列方式和与数据线的连接关系完全相同，如图2和4所示。也就是说，像素阵列以4行子像素为周期进行排列。在这种情况下，所有开关单元的开关状态可以存在四种组合，分别对应于一个周期中的4行子像素。如图3和5所示，数据驱动电路100、200可以包括用于接收控制信号的两个开关单元控制接口41和42。这两个开关单元控制接口41和42的电平状态共有四种组合(00、01、10、11，其中1可以表示高电平)，分别对应于开关单元的四种开关状态。这样通过利用控制信号来控制开关单元控制接口41和42的电平状态即可实现四种不同的开关连接状态。此时，各个开关单元可以被配置成响应于施加到两个开关单元控制接口41和42的电平而开启或者关断，使一个数据线接口单元在驱动不同颜色的子像素时连接不同的数模转换单元。
对于不同的子像素排列，子像素行的种类一般不超过四种。因此，等于四种或者小于四种的开关状态组合即可实现相应的控制。当然，当所需要的开关状态组合大于四种时，可以使用多于两个的开关单元控制接口。
图6示出了根据本发明的一个实施例的数据驱动系统600。该数据驱动系统600包含上述的数据驱动电路100/200。进一步地，数据驱动系统600还可以包括一个时序控制器610。该时序控制器610用于向数据驱动电路100/200提供控制信号以控制每一个开关单元的通断，使一个数据线接口单元在驱动不同颜色的子像素时连接不同的数模转换单元。在数据驱动电路包含两个开关单元控制接口的示例中，时序控制器610可以通过控制两个开关单元控制接口的电平状态来控制各个开关单元的通断。
如图6所示，数据驱动系统600还可以包含N个Gamma电路Gamma_1、Gamma_2......Gamma_N。驱动同一种颜色的子像素的各个数模转换单元连接同一Gamma电路，驱动不同颜色的子像素的数模转换单元连接到不同的Gamma电路。这里的N为彩色显示所使用的子像素的颜色的种类。
图7示出了根据本发明的一个实施例的显示装置700。该显示装置700包括上述的数据驱动系统600。在一个实现方式中，显示装置700还可以包括像素阵列710。像素阵列710可以是如图4所示的像素阵列，并且在此不进行详述。此时，数据驱动系统600中所包含的数据驱动电路为如图5所示的数据驱动电路200。在实际应用中，显示装置700可以为：电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
在本发明的另一个方面中，还提供了一种驱动上述数据驱动电路的方法，包括：向数据驱动电路提供控制信号，使多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
以上所述仅为本发明的具体实施例，但是，本发明的保护范围不局限于此。任何熟悉本技术领域的技术人员在所揭露的具体实施例的基础上可轻易想到的变化或替代，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围仅由所附权利要求限定。

Claims (13)

  1. 一种数据驱动电路，包括多个子电路，每一个子电路包括：
    多个数模转换单元，每一个数模转换单元用于仅驱动一种颜色的子像素；
    多个数据线接口单元，每一个数据线接口单元连接到一条数据线；以及
    多个开关单元，连接在所述多个数模转换单元和所述多个数据线接口单元之间，被配置成在控制信号的控制下开启或关断，使所述多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
  2. 如权利要1所述的数据驱动电路，其中，每一个数据线接口单元包括一个运算放大模块。
  3. 如权利要求1所述的数据驱动电路，其中，每一个子电路包括N个相邻的数模转换单元、N个相邻的数据线接口单元以及连接所述N个相邻的数模转换单元和N个相邻的数据线接口单元的多个开关单元，其中N为子像素的颜色的种类。
  4. 如权利要求3所述的数据驱动电路，其中，每一个数模转换单元经N个开关单元连接到N个相邻的数据线接口单元，并且每一个数据线接口单元经N个开关单元连接到N个相邻的数模转换单元。
  5. 如权利要求3所述的数据驱动电路，其中，所述N的取值为3，并且其中，在每一个子电路内：
    第一数据线接口单元通过第一开关单元连接第一数模转换单元，通过第二开关单元连接第二数模转换单元；
    第二数据线接口单元通过第三开关单元连接第二数模转换单元，通过第四开关单元连接第三数模转换单元；以及
    第三数据线接口单元通过第五开关单元连接第三数模转换单元，通过第六开关单元连接第一数模转换单元。
  6. 如权利要求1所述的数据驱动电路，其中，所述数据驱动电路包括用于接收所述控制信号的两个开关单元控制接口，并且其中，每一个开关单元被配置成响应于施加到两个开关单元控制接口的电平而开启或者关断，使所述多个数据线接口单元中的每一个在驱动不同颜 色的子像素时连接不同的数模转换单元。
  7. 一种数据驱动系统，包括如权利要求1-6任一项所述的数据驱动电路。
  8. 如权利要求7所述的系统，还包括时序控制器，所述时序控制器与所述数据驱动电路相连，用于提供所述控制信号，使所述多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
  9. 如权利要求8所述的系统，其中，所述数据驱动电路为如权利要求6所述的数据驱动电路，并且其中，所述控制信号用于控制两个开关单元控制接口的电平状态。
  10. 如权利要求7所述的系统，还包括N个Gamma电路，其中N为子像素的颜色的种类，其中，驱动同一种颜色的子像素的各个数模转换单元连接同一Gamma电路。
  11. 一种显示装置，包括如权利要求7-10任一项所述的数据驱动系统。
  12. 如权利要求11所述的显示装置，其中，所述数据驱动电路为如权利要求5所述的数据驱动电路，并且其中，所述显示装置还包括像素阵列，所述像素阵列包括多个子像素阵列，每一个子像素阵列包括3列子像素和三条数据线，其中，每一个子像素阵列中第1列子像素的第4x+1行子像素和第4x+3行子像素、第2列子像素的第4x+2行子像素、第3列子像素的4x+4行子像素为第一颜色子像素；第1列子像素的第4x+4行子像素、第2列子像素的第4x+1行子像素和第4x+3行子像素、第3列子像素的第4x+2行子像素为第二颜色子像素；并且其他子像素为第三颜色子像素，其中x为大于等于0的整数，并且其中，第一条数据线连接第1列子像素中的第一颜色子像素以及相邻的另一个子像素阵列中的第3列子像素中的第二颜色子像素，第二条数据线连接第2列子像素中的第二颜色子像素以及第1列子像素中的第二颜色子像素和第三颜色子像素，并且第三条数据线连接第3列子像素中的第三颜色子像素和第2列子像素中的第一颜色子像素和第三颜色子像素。
  13. 一种用于驱动如权利要求1-6任一项所述的数据驱动电路的方法，包括：
    向所述数据驱动电路提供所述控制信号，使所述多个数据线接口单元中的每一个在驱动不同颜色的子像素时连接不同的数模转换单元。
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