WO2017012329A1 - 一种方形扁平无引脚封装结构的功率模块 - Google Patents

一种方形扁平无引脚封装结构的功率模块 Download PDF

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Publication number
WO2017012329A1
WO2017012329A1 PCT/CN2016/072692 CN2016072692W WO2017012329A1 WO 2017012329 A1 WO2017012329 A1 WO 2017012329A1 CN 2016072692 W CN2016072692 W CN 2016072692W WO 2017012329 A1 WO2017012329 A1 WO 2017012329A1
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Prior art keywords
power
metal
lead frame
chip
driving chip
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Ceased
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PCT/CN2016/072692
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English (en)
French (fr)
Inventor
刘斯扬
王宁
魏家行
刘超
孙伟峰
陆生礼
时龙兴
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Southeast University
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Southeast University
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Priority to US15/576,850 priority Critical patent/US10056313B2/en
Publication of WO2017012329A1 publication Critical patent/WO2017012329A1/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
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    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/442—Shapes or dispositions of multiple leadframes in a single chip
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
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    • H10W90/00—Package configurations
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
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    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H10W72/325—Die-attach connectors having a filler embedded in a matrix
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
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    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/925—Bond pads having a filler embedded in a matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/953—Materials of bond pads not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/17—Containers or parts thereof characterised by their materials
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    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/755—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a laterally-adjacent insulating package substrate, interpose or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Definitions

  • the invention relates to a power module with a square flat leadless package structure, in particular to improving the height difference of the optimized square flat leadless package structure layer, so that the overall heat dissipation rate of the power module is accelerated, and the local temperature of the power module is suppressed from being too high, and the local part is delayed.
  • the aging speed of the device ensures the overall service life of the module.
  • the power square flat leadless package is a surface mount semiconductor package technology that can be realized.
  • the circuit function that can be realized by multiple discrete packaged devices under the target size, and because it removes unnecessary resistance and inductance, it has higher power density in terms of electrical characteristics than discrete devices with the same package size; Power module packaging is gaining more and more market with its high reliability, low loss and low development cost.
  • the power module surrounding the square flat leadless package structure raises the structural layer of the driving chip lead frame through the metal pillars, keeps the height of the structural layer where the power chip is relatively unchanged, and extends the power chip lead frame and the metal heat sink disk.
  • the area of the metal heat sink corresponding to the power chip can be increased, and the heat dissipation rate of the power chip with large thermal power consumption can be accelerated.
  • the main heat dissipation path of the internal thermal power consumption of the power chip is larger, and for the package module as a whole, The temperature distribution is more uniform, which avoids excessively high temperature of the package module and improves product reliability.
  • there is a height difference between the two ends of the metal electrode lead which can reduce the collapse of the metal electrode lead due to gravity, thereby reducing the occurrence of circuit short circuit and reducing the difficulty of the process. And manufacturing costs.
  • the invention provides a power module with a square flat leadless package structure, which can accelerate the heat dissipation speed of the package module, reduce the temperature difference between the local regions, and make the temperature distribution tend to be uniform.
  • the present invention provides the following technical solutions:
  • a power module of a square flat leadless package structure comprising: an insulating resin, a driving chip, a power chip and a metal electrode contact, wherein the driving chip, the power chip and the metal electrode contact are electrically connected according to a predetermined design circuit and through a metal lead.
  • a metal heat sink for driving the heat dissipation of the power chip and a driving chip lead frame are disposed on the bottom layer of the insulating resin, and a power chip lead frame is disposed on the metal heat sink, the power chip is disposed on the power chip lead frame and the drain of the power chip Electrically connected to the metal heat sink, the driving chip lead frame is provided with a driving chip, and the metal heat sink extends outside the occupied area of the driving chip lead frame and the metal electrode contact to fill the bottom driving chip lead
  • An outer region occupied by the frame and the metal electrode contact is provided with a metal pillar below the driving chip lead frame, the metal pillar standing on the bottom layer and lifting the driving chip lead frame off the bottom layer, and the metal heat sink further extending into the driving chip The underlying area below the lead frame.
  • the present invention has the following advantages:
  • the driving chip lead frame 3 is raised by a height of four metal pillars 4 at the lower four corners, and a part of the power chip lead frame 2 and the corresponding metal are
  • the heat sink 6 extends below the driving chip lead frame 3, which increases the metal heat sink area of the power chip 30 with a large heat loss, which greatly accelerates the heat dissipation rate of the package module as a whole; meanwhile, the metal heat sink 6 has a large limit.
  • the bottom area of the package module is utilized, so that the heat dissipation of the module can occupy more areas at the bottom of the package, thereby avoiding the local temperature difference of the package module being too disparate, and reducing the aging rate of the local device while ensuring the heat dissipation rate, thereby ensuring the life of the device.
  • FIG. 7 and FIG. 8 respectively, the heat dissipation analysis under the condition that the power chip is assigned the same power in the same environment and the original structure is the same.
  • the maximum temperature in the improved structure is 123.2 ° C, the lowest is 53.348 ° C, as shown in Figure 8, the highest temperature in the original structure is 131.8 ° C, the lowest is 43.796 ° C; obviously the improved structural module area shown in Figure 7 The temperature difference between the two is smaller than that of the original module shown in Fig. 8.
  • the overall temperature distribution of the improved structure power module is more uniform, avoiding the local temperature being too high and causing the aging rate of the device to be accelerated, thereby prolonging the overall service life of the power module.
  • the temperature of the improved structural module shown in FIG. 7 is lower than the temperature of the power module shown in FIG. 8, so that the heat dissipation efficiency of the improved structural module shown in FIG. 7 is also superior to the power shown in FIG. Module.
  • the square flat leadless package structure of the power module of the present invention has a height difference between the driving chip lead frame 3 and the power chip lead frame 2, so that the tension of the metal lead having a long bonding span is increased, thereby overcoming The collapse problem caused by its gravity, thereby reducing the overall short circuit of the module due to the collapse of the metal leads.
  • a wiring island 5 is designed in the package structure as a relay bridge medium between the elongated metal leads, so that the longer metal leads
  • the wire becomes a collection of a plurality of shorter metal leads, and the shorter metal wires can overcome the gravity causing their collapse by their own tension, and also reduce the overall short circuit of the module caused by the collapse of the metal leads.
  • the structure provided by the present invention reduces the difficulty of the wiring on the process and saves manufacturing costs.
  • the discrete circuit device realizes the same circuit function as the power module of the present invention, a larger number of discrete devices are required, and the specified package space may not accommodate the required number of discrete devices.
  • the circuit function is not realized by the discrete device, and therefore, the power module of the present invention can relatively easily realize the circuit function under a smaller volume size condition than the discrete device, and the cost is lower;
  • the power module encapsulates the multi-chip into a power module as a whole, removes unnecessary connection resistance and inductance, increases integration density, and reduces parasitic and power loss.
  • FIG. 1 is a lead-free three-dimensional view of an example of a quad flat no-lead package structure of a power module according to the present invention.
  • FIG. 2 is a top plan view showing an example of a square flat leadless package structure of a power module according to the present invention.
  • FIG. 3 is a cross-sectional view of a square flat leadless package structure of a power module along A-a cross section.
  • FIG. 4 is a cross-sectional view of a square flat leadless package structure of a power module taken along line B-b of the present invention.
  • FIG. 5 is a cross-sectional view of a square flat leadless package structure of a power module according to a cross section taken along line C-c of the present invention.
  • FIG. 6 is a cross-sectional view of a square flat leadless package structure of a power module according to the present invention in a D-d cross section.
  • Figure 7 shows the heat dissipation analysis of the improved structural power module with an ambient temperature of 20 ° C and additional power of the power chip.
  • FIG. 8 is a diagram showing the heat dissipation analysis of the original structural module in the case where the ambient temperature is 20 ° C and the power chip is added with the same power as the module of FIG. 7 .
  • a power module of a square flat leadless package structure comprising: an insulating resin 1, a driving chip 31, a power chip 30 and a metal electrode contact 20, and a driving chip 31, a power chip 30 and a metal electrode contact 20 according to a predetermined design circuit And electrically connected by a metal lead, a metal heat sink 6 for driving the heat dissipation of the power chip and a driving chip lead frame 3 are disposed on the bottom layer of the insulating resin 1, and a power chip lead frame 2 is disposed on the metal heat sink 6, the power chip 30 Power chip The lead frame 2 and the drain of the power chip 30 are electrically connected to the metal heat sink 6. On the driving chip lead frame 3, a driving chip 31 is provided.
  • the metal heat sink 6 is in the bottom layer of the driving chip lead frame 3 and the metal electrode.
  • the outer region occupied by the contact 20 extends to cover the outer region occupied by the underlying driver chip lead frame 3 and the metal electrode contact 20, and the metal pillar 4 is disposed under the driving chip lead frame 3, and the metal pillar 4 stands on
  • the bottom layer lifts the driver chip lead frame 3 away from the bottom layer, and the metal heat sink 6 also extends into the underlying region below the driver chip lead frame 3.
  • the grounding island 5 is provided on the bottom layer, and the metal lead for connecting the driving chip 31 and the power chip 30 is used as the relay bridge point to realize the driving chip 31 and the power chip. 30 connections.
  • FIG. 1 is a lead-free three-dimensional view of a square flat leadless package structure example of a power module according to an example of the present invention
  • FIG. 2 is a top plan view showing an example of a square flat leadless package structure of a power module according to an example of the present invention
  • 3 is a cross-sectional view showing an example of a square flat leadless package structure of a power module along the Aa cross section;
  • FIG. 4 is a cross-sectional view showing an example of a square flat leadless package structure of a power module along the Bb cross section; A cross-sectional view of an example of a quad flat no-lead package of a power module along the Cc section;
  • Figure 6 is a cross-sectional view of an example of a quad flat no-lead package of a power module in the Dd section;
  • Figure 7 and Figure 8 is a heat dissipation analysis diagram of the improved structural power module and the original structural module in the case where the ambient temperature is 20 ° C and the same power is added.
  • a square flat leadless package structure of a power module includes: a bare large-area metal heat sink 6 distributed at the bottom of the package module; and a metal designed to replace the pin function Electrode contact 20; power chip lead frame 2; drive chip lead frame 3 and metal post 4 for lifting it; between drive chip 31 and drive chip lead frame 3 and power chip 30 and power chip lead frame 2 Conductive solder 7 and silver paste 8 interconnected; a wire base island 5 as a wire bridge; a plurality of metal wires for electrically connecting, a copper wire 101 and a gold wire 102; and a packaging space filling material is an insulating resin 1.
  • the metal heat sink 6 is located under the power chip lead frame 2 , and the two are connected to each other by the tape 9 , and the area size is smaller than the size of the power chip lead frame 2 ; the power chip 30 is disposed above the power chip lead frame 2 .
  • the conductive solder 7 is connected to the silver paste 8 with the conductive solder 7 covering the bottom of the power chip 30, and the silver paste 8 is directly plated on the power chip lead frame 2; the conductive solder 7 and the silver paste 8 are directly adhered.
  • the driving chip lead frame 3 is raised by the four metal pillars 4 under the four corners thereof, and the two are connected to each other by the tape 9; the driving chip 31 is adhered to the driving chip by the conductive solder 7 and the silver paste 8.
  • the silver paste 8 is plated on the driving chip lead frame 3, and the conductive solder 7 and the silver paste 8 are directly adhered.
  • a wire base island 5 is designed, and a silver paste 8 is also plated on the top of the wire base island 5.
  • the gold lead 102 is connected to the driving chip 31 and the wiring island 5, the power chip 30, the metal electrode contact 20, and the power chip lead frame 2 by a bonding process; the copper lead 101 is connected to the power chip 30 by a bonding process and The wire base island 5, the metal electrode contact 20, and the power chip lead frame 2 are interposed.
  • the heat dissipation analysis is performed under the same environment in which the power chip is assigned the same power in the same environment and the original structure.
  • the maximum temperature in the improved structure is 123.2 ° C, the lowest is 53.348 ° C, as shown in Figure 8, the highest temperature in the original structure is 131.8 ° C, the lowest is 43.796 ° C; obviously the improved structural module area shown in Figure 7
  • the temperature difference between the two is smaller than that of the original module shown in FIG. 8, indicating that the improved structure makes the overall temperature distribution of the packaged power module tend to be uniform, and the local temperature is too high.
  • the temperature of the improved structural module shown in FIG. 7 is lower than the temperature of the power module shown in FIG. 8, so that the heat dissipation efficiency of the improved structural module shown in FIG. 7 is also superior to the power shown in FIG. Module.
  • the application example of the present invention is not limited to the package structure of the power module including one driving chip and six power chips, and is equally applicable to the module package of multiple driving chips and multiple power chips.

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Engineering & Computer Science (AREA)
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Abstract

一种方形扁平无引脚封装结构的功率模块，用于抑制功率模块局部温度过高，包括：绝缘树脂（1）、驱动芯片（31）、功率芯片（30）和金属电极触点（20），驱动芯片、功率芯片和金属电极触点按照既定设计电路并通过金属引线电连接，在绝缘树脂的底层设有用于功率芯片散热的金属散热盘（6）和驱动芯片引线框架（3），在金属散热盘上设有功率芯片引线框架（2），所述功率芯片设在功率芯片引线框架上且功率芯片的漏极与金属散热盘电连接，在驱动芯片引线框架上设有驱动芯片，所述金属散热盘在底层的驱动芯片引线框架及金属电极触点占据的以外区域延伸，在驱动芯片引线框架的下方设有金属支柱（4），金属散热盘还延伸进入驱动芯片引线框架下方的底层区域。

Description

一种方形扁平无引脚封装结构的功率模块 技术领域
本发明涉及一种方形扁平无引脚封装结构的功率模块，尤其涉及改进优化方形扁平无引脚封装结构层的高度差，使得功率模块整体散热速率加快，抑制功率模块局部温度过高，延缓局部器件的老化速度，保证模块整体使用寿命。
背景技术
在半导体功率模块日益小型化的趋势之下，半导体功率模块封装工艺的封装尺寸要求也越来越小型化，功率方形扁平无引线封装这种表面贴装半导体封装技术应运而生，既能实现在目标尺寸下多个分立封装器件才能够实现的电路功能，又因为其去除了非必要的电阻和电感，从而在电特性方面，与封装尺寸相同的分立器件相比，具有更高的功率密度；功率模块的封装以其高可靠性、低损耗、低开发成本的优势正赢得越来越大的市场。
对于实现方形扁平无引脚封装结构的功率模块来说，由于其中功率芯片的热损耗远远大于驱动芯片的热损耗，如果将功率芯片的散热和驱动芯片相同对待的话，会减小封装空间的利用率，同时造成局部温度过高，部分芯片在未达到产品寿命之前就已老化，从而影响到产品的可靠性，缩短产品寿命甚至造成产品失效。
围绕方形扁平无引脚封装结构的功率模块，通过金属支柱来抬高驱动芯片引线框架所在的结构层，保持功率芯片所在的结构层高度相对不变，同时将功率芯片引线框架和金属散热盘伸入驱动芯片引线框架下方区域，可以增大功率芯片所对应金属散热盘的面积，加快热功耗较大的功率芯片的散热速率。
同时，由于将热损耗量较大的功率芯片所对应的铜框架和金属散热盘的面积增大，使得功率芯片的内部热功耗的主要散热途径分布面积更大，对于封装模块整体而言，温度分布更加均匀，避免了封装模块温度局部过高，提高了产品可靠性。另外，由于结构层的高低优化，金属电极引线两端存在高度差，可以很好地减少由于重力作用而导致的金属电极引线的塌陷，进而减少电路短路问题的发生，减小了工艺上的难度与制造成本。
发明内容
本发明提供一种方形扁平无引脚封装结构的功率模块，能够加快封装模块的散热速度，减小局部区域之间悬殊的温度差，使得温度分布趋向均匀化。
为实现上述目的，本发明提供以下技术方案：
一种方形扁平无引脚封装结构的功率模块，包括：绝缘树脂、驱动芯片、功率芯片和金属电极触点，驱动芯片、功率芯片和金属电极触点按照既定设计电路并通过金属引线电连接，在绝缘树脂的底层设有用于功率芯片散热的金属散热盘和驱动芯片引线框架，在金属散热盘上设有功率芯片引线框架，所述功率芯片设在功率芯片引线框架上且功率芯片的漏极与金属散热盘电连接，在所述驱动芯片引线框架上设有驱动芯片，所述金属散热盘在底层的驱动芯片引线框架及金属电极触点占据的以外区域延伸以布满底层的驱动芯片引线框架及金属电极触点占据的以外区域，在驱动芯片引线框架的下方设有金属支柱，所述金属支柱立于底层并将驱动芯片引线框架抬离底层，所述金属散热盘还延伸进入驱动芯片引线框架下方的底层区域。
与现有技术相比，本发明具有以下优点：
(1)、本发明所述的功率模块的方形扁平无引脚封装结构，驱动芯片引线框架3通过下方四角处的四个金属支柱4提升一定高度，将部分功率芯片引线框架2和对应的金属散热盘6伸入至驱动芯片引线框架3下方，增大了热损耗较多的功率芯片30的金属散热盘面积，极大地加快了封装模块整体的散热速率；同时，金属散热盘6较大限度地利用封装模块底部面积，使得模块散热可以占用封装底部较多区域，进而避免了封装模块局部温差过于悬殊，在加快散热速率的同时减小了局部器件老化速率，保证了器件寿命。如附图7和附图8，分别是改进结构和原结构在相同环境下，功率芯片赋值相同功率情况下的散热分析。如图7所示，改进结构中最高温度为123.2℃，最低为53.348℃，如图8所示，原结构中最高温度为131.8℃，最低为43.796℃；显然图7所示改进结构模块区域之间的温度差小于图8所示原模块，改进结构功率模块整体温度分布更加趋向均匀化，避免局部温度过高而导致器件老化速率加快，从而延长了功率模块整体的使用寿命。在图7和图8所示模块的高温区域，图7所示改进结构模块的温度小于图8所示功率模块的温度，因此图7所示改进结构模块散热效率也优于图8所示功率模块。
(2)、本发明所述功率模块的方形扁平无引脚封装结构驱动芯片引线框架3和功率芯片引线框架2之间存在高度差，这样使得键合跨度长的金属引线张力增大，从而克服由其重力引起的塌陷问题，进而减少由于金属引线塌陷而导致的模块整体短路现象的产生。同时，在封装结构中设计有搭线基岛5，作为过长金属引线之间的中继桥接媒介，使得较长金属引 线变成多条较短金属引线的集合，而键合较短的金属引线可以通过本身的张力克服导致其塌陷的重力，也起到了减少由金属引线塌而导致模块整体短路现象的作用。综上，本发明提供的结构减小了工艺上的搭线难度，节约了制造成本。
(3)、在规定的封装空间内，若通过分立器件实现和本发明功率模块相同的电路功能，则需要较多个数的分立器件，且规定的封装空间可能容纳不了所需分立器件个数，从而导致通过分立器件实现不了电路功能，因此，相比于分立器件，本发明所述的功率模块能够比较容易地在更小的体积尺寸条件下实现电路功能，成本较低；此外，本发明所述功率模块将多芯片封装成功率模块整体，去除了非必要的连接电阻和电感，增大集成密度的同时，也减小了寄生和功率损耗。
附图说明
图1为本发明提供的一种功率模块的方形扁平无引脚封装结构实例的无引线三维视图。
图2为本发明提供的一种功率模块的方形扁平无引脚封装结构实例的俯视示意图。
图3为本发明提供的一种功率模块的方形扁平无引脚封装结构实例沿A-a截面的剖面图。
图4为本发明提供的一种功率模块的方形扁平无引脚封装结构实例沿B-b截面的剖面图。
图5为本发明提供的一种功率模块的方形扁平无引脚封装结构实例沿C-c截面的剖面图。
图6为本发明提供的一种功率模块的方形扁平无引脚封装结构实例在D-d截面的剖面图。
图7为环境温度为20℃，功率芯片附加功率的情况下，改进结构功率模块散热分析图。
图8为本发明是在环境温度为20℃，功率芯片附加与图7模块相同功率的情况下，原结构模块散热分析图。
其中，1、绝缘树脂；2、功率芯片引线框架；3、驱动芯片引线框架；4、金属支柱；5、搭线基岛；6、金属散热盘；7、导电焊料；8、银浆；9、胶带；20、金属电极触点；30、功率芯片；31、驱动芯片；101、铜引线；102金引线。
具体实施方式
一种方形扁平无引脚封装结构的功率模块，包括：绝缘树脂1、驱动芯片31、功率芯片30和金属电极触点20，驱动芯片31、功率芯片30和金属电极触点20按照既定设计电路并通过金属引线电连接，在绝缘树脂1的底层设有用于功率芯片散热的金属散热盘6和驱动芯片引线框架3，在金属散热盘6上设有功率芯片引线框架2，所述功率芯片30设在功率芯片 引线框架2上且功率芯片30的漏与金属散热盘6电连接，在所述驱动芯片引线框架3上设有驱动芯片31，所述金属散热盘6在底层的驱动芯片引线框架3及金属电极触点20占据的以外区域延伸以布满底层的驱动芯片引线框架3及金属电极触点20占据的以外区域，在驱动芯片引线框架3的下方设有金属支柱4，所述金属支柱4立于底层并将驱动芯片引线框架3抬离底层，所述金属散热盘6还延伸进入驱动芯片引线框架3下方的底层区域。在本实施例中，在底层上设有搭线基岛5，用于连接驱动芯片31和功率芯片30的金属引线以所述搭线基岛5为中继桥接点实现驱动芯片31和功率芯片30的连接。
为使本发明的目的、技术方案和优点更加清晰，以下结合附图及一优选实例对本发明的实施方案作进一步详细描述。
图1为本发明实例中一种功率模块的方形扁平无引脚封装结构实例的无引线三维视图；图2为本发明实例中一种功率模块的方形扁平无引脚封装结构实例的俯视示意图；图3是沿A-a截面的一种功率模块的方形扁平无引脚封装结构实例的剖面图；图4为沿B-b截面的一种功率模块的方形扁平无引脚封装结构实例的剖面图；图5为沿着C-c截面的一种功率模块的方形扁平无引脚封装结构实例的剖面图；图6为在D-d截面一种功率模块的方形扁平无引脚封装结构实例的剖面图；图7和图8分别为在环境温度为20℃且相同功率附加的情况下，改进结构功率模块和原结构模块的散热分析图。
如图1～图6所示，一种功率模块的方形扁平无引脚封装结构，具体包括：裸露的大面积金属散热盘6，分布于封装模块底部；四周设计有用来替代引脚作用的金属电极触点20；功率芯片引线框架2；驱动芯片引线框架3和对其起抬高作用的金属支柱4；实现驱动芯片31与驱动芯片引线框架3之间以及功率芯片30与功率芯片引线框架2之间互连的导电焊料7和银浆8；作为引线桥接的搭线基岛5；实现电性连接的多根金属导线，铜引线101和金引线102；封装空间填充材料为绝缘树脂1。
如图3～图6所示，金属散热盘6位于功率芯片引线框架2下方，二者通过胶带9互相连接，面积尺寸小于功率芯片引线框架2尺寸；功率芯片30配置于功率芯片引线框架2上方，通过导电焊料7和银浆8相连，其中导电焊料7覆盖在功率芯片30底部，银浆8直接电镀于功率芯片引线框架2上方；导电焊料7和银浆8直接粘连。
如图1～图5所示，驱动芯片引线框架3通过其四角下方四金属支柱4抬高，二者之间通过胶带9互相连接；驱动芯片31通过导电焊料7和银浆8粘连于驱动芯片引线框架3上方，其中导电焊料7覆盖于驱动芯片底部，银浆8电镀于驱动芯片引线框架3上方，导电焊料7和银浆8直接粘连。
如图1～图5所示，部分功率芯片引线框架2以及所对应的金属散热盘6伸入至驱动芯片引线框架3下方。
如图1～图5所示，设计有搭线基岛5，搭线基岛5顶部同样电镀一层银浆8。金引线102通过键合工艺连接于驱动芯片31和搭线基岛5、功率芯片30、金属电极触点20、功率芯片引线框架2之间；铜引线101通过键合工艺连接在功率芯片30和搭线基岛5、金属电极触点20、功率芯片引线框架2之间。
如图7～图8所示，分别是改进结构和原结构在相同环境下，功率芯片赋值相同功率情况下的散热分析。如图7所示，改进结构中最高温度为123.2℃，最低为53.348℃，如图8所示，原结构中最高温度为131.8℃，最低为43.796℃；显然图7所示改进结构模块区域之间温度差小于图8所示原模块，说明改进结构使得封装功率模块整体温度分布趋向均匀化，避免了局部温度过高。在图7和图8所示模块的高温区域，图7所示改进结构模块的温度小于图8所示功率模块的温度，因此图7所示改进结构模块散热效率也优于图8所示功率模块。
本发明的应用实例并不局限于图示包含一颗驱动芯片、六颗功率芯片的功率模块的封装结构，它同样适用于多颗驱动芯片、多颗功率芯片的模块封装。
以上所述的具体实施方式，对本发明的目的、技术方案和有益效果进行了进一步的详细说明，所应理解的是，以上所述仅为本发明的具体实施方式而已，并不限定本发明的保护范围。任何熟悉本领域的技术人员，在不脱离本发明技术方案范围情况下，都可利用上述揭示的方法和技术内容对本发明技术方案做出许多可能的变动和修饰，或修改为等同变化的等效实施例。因此，凡在本发明的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (2)

  1. 一种方形扁平无引脚封装结构的功率模块，包括：绝缘树脂(1)、驱动芯片(31)、功率芯片(30)和金属电极触点(20)，驱动芯片(31)、功率芯片(30)和金属电极触点(20)按照既定设计电路并通过金属引线电连接，在绝缘树脂(1)的底层设有用于功率芯片散热的金属散热盘(6)和驱动芯片引线框架(3)，在金属散热盘(6)上设有功率芯片引线框架(2)，所述功率芯片(30)设在功率芯片引线框架(2)上且功率芯片(30)的漏极与金属散热盘(6)电连接，在所述驱动芯片引线框架(3)上设有驱动芯片(31)，其特征在于，所述金属散热盘(6)在底层的驱动芯片引线框架(3)及金属电极触点(20)占据的以外区域延伸以布满底层的驱动芯片引线框架(3)及金属电极触点(20)占据的以外区域，在驱动芯片引线框架(3)的下方设有金属支柱(4)，所述金属支柱(4)立于底层并将驱动芯片引线框架(3)抬离底层，所述金属散热盘(6)还延伸进入驱动芯片引线框架(3)下方的底层区域。
  2. 根据权利要求1所述的方形扁平无引脚封装结构的功率模块，其特征在于，在底层上设有搭线基岛(5)，用于连接驱动芯片(31)和功率芯片(30)的金属引线以所述搭线基岛(5)为中继桥接点实现驱动芯片(31)和功率芯片(30)的连接。
PCT/CN2016/072692 2015-07-20 2016-01-29 一种方形扁平无引脚封装结构的功率模块 Ceased WO2017012329A1 (zh)

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