WO2017008325A1 - 一种tft基板及液晶面板 - Google Patents

一种tft基板及液晶面板 Download PDF

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Publication number
WO2017008325A1
WO2017008325A1 PCT/CN2015/084898 CN2015084898W WO2017008325A1 WO 2017008325 A1 WO2017008325 A1 WO 2017008325A1 CN 2015084898 W CN2015084898 W CN 2015084898W WO 2017008325 A1 WO2017008325 A1 WO 2017008325A1
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Prior art keywords
pixel
sub
auxiliary
electrode
tft substrate
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PCT/CN2015/084898
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English (en)
French (fr)
Inventor
杜鹏
施明宏
康志聪
许哲豪
吕启标
姚晓慧
Original Assignee
深圳市华星光电技术有限公司
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Priority to US14/780,623 priority Critical patent/US9885925B2/en
Publication of WO2017008325A1 publication Critical patent/WO2017008325A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136213Storage capacitors associated with the pixel electrode
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134345Subdivided pixels, e.g. for grey scale or redundancy
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a TFT substrate and a liquid crystal panel.
  • the existing design for improving the dominant role of the big view is generally to divide each sub-pixel unit in the pixel unit into two regions, which are a main pixel region and a sub-pixel region, respectively.
  • the brightness of the main pixel area is high, and the brightness of the auxiliary pixel area is low, thereby improving the large viewing angle characteristics of the panel.
  • the area of the auxiliary pixel area is designed to be large (about 60% of the open area of the sub-pixel unit), which reduces the transmittance of the entire sub-pixel unit. To maintain a high penetration rate, it is necessary to increase the power consumption of the backlight module, resulting in waste of energy.
  • the invention proposes a new design for improving the characteristics of large viewing angles.
  • Each pixel is divided into three sub-pixels of red, green and blue, wherein only one or two sub-pixels are divided into two regions, and the two regions are in the same gray.
  • the brightness under the order is different, and the two sub-pixels are used to improve the large viewing angle characteristics of the panel.
  • the other sub-pixels maintain the structure of one zone, so that on the one hand, there is no Sub zone with lower brightness, and there is no decrease in aperture ratio due to pixel division, thereby improving the transmittance of the entire panel and being more environmentally friendly. Design of energy-saving green products.
  • the technical problem to be solved by the present invention is to provide a TFT substrate and a liquid crystal panel, which can maintain the transmittance of the liquid crystal panel while improving the large viewing angle characteristics of the liquid crystal panel, thereby achieving the purpose of saving energy.
  • a technical solution adopted by the present invention is to provide a TFT substrate, the TFT substrate includes a plurality of pixel units, each pixel unit includes three sub-pixel units, and at least one pixel unit
  • the sub-pixel unit is a single pixel region, and each of the remaining sub-pixel units includes two insulated pixel regions; respectively, a main pixel region and a secondary pixel region, wherein the brightness of the main pixel region is greater than the brightness of the auxiliary pixel region, and the main pixel
  • the area ratio of the area and the auxiliary pixel area ranges from 1:1 to 1:6. Further, the brightness of the main pixel area is greater than or equal to the brightness of the sub-pixel unit of the single pixel area.
  • the TFT substrate further includes a buck component and a plurality of data lines disposed in parallel, wherein the main pixel electrode of the main pixel region and the auxiliary pixel electrode of the auxiliary pixel region are electrically connected to the same data line to provide voltage from the same data line. Further, the voltage of the auxiliary pixel electrode is further reduced by the step-down component, so that the voltage of the main pixel electrode is greater than the voltage of the auxiliary pixel electrode, so that the brightness of the main pixel area is greater than the brightness of the auxiliary pixel area.
  • a TFT substrate including a plurality of pixel units, each pixel unit including three sub-pixel units, wherein, in a pixel unit, At least one sub-pixel unit is a single pixel region, and each of the remaining sub-pixel units includes at least two insulated pixel regions, and at least two of the insulated pixel regions have different brightness.
  • one of the sub-pixel units in each pixel unit includes at least two insulated pixel regions.
  • two of the sub-pixel units in each pixel unit include at least two insulated pixel regions.
  • the remaining sub-pixel unit includes two insulated pixel regions, which are a main pixel region and a sub-pixel region, wherein the brightness of the main pixel region is greater than the brightness of the auxiliary pixel region, and the area of the main pixel region and the auxiliary pixel region.
  • the ratio ranges from 1:1 to 1:6.
  • the TFT substrate further includes a buck component and a plurality of data lines disposed in parallel, wherein the main pixel electrode of the main pixel region and the auxiliary pixel electrode of the auxiliary pixel region are electrically connected to the same data line to provide voltage from the same data line. Further, the voltage of the auxiliary pixel electrode is further reduced by the step-down component, so that the voltage of the main pixel electrode is greater than the voltage of the auxiliary pixel electrode, so that the brightness of the main pixel area is greater than the brightness of the auxiliary pixel area.
  • the TFT substrate further includes a scan line and a common electrode, and the step-down component is a switch tube.
  • the input end of the switch tube is electrically connected to the auxiliary pixel electrode, and the output end of the switch tube is electrically connected to the common electrode, and the control end of the switch tube is electrically connected to the scan line.
  • the control terminal receives the scan driving signal provided by the scan line, so that the input end and the output end are electrically connected to each other, so that the auxiliary pixel electrode is electrically connected to the common electrode to discharge.
  • the TFT substrate further includes a scan line and a common electrode.
  • the step-down component includes a switch tube and a coupling capacitor. The input end of the switch tube is electrically connected to the auxiliary pixel electrode, and the output end of the switch tube is electrically connected to the coupling capacitor, and the control end of the switch tube is electrically connected.
  • a scan line, the coupling capacitor is further electrically connected to the common electrode, and after the data line supplies a voltage to the main pixel electrode and the auxiliary pixel electrode, the control end receives the scan driving signal provided by the scan line, so that the input end and the output end are electrically connected to each other, thereby assisting
  • the pixel electrode is coupled to the common electrode through a coupling capacitor for the purpose of voltage reduction.
  • the step-down component includes a coupling capacitor, and the coupling capacitor is electrically connected to the data line and the auxiliary pixel electrode, respectively, so that the voltage provided by the data line is coupled to the auxiliary pixel electrode through the coupling capacitor to achieve the purpose of voltage reduction.
  • the TFT substrate includes a plurality of mutually parallel data lines, and the main pixel electrode and the auxiliary pixel electrode respectively receive voltages provided by two different data lines, wherein the main pixel electrode receives a voltage greater than a voltage received to the auxiliary pixel electrode, thereby The brightness of the main pixel area is made larger than the brightness of the sub-pixel area.
  • a liquid crystal panel including a TFT substrate
  • the TFT substrate includes a plurality of pixel units, and each pixel unit includes three sub-pixel units, wherein In one pixel unit, at least one sub-pixel unit is a single pixel region, and each of the remaining sub-pixel units includes at least two insulated pixel regions, and at least two of the insulated pixel regions have different brightness.
  • one of the sub-pixel units in each pixel unit includes at least two insulated pixel regions.
  • two of the sub-pixel units in each pixel unit include at least two insulated pixel regions.
  • the remaining sub-pixel unit includes two insulated pixel regions, which are a main pixel region and a sub-pixel region, wherein the brightness of the main pixel region is greater than the brightness of the auxiliary pixel region, and the area of the main pixel region and the auxiliary pixel region.
  • the ratio ranges from 1:1 to 1:6.
  • the TFT substrate further includes a buck component and a plurality of data lines disposed in parallel, wherein the main pixel electrode of the main pixel region and the auxiliary pixel electrode of the auxiliary pixel region are electrically connected to the same data line to provide voltage from the same data line. Further, the voltage of the auxiliary pixel electrode is further reduced by the step-down component, so that the voltage of the main pixel electrode is greater than the voltage of the auxiliary pixel electrode, so that the brightness of the main pixel area is greater than the brightness of the auxiliary pixel area.
  • the TFT substrate further includes a scan line and a common electrode, and the step-down component is a switch tube.
  • the input end of the switch tube is electrically connected to the auxiliary pixel electrode, and the output end of the switch tube is electrically connected to the common electrode, and the control end of the switch tube is electrically connected to the scan line.
  • the control terminal receives the scan driving signal provided by the scan line, so that the input end and the output end are electrically connected to each other, so that the auxiliary pixel electrode is electrically connected to the common electrode to discharge.
  • the TFT substrate further includes a scan line and a common electrode.
  • the step-down component includes a switch tube and a coupling capacitor. The input end of the switch tube is electrically connected to the auxiliary pixel electrode, and the output end of the switch tube is electrically connected to the coupling capacitor, and the control end of the switch tube is electrically connected.
  • a scan line, the coupling capacitor is further electrically connected to the common electrode, and after the data line supplies a voltage to the main pixel electrode and the auxiliary pixel electrode, the control end receives the scan driving signal provided by the scan line, so that the input end and the output end are electrically connected to each other, thereby assisting
  • the pixel electrode is coupled to the common electrode through a coupling capacitor for the purpose of voltage reduction.
  • the step-down component includes a coupling capacitor, and the coupling capacitor is electrically connected to the data line and the auxiliary pixel electrode, respectively, so that the voltage provided by the data line is coupled to the auxiliary pixel electrode through the coupling capacitor to achieve the purpose of voltage reduction.
  • the TFT substrate includes a plurality of parallel data lines, and the main pixel electrode of the main pixel area and the auxiliary pixel electrode of the auxiliary pixel area respectively receive voltages provided by two different data lines, wherein the main pixel electrode receives a voltage greater than The voltage received by the auxiliary pixel electrode is such that the brightness of the main pixel area is greater than the brightness of the sub-pixel area.
  • each pixel unit in the TFT substrate of the present invention at least one sub-pixel unit is a single pixel area, and each of the remaining sub-pixel units includes at least two The insulated pixel regions have different brightness of at least two of the insulated pixel regions. Therefore, the pixel unit of the present invention includes sub-pixel units having partitions, and the brightness of different pixel areas is set differently, whereby the large viewing angle characteristics of the liquid crystal panel can be improved. Further, in the pixel unit of the present invention, at least one sub-pixel unit is a single pixel area, that is, no partition display is performed, thereby maintaining a high transmittance of the liquid crystal panel, thereby saving power consumption of the backlight module. To achieve the goal of saving energy.
  • FIG. 1 is a schematic structural diagram of a TFT substrate according to an embodiment of the present invention.
  • FIG. 2 is another schematic structural view of one of the pixel units shown in FIG. 1;
  • FIG. 3 is a schematic circuit diagram of a TFT substrate according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of another circuit structure of a TFT substrate according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of still another circuit structure of a TFT substrate according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of still another circuit structure of a TFT substrate according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of a liquid crystal panel according to an embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a TFT substrate according to an embodiment of the present invention.
  • the TFT of the embodiment of the present invention ((Thin Film Transistor, which is a thin film transistor) substrate 100 includes a plurality of pixel units, such as pixel units 11, 12, 13, and 14 as shown in FIG. Each pixel unit includes three sub-pixel units.
  • the pixel unit 11 includes sub-pixels 110, 111, and 112.
  • the sub-pixel units 110, 111, and 112 display three colors of R (Red, red), G (Green, green), and B (Blue, blue), respectively.
  • At least one sub-pixel unit is a single pixel area, and each of the remaining sub-pixel units includes at least two insulated pixel areas, and at least two insulated pixel areas have different brightness.
  • the sub-pixel unit 112 includes two insulated pixel regions, which are a main pixel region 113 and a sub-pixel region 114, respectively, and the luminances of the main pixel region 113 and the sub-pixel region 114 are different.
  • the pixel unit of the present invention includes the sub-pixel units 112 having the partitions, and the luminances of the different pixel regions are set differently, whereby the large viewing angle characteristics of the liquid crystal panel composed of the TFT substrate 10 can be improved by the sub-pixels 112. Further, in the pixel unit of the present invention, the sub-pixel units 110 and 111 are a single pixel area, thereby maintaining a high transmittance of the liquid crystal panel, thereby saving power consumption of the backlight module and achieving energy saving. .
  • the sub-pixel unit in one pixel unit, preferably includes two insulated pixel regions, as shown in FIG. 1, and the number of sub-pixel units including two insulated pixel regions is one or two.
  • the case where the number of sub-pixel units including two insulated pixel regions is one is as shown in FIG. 1 and described above, and details are not described herein again.
  • the sub-pixel unit 110 or 111 may be separately disposed to include two insulated pixel regions.
  • FIG. 2 is another schematic structural view of one of the pixel units shown in FIG. 1.
  • the sub-pixel unit 210 is a single pixel region, and the sub-pixel units 211 and 212 respectively include two insulated pixel regions.
  • the sub-pixel unit 211 includes a main pixel area 213 and a sub-pixel area 214
  • the sub-pixel unit 212 includes a main pixel area 215 and a sub-pixel area 216.
  • the luminances of the main pixel region 213 and the sub-pixel region 214 are different, and the luminances of the main pixel region 215 and the sub-pixel region 216 are also different.
  • sub-pixel units 210 and 211 it is also possible to set the sub-pixel units 210 and 211 to include two pixel regions respectively, or to set the sub-pixel units 210 and 212 to include two pixel regions, respectively.
  • the specific settings are similar to those shown in FIG. 2, and are not described herein again.
  • the brightness of the main pixel area and the auxiliary pixel area described above it is preferable to set the brightness of the main pixel area to be larger than the brightness of the auxiliary pixel area.
  • the area ratio of the main pixel area and the auxiliary pixel area is 1:1 to 1:6.
  • the brightness of the main pixel area is greater than or equal to the brightness of the sub-pixel unit of the single pixel area.
  • the brightness of the main pixel area 113 is greater than or equal to the brightness of the sub-pixel units 110 and 111.
  • the pixel unit 21 has only a sub-pixel unit 211 and 212 for partitioning, and the area of the low-luminance auxiliary pixel area is reduced by 1/3 compared with the conventional design of FIG. The brightness of the panel will be improved and the penetration rate will also increase.
  • one or two sub-pixel units include two pixel regions in each pixel unit.
  • the number of sub-pixel units of the partitions in the pixel units at different positions may be differently set and/or the number of sub-pixel units in the pixel units at different positions may be differently set, thereby further improving Large viewing angle characteristics.
  • the number of sub-pixel units including at least two pixel regions is different.
  • two sub-pixel units in each pixel unit are single regions, and the remaining one sub-pixel unit includes at least two pixel regions; at the edge position of the TFT substrate 10, each pixel There is one sub-pixel unit in the cell as a single region, and the remaining two sub-pixel units include at least two pixel regions.
  • the number of pixel regions included in the partitioned sub-pixel unit is different. For example, at a central position of the TFT substrate 10, one sub-pixel unit in each pixel unit includes two pixel regions; at an edge position of the TFT substrate 10, one sub-pixel unit in each pixel unit includes two or more Pixel area.
  • the present invention can also combine the above two cases. That is to say, in the pixel units at different positions, the number of sub-pixel units including at least two pixel regions is different and the number of pixel regions included is also different. For example, at the center position of the TFT substrate 10, one sub-pixel unit includes two pixel regions in each pixel unit; at the edge position of the TFT substrate 10, two sub-pixel units in each pixel unit contain two More than one pixel area.
  • the luminance difference value of the main pixel area and the sub-pixel area is set small; at the edge position of the TFT substrate 10, the luminance difference value of the main pixel area and the sub-pixel area is set large.
  • each pixel unit includes three sub-pixel units of R (Red, Red), G (Green), and B (Blue).
  • each pixel unit further includes four sub-pixel units of R, G, B, and W (White, white), wherein the partitioning principle of the sub-pixel unit and the pixel unit include three sub-pixel units Consistent, no longer repeat them here.
  • FIG. 3 is a schematic diagram of a circuit structure of a TFT substrate according to an embodiment of the present invention.
  • 3 is a schematic diagram showing the circuit structure of the pixel unit 11 shown in FIG. 1. It should be understood that the circuit structures of other pixel units are similar.
  • the TFT substrate 10 includes a plurality of parallelly disposed data lines S31, S32, and S33, a scanning line G31 (only one is shown in FIG. 3), and a common electrode P0 disposed in the sub-pixel units 110, 111, and 112, respectively.
  • the control terminals of the switch tubes K31, K32 and K33 are electrically connected to the scan line G31, and the input terminals of the switch tubes K31, K32 and K33 are electrically connected to the data lines S31, S32 and S33, respectively, and the output terminals of the switch tubes K31, K32 and K33 are respectively electrically connected.
  • the pixel electrodes P1, P2, and P3 of the sub-pixel units 110, 111, and 112 are connected. It is to be noted that, in the sub-pixel unit 112 including two pixel regions, the output terminal of the switching transistor K33 is connected to the main pixel electrode P31 of the main pixel region 113.
  • the scan line G31 supplies scan driving signals to the switch tubes K31, K32, and K33
  • the input terminals and the output terminals of the switch tubes K31, K32, and K33 are electrically connected to each other, and the data lines S31, S32, and S33 are respectively given to the sub-pixel unit 110.
  • the pixel electrodes P1, P2 of 111 and the main pixel electrode P31 of the main pixel region 113 of the sub-pixel unit 112 are charged such that the pixel electrodes P1 and P2 and the main pixel electrode P31 form storage capacitors C1, C2, and C31 with the common electrode P0, respectively.
  • the TFT substrate 10 further includes a switch tube K34 and a step-down assembly 15.
  • the control end and the input end of the switch tube K34 are also electrically connected to the scan line G31 and the data line S33, respectively, and the output end of the switch tube K34 is electrically connected to the auxiliary pixel electrode P32 of the auxiliary pixel area, so that the data line S33 charges the auxiliary pixel electrode P32.
  • the auxiliary pixel electrode P32 and the common electrode P0 form a storage capacitor C32.
  • the main pixel electrode P31 of the main pixel region 113 and the sub-pixel electrode P32 of the sub-pixel region 114 are electrically connected to the same data line S33 to supply a voltage from the same data line S33. Further, the sub-pixel unit 112 further reduces the voltage of the auxiliary pixel electrode P32 of the auxiliary pixel region 114 by the step-down component 15 such that the voltage of the main pixel electrode P31 is greater than the voltage of the auxiliary pixel electrode P32, thereby realizing that the brightness of the main pixel region 113 is greater than The brightness of the secondary pixel region 114.
  • the specific manner of realizing the brightness of the main pixel region 113 to be greater than the brightness of the auxiliary pixel region 114 by the buck component 15 includes the following three types:
  • the step-down component 15 is a switch tube K35, the input end of the switch tube K35 is electrically connected to the auxiliary pixel electrode P32, and the output end of the switch tube K35 is electrically connected to the common electrode P0.
  • the control terminal of the switch K35 is also electrically connected to the scan line G31. That is, when the scanning line G31 supplies the scan driving signals to the switching transistors K33 and K34 such that the data line S33 supplies voltages to the main pixel electrode P31 and the auxiliary pixel electrode P32, the control terminal of the switching transistor K35 is also received by the scanning line G31.
  • the scan driving signal is such that the input end and the output end of the switch tube K35 are electrically connected to each other, so that the auxiliary pixel electrode P32 is electrically connected to the common electrode P0 through the switch tube K35 to discharge, so that the potential of the auxiliary pixel electrode P32 and the main pixel electrode P31 The potential is closer to the potential of the common electrode P0 to achieve the purpose of voltage reduction.
  • the display luminance of the auxiliary pixel region 114 is lower. Thereby, the characteristics of improving the large viewing angle of the liquid crystal panel can be realized by the sub-pixel unit 112, and the sub-pixel units 110 and 111 can maintain the higher transmittance of the panel.
  • FIG. 4 is a schematic diagram of another circuit structure of a TFT substrate according to an embodiment of the present invention.
  • 4 is a schematic diagram showing the circuit structure of the pixel unit 11 shown in FIG. 1. It should be understood that the circuit structures of other pixel units are similar.
  • the TFT substrate 10 still includes a plurality of data lines S41, S42, and S43 disposed in parallel, scanning lines G41 and G42, and switching transistors K41, K42, and K43 corresponding to the sub-pixel units 110, 111, and 112.
  • the data lines S41, S42 and S43, the scanning line G41, and the switching tubes K41, K42, and K43 are connected to the data lines S31, S32, and S33, the scanning line G31, and the switching tubes K31, K32, and K33, respectively. The same, no longer repeat here.
  • the circuit structure shown in FIG. 4 is different from the circuit structure shown in FIG. 3 in that the step-down assembly 45 shown in FIG. 4 includes a switch tube K45 and a coupling capacitor Cx1.
  • the input end of the switch tube K45 is electrically connected to the auxiliary pixel electrode P32 of the auxiliary pixel area 114, the output end of the switch tube K45 is electrically connected to the coupling capacitor Cx1, the control end of the switch tube K45 is electrically connected to the scan line G42, and the coupling capacitor Cx1 is further connected to the common
  • the electrode P0 is electrically connected. It is to be noted that the scan driving signal provided by the scanning line G42 of the present embodiment is delayed from the scanning driving signal supplied from the scanning line G41.
  • a scan driving signal is supplied to the switching transistors K43 and K44 at the scanning line G41, so that the data line S43 supplies a voltage to the main pixel electrode P31 and the auxiliary pixel electrode P32, and the scanning line G42
  • the scan driving signal is supplied to the switch K45, that is, the control end of the switch K45 receives the scan drive signal provided by the scan line G42, so that the input end and the output end of the switch K45 are electrically connected to each other, so that the auxiliary pixel electrode P32 passes through the coupling capacitor.
  • Cx1 is coupled to the common electrode P0 such that the potential of the secondary pixel electrode P32 is closer to the potential of the common electrode P0 for the purpose of voltage reduction.
  • FIG. 5 is a schematic diagram of still another circuit structure of a TFT substrate according to an embodiment of the present invention.
  • 5 is a schematic diagram showing the circuit structure of the pixel unit 11 shown in FIG. 1. It should be understood that the circuit structures of other pixel units are similar.
  • the TFT substrate 10 still includes a plurality of data lines S51, S52, and S53 disposed in parallel, a scanning line G51, and switching transistors K51, K52, and K53 corresponding to the sub-pixel units 110, 111, and 112.
  • connection manners of the data lines S51, S52, and S53, the scanning line G51, and the switching tubes K51 and K52 are the same as those of the data lines S41, S42, and S43, the scanning line G41, and the switching tubes K41 and K42 shown in FIG. 4, respectively. This will not be repeated here.
  • the circuit structure shown in FIG. 5 is different from the circuit structure shown in FIG. 4 in that the step-down component 55 of the present embodiment is only the coupling capacitor Cx2.
  • the coupling capacitor Cx2 is electrically connected to the data line S53 and the auxiliary pixel electrode P32, respectively, such that the voltage supplied from the data line S53 is coupled to the auxiliary pixel electrode P32 through the coupling capacitor Cx2, that is, the auxiliary pixel electrode P32 is coupled by the coupling circuit Cx2. While being charged, the potential of the auxiliary pixel electrode P32 is closer to the potential of the common electrode P0 to achieve the purpose of voltage reduction.
  • the transmittance of the auxiliary pixel electrode P32 is lower than that of the main pixel electrode P31, thereby realizing the difference in luminance between the main pixel region 113 and the auxiliary pixel region 114, and the purpose of improving the large viewing angle of the panel is achieved.
  • the control end of the switch K53 is electrically connected to the scan line G51, and the input end is electrically connected to the data line S53.
  • the output end is electrically connected to the main pixel electrode P31, and is also electrically connected to one pole of the coupling capacitor Cx2, and the coupling capacitor Cx2 The other pole is electrically connected to the auxiliary electrode P32. Therefore, when the scan line G51 supplies the scan driving signal to the switch K53, the input end and the output end of the switch K53 are electrically connected to each other, so that the data line K53 is supplied to the main pixel electrode P31, the coupling capacitor Cx2, and the auxiliary pixel electrode P32, respectively. Voltage. Since the coupling capacitor Cx2 is coupled between the output terminal of the switching transistor K53 and the auxiliary pixel electrode P32, the coupling capacitor Cx2 lowers the voltage received by the secondary pixel electrode P32.
  • FIG. 6 is a schematic diagram of still another circuit structure of a TFT substrate according to an embodiment of the present invention.
  • 6 is a schematic diagram showing the circuit structure of the pixel unit 11 shown in FIG. 1. It should be understood that the circuit structures of other pixel units are similar.
  • the TFT substrate 10 still includes a plurality of data lines S61, S62, 63, and S64 disposed in parallel, a scanning line G61, and switching transistors K61, K62, and K63 corresponding to the sub-pixel units 110, 111, and 112.
  • the data lines S61, S62, and S63, the scanning line G61, and the switching tubes K61, K62, and K63 are connected to the data lines S31, S32, and S33, the scanning line G31, and the switching tubes K31, K32, and K33, respectively. The same, no longer repeat here.
  • the circuit structure shown in FIG. 6 is different from the circuit structure shown in FIG. 3 in that the main pixel electrode p31 and the sub-pixel electrode P32 shown in FIG. 6 respectively receive voltages supplied from two different data lines.
  • the main pixel electrode p31 receives a voltage greater than the voltage received by the auxiliary pixel electrode P32, so that the luminance of the main pixel region 113 is greater than the luminance of the auxiliary pixel region 114.
  • the TFT substrate 10 shown in FIG. 6 further includes a switch tube K64, wherein the control end of the switch tube K64 is connected to the scan line G61, the input end of the switch tube K64 is connected to the data line S64, and the output end of the switch tube K64 is connected to the auxiliary pixel. Electrode P32.
  • the scanning line G61 supplies the scan driving signals to the switching transistors K63 and K64
  • the input terminals and the output terminals of the switching transistors K63 and K64 are electrically connected to each other, so that the data lines S63 and S64 charge the main pixel electrode P31 and the auxiliary pixel electrode P32, respectively.
  • the voltage provided by the data line S63 is greater than the voltage provided by the data line S64, so that the voltage received by the main line pixel electrode P31 is greater than the voltage received by the auxiliary pixel electrode P32, so that the brightness of the main pixel area 113 is greater than the brightness of the auxiliary pixel area 114.
  • the circuit structure shown in FIG. 6 only needs two different data lines, the brightness of the main pixel area 113 is greater than the brightness of the auxiliary pixel area 114, the structure is simple, and the remaining components are saved, thereby saving cost.
  • an embodiment of the present invention further provides a liquid crystal panel, which includes a CF (color) oppositely disposed.
  • the TFT substrate 72 is the TFT substrate 10 described above.
  • the CF substrate 71 is provided with a plurality of color resisting regions (not shown), and the color resisting regions are in one-to-one correspondence with the sub-pixel units on the TFT substrate 72.
  • the pixel unit of the present invention includes sub-pixel units having partitions, and different brightness of different pixel areas are set, whereby the large viewing angle characteristics of the liquid crystal panel composed of the TFT substrate 10 can be improved. Further, in the pixel unit of the present invention, at least one sub-pixel unit is a single pixel area, that is, no partition display is performed, thereby maintaining a high transmittance of the liquid crystal panel, thereby saving power consumption of the backlight module. To achieve the goal of saving energy.

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Abstract

提供了一种TFT基板(10)及液晶面板(70)。TFT基板(10)包括多个像素单元(11,12,13,14),每一像素单元(11,12,13,14)包括三个亚像素单元(110,111,112),其中,在一像素单元(11,12,13,14)中,至少一亚像素单元(110,111)为单一的像素区,其余的每一亚像素单元(112)包括至少两个绝缘的像素区(113,114),且至少两个绝缘的像素区(113,114)的亮度不同。因此,能够改善液晶面板(70)的大视角特性,并保持液晶面板(70)具有较高的穿透率,从而节省背光模组的功耗,达到节省能源的目的。

Description

一种TFT基板及液晶面板
【技术领域】
本发明涉及显示技术领域,尤其是涉及一种TFT基板及液晶面板。
【背景技术】
传统的液晶面板在大视角观看时,往往会出现色偏的问题。现有的改善大视角色偏的设计通常是将像素单元中的每一个亚像素单元分为两个区,分别为主像素区和辅像素区。液晶面板工作时,主像素区的亮度较高,辅像素区的亮度较低,以此来改善面板的大视角特性。通常情况下,辅像素区的面积设计得较大(占亚像素单元的开口区的60%左右),降低了整个亚像素单元的穿透率。若要保持较高的穿透率,则需要增加背光模组的功耗,导致能源的浪费。
本发明提出一种新的改善大视角特性的设计,每个像素分为红,绿,蓝三个亚像素,其中只有一个或者两个亚像素分为两个区,这两个区在相同灰阶下的亮度不同,通过这两个亚像素来改善面板的大视角特性。其他亚像素则维持一个区的结构,这样一方面它不存在亮度较低的Sub区,也不存在由于像素分区而造成的开口率降低,从而提高了整个面板的穿透率,更有利于环保节能绿色产品的设计。
【发明内容】
本发明主要解决的技术问题是提供一种TFT基板及液晶面板,能够在改善液晶面板的大视角特性的情况下,保持液晶面板的穿透率,从而达到节省能源的目的。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种TFT基板,该TFT基板包括多个像素单元,每一像素单元包括三个亚像素单元,,在一像素单元中,至少一亚像素单元为单一的像素区,其余的每一亚像素单元包括两个绝缘的像素区;分别为主像素区和辅像素区,其中,主像素区的亮度大于辅像素区的亮度,主像素区和辅像素区的面积比范围为1:1至1:6,进一步的,主像素区的亮度大于或等于单一的像素区的亚像素单元的亮度。
其中,TFT基板还包括降压组件和平行设置的多条数据线,其中,主像素区的主像素电极和辅像素区的辅像素电极电连接同一条数据线,以由同一条数据线提供电压,进一步通过降压组件降低辅像素电极的电压,使得主像素电极的电压大于辅像素电极的电压,从而实现主像素区的亮度大于辅像素区的亮度。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种TFT基板,该TFT基板包括多个像素单元,每一像素单元包括三个亚像素单元,其中,在一像素单元中,至少一亚像素单元为单一的像素区,其余的每一亚像素单元包括至少两个绝缘的像素区,且至少两个绝缘的像素区的亮度不同。
其中,每一像素单元中的其中一个亚像素单元包括至少两个绝缘的像素区。
其中,每一像素单元中的其中两个亚像素单元包括至少两个绝缘的像素区。
其中,其余的每一亚像素单元包括两个绝缘的像素区,分别为主像素区和辅像素区,其中,主像素区的亮度大于辅像素区的亮度,主像素区和辅像素区的面积比范围为1:1至1:6。
其中,TFT基板还包括降压组件和平行设置的多条数据线,其中,主像素区的主像素电极和辅像素区的辅像素电极电连接同一条数据线,以由同一条数据线提供电压,进一步通过降压组件降低辅像素电极的电压,使得主像素电极的电压大于辅像素电极的电压,从而实现主像素区的亮度大于辅像素区的亮度。
其中,TFT基板还包括扫描线和公共电极,降压组件为开关管,开关管的输入端电连接辅像素电极,开关管的输出端电连接公共电极,开关管的控制端电连接扫描线,在数据线向主像素电极和辅像素电极提供电压时,控制端接收扫描线提供的扫描驱动信号,使得输入端和输出端相互导通,从而使辅像素电极通过与公共电极电连接来放电,以达到降压的目的。
其中,TFT基板还包括扫描线和公共电极,降压组件包括开关管和耦合电容,开关管的输入端电连接辅像素电极,开关管的输出端电连接耦合电容,开关管的控制端电连接扫描线,耦合电容进一步与公共电极电连接,在数据线向主像素电极和辅像素电极提供电压后,控制端接收扫描线提供的扫描驱动信号,使得输入端和输出端相互导通,从而辅像素电极通过耦合电容耦合到公共电极,以达到降压的目的。
其中,降压组件包括耦合电容,耦合电容分别与数据线和辅像素电极电连接,使得数据线提供的电压通过耦合电容耦合到辅像素电极,以达到降压的目的。
其中,TFT基板包括多条相互平行的数据线,主像素电极和辅像素电极分别接收两条不同的数据线提供的电压,其中,主像素电极接收的电压大于向辅像素电极接收的电压,从而实现主像素区的亮度大于辅像素区的亮度。
为解决上述技术问题,本发明采用的又一个技术方案是:提供一种液晶面板,该液晶面板包括TFT基板,该TFT基板包括多个像素单元,每一像素单元包括三个亚像素单元,其中,在一像素单元中,至少一亚像素单元为单一的像素区,其余的每一亚像素单元包括至少两个绝缘的像素区,且至少两个绝缘的像素区的亮度不同。
其中,每一像素单元中的其中一个亚像素单元包括至少两个绝缘的像素区。
其中,每一像素单元中的其中两个亚像素单元包括至少两个绝缘的像素区。
其中,其余的每一亚像素单元包括两个绝缘的像素区,分别为主像素区和辅像素区,其中,主像素区的亮度大于辅像素区的亮度,主像素区和辅像素区的面积比范围为1:1至1:6。
其中,TFT基板还包括降压组件和平行设置的多条数据线,其中,主像素区的主像素电极和辅像素区的辅像素电极电连接同一条数据线,以由同一条数据线提供电压,进一步通过降压组件降低辅像素电极的电压,使得主像素电极的电压大于辅像素电极的电压,从而实现主像素区的亮度大于辅像素区的亮度。
其中,TFT基板还包括扫描线和公共电极,降压组件为开关管,开关管的输入端电连接辅像素电极,开关管的输出端电连接公共电极,开关管的控制端电连接扫描线,在数据线向主像素电极和辅像素电极提供电压时,控制端接收扫描线提供的扫描驱动信号,使得输入端和输出端相互导通,从而使辅像素电极通过与公共电极电连接来放电,以达到降压的目的。
其中,TFT基板还包括扫描线和公共电极,降压组件包括开关管和耦合电容,开关管的输入端电连接辅像素电极,开关管的输出端电连接耦合电容,开关管的控制端电连接扫描线,耦合电容进一步与公共电极电连接,在数据线向主像素电极和辅像素电极提供电压后,控制端接收扫描线提供的扫描驱动信号,使得输入端和输出端相互导通,从而辅像素电极通过耦合电容耦合到公共电极,以达到降压的目的。
其中,降压组件包括耦合电容,耦合电容分别与数据线和辅像素电极电连接,使得数据线提供的电压通过耦合电容耦合到辅像素电极,以达到降压的目的。
其中,TFT基板包括多条相互平行的数据线,主像素区的主像素电极和辅像素区的辅像素电极分别接收两条不同的数据线提供的电压,其中,主像素电极接收的电压大于向辅像素电极接收的电压,从而实现主像素区的亮度大于辅像素区的亮度。
本发明的有益效果是:区别于现有技术的情况,本发明的TFT基板中的每一像素单元中,至少一亚像素单元为单一的像素区,其余的每一亚像素单元包括至少两个绝缘的像素区,且至少两个绝缘的像素区的亮度不同。因此,本发明的像素单元包括有分区的亚像素单元,并设置不同像素区的亮度不同,由此可以改善液晶面板的大视角特性。进一步的,本发明的像素单元中,有至少一亚像素单元为单一的像素区,即未进行分区显示,由此可以保持液晶面板具有较高的穿透率,从而节省背光模组的功耗,达到节省能源的目的。
【附图说明】
图1是本发明实施例提供的一种TFT基板的结构示意图;
图2是图1所示的其中一个像素单元的另一种结构示意图;
图3是本发明实施例提供的一种TFT基板的电路结构示意图;
图4是本发明实施例提供的一种TFT基板的另一种电路结构示意图。
图5是本发明实施例提供的一种TFT基板的又一种电路结构示意图。
图6是本发明实施例提供的一种TFT基板的又一种电路结构示意图。
图7是本发明实施例提供的一种液晶面板的结构示意图。
【具体实施方式】
请参阅图1,图1是本发明实施例提供的一种TFT基板的结构示意图。如图1所示,本发明实施例的TFT((Thin Film Transistor,是薄膜晶体管)基板100包括多个像素单元,如图1所示的像素单元11、12、13以及14。每一像素单元包括三个亚像素单元,如图1所示的,像素单元11包括亚像素110、111以及112。亚像素单元110、111以及112分别显示R(Red,红色)、G(Green,绿色)以及B(Blue,蓝色)三种颜色。
其中,在一像素单元中,至少一亚像素单元为单一的像素区,其余的每一亚像素单元包括至少两个绝缘的像素区,且至少两个绝缘的像素区的亮度不同。以图1所示的像素单元11举例说明,在像素单元110中,亚像素单元110和111为单一的像素区,即未进行分区。亚像素单元112包括了两个绝缘的像素区,分别为主像素区113和辅像素区114,且主像素区113和辅像素区114的亮度不同。
因此,本发明的像素单元包括有分区的亚像素单元112,并设置不同像素区的亮度不同,由此可以通过亚像素112来改善TFT基板10组成的液晶面板的大视角特性。进一步的,本发明的像素单元中,亚像素单元110和111为单一的像素区,由此可以保持液晶面板具有较高的穿透率,从而节省背光模组的功耗,达到节省能源的目的。
在本实施例中,在一像素单元中,亚像素单元优选包括两个绝缘的像素区,如图1所示,并且包括两个绝缘的像素区的亚像素单元的数量为一个或两个。其中,包括两个绝缘的像素区的亚像素单元的数量为一个的情况如图1所示和前文所述,在此不再赘述。
值得注意的是,在其他实施例中,还可以分别设置亚像素单元110或者111包括两个绝缘的像素区。
分别包括两个绝缘的像素区的亚像素单元的数量为两个的情况如图2所示。图2是图1所示的其中一个像素单元的另一种结构示意图。如图2的像素单元21中,亚像素单元210为单一像素区,亚像素单元211和212分别包括两个绝缘的像素区。具体为,亚像素单元211包括主像素区213和辅像素区214,亚像素单元212包括主像素区215和辅像素区216。同理,主像素区213和辅像素区214的亮度不同,主像素区215和辅像素区216的亮度也不同。
值得注意的是,在其他实施例中,还可以设置亚像素单元210和211分别包括两个像素区,或者设置亚像素单元210和212分别包括两个像素区。具体设置类似图2所示,在此不再赘述。
其中,针对前文所述的主像素区和辅像素区:优选设置主像素区的亮度大于辅像素区的亮度。其中,主像素区和辅像素区的面积比为1:1至1:6。设置主像素区的亮度大于辅像素区的亮度的具体实现过程将在下文详述。
其中,主像素区的亮度大于或等于单一的像素区的亚像素单元的亮度,例如图1所示的,主像素区113的亮度大于或等于亚像素单元110和111的亮度。
由于主像素区的亮度大于辅像素区的亮度,并且本发明实施例的像素单元中,只有一个或两个亚像素单元进行分区设置。如图1所示的像素单元11,由于只有亚像素单元112进行分区设置,其相比于现有的传统设计,低亮度的辅像素区的面积减少了2/3,因此液晶面板的亮度会得到提升,穿透率进一步提高。又如图2所示的像素单元21,由于只有亚像素单元211和212进行分区设置,其相比图1中现有的传统设计,低亮度的辅像素区的面积减少了1/3,所以面板的亮度会得到提升,穿透率同样会提高。
前文为在每一像素单元中,一个或两个亚像素单元包括两个像素区的实施例。在实际应用中,还可以设置一个亚像素单元包括两个以上的像素区。
进一步的,还可以对不同位置的像素单元中的分区的亚像素单元的数量进行不同的设置和/或对不同位置的像素单元中的亚像素单元的分区数量进行不同的设置,以此进一步改善大视角特性。
具体而言,在不同位置的像素单元中,包含至少两个像素区的亚像素单元的数量不同。例如在TFT基板10的中心位置处,每一个像素单元中有两个亚像素单元为单一区,其余的一个亚像素单元包含至少两个像素区;在TFT基板10的边缘位置处,每一个像素单元中有一个亚像素单元为单一区,其余的两个亚像素单元包含至少两个像素区。
同理,在不同位置的像素单元中,其进行分区的亚像素单元所包含的像素区的数量不同。例如在TFT基板10的中心位置处,每一个像素单元中的一个亚像素单元包含两个像素区;在TFT基板10的边缘位置处,每一个像素单元中的一个亚像素单元包含两个以上的像素区。
应理解,本发明还可以将上述的两种情况结合。也就是说,在不同位置的像素单元中,包含至少两个像素区的亚像素单元的数量不同并且包含的像素区的数量也不同。例如在TFT基板10的中心位置处,每一个像素单元中,有一个亚像素单元包含两个像素区;在TFT基板10的边缘位置处,每一个像素单元中,有两个亚像素单元包含两个以上的像素区。
另外,还可以对不同位置的像素单元中的主像素区和辅像素区之间的亮度差值进行不同的设置。例如在TFT基板10的中心位置处,主像素区和辅像素区的亮度差值设置得较小;在TFT基板10的边缘位置处,主像素区和辅像素区的亮度差值设置得大。
以上介绍的是每一像素单元包含R(Red,红色)、G(Green)以及B(Blue)三个亚像素单元的分区情况。在其他实施例中,每一像素单元还会包括R、G、B以及W(White,白色)四个亚像素单元,其中的亚像素单元的分区原理与像素单元包含三个亚像素单元时的一致,在此不再赘述。
请一并参阅图1和图3,图3是本发明实施例提供的一种TFT基板的电路结构示意图。其中,图3只举例了图1所示的像素单元11的电路结构示意图,应理解,其他的像素单元的电路结构类似。如图3所示,TFT基板10包括多条平行设置的数据线S31、S32以及S33、扫描线G31(图3只标示一条)、公共电极P0、分别设置在亚像素单元110、111以及112中的像素电极P1、P2以及P3以及分别设置在亚像素单元110、111以及112中的开关管K31、K32以及K33。其中开关管K31、K32以及K33的控制端电连接扫描线G31,开关管K31、K32以及K33的输入端分别电连接数据线S31、S32以及S33,开关管K31、K32以及K33的输出端分别电连接亚像素单元110、111以及112的像素电极P1、P2以及P3。值得注意的是,在包含有两个像素区的亚像素单元112中,开关管K33的输出端连接的是主像素区113的主像素电极P31。
在扫描线G31向开关管K31、K32以及K33提供扫描驱动信号后,开关管K31、K32以及K33的输入端和输出端相互导通,数据线S31、S32以及S33分别在给亚像素单元110、111的像素电极P1、P2以及亚像素单元112的主像素区113的主像素电极P31充电,使得像素电极P1和P2以及主像素电极P31分别和公共电极P0形成存储电容C1、C2以及C31。
进一步的,TFT基板10还包括开关管K34和降压组件15。其中,开关管K34的控制端和输入端同样分别电连接扫描线G31和数据线S33,开关管K34的输出端电连接辅像素区的辅像素电极P32,使得数据线S33给辅像素电极P32充电时,辅像素电极P32和公共电极P0形成存储电容C32。在亚像素单元112中,主像素区113的主像素电极P31和辅像素区114的辅像素电极P32电连接同一条数据线S33,以由同一条数据线S33提供电压。进一步的,亚像素单元112还通过降压组件15降低辅像素区114的辅像素电极P32的电压,使得主像素电极P31的电压大于辅像素电极P32的电压,从而实现主像素区113的亮度大于辅像素区114的亮度。其中,通过降压组件15来实现主像素区113的亮度大于辅像素区114的亮度的具体方式包括下文所述的三种:
第一种:如图3所示,在亚像素单元112中,降压组件15为开关管K35,开关管K35的输入端电连接辅像素电极P32,开关管K35的输出端电连接公共电极P0,开关管K35的控制端同样电连接扫描线G31。也就是说,在扫描线G31向开关管K33和K34提供扫描驱动信号,使得数据线S33向主像素电极P31和辅像素电极P32提供电压时,开关管K35的控制端同样接收到扫描线G31提供的扫描驱动信号,使得开关管K35的输入端和输出端相互导通,从而辅像素电极P32通过开关管K35与公共电极P0电连接来放电,这样辅像素电极P32的电位和主像素电极P31的电位相比会更加接近公共电极P0的电位,以达到降压的目的。在TFT基板10正常工作时,辅像素区114的显示亮度更低。由此可以通过亚像素单元112来实现改善液晶面板大视角的特性,而亚像素单元110和111则可以维持面板的较高穿透率。
第二种:请一并参阅图1和图4,图4是本发明实施例提供的一种TFT基板的另一种电路结构示意图。其中,图4只举例了图1所示的像素单元11的电路结构示意图,应理解,其他的像素单元的电路结构类似。如图4所示,TFT基板10依然包括平行设置的多条数据线S41、S42以及S43、扫描线G41和G42以及对应亚像素单元110、111以及112的开关管K41、K42以及K43。其中,数据线S41、S42以及S43、扫描线G41以及开关管K41、K42以及K43的连接方式分别和图3所示的数据线S31、S32以及S33、扫描线G31以及开关管K31、K32以及K33的相同,在此不再赘述。
其中,图4所示的电路结构与图3所示的电路结构的不同之处在于:图4所示的降压组件45包括开关管K45和耦合电容Cx1。其中,开关管K45的输入端电连接辅像素区114的辅像素电极P32,开关管K45的输出端电连接耦合电容Cx1,开关管K45的控制端电连接扫描线G42,耦合电容Cx1进一步与公共电极P0电连接。值得注意的是,本实施例的扫描线G42提供的扫描驱动信号比扫描线G41提供的扫描驱动信号延迟。由此,图4所示的亚像素单元112中,在扫描线G41向开关管K43和K44提供扫描驱动信号,使得数据线S43向主像素电极P31和辅像素电极P32提供电压后,扫描线G42才向开关管K45提供扫描驱动信号,即开关管K45的控制端才接收扫描线G42提供的扫描驱动信号,使得开关管K45的输入端和输出端相互导通,从而辅像素电极P32通过耦合电容Cx1和公共电极P0耦合,使得辅像素电极P32的电位更接近于公共电极P0的电位,以达到降压的目的。
第三种:请一并参阅图1和图5,图5是本发明实施例提供的一种TFT基板的又一种电路结构示意图。其中,图5只举例了图1所示的像素单元11的电路结构示意图,应理解,其他的像素单元的电路结构类似。如图5所示,TFT基板10依然包括平行设置的多条数据线S51、S52以及S53、扫描线G51以及对应亚像素单元110、111以及112的开关管K51、K52以及K53。其中,数据线S51、S52以及S53、扫描线G51以及开关管K51、K52的连接方式分别和图4所示的数据线S41、S42以及S43、扫描线G41以及开关管K41、K42的相同,在此不再赘述。
其中,图5所示的电路结构与图4所示的电路结构的不同之处在于:本实施例的降压组件55仅为耦合电容Cx2。耦合电容Cx2分别与数据线S53和辅像素电极P32电连接,使得数据线S53提供的电压通过耦合电容Cx2耦合到辅像素电极P32,也就是说,辅像素电极P32是受到耦合电路Cx2的偶合作用而被充电,因此辅像素电极P32的电位更接近于公共电极P0的电位,以达到降压的目的。相对主像素电极P31,辅像素电极P32的穿透率更低,从而实现了主像素区113和辅像素区114的亮度差异,达到了改善面板大视角的目的。
具体而言,开关管K53的控制端电连接扫描线G51、输入端电连接数据线S53,输出端除了与主像素电极P31电连接外,还与耦合电容Cx2的一个极电连接,耦合电容Cx2的另一个极与辅助电极P32电连接。由此,在扫描线G51向开关管K53提供扫描驱动信号时,开关管K53的输入端和输出端相互导通,使得数据线K53分别向主像素电极P31、耦合电容Cx2以及辅像素电极P32提供电压。由于耦合电容Cx2耦合在开关管K53的输出端和辅像素电极P32之间,因此,耦合电容Cx2降低了辅像素电极P32接收到的电压。
由于前文所述的方法是只需一条数据线向主像素电极和辅像素电极提供电压,因此具有驱动简单的优点。下文将介绍通过两条不同的数据线分别向主像素电极和辅像素电极提供不同电压的方案。
请一并参阅图1和图6所示,图6是本发明实施例提供的一种TFT基板的又一种电路结构示意图。其中,图6只举例了图1所示的像素单元11的电路结构示意图,应理解,其他的像素单元的电路结构类似。如图6所示,TFT基板10依然包括平行设置的多条数据线S61、S62、63以及S64、扫描线G61、以及对应亚像素单元110、111以及112的开关管K61、K62以及K63。其中,数据线S61、S62以及S63、扫描线G61以及开关管K61、K62以及K63的连接方式分别和图3所示的数据线S31、S32以及S33、扫描线G31以及开关管K31、K32以及K33的相同,在此不再赘述。
其中,图6所示的电路结构与图3所示的电路结构的不同之处在于:图6所示的主像素电极p31和辅像素电极P32分别接收两条不同的数据线提供的电压。其中,主像素电极p31接收的电压大于向辅像素电极P32接收的电压,从而实现主像素区113的亮度大于辅像素区114的亮度。
具体而言,图6所示的TFT基板10还包括开关管K64,其中开关管K64的控制端连接扫描线G61,开关管K64的输入端连接数据线S64,开关管K64的输出端连接辅像素电极P32。在扫描线G61向开关管K63和K64提供扫描驱动信号时,开关管K63和K64的输入端和输出端相互导通,使得数据线S63和S64分别对主像素电极P31和辅像素电极P32充电。其中数据线S63提供的电压大于数据线S64提供的电压,使得主线像素电极P31接收到的电压大于辅像素电极P32接收到的电压,从而实现主像素区113的亮度大于辅像素区114的亮度。
由于图6所示的电路结构只需要两条不同的数据线即可实现主像素区113的亮度大于辅像素区114的亮度,结构简单、节省其余的元器件,从而节省成本。
请参阅图7,本发明实施例还提供了一种液晶面板,该晶面板70包括相对设置的CF(color filter,彩色滤光片)基板71、TFT基板72以及设置在CF基板和TFT基板之间的液晶层73。其中TFT基板72为前文所述的TFT基板10。CF基板71上设置有多个色阻区(图未示),色阻区和TFT基板72上的亚像素单元一一对应。
综上所述,本发明的像素单元包括有分区的亚像素单元,并设置不同像素区的亮度不同,由此可以改善TFT基板10组成的液晶面板的大视角特性。进一步的,本发明的像素单元中,有至少一亚像素单元为单一的像素区,即未进行分区显示,由此可以保持液晶面板具有较高的穿透率,从而节省背光模组的功耗,达到节省能源的目的。
以上所述仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种TFT基板,其中,所述TFT基板包括多个像素单元,每一像素单元包括三个亚像素单元,其中,在一所述像素单元中,至少一所述亚像素单元为单一的像素区,其余的每一所述亚像素单元包括两个绝缘的像素区,分别为主像素区和辅像素区,其中,所述主像素区的亮度大于所述辅像素区的亮度,所述主像素区和所述辅像素区的面积比范围为1:1至1:6,进一步的,所述主像素区的亮度大于或等于所述单一的像素区的亚像素单元的亮度。
  2. 根据权利要求1所述的TFT基板,其中,所述TFT基板还包括降压组件和平行设置的多条数据线,其中,所述主像素区的主像素电极和所述辅像素区的辅像素电极电连接同一条所述数据线,以由同一条所述数据线提供电压,进一步通过所述降压组件降低所述辅像素电极的电压,使得所述
  3. 一种TFT基板,其中,所述TFT基板包括多个像素单元,每一像素单元包括三个亚像素单元,其中,在一所述像素单元中,至少一所述亚像素单元为单一的像素区,其余的每一所述亚像素单元包括至少两个绝缘的像素区,且所述至少两个绝缘的像素区的亮度不同。
  4. 根据权利要求3所述的TFT基板,其中,每一像素单元中的其中一个所述亚像素单元包括至少两个绝缘的所述像素区。
  5. 根据权利要求3所述的TFT基板,其中,每一像素单元中的其中两个所述亚像素单元包括至少两个绝缘的所述像素区。
  6. 根据权利要求3所述的TFT基板,其中,所述其余的每一亚像素单元包括两个绝缘的像素区,分别为主像素区和辅像素区,其中,所述主像素区的亮度大于所述辅像素区的亮度,所述主像素区和所述辅像素区的面积比范围为1:1至1:6。
  7. 根据权利要求6所述的TFT基板,其中,所述TFT基板还包括降压组件和平行设置的多条数据线,其中,所述主像素区的主像素电极和所述辅像素区的辅像素电极电连接同一条所述数据线,以由同一条所述数据线提供电压,进一步通过所述降压组件降低所述辅像素电极的电压,使得所述主像素电极的电压大于所述辅像素电极的电压,从而实现所述主像素区的亮度大于所述辅像素区的亮度。
  8. 根据权利要求7所述的TFT基板,其中,所述TFT基板还包括扫描线和公共电极,所述降压组件为开关管,所述开关管的输入端电连接所述辅像素电极,所述开关管的输出端电连接所述公共电极,所述开关管的控制端电连接所述扫描线,在所述数据线向所述主像素电极和辅像素电极提供电压时,所述控制端接收所述扫描线提供的扫描驱动信号,使得所述输入端和所述输出端相互导通,从而使所述辅像素电极通过与所述公共电极电连接来放电,以达到降压的目的。
  9. 根据权利要求7所述的TFT基板,其中,所述TFT基板还包括扫描线和公共电极,所述降压组件包括开关管和耦合电容,所述开关管的输入端电连接所述辅像素电极,所述开关管的输出端电连接所述耦合电容,所述开关管的控制端电连接所述扫描线,所述耦合电容进一步与所述公共电极电连接,在所述数据线向所述主像素电极和辅像素电极提供电压后,所述控制端接收所述扫描线提供的扫描驱动信号,使得所述输入端和所述输出端相互导通,从而所述辅像素电极通过所述耦合电容耦合到所述公共电极,以达到降压的目的。
  10. 根据权利要求7所述的TFT基板,其中,所述降压组件包括耦合电容,所述耦合电容分别与所述数据线和所述辅像素电极电连接,使得所述数据线提供的电压通过所述耦合电容耦合到所述辅像素电极,以达到降压的目的。
  11. 根据权利要求6所述的TFT基板,其中,所述TFT基板包括多条相互平行的数据线,主像素区的主像素电极和辅像素区的辅像素电极分别接收两条不同的所述数据线提供的电压,其中,所述主像素电极接收的电压大于向所述辅像素电极接收的电压,从而实现所述主像素区的亮度大于所述辅像素区的亮度。
  12. 一种液晶面板,其中,所述液晶面板包括一TFT基板,所述TFT基板包括多个像素单元,每一像素单元包括三个亚像素单元,其中,在一所述像素单元中,至少一所述亚像素单元为单一的像素区,其余的每一所述亚像素单元包括至少两个绝缘的像素区,且所述至少两个绝缘的像素区的亮度不同。
  13. 根据权利要求12所述的液晶面板,其中,每一像素单元中的其中一个所述亚像素单元包括至少两个绝缘的所述像素区。
  14. 根据权利要求12所述的液晶面板,其中,每一像素单元中的其中两个所述亚像素单元包括至少两个绝缘的所述像素区。
  15. 根据权利要求12所述的液晶面板,其中,所述其余的每一亚像素单元包括两个绝缘的像素区,分别为主像素区和辅像素区,其中,所述主像素区的亮度大于所述辅像素区的亮度,所述主像素区和所述辅像素区的面积比范围为1:1至1:6。
  16. 根据权利要求15所述的液晶面板,其中,所述TFT基板还包括降压组件和平行设置的多条数据线,其中,所述主像素区的主像素电极和所述辅像素区的辅像素电极电连接同一条所述数据线,以由同一条所述数据线提供电压,进一步通过所述降压组件降低所述辅像素电极的电压,使得所述主像素电极的电压大于所述辅像素电极的电压,从而实现所述主像素区的亮度大于所述辅像素区的亮度。
  17. 根据权利要求16所述的液晶面板,其中,所述TFT基板还包括扫描线和公共电极,所述降压组件为开关管,所述开关管的输入端电连接所述辅像素电极,所述开关管的输出端电连接所述公共电极,所述开关管的控制端电连接所述扫描线,在所述数据线向所述主像素电极和辅像素电极提供电压时,所述控制端接收所述扫描线提供的扫描驱动信号,使得所述输入端和所述输出端相互导通,从而使所述辅像素电极通过与所述公共电极电连接来放电,以达到降压的目的。
  18. 根据权利要求16所述的液晶面板,其中,所述TFT基板还包括扫描线和公共电极,所述降压组件包括开关管和耦合电容,所述开关管的输入端电连接所述辅像素电极,所述开关管的输出端电连接所述耦合电容,所述开关管的控制端电连接所述扫描线,所述耦合电容进一步与所述公共电极电连接,在所述数据线向所述主像素电极和辅像素电极提供电压后,所述控制端接收所述扫描线提供的扫描驱动信号,使得所述输入端和所述输出端相互导通,从而所述辅像素电极通过所述耦合电容耦合到所述公共电极,以达到降压的目的。
  19. 根据权利要求16所述的液晶面板,其中,所述降压组件包括耦合电容,所述耦合电容分别与所述数据线和所述辅像素电极电连接,使得所述数据线提供的电压通过所述耦合电容耦合到所述辅像素电极,以达到降压的目的。
  20. 根据权利要求15所述的液晶面板,其中,所述TFT基板包括多条相互平行的数据线,主像素区的主像素电极和辅像素区的辅像素电极分别接收两条不同的所述数据线提供的电压,其中,所述主像素电极接收的电压大于向所述辅像素电极接收的电压,从而实现所述主像素区的亮度大于所述辅像素区的亮度。
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