WO2016197419A1 - 一种蓝相液晶显示面板及其制作方法 - Google Patents
一种蓝相液晶显示面板及其制作方法 Download PDFInfo
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- WO2016197419A1 WO2016197419A1 PCT/CN2015/082532 CN2015082532W WO2016197419A1 WO 2016197419 A1 WO2016197419 A1 WO 2016197419A1 CN 2015082532 W CN2015082532 W CN 2015082532W WO 2016197419 A1 WO2016197419 A1 WO 2016197419A1
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- crystal display
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/137—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0212—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or coating of substrates
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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Definitions
- the present invention relates to the field of display of liquid crystal displays, and more particularly to a blue phase liquid crystal display panel and a method of fabricating the same.
- blue phase liquid crystal display In recent years, with the in-depth study of liquid crystal display technology, the advantages of blue phase liquid crystal display have been more and more widely recognized. Compared with liquid crystal materials widely used at present, blue phase liquid crystals have many outstanding advantages such as fast response speed, wide viewing angle, and no alignment treatment. At the same time, however, the problem of excessive driving voltage faced by blue phase liquid crystals has severely limited its development. In response to this problem, the current industry generally adopts a method of improving the performance of a blue phase liquid crystal material or optimizing the structure of a driving electrode of a blue phase liquid crystal display to reduce the driving voltage required for the blue phase liquid crystal.
- Improving the performance of the blue phase liquid crystal material mainly means obtaining a blue phase liquid crystal having a large Kerr constant by improving the preparation process of the material.
- the process of synthesizing the blue phase liquid crystal material is a very complicated process, for example, in preparing a polymer-stable blue phase liquid crystal, a series of factors such as a monomer, a photoinitiator, and a synthesis condition are required, and thus the research and development cost is high.
- the blue phase liquid crystal display mainly adopts the driving method in the form of In-Plane Switching (IPS). Therefore, the structure of the optimized driving electrode mainly refers to increasing the height of the electrode or changing the shape of the electrode, such as a wedge electrode, a wave electrode, A trapezoidal electrode or the like is used to reinforce the strength of the horizontal electric field generated by the parallel transparent insulated electrode.
- IPS In-Plane Switching
- the above electrodes are difficult to manufacture, and the quality of the electrodes is difficult to ensure, resulting in a decrease in the yield of the product.
- One of the technical problems to be solved by the present invention is to provide a method for effectively reducing the driving voltage of a blue phase liquid crystal.
- an embodiment of the present application first provides a blue phase liquid crystal display panel, including a lower substrate and an upper substrate, wherein the lower substrate is provided with a first common electrode and a first pixel electrode.
- the first common electrode and the first pixel electrode generate a distributed first fringe electric field;
- the second common electrode and the second pixel electrode generate a distributed second fringe electric field; wherein the vertical electric field components of the first fringe electric field and the second fringe electric field are mutually weakened, and the horizontal electric field components are mutually enhanced.
- the method further includes a substrate control module and a signal synchronization module disposed on the at least one substrate, wherein the substrate control module is configured to control loading of a driving voltage signal of the pixel electrode, and the signal synchronization module is configured to synchronize the driving Voltage signal.
- the signal synchronization module includes a plurality of connection electrodes disposed on the upper substrate and a plurality of extension electrodes disposed on the lower substrate, wherein the connection electrodes are correspondingly connected to the extension electrodes.
- the extension electrode is disposed in a non-display area other than the pixel unit of the lower substrate, and the connection electrode is disposed at a position on the upper substrate corresponding to the extension electrode.
- the number of extension electrodes is equal to the number of pixel units included in the lower substrate.
- connection electrode comprises a truncated cone core and a conductor layer applied to the outer surface of the core.
- the material of the core comprises an elastic material.
- An embodiment of the present application further provides a method for fabricating a blue phase liquid crystal display panel substrate, comprising: patterning a first common electrode on a prefabricated lower substrate; and coating a first insulating layer on the first common electrode Forming a first pixel electrode on the first insulating layer, and patterning the extended electrode in a non-display area other than the pixel unit of the lower substrate.
- a method for fabricating a blue phase liquid crystal display panel substrate comprising: patterning a second common electrode on a prefabricated upper substrate; and coating a second insulating layer on the second common electrode; Patterning a support pillar on the second insulating layer, and simultaneously patterning a core forming a connection electrode at a position corresponding to the extension electrode; patterning a second pixel electrode on the second insulation layer, and A conductor layer connecting the electrodes is formed in synchronization with the outer surface of the core of the connection electrode.
- a support pillar is patterned on the second insulating layer and at a position corresponding to the extended electrode
- the step of simultaneously patterning the core forming the connection electrode further comprises: sequentially forming a material layer and a photoresist layer for forming the main support pillar, the sub-support pillar, and the connection electrode on the cleaned insulating layer; Exposing and developing the photoresist layer by using a multi-gray reticle; etching part of the material layer and ashing part of the photoresist layer to expose the sub-support pillar region and the material layer connecting the electrode regions; etching the exposed material
- the layer forms a sub-support column while forming a core having a connection electrode height of the sub-support column; the remaining photoresist is peeled off to form a main support column.
- the horizontal electric field between the two substrates is enhanced, the vertical electric field is weakened, and the driving voltage required for the blue phase liquid crystal is lowered.
- FIG. 1(a)-(b) are schematic structural views of a blue phase liquid crystal display panel according to an embodiment of the present application, wherein FIG. 1(a) is a front view of a blue phase liquid crystal display panel, and FIG. 1(b) is a blue phase liquid crystal display. a top view of the upper substrate and the lower substrate of the panel;
- FIG. 2 is a schematic diagram of electric field distribution between substrates of a blue phase liquid crystal display panel according to an embodiment of the present application
- FIG. 3 is a schematic view showing the arrangement of electrodes of a blue phase liquid crystal display panel according to an embodiment of the present application
- FIG. 4 is a top plan view of a blue phase liquid crystal display panel according to another embodiment of the present application.
- Figure 5 is a cross-sectional view of the upper and lower substrates of Figure 4 taken along the line I-I' after being assembled into a box;
- FIG. 6(a)-(b) are schematic flow diagrams showing a method of fabricating a blue phase liquid crystal display panel according to an embodiment of the present application, wherein FIG. 6(a) is a schematic flow chart of a method for fabricating a lower substrate, and FIG. 6(b) is a schematic diagram A schematic flow chart of a method of fabricating a substrate.
- the electrodes are symmetrically arranged in a mirror image form on the lower substrate 11 and the upper substrate 12 of the liquid crystal display panel, respectively, as shown in Fig. 1(a).
- 1(a) is a front view of a blue phase liquid crystal display panel, on which a first common electrode 111 and a first pixel electrode 112 are disposed, and a second common electrode 121 and a second pixel electrode are disposed on the upper substrate 12. 122.
- the common electrodes 111 and 121, and the pixel electrodes 112 and 122 are disposed parallel to the substrate.
- An insulating layer 113 is further disposed between the first common electrode 111 and the first pixel electrode 112, and an insulating layer 123 is further disposed between the second common electrode 121 and the second pixel electrode 122.
- 3 is a blue phase liquid crystal molecule filled between the two substrates.
- the lower substrate 11 in the figure corresponds to an array substrate of a liquid crystal display
- the upper substrate 12 corresponds to a color filter substrate of a liquid crystal display
- a black matrix, a color filter array, and a transparent electrode are generally disposed on the color filter substrate (
- the common structure) and the like do not affect the specific embodiment of the present application, and thus the above structures are not shown in the drawings.
- a set of substrate driving modules are respectively disposed on the upper and lower substrates, as shown in FIG. 1(b).
- 1(b) is a plan view of a substrate and a lower substrate of a blue phase liquid crystal display panel, and a lower substrate control module is disposed on the lower substrate 11 (the lower substrate control module mainly includes a plurality of data lines 114, a plurality of scan lines 115, and data A plurality of switching elements 116) disposed in a plurality of pixel units formed orthogonally to the scan lines.
- An upper substrate control module is disposed on the upper substrate 12 (the upper substrate control module mainly includes a plurality of data lines 124, a plurality of scan lines 125, and a plurality of switches disposed in a plurality of pixel units formed by orthogonally forming the data lines and the scan lines Element 126).
- the upper and lower substrate control modules are respectively configured to control loading of driving voltage signals of the pixel electrodes on the upper substrate and the lower substrate.
- a signal synchronizing module for synchronizing the driving voltage signals of the pixel electrodes on the upper substrate and the lower substrate is also provided, and the signal synchronizing module is not shown in the drawing.
- a distributed first fringe electric field is generated between the first common electrode 111 and the first pixel electrode 112. Also, since the second common electrode 121 and the second pixel electrode 122 have the same arrangement, a distributed second fringe electric field is generated between the second common electrode 121 and the second pixel electrode 122.
- the fringe electric field can rotate the blue phase liquid crystal molecules located above the pixel electrode, which is favorable for improving the transmittance of the liquid crystal display panel and Increase the viewing angle of the liquid crystal display panel.
- FIG. 2 is a schematic diagram of electric field distribution between substrates of a blue phase liquid crystal display panel according to an embodiment of the present application.
- the horizontal electric field component of the first fringe electric field generated by the first common electrode and the first pixel electrode is equal in size and direction in the horizontal direction, and after spatial superposition, the horizontal electric field component between the two substrates is made It is strengthened as shown by the electric field lines indicated by the solid lines in FIG.
- the vertical electric field component between the two substrates is divided into two parts, a part of which is a vertical electric field component of the distributed fringe electric field generated by the first (second) common electrode and the first (second) pixel electrode, a part of which is A vertical electric field component of an electric field generated by the first (second) common electrode and the second (first) pixel electrode.
- the vertical electric field between the two substrates is weakened by the superposition of the first fringe electric field and the second fringe electric field (wherein the superposition of the vertical electric field components further includes the first (second) common electrode and the second (first The superposition of the vertical electric field component of the electric field generated by the pixel electrode enhances the intensity of the horizontal electric field between the two substrates, which is advantageous for lowering the driving voltage required for the blue phase liquid crystal display panel.
- the specific structure of the common electrode and the pixel electrode is not limited, and only an effective fringe electric field can be generated between the common electrode and the pixel electrode.
- the common electrode may also adopt a corresponding comb structure, which is advantageous for weakening the first (second) pixel electrode and the first (second) common electrode and the first A vertical electric field between the (second) pixel electrode and the second (first) common electrode to increase the efficiency of the liquid crystal. I will not repeat them here.
- FIG. 3 is a schematic view showing the arrangement of electrodes of a blue phase liquid crystal display panel according to an embodiment of the present invention.
- 31 is a pixel electrode (or a common electrode)
- 32 is a corresponding common electrode (or a pixel electrode).
- the signal synchronization module is configured to include a plurality of connection units.
- Each of the connecting units is composed of a connecting electrode and an extending electrode for connecting the second pixel electrode of the upper substrate and the first pixel electrode of the lower substrate, and further controlled by a switching element of the single-sided substrate.
- the pixel electrodes of the upper and lower substrates are used to realize the synchronous driving of the first pixel electrode and the second pixel electrode, and the blue phase liquid crystal driving voltage is reduced, and a set of substrate driving modules can be saved, which simplifies the processing technology. 4 and FIG. 5 are explained.
- FIG. 4 is a top plan view of a blue phase liquid crystal display panel according to another embodiment of the present application.
- 42 is an upper substrate, which corresponds to a color filter substrate
- 41 is a lower substrate, which corresponds to an array substrate.
- the arrangement of the pixel electrode and the common electrode on the upper substrate and the lower substrate is the same as that of the previous embodiment, and includes a first common electrode 411, a first pixel electrode 412, a second common electrode 421, a second pixel electrode 422, and a lower substrate.
- the upper data line 414, the scan line 415 and the switching element 416 are not described here.
- the upper substrate driving module including the data lines, the scanning lines, and the switching elements is no longer disposed on the upper substrate 42.
- a portion of the signal synchronization module 47 is provided in a region corresponding to the pixel unit of the lower substrate (an area surrounded by a rectangular dotted frame in the drawing).
- the complete structure of the signal synchronization module is shown in Figure 5.
- Figure 5 is a cross-sectional view of the upper and lower substrates of Figure 4 taken along the line I-I' after being assembled into a box.
- the signal synchronization module 47 includes a plurality of connection electrodes 472 disposed on the upper substrate and a plurality of extension electrodes 471 disposed on the lower substrate.
- the connection electrode 472 and the extension electrode 471 are connected together after the upper substrate and the lower substrate are assembled into a liquid crystal cell, so that it can pass through one side (the lower substrate side in the embodiment of the present application).
- the switching element simultaneously controls the pixel electrodes on the two substrates.
- the connection electrode 472 is composed of a core 4721 and a conductor layer 4722 applied to the outer surface of the core.
- the core 4721 has a truncated cone shape, which facilitates coating of the conductor layer 4722 thereon.
- the material of the core is generally selected from an elastic material such as a UV-curable acrylic resin or the like.
- the material of the conductor layer is the same as that of the pixel electrode, such as ITO.
- the structure having an elastic core inside can make the connecting electrode have a certain compressibility, thereby ensuring that the pixel electrode on the two substrates can be effectively connected to the extending electrode through the connecting electrode.
- a plurality of supporting support spacers including a main support column and a sub-support column, are disposed between the upper substrate and the lower substrate of the liquid crystal display panel.
- the main support column plays a main supporting role for maintaining the gap between the two substrates, that is, the thickness of the liquid crystal cell.
- the auxiliary support column serves as an auxiliary support, mainly to prevent the liquid crystal panel from being damaged when pressed by an external force.
- the height of the main support column is higher than the height of the auxiliary support column, and the density of the main support column is small, and the density of the auxiliary support column is large.
- connection electrodes in the embodiments of the present application are distributed in the main and sub support pillar structures, and the height of the connection electrodes (the height of the connection electrodes referred to below refers to the overall height including the thickness of the extension electrodes) is greater than that of the sub
- the height of the support column is smaller than the height of the main support column, and the connection electrode is smaller than the overall size
- the size of the main support column which reduces the density of the connecting electrodes so that they do not affect the performance of the main support column.
- the overall size of the connecting electrode mainly refers to the height of the column and the diameter of the top surface (or bottom surface) of the column.
- the opposite substrate can be just placed, and the connecting electrode needs to have a certain amount of compression.
- the preferred range of compression is from 0.01 to 0.5 ⁇ m, or from 0.01 to 0.2 ⁇ m.
- the height of the connection electrode can be set in the range of 2.5 (3-0.5) to 2.99 (3-0.01) ⁇ m. .
- connection units included in the signal synchronization module is equal to the number of pixel units included in the lower substrate, and the signal synchronization module is disposed in a non-display area other than the pixel unit of the lower substrate.
- a connection unit is disposed for each pixel unit, wherein the extension electrode may be disposed on a data line or a scan line of the lower substrate, or may be disposed at an intersection of the data line and the scan line (as shown in FIG. 4). It may also be disposed at a position corresponding to the black matrix of the upper substrate, and the connection electrode is disposed at a position on the upper substrate corresponding to the extension electrode. Since the signal synchronization module does not occupy the display area of the pixel unit, it does not affect the display effect of the liquid crystal display panel.
- connection position of the connection electrode and the extension electrode is set, that is, the connection electrode is disposed on the lower substrate, and the extension electrode is disposed on the upper substrate can also be used to implement the embodiment of the present application.
- the signal synchronization module in the embodiment of the present invention connects the pixel electrodes on the two substrates by the cooperation of the connection electrode and the extension electrode, thereby realizing the synchronous control of the pixel electrodes of the double-sided substrate by the switching elements of the single-sided substrate, thereby
- the substrate driving module can be provided only on the one-sided substrate, which reduces the manufacturing process of one substrate.
- the connecting electrodes can play a certain supporting role, so that the assembled liquid crystal display panel has better mechanical strength.
- FIG. 6(a)-(b) are schematic flow diagrams showing a method of fabricating a blue phase liquid crystal display panel according to an embodiment of the present application, wherein FIG. 6(a) is a schematic flow chart of a method for fabricating a lower substrate, and FIG. 6(b) is a schematic diagram A schematic flow chart of a method of fabricating a substrate.
- the method for fabricating the lower substrate includes the following steps: step S611, patterning a first common electrode on the prefabricated lower substrate; and step S612, coating the first common electrode to form a first Insulating layer; step S613, patterning a first pixel electrode on the first insulating layer, and patterning the extended electrode in a non-display area other than the pixel unit of the lower substrate.
- the prefabricated lower substrate generally refers to a gate, a scan line, and a common body in which a thin film transistor has been formed.
- the array substrate of a structure such as a common one can be obtained according to the process in the prior art, and the process of the process does not affect the specific implementation of the embodiment of the present application, and thus is not described herein again.
- the first common electrode is connected to the common line.
- the step of patterning the first common electrode on the prefabricated lower substrate may further include sputtering, photolithography, or the like according to the structure of the first common electrode.
- the first common electrode is a monolithic planar electrode
- the first common electrode is formed by a sputtering film forming process.
- the first common electrode has a specific shape, such as a comb electrode
- a photolithographic process is performed after the film formation process to form a pattern of the first common electrode.
- the process of patterning specifically includes process steps of cleaning, film formation, coating photoresist, exposure, development, etching, and stripping of photoresist, and the above processes can be carried out by referring to the existing process flow for fabricating substrates.
- the first insulating layer is simultaneously formed in the step of forming the gate insulating layer of the thin film transistor.
- the material of the insulating layer can be formed by a CVD film forming process using SiNx.
- the fabrication of the semiconductor layer, the source and the drain of the thin film transistor, and the passivation layer covering the thin film transistor are sequentially performed.
- the patterning is synchronously patterned to form the first pixel electrode and the extension electrode.
- the extension electrode is located in a non-display area other than the pixel unit of the lower substrate.
- the extension electrode is patterned on the data line or the scan line by using a mask having a different shape, or at the intersection of the data line and the scan line, or at a position corresponding to the black matrix of the upper substrate.
- the method for fabricating the upper substrate includes the following steps: step S621, patterning a second common electrode on the pre-formed substrate; and step S622, coating the second common electrode to form a second An insulating layer; step S623, patterning a support pillar on the second insulating layer, and simultaneously patterning a core forming a connection electrode at a position corresponding to the extension electrode; and step S624, on the second insulation layer
- the second pixel electrode is patterned to form a conductor layer of the connection electrode in synchronization with the outer surface of the core of the connection electrode.
- the prefabricated upper substrate generally refers to a color filter substrate on which a black matrix layer (BM layer) and a color resist layer (CF layer) have been formed.
- BM layer black matrix layer
- CF layer color resist layer
- the second common electrode is connected to the common line.
- This step is substantially the same as the process of patterning the first common electrode, and includes the steps of cleaning, film formation, coating photoresist, exposure, development, etching, and stripping photoresist, and can refer to the existing process for fabricating the substrate. The process proceeds and will not be described here.
- a second insulating layer is formed on the generated second common electrode, and the material of the second insulating layer may be formed by a CVD film forming process using SiNx.
- the core connecting the electrodes is formed in synchronization with the main support column and the sub-support column. Washed SiNx insulation
- the material for preparing the main support column, the sub-support column and the connection electrode and the photoresist material are sequentially coated on the layer, and then dried, pre-baked and cooled to form a material layer and a photoresist layer of the support column.
- the height of the main support column region, the height of the sub-support column region, and the height of the connection electrode region are formed by a multiple-tone ray mask (Triple Tone).
- the multi-gray reticle used has three regions having different transmittances, a region having a transmittance of 100% without a light-shielding film, a region having a light-shielding film having a transmittance of 0, and a gray-scale region having a transmittance between the regions. .
- the photoresist layer is sequentially exposed and developed by the multi-gray mask.
- the treated photoresist layer can be divided into three regions.
- the photoresist material of the first region is completely retained for forming the main support column.
- a portion of the photoresist material of the second region is retained for forming the sub-support pillars and the connection electrodes.
- the photoresist material of the third region is completely removed.
- the residual photoresist material and the pillar material layer of the third region are removed by etching to form a pattern of each support pillar region.
- the photoresist layers of the remaining two regions are ashed, the photoresist material of the second region is completely removed, the material layer forming the sub-support pillar region and the connection electrode region is exposed, and the sub-support pillar is further formed by etching.
- the pattern of the region, and the height of the connection electrode formed at the connection electrode region formed at this time coincides with the height of the sub-support column of the sub-support column region.
- the remaining photoresist of the first region is stripped to form a pattern of the main support pillar region.
- connection electrode is made of the same material as the main support column and the sub-support column.
- the resin material with elasticity is selected, and the expansion coefficient of the material is also similar to that of the blue phase liquid crystal, so that the connecting electrode can be compressed and changed with the main support column along with the liquid crystal in a certain range during the manufacturing process of the panel, contributing to the product.
- the improvement in yield At the same time, it will not affect the picture quality of the liquid crystal display when it encounters high and low temperature heat rise or cold shrinkage.
- the second pixel electrode and the conductor layer connecting the electrodes may be formed in synchronization, and the specific process is the same as the step of patterning the second common electrode, and details are not described herein again. Since the surface of the connection electrode has a slope, a metal layer (ie, an ITO layer) is uniformly formed on the inclined side surface of the connection electrode during the film formation of the Sputter for forming the first pixel electrode and the second pixel electrode. The path between.
- a metal layer ie, an ITO layer
- the thickness of the pixel electrode is Left and right, the thickness of the conductor layer formed on the connection electrode core plus the extension electrode (the thickness of the extension electrode is the same as the thickness of the pixel electrode) plus the height of the support pillar core can make the height of the formed connection electrode larger than that of the pair The height of the support column is less than the height of the main support column.
- the connecting electrode and the extended electrode structure in the embodiment of the present application can be completed by modifying some process steps on the basis of the existing process, without significantly increasing the process steps, without re-arranging the production line, saving the production cost. Conducive to the promotion of applications and quality control.
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Abstract
一种蓝相液晶显示面板及其制作方法,蓝相液晶显示面板包括下基板(11)与上基板(12),通过在上基板(11)与下基板(12)上分别设置像素电极(112,122)与公共电极(111,121),并分别产生第一边缘电场与第二边缘电场,使两基板(11,12)之间的水平电场得到增强,竖直电场得到削弱,降低了蓝相液晶所需的驱动电压。
Description
相关申请的交叉引用
本申请要求享有2015年06月12日提交的名称为“一种蓝相液晶显示面板及其制作方法”的中国专利申请CN201510324333.4的优先权,该申请的全部内容通过引用并入本文中。
本发明涉及液晶显示器的显示领域,尤其涉及一种蓝相液晶显示面板及其制作方法。
近年来,随着对液晶显示技术的深入研究,蓝相液晶在显示方面的优势获得了越来越普遍的认可。与目前广泛使用的液晶材料相比,蓝相液晶具有响应速度快、视角广、不需要配向处理等诸多突出的优点。但是同时,蓝相液晶所面临的驱动电压过大的问题,也严重地限制了其发展。针对这个问题,目前业界一般采用改进蓝相液晶材料的性能或者优化蓝相液晶显示器的驱动电极的结构的方式来降低蓝相液晶所需的驱动电压。
改进蓝相液晶材料的性能主要是指通过改进材料的制备过程来得到大克尔常数的蓝相液晶。但由于合成蓝相液晶材料的过程是个非常复杂的过程,例如在制备聚合物稳定的蓝相液晶时就需要考虑单体、光引发剂、合成条件等一系列因素,因此研发成本很高。
蓝相液晶显示器主要采用平面转换(In-Plane Switching,IPS)形式的驱动方式,因此,优化驱动电极的结构主要是指通过增加电极的高度或者改变电极的形状,例如楔形电极,波浪形电极、梯形电极等来加强平行透明绝缘电极所产生的水平向电场的强度。但上述电极的制作难度较大,电极的质量难于保证,导致产品的良品率下降。
综上,亟需一种可以有效地降低蓝相液晶的驱动电压的方法以解决上述问题。
发明内容
本发明所要解决的技术问题之一是需要提供一种可以有效地降低蓝相液晶的驱动电压的方法。
为了解决上述技术问题,本申请的实施例首先提供了一种蓝相液晶显示面板,包括下基板与上基板,其中,所述下基板,其上设置有第一公共电极与第一像素电极,所述第一公共电极与所述第一像素电极产生分布的第一边缘电场;所述上基板,其上与所述下基板对称地设置有第二公共电极与第二像素电极,所述第二公共电极与所述第二像素电极产生分布的第二边缘电场;其中,所述第一边缘电场与所述第二边缘电场各自的竖直电场分量相互削弱,且水平电场分量相互增强。
优选地,还包括设置在至少一个基板上的基板控制模块与信号同步模块,其中,所述基板控制模块用于控制像素电极的驱动电压信号的加载,所述信号同步模块用于同步所述驱动电压信号。
优选地,信号同步模块包括设置于所述上基板上的多个连接电极与设置于所述下基板上的多个延伸电极,其中,所述连接电极与所述延伸电极对应连接。
优选地,延伸电极设置于下基板的像素单元以外的非显示区域内,所述连接电极设置于上基板上与所述延伸电极的对应的位置处。
优选地,延伸电极的个数等于下基板所包含的像素单元的个数。
优选地,连接电极包括圆台形芯体以及涂覆于所述芯体外表面的导体层。
优选地,芯体的材料包括弹性材料。
本申请的实施例还提供了一种制作蓝相液晶显示面板基板的方法,包括:在预制下基板上图案化形成第一公共电极;在所述第一公共电极上涂覆形成第一绝缘层;在所述第一绝缘层上图案化形成第一像素电极,并于所述下基板的像素单元以外的非显示区域内同步图案化形成延伸电极。
另一方面,还提供了一种制作蓝相液晶显示面板基板的方法,包括:在预制上基板上图案化形成第二公共电极;在所述第二公共电极上涂覆形成第二绝缘层;在所述第二绝缘层上图案化形成支撑柱,并于对应于延伸电极的位置处同步图案化形成连接电极的芯体;在所述第二绝缘层上图案化形成第二像素电极,并于所述连接电极的芯体的外表面同步图案化形成连接电极的导体层。
优选地,在所述第二绝缘层上图案化形成支撑柱,并于对应于延伸电极的位
置处同步图案化形成连接电极的芯体的步骤中进一步包括:在经过洗净的绝缘层上依次涂覆形成用于制作主支撑柱、副支撑柱以及连接电极的材料层与光阻层;利用多灰阶光罩对所述光阻层进行曝光与显影处理;刻蚀部分材料层并灰化部分光阻层使形成副支撑柱区域与连接电极区域的材料层显露;刻蚀显露的材料层形成副支撑柱,同时形成具有副支撑柱高度的连接电极的芯体;剥离剩余光阻,形成主支撑柱。
与现有技术相比,上述方案中的一个或多个实施例可以具有如下优点或有益效果:
通过在上基板与下基板上分别设置像素电极与公共电极,使两基板之间的水平电场得到增强,竖直电场得到削弱,降低了蓝相液晶所需的驱动电压。
本发明的其他优点、目标,和特征在某种程度上将在随后的说明书中进行阐述,并且在某种程度上,基于对下文的考察研究对本领域技术人员而言将是显而易见的,或者可以从本发明的实践中得到教导。本发明的目标和其他优点可以通过下面的说明书,权利要求书,以及附图中所特别指出的结构来实现和获得。
附图用来提供对本申请的技术方案或现有技术的进一步理解,并且构成说明书的一部分。其中,表达本申请实施例的附图与本申请的实施例一起用于解释本申请的技术方案,但并不构成对本申请技术方案的限制。
图1(a)-(b)为本申请实施例的蓝相液晶显示面板的结构示意图,其中图1(a)为蓝相液晶显示面板的正视图,图1(b)为蓝相液晶显示面板上基板与下基板的俯视图;
图2为本申请实施例的蓝相液晶显示面板的基板间的电场分布示意图;
图3为本申请实施例的蓝相液晶显示面板的电极的布置示意图;
图4为本申请另一实施例的蓝相液晶显示面板的俯视图;
图5为图4中的上下基板组装成盒后沿Ⅰ-Ⅰ'向的剖面图;
图6(a)-(b)为本申请实施例的蓝相液晶显示面板的制作方法的流程示意图,其中图6(a)为下基板的制作方法的流程示意图,图6(b)为上基板的制作方法的流程示意图。
以下将结合附图及实施例来详细说明本发明的实施方式,借此对本发明如何应用技术手段来解决技术问题,并达成相应技术效果的实现过程能充分理解并据以实施。本申请实施例以及实施例中的各个特征,在不相冲突前提下可以相互结合,所形成的技术方案均在本发明的保护范围之内。
在本申请的实施例中,分别在液晶显示面板的下基板11和上基板12上以镜像形式对称地布置电极,如图1(a)所示。图1(a)为蓝相液晶显示面板的正视图,在下基板11上设置有第一公共电极111与第一像素电极112,在上基板12上设置有第二公共电极121与第二像素电极122。公共电极111和121,以及像素电极112和122均平行于基板设置。在第一公共电极111与第一像素电极112之间还设置有绝缘层113,在第二公共电极121与第二像素电极122之间还设置有绝缘层123。图中3为填充于两基板之间的蓝相液晶分子。图中的下基板11相当于液晶显示器的阵列基板,上基板12相当于液晶显示器的彩色滤光片基板,在彩色滤光片基板上一般设置有黑色矩阵、彩色滤光片阵列以及透明电极(common电极)等,上述结构并不对本申请的具体的实施方式产生影响,所以上述结构均未在图中示出。
进一步地,在本申请的实施例中,为了驱动分别设置于上、下基板上的像素电极,还在上、下基板上分别设置一组基板驱动模块,如图1(b)所示。图1(b)为蓝相液晶显示面板上基板与下基板的俯视图,在下基板11上设置有下基板控制模块(下基板控制模块主要包括多条数据线114、多条扫描线115以及在数据线与扫描线正交形成的多个像素单元内设置的多个开关元件116)。在上基板12上设置有上基板控制模块(上基板控制模块主要包括多条数据线124、多条扫描线125以及在数据线与扫描线正交形成的多个像素单元内设置的多个开关元件126)。上、下基板控制模块分别用于控制上基板与下基板上的像素电极的驱动电压信号的加载。除此之外,还相应地设置有信号同步模块,用于使上基板与下基板上的像素电极的驱动电压信号同步,信号同步模块在图中未示出。
在上基板驱动模块、下基板驱动模块以及信号同步模块的共同作用下,将在第一公共电极111与第一像素电极112之间产生分布的第一边缘电场。并且,由于第二公共电极121与第二像素电极122之间呈相同的布置,所以在第二公共电极121与第二像素电极122之间产生分布的第二边缘电场。边缘电场可以使位于像素电极上方的蓝相液晶分子发生旋转,有利于提高液晶显示面板的穿透率以及
增大液晶显示面板的视角。
本申请实施例中的电极的布置方式,可以使基板之间的竖直电场分量相互削弱,水平电场分量相互增强。具体如图2所示。图2为本申请实施例的蓝相液晶显示面板的基板间的电场分布示意图。由于第一公共电极、第一像素电极分别与第二公共电极、第二像素电极呈镜像布置,所以,由第一公共电极与第一像素电极所产生的分布的第一边缘电场的水平电场分量,与由第二公共电极与第二像素电极所产生的分布的第二边缘电场的水平电场分量,在水平方向上大小相等,方向相同,在空间叠加后,使两基板之间的水平电场分量得到加强,如图2中的实线表示的电场线所示。两基板之间的竖直电场分量分为两部分,一部分是由第一(第二)公共电极与第一(第二)像素电极所产生的分布的边缘电场的竖直电场分量,一部分是由第一(第二)公共电极与第二(第一)像素电极所产生的电场的竖直电场分量。上述各竖直电场分量在空间叠加后,使两基板之间的竖直电场分量相互削弱。
因此,通过第一边缘电场与第二边缘电场的叠加,削弱了两基板之间的竖直电场(其中竖直电场分量的叠加还包括由第一(第二)公共电极与第二(第一)像素电极所产生的电场的竖直电场分量的叠加),并增强了两基板之间的水平电场的强度,有利于降低蓝相液晶显示面板所需的驱动电压。
需要说明的是,在本申请的实施例中,对公共电极与像素电极的具体结构并不做限定,只需使公共电极与像素电极之间能够产生有效的边缘电场即可。举例而言,当像素电极为梳状结构时,公共电极也可以采用对应的梳状结构,这样有利于削弱存在于第一(第二)像素电极与第一(第二)公共电极以及第一(第二)像素电极与第二(第一)公共电极之间的竖直电场,以便提升液晶的效率。此处不再赘述。
更进一步地,还可以将上下基板的电极均布置为IPS电极的形式,如图3所示。图3为本申请实施例的蓝相液晶显示面板的电极的布置示意图,图中31为像素电极(或公共电极),32为相应的公共电极(或像素电极)。分别对像素电极与公共电极施加不同的驱动信号,将在上下基板之间产生相互加强的水平电场以及相互削弱的竖直电场,有利于降低蓝相液晶显示面板所需的驱动电压。
在本申请的其他实施例中,信号同步模块被设置为包括多个连接单元的结构。其中,每个连接单元由一个连接电极与一个延伸电极组成,用于连接上基板的第二像素电极与下基板的第一像素电极,进一步通过单侧基板的开关元件控制
上、下基板的像素电极,来实现第一像素电极与第二像素电极的同步驱动,在降低蓝相液晶驱动电压的同时,还可以节省一套基板驱动模块,简化了加工工艺,下面结合图4和图5进行说明。
图4为本申请另一实施例的蓝相液晶显示面板的俯视图。具体的,42为上基板,相当于彩色滤光片基板,41为下基板,相当于阵列基板。上基板与下基板上的像素电极与公共电极的设置与前一实施例相同,包括第一公共电极411、第一像素电极412、第二公共电极421、第二像素电极422以及设置于下基板上的数据线414、扫描线415与开关元件416,此处不再赘述。进一步从图4可以看出,上基板42上不再设置有数据线、扫描线以及开关元件等组成的上基板驱动模块。同时在上基板上,在与下基板的像素单元相对应的区域内(图中矩形虚线框所围成的区域),设置有信号同步模块47的一部分。该信号同步模块的完整结构如图5所示。
图5为图4中的上下基板组装成盒后沿Ⅰ-Ⅰ'向的剖面图。具体的,信号同步模块47包括设置于上基板上的多个连接电极472与设置于下基板上的多个延伸电极471。从图5中可以看出,连接电极472与延伸电极471在上基板和下基板组装成液晶盒后连接在一起,这样就可以通过一侧(在本申请实施例中为下基板一侧)的开关元件同时控制两个基板上的像素电极。进一步地,连接电极472由芯体4721和涂覆于芯体外表面的导体层4722组成。
如图5所示,芯体4721呈圆台形,这样有利于在其上涂覆形成导体层4722。芯体的的材料一般选择弹性材料,例如UV硬化型的丙烯树脂等。导体层的材料与像素电极的材料相同,例如ITO。这种内部具有弹性芯体的结构可以使连接电极具有一定的可压缩性,从而保证两基板上的像素电极能够通过连接电极与延伸电极进行有效地连接。
需要说明的是,在液晶显示面板的上基板和下基板之间还设置有很多起支撑作用的支撑柱结构(spacer),包括主支撑柱和副支撑柱。其中,主支撑柱起主要的支撑作用,用以保持两基板之间的间隙,即液晶盒的厚度。副支撑柱起辅助支撑作用,主要是防止液晶面板受到外力的按压时被损坏。一般的,主支撑柱的高度高于副支撑柱的高度,且主支撑柱的密度较小,副支撑柱的密度较大。本申请实施例中的连接电极分布于上述主、副支撑柱结构中,且连接电极的高度(以下所涉及的连接电极的高度均是指包括延伸电极的厚度在内的整体的高度)大于副支撑柱的高度,而小于主支撑柱的高度,并且使连接电极在整体的尺寸上小于
主支撑柱的尺寸,这样可以降低连接电极的密度,使其不会影响到主支撑柱的性能。其中,连接电极的整体的尺寸主要指的是柱体的高度以及柱体顶面(或底面)的直径。
同时,为了保证面板组立后连接电极的高度可以刚好顶置对侧基板,还需要使连接电极保留有一定的压缩量。压缩量的优选范围为0.01~0.5μm,或0.01~0.2μm。举例而言,若主支撑柱的设计高度是3μm,副支撑柱的设计高度是2.6μm,则连接电极的高度可以在2.5(3-0.5)~2.99(3-0.01)μm的范围内进行设置。
进一步地,信号同步模块所包含的连接单元的个数等于下基板所包含的像素单元的个数,且信号同步模块设置于下基板的像素单元以外的非显示区域内。具体为,为每个像素单元设置一个连接单元,其中,延伸电极可以设置于下基板的数据线或扫描线上,也可以设置于数据线与扫描线的交叉处(如图4所示),还可以设置于与上基板的黑色矩阵相对应的位置处,而连接电极则设置于上基板上与延伸电极相对应的位置处。由于信号同步模块不占用像素单元的显示区域,所以不会对液晶显示面板的显示效果造成影响。
当然,将连接电极与延伸电极交换位置设置,即将连接电极设置于下基板上,将延伸电极设置于上基板上也可以用于实现本申请的实施例。
本申请实施例中的信号同步模块,通过连接电极与延伸电极的配合将两个基板上的像素电极进行连接,实现了通过单侧基板的开关元件对双侧基板的像素电极的同步控制,从而可以只在单侧基板上设置基板驱动模块,减少了一侧基板的制造工序。同时连接电极可以起到一定的支撑作用,使组立后的液晶显示面板具有更好的机械强度。
本申请的实施例还提供了一种制作上述液晶显示面板的方法,如图6所示。图6(a)-(b)为本申请实施例的蓝相液晶显示面板的制作方法的流程示意图,其中图6(a)为下基板的制作方法的流程示意图,图6(b)为上基板的制作方法的流程示意图。
如图6(a)所示,制作下基板的方法包括以下步骤:步骤S611、在预制下基板上图案化形成第一公共电极;步骤S612、在所述第一公共电极上涂覆形成第一绝缘层;步骤S613、在所述第一绝缘层上图案化形成第一像素电极,并于所述下基板的像素单元以外的非显示区域内同步图案化形成延伸电极。
具体的,预制下基板一般是指已经形成有薄膜晶体管的栅极、扫描线与公共
线(common)等结构的阵列基板,由于上述结构均可根据现有技术中的工艺制程得到,且这些工艺制程不影响本申请的实施例的具体实施,所以此处不再赘述。
第一公共电极与公共线相连接。在预制下基板上图案化形成第一公共电极的步骤根据第一公共电极的结构可以进一步包括溅射以及光刻等。举例而言,若第一公共电极为整体式的平面电极,则采用溅射成膜工艺形成第一公共电极。若第一公共电极具有特定的形状,例如梳状电极,则在成膜工艺后还要经过光刻处理来形成第一公共电极的图案。图案化的过程具体包括洗净、成膜、涂布光阻、曝光、显影、蚀刻以及剥离光阻等工艺步骤,上述工艺均可参照现有的制作基板的工艺流程进行。
第一绝缘层在形成薄膜晶体管的栅极绝缘层的步骤中同步制作完成。绝缘层的材料可采用SiNx,利用CVD成膜工艺形成。
接下来按照现有工艺流程,依次完成薄膜晶体管的半导体层、源极、漏极以及覆盖薄膜晶体管的钝化层的制作。然后,同步图案化形成第一像素电极与延伸电极。延伸电极位于下基板的像素单元以外的非显示区域内。通过采用具有不同形状的掩膜板将延伸电极图案化于数据线或扫描线上,或数据线与扫描线的交叉处,或与上基板的黑色矩阵相对应的位置处。
如图6(b)所示,制作上基板的方法包括以下步骤:步骤S621、在预制上基板上图案化形成第二公共电极;步骤S622、在所述第二公共电极上涂覆形成第二绝缘层;步骤S623、在所述第二绝缘层上图案化形成支撑柱,并于对应于延伸电极的位置处同步图案化形成连接电极的芯体;步骤S624、在所述第二绝缘层上图案化形成第二像素电极,并于所述连接电极的芯体的外表面同步图案化形成连接电极的导体层。
具体的,预制上基板一般是指已经形成有黑色矩阵层(BM层)以及色阻层(CF层)的彩色滤光片基板。同样的,上述结构均可根据现有技术中的工艺制程得到,且这些工艺制程不影响本申请的实施例的具体实施,所以此处不再赘述。
第二公共电极与公共线相连接。该步骤与图案化形成第一公共电极的过程大致相同,也包括洗净、成膜、涂布光阻、曝光、显影、蚀刻以及剥离光阻等工艺步骤,可以参照现有的制作基板的工艺流程进行,此处不再赘述。
在生成的第二公共电极的上面形成第二绝缘层,第二绝缘层的材料可采用SiNx,利用CVD成膜工艺形成。
连接电极的芯体与主支撑柱和副支撑柱同步形成。在经过洗净的SiNx绝缘
层上依次涂布用于制作主支撑柱、副支撑柱以及连接电极的材料与光阻材料,再分别经过干燥、预烘烤与冷却处理形成支撑柱的材料层与光阻层。
利用多灰阶光罩(Triple Tone)形成主支撑柱区域的高度、副支撑柱区域的高度以及连接电极区域的高度。所用多灰阶光罩具有三个透射率不同的区域,透射率为100%的无遮光膜的区域,透射率为0的有遮光膜的区域,以及透射率位于上述区域之间的灰阶区域。采用该多灰阶光罩对光阻层依次进行曝光与显影处理。处理后的光阻层可分为三个区域。
第一个区域的光阻材料被完全保留下来,用于形成主支撑柱。第二个区域的光阻材料部分被保留,用于形成副支撑柱与连接电极。第三个区域的光阻材料被全部去除。接下来,通过刻蚀去除第三个区域的残留光阻材料与支撑柱材料层,初步形成各支撑柱区域的图案。
再对其余两个区域的光阻层进行灰化处理,完全去除第二个区域的光阻材料,使形成副支撑柱区域与连接电极区域的材料层显露,并进一步通过刻蚀形成副支撑柱区域的图案,以及此时形成的位于连接电极区域的连接电极的高度与副支撑柱区域的副支撑柱的高度一致。
剥离第一个区域的剩余光阻,形成主支撑柱区域的图案。
需要说明的是,在本申请的实施例中,选择与主支撑柱以及副支撑柱同样的材料制作连接电极。一般选择具有弹性的树脂材料,并保证材料的膨胀系数也要和蓝相液晶相近,这样在面板的制作过程中连接电极可以与主支撑柱随液晶一起在一定范围内压缩变化,有助于产品的良率的提升。同时当遇到高、低温热涨或冷缩时不会影响液晶显示器的画面品质。
第二像素电极与连接电极的导体层可以同步形成,具体工艺过程与图案化形成第二公共电极的步骤相同,不再赘述。由于连接电极的表面具有斜坡,所以在Sputter成膜的过程中,在连接电极的倾斜的侧面上同时均匀形成一层金属层(即ITO层),用于形成第一像素电极与第二像素电极之间的通路。一般的,像素电极的厚度在左右,在连接电极芯体上形成的导体层加上延伸电极的厚度(延伸电极的厚度与像素电极的厚度相同)再加上支撑柱芯体的高度,可以使得形成的连接电极的高度大于副支撑柱的高度且小于主支撑柱的高度。
本申请实施例中的连接电极与延伸电极结构在现有工艺的基础上,通过对部分工艺步骤的改造就可制作完成,未显著增加工艺步骤,无需重新布置生产线,节约了生产的成本的同时有利于推广应用以及质量控制。
虽然本发明所揭露的实施方式如上,但所述的内容只是为了便于理解本发明而采用的实施方式,并非用以限定本发明。任何本发明所属技术领域内的技术人员,在不脱离本发明所揭露的精神和范围的前提下,可以在实施的形式上及细节上作任何的修改与变化,但本发明的专利保护范围,仍须以所附的权利要求书所界定的范围为准。
Claims (14)
- 一种蓝相液晶显示面板,包括下基板与上基板,其中,所述下基板,其上设置有第一公共电极与第一像素电极,所述第一公共电极与所述第一像素电极产生分布的第一边缘电场;所述上基板,其上与所述下基板对称地设置有第二公共电极与第二像素电极,所述第二公共电极与所述第二像素电极产生分布的第二边缘电场;其中,所述第一边缘电场与所述第二边缘电场各自的竖直电场分量相互削弱,且水平电场分量相互增强。
- 根据权利要求1所述的蓝相液晶显示面板,其中,还包括设置在至少一个基板上的基板控制模块与信号同步模块,其中,所述基板控制模块用于控制像素电极的驱动电压信号的加载,所述信号同步模块用于同步所述驱动电压信号。
- 根据权利要求2所述的蓝相液晶显示面板,其中,所述信号同步模块包括设置于所述上基板上的多个连接电极与设置于所述下基板上的多个延伸电极,其中,所述连接电极与所述延伸电极对应连接。
- 根据权利要求3所述的蓝相液晶显示面板,其中,所述延伸电极设置于下基板的像素单元以外的非显示区域内,所述连接电极设置于上基板上与所述延伸电极的对应的位置处。
- 根据权利要求4所述的蓝相液晶显示面板,其中,所述延伸电极设置于下基板的数据线或扫描线上,所述连接电极设置于上基板上与所述延伸电极的对应的位置处。
- 根据权利要求4所述的蓝相液晶显示面板,其中,所述延伸电极设置于下基板的数据线与扫描线的交叉处,所述连接电极设置于上基板上与所述延伸电极的对应的位置处。
- 根据权利要求4所述的蓝相液晶显示面板,其中,所述延伸电极设置于与上基板的黑色矩阵相对应的位置处,所述连接电极设置于上基板上与所述延伸电极的对应的位置处。
- 根据权利要求4所述的蓝相液晶显示面板,其中,所述延伸电极的个数等于下基板所包含的像素单元的个数。
- 根据权利要求8所述的蓝相液晶显示面板,其中,所述连接电极包括圆 台形芯体以及涂覆于所述芯体外表面的导体层。
- 根据权利要求9所述的蓝相液晶显示面板,其中,所述芯体的材料包括弹性材料。
- 根据权利要求10所述的蓝相液晶显示面板,其中,所述连接电极的压缩量的范围为0.01~0.5μm或0.01~0.2μm。
- 一种制作蓝相液晶显示面板基板的方法,包括:在预制下基板上图案化形成第一公共电极;在所述第一公共电极上涂覆形成第一绝缘层;在所述第一绝缘层上图案化形成第一像素电极,并于所述下基板的像素单元以外的非显示区域内同步图案化形成延伸电极。
- 一种制作蓝相液晶显示面板基板的方法,包括:在预制上基板上图案化形成第二公共电极;在所述第二公共电极上涂覆形成第二绝缘层;在所述第二绝缘层上图案化形成支撑柱,并于对应于延伸电极的位置处同步图案化形成连接电极的芯体;在所述第二绝缘层上图案化形成第二像素电极,并于所述连接电极的芯体的外表面同步图案化形成连接电极的导体层。
- 根据权利要求13所述的方法,其中,在所述第二绝缘层上图案化形成支撑柱,并于对应于延伸电极的位置处同步图案化形成连接电极的芯体的步骤中进一步包括:在经过洗净的绝缘层上依次涂覆形成用于制作主支撑柱、副支撑柱以及连接电极的材料层与光阻层;利用多灰阶光罩对所述光阻层进行曝光与显影处理;刻蚀部分材料层并灰化部分光阻层使形成副支撑柱区域与连接电极区域的材料层显露;刻蚀显露的材料层形成副支撑柱,同时形成具有副支撑柱高度的连接电极的芯体;剥离剩余光阻,形成主支撑柱。
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| CN104965357B (zh) * | 2015-06-30 | 2019-08-30 | 武汉华星光电技术有限公司 | 蓝相液晶面板 |
| CN105278183A (zh) * | 2015-11-19 | 2016-01-27 | 武汉华星光电技术有限公司 | 蓝相液晶显示器及其显示模组 |
| JP2019101095A (ja) * | 2017-11-29 | 2019-06-24 | シャープ株式会社 | 液晶パネル |
| CN109003542A (zh) * | 2018-07-19 | 2018-12-14 | 武汉华星光电半导体显示技术有限公司 | 显示面板及显示装置 |
| TWI750418B (zh) * | 2018-10-15 | 2021-12-21 | 友達光電股份有限公司 | 顯示器及其製造方法 |
| CN109597250B (zh) * | 2018-12-26 | 2021-06-01 | Tcl华星光电技术有限公司 | 蓝相液晶面板的制作方法及其立体电极的制作方法 |
| CN109656064A (zh) * | 2018-12-29 | 2019-04-19 | 武汉华星光电技术有限公司 | 液晶显示面板以及显示装置 |
| JP6835122B2 (ja) * | 2019-03-20 | 2021-02-24 | セイコーエプソン株式会社 | 電気光学装置および電子機器 |
| CN111176027A (zh) * | 2020-02-20 | 2020-05-19 | Tcl华星光电技术有限公司 | 液晶显示面板及其制备方法 |
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