WO2016194431A1 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

Info

Publication number
WO2016194431A1
WO2016194431A1 PCT/JP2016/057437 JP2016057437W WO2016194431A1 WO 2016194431 A1 WO2016194431 A1 WO 2016194431A1 JP 2016057437 W JP2016057437 W JP 2016057437W WO 2016194431 A1 WO2016194431 A1 WO 2016194431A1
Authority
WO
WIPO (PCT)
Prior art keywords
resin layer
bump
semiconductor device
manufacturing
layer
Prior art date
Application number
PCT/JP2016/057437
Other languages
French (fr)
Japanese (ja)
Inventor
正憲 山岸
尚哉 佐伯
明徳 佐藤
Original Assignee
リンテック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by リンテック株式会社 filed Critical リンテック株式会社
Priority to JP2017521714A priority Critical patent/JP6698647B2/en
Publication of WO2016194431A1 publication Critical patent/WO2016194431A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device.
  • Examples of such a resin layer include an adhesive layer for bonding the chip with bump and the substrate, an underfill layer for reinforcing the connection between the chip with bump and the substrate, a wafer with bump, or a chip with bump.
  • Examples include a protective layer for protection.
  • the resin layer on the bump must be mechanically pushed away to ensure electrical connection between the bump and the electrode on the substrate. Therefore, there is a problem in connection reliability between the bumped chip and the substrate. Also, when the bumped chip and the substrate are connected by the reflow process, the molten solder derived from the bump is covered with the resin layer, so the self-alignment effect (the alignment accuracy between the chip and substrate electrodes is Unfortunately, there is a problem that even if a deviation occurs, a phenomenon that is automatically corrected to a normal position at the time of reflow cannot be obtained.
  • thermosetting resin layer in contact with the circuit surface and the flexibility to embed the bumps laminated on this layer
  • Patent Document 1 proposes a method of using a laminated sheet including a thermoplastic resin layer having an outermost layer and an outermost layer laminated on this layer.
  • an object of the present invention is to provide a semiconductor device manufacturing method capable of efficiently manufacturing a semiconductor device excellent in connection reliability.
  • a method for manufacturing a semiconductor device includes: a step of forming a resin layer on a bump forming surface of a bumped member on which a plurality of bumps are formed; Removing the resin layer covering the surface of the substrate.
  • the resin layer can be provided on the bump forming surface of the bumped member according to various purposes.
  • this resin layer for example, an adhesive layer for bonding the bumped chip and the substrate, an underfill layer for reinforcing the connection between the bumped chip and the substrate, a bumped wafer or a bumped chip is protected.
  • a protective layer for example, a protective layer.
  • the resin layer which has covered the surface of bump can be removed by performing a plasma process with respect to this resin layer.
  • the plasma treatment can uniformly treat the entire surface of the resin layer on the bump forming surface. Therefore, the resin layer covering the surface of the bump can be easily and efficiently removed rather than mechanically removed. Then, the resin layer covering the surface of the bump is removed, and the bump whose exposed surface is electrically connected to the electrode of the substrate, whereby a semiconductor device having excellent connection reliability can be efficiently manufactured.
  • the method further includes a step of electrically connecting the bump from which the resin layer is removed and the surface is exposed to the electrode of the substrate.
  • the resin layer covering the surface of the bump is removed, and the bump whose surface is exposed is electrically connected to the electrode of the substrate, thereby obtaining a semiconductor device having excellent connection reliability. It is done.
  • a processing gas in the plasma processing is selected from the group consisting of oxygen, argon, trifluoromethane, tetrafluoromethane, and sulfur hexafluoride. It is preferable that there is at least one. As described above, when oxygen, argon, trifluoromethane, tetrafluoromethane, sulfur hexafluoride, or the like is used as a processing gas in the plasma processing, the resin layer covering the bump surface can be efficiently removed. .
  • the flow rate of the processing gas in the plasma processing is preferably 1 cm 3 / min to 1000 cm 3 / min. As in this configuration, if the flow rate of the processing gas in the plasma processing is within the above range, the resin layer covering the surface of the bump can be efficiently removed.
  • the processing pressure in the plasma processing is 1 Pa or more and 3000 Pa or less. As in this configuration, if the processing pressure in the plasma processing is within the above range, The resin layer covering the surface can be efficiently removed.
  • the adhesive sheet 1 used for this embodiment is provided with the support body layer 11, the adhesive layer 12, and the resin layer 13 containing an adhesive agent as shown in FIG. Note that the surface of the resin layer 13 may be protected by a release film or the like until it is attached to the wafer.
  • a known support can be used as a support for the adhesive sheet, and for example, a plastic film or the like can be used.
  • a support layer 11 supports the adherend while processing the adherend.
  • the plastic film include polyethylene film, polypropylene film, polybutene film, polybutadiene film, polymethylpentene film, polyvinyl chloride film, vinyl chloride copolymer film, polyethylene terephthalate film, polyethylene naphthalate film, polybutylene terephthalate film, Polyurethane film, ethylene vinyl acetate copolymer film, ionomer resin film, ethylene (meth) acrylic acid copolymer film, ethylene (meth) acrylic acid ester copolymer film, polystyrene film, polycarbonate film, polyimide film, and A fluororesin film etc. are mentioned. These films may be single-layer films or laminated films. In the case of a laminated film, one kind of film may be laminated, or two or
  • the pressure-sensitive adhesive layer 12 can be formed using a known pressure-sensitive adhesive as the pressure-sensitive adhesive for the adhesive sheet. With the pressure-sensitive adhesive layer 12, the support layer 11 and the resin layer 13 are firmly fixed while the adherend is processed, and then the resin layer 13 is fixedly left on the adherend and supported. It becomes easy to peel from the body layer 11.
  • the pressure-sensitive adhesive layer 12 may be cured by irradiating energy rays such as ultraviolet rays so as to be easily separated from the resin layer 13. Examples of the adhesive include acrylic adhesives, rubber adhesives, silicone adhesives, and urethane adhesives.
  • the resin layer 13 can be formed using a known adhesive as an adhesive for the adhesive sheet. By using the resin layer 13 containing such an adhesive, the later-described bumped chip 2a and the substrate 4 can be bonded.
  • the adhesive include those containing a thermosetting resin such as an epoxy resin and a thermosetting agent.
  • the adhesive may further contain an inorganic filler from the viewpoint of adjusting the thermal expansion coefficient of the cured product. Examples of the inorganic filler include silica, alumina, talc, calcium carbonate, titanium white, bengara, silicon carbide, and boron nitride.
  • the bumped wafer 2 (bumped member) used in this embodiment includes a semiconductor wafer 21 and bumps 22.
  • the bumps 22 are formed on the circuit side of the semiconductor wafer 21.
  • the semiconductor wafer 21 a known semiconductor wafer can be used.
  • a silicon wafer or the like can be used.
  • the thickness of the semiconductor wafer 21 is usually 10 ⁇ m or more and 1000 ⁇ m or less, and preferably 50 ⁇ m or more and 750 ⁇ m or less.
  • a known conductive material can be used, for example, solder or the like can be used.
  • solder a known solder material can be used.
  • lead-free solder containing tin, silver and copper can be used.
  • the height of the bump 22 is usually 5 ⁇ m or more and 1000 ⁇ m or less, and preferably 50 ⁇ m or more and 500 ⁇ m or less.
  • the cross-sectional shape viewed from the side of the bump 22 is not particularly limited, but may be a semicircular shape, a semielliptical shape, a circular shape, a rectangular shape, a trapezoidal shape, or the like. Although it does not specifically limit as a kind of bump 22, A ball bump, a mushroom bump, a stud bump, a cone bump, a cylinder bump, a dot bump, a cube bump, etc. are mentioned.
  • 3A to 3F are explanatory views showing a method for manufacturing the semiconductor device according to the first embodiment.
  • the resin layer 13 is formed on the bump forming surface 2A of the bumped wafer 2 on which the plurality of bumps 22 are formed. Specifically, as shown in FIGS.
  • the resin layer 13 is formed on the bump forming surface 2A of the bumped wafer 2 on which the plurality of bumps 22 are formed.
  • the resin layer 13 is then subjected to plasma treatment to remove the resin layer 13 covering the surface of the bump 22 (plasma treatment). Process). Then, as shown in FIGS. 3E and 3F, a process (dicing process) of dicing the bumped wafer 2 with a dicing blade, and the bumped chip 2a separated by dicing are picked up, and the substrate 4 as an adherend is picked up.
  • the bump 22 whose surface is exposed and the electrode 42 of the substrate 4 are electrically connected to each other by a method including a step of bonding and fixing to the substrate (bonding step).
  • the adhesive sheet attaching step, the dicing tape attaching step, the support peeling step, the plasma treatment step, the dicing step, and the bonding step will be described in more detail.
  • the resin layer 13 of the adhesive sheet 1 is attached to the surface on which the bumps 22 of the wafer 2 with bumps are formed (bump forming surface 2A).
  • a sticking method a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable.
  • the crimping is usually performed while pressing with a crimping roll or the like.
  • the conditions for pressure bonding are not particularly limited, but the pressure bonding temperature is preferably 40 ° C. or higher and 120 ° C. or lower.
  • the roll pressure is preferably from 0.1 MPa to 20 MPa.
  • the crimping speed is preferably 1 mm / sec or more and 20 mm / sec or less.
  • the thickness of the resin layer 13 of the adhesive sheet 1 is preferably smaller than the height dimension of the bump 22, more preferably 0.8 times or less the height dimension of the bump 22, and the height of the bump 22. It is particularly preferable that the size is 0.1 to 0.7 times the size. If the thickness of the resin layer 13 is less than or equal to the above upper limit, the resin layer 13 covering the surface of the bump 22 can be made thinner, and can be easily removed by a plasma processing step described later.
  • the dicing tape 3 is attached to the surface (back surface 2B) where the bumps 22 of the wafer 2 with bumps are not formed.
  • a sticking method a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable.
  • the crimping is usually performed while pressing with a crimping roll or the like.
  • the conditions for pressure bonding are not particularly limited and can be set as appropriate.
  • a known dicing tape can be used for the dicing tape 3.
  • the support layer 11 and the pressure-sensitive adhesive layer 12 of the adhesive sheet 1 are peeled from the resin layer 13.
  • the pressure-sensitive adhesive layer 12 has ultraviolet curing properties
  • ultraviolet rays are irradiated from the support layer 11 side as necessary.
  • the pressure-sensitive adhesive layer 12 is cured, the adhesive force at the interface between the pressure-sensitive adhesive layer 12 and the resin layer 13 is reduced, and the pressure-sensitive adhesive layer 12 is easily peeled from the resin layer 13.
  • the resin layer 13 is subjected to plasma processing to remove the resin layer 13 covering the surface of the bump 22.
  • the resin layer 13 can be removed according to the purpose. For example, if the electrical connection between the bump 22 whose surface is exposed and the electrode 42 of the substrate 4 is intended, it may be removed to the extent that electrical connection is possible. Specifically, the removal amount of the resin layer 13 can be adjusted from the viewpoint of a balance between connection reliability and ensuring of the function of the resin layer 13.
  • the plasma processing apparatus for performing the plasma processing is not particularly limited, and a known plasma processing apparatus can be used.
  • the conditions of plasma processing differ according to the kind of resin layer 13, etc., and are not specifically limited, For example, the following conditions are employable.
  • Examples of the processing gas in the plasma processing include oxygen, argon, trifluoromethane, tetrafluoromethane, and sulfur hexafluoride from the viewpoint of resin layer removability.
  • Species are preferred, and sulfur hexafluoride is more preferred.
  • these process gas may be used individually by 1 type, and may use 2 or more types together.
  • the flow rate of the processing gas in the plasma treatment is preferably 1 cm 3 / min or more and 1000 cm 3 / min or less, and preferably 10 cm 3 / min or more and 100 cm 3 / min or less. More preferred.
  • the treatment pressure in the plasma treatment is preferably 1 Pa or more and 3000 Pa or less, more preferably 10 Pa or more and 200 Pa or less, from the viewpoint of efficiently removing the resin layer.
  • the output in the plasma treatment is preferably 10 W or more and 600 W or less from the viewpoint of efficiently removing the resin layer.
  • the treatment time in the plasma treatment is preferably from 30 seconds to 60 minutes from the viewpoint of efficiently removing the resin layer.
  • the bumped wafer 2 is diced by a dicing blade. In this way, the bumped wafer 2 can be separated into the bumped chips 2a.
  • the dicing apparatus is not particularly limited, and a known dicing apparatus can be used. Also, the dicing conditions are not particularly limited. Laser dicing and stealth dicing may be used instead of the dicing blade.
  • the bumped chip 2 a separated by dicing is picked up and bonded and fixed to the substrate 4 including the base material 41 and the electrode 42. Since the resin layer 13 is removed and the surface of the bump 22 of the chip with bump 2a is exposed, the bump 22 and the electrode 42 of the substrate 4 can be electrically connected.
  • substrate 4 A lead frame, a wiring board, a silicon wafer with a circuit formed on the surface, a silicon chip, etc. can be used.
  • a material of the base material 41, A ceramic, a plastics, etc. are mentioned. Examples of the plastic include epoxy, bismaleimide triazine, and polyimide.
  • heat treatment may be performed as necessary to cure the adhesive.
  • the conditions for the heat treatment can be set as appropriate according to the type of adhesive and the like.
  • a reflow process may be performed to melt the bumps 22 of the bumped chip 2a, and the bumped chip 2a and the substrate 4 may be soldered.
  • the reflow processing conditions can be set as appropriate according to the type of solder and the like. As described above, the semiconductor device 100 can be manufactured.
  • the following operational effects can be achieved.
  • the plasma treatment can uniformly treat the entire surface of the resin layer on the bump forming surface 2A. Therefore, the resin layer 13 covering the surface of the bump 22 can be easily and efficiently removed rather than mechanically removed. Further, even when the cross-sectional shape viewed from the side of the bump 22 is a semicircular shape, a semi-elliptical shape, a circular shape, a rectangular shape or a trapezoidal shape, the resin layer 13 covering the surface of the bump 22 can be removed.
  • the resin layer 13 covering the surface of the bump 22 can be easily removed without removing the bump 22.
  • the resin layer 13 covering the surface of the bump 22 is removed, and the bump 22 whose surface is exposed and the electrode 42 of the substrate 4 are electrically connected to each other by the bump 22 whose surface is exposed.
  • the bumped chip 2a and the electrodes of the substrate 4 can be connected by soldering. In this way, the semiconductor device 100 having excellent connection reliability can be obtained.
  • An adhesive layer (resin layer 13) for bonding the bumped chip 2a and the substrate 4 can be provided on the bump forming surface 2A of the bumped chip 2a.
  • the resin layer 13 Since the resin layer 13 is provided on the wafer 2 with bumps and the plasma treatment is performed, the resin layer 13 is separated into the chips 2a with bumps, so that the resin layer 13 can be provided collectively on the plurality of chips 2a with bumps.
  • the resin layer 13 is formed on the bump forming surface 2A of the bumped chip 2a on which the plurality of bumps 22 are formed.
  • a step of bonding the resin layer 13 of the adhesive sheet 1 to the bump forming surface 2A of the bumped chip 2a adheresive sheet attaching step
  • the body layer 11 and the pressure-sensitive adhesive layer 12 are separated from the resin layer 13 by a method (support body peeling step), and the resin is applied to the bump forming surface 2A of the bumped chip 2a on which the plurality of bumps 22 are formed.
  • Layer 13 is formed.
  • the resin layer 13 is subjected to plasma treatment to remove the resin layer 13 covering the surface of the bump 22 (plasma treatment). Process).
  • the resin layer 13 is removed and the surface is exposed by a method including a step (bonding step) of picking up the bumped chip 2a and bonding and fixing it to the substrate 4 as an adherend.
  • the formed bump 22 and the electrode 42 of the substrate 4 are electrically connected.
  • a support body peeling process, a plasma processing process, and a bonding process it is the same as the adhesive sheet sticking process in the said 1st embodiment, a support body peeling process, a plasma processing process, and a bonding process.
  • the method can be adopted. According to this embodiment, the same operational effects as the operational effects (1) to (3) in the first embodiment can be achieved.
  • the present invention is not limited to the above-described embodiments, and modifications, improvements, and the like within the scope that can achieve the object of the present invention are included in the present invention.
  • the resin layer 13 is provided as an adhesive layer for bonding the bumped chip 2 a and the substrate 4, but is not limited thereto. That is, in the present invention, the resin layer can be provided according to various purposes.
  • the resin layer 13 may be provided as an underfill layer for reinforcing the connection between the bumped chip 2 a and the substrate 4.
  • the resin layer 13 may be provided as a protective layer for protecting the bumped wafer 2 or the bumped chip 2a.
  • the material for the resin layer 13 a known material can be used as the material for the underfill or protective layer.
  • the resin layer 13 is in contact with both the bumped chip 2a and the substrate 4, but is not limited thereto.
  • the resin layer 13 may be in contact with the bumped chip 2 a and may not be in contact with the substrate 4.
  • the bumped wafer 2 or the bumped chip 2a is used as the bumped member, but the present invention is not limited to this.
  • the bumped member may be a package having a bump (for example, a BGA (Ball Grid Array), a CSP (Chip size package), or the like).
  • the resin layer 13 is formed on the bump forming surface 2A using the adhesive sheet 1 and covers the bumps 22.
  • the resin layer 13 may be formed by applying and curing a resin composition on the bump forming surface 2A and covering the bumps 22.
  • the adhesive sheet 1 including the support layer 11, the pressure-sensitive adhesive layer 12, and the resin layer 13 is used, but is not limited thereto.
  • the adhesive sheet 1 may be a laminated sheet including the support layer 11 and the resin layer 13. In this case, what is necessary is just to peel the support body layer 11 from the resin layer 13 in a support body peeling process.
  • Example 1 A chip with bumps (chip size: 6 mm ⁇ 6 mm, chip thickness: 200 ⁇ m, bump type: ball bump, bump height: 200 ⁇ m, bump diameter: 250 ⁇ m, bump pitch: 400 ⁇ m) was prepared. Moreover, the laminated sheet provided with the resin layer which consists of the following resin composition, an adhesive layer (UV hardening type), and a support body layer was prepared.
  • Examples 2 to 7 According to the conditions shown in Table 1, a chip with a resin layer forming bump was obtained in the same manner as in Example 1 except that the type and flow rate of the processing gas in the plasma processing were changed. The surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 1.
  • Example 1 A chip with a resin layer forming bump was obtained in the same manner as in Example 1 except that the plasma treatment was not performed.
  • the surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 1.
  • Example 8 A chip with a resin layer forming bump was obtained in the same manner as in Example 1 except that a laminated sheet comprising a resin layer comprising the following resin composition, an adhesive layer (UV curing system), and a support layer was used. . (Resin composition) Acrylic polymer: 100 parts by mass Epoxy resin: 30 parts by mass Silica filler: 30 parts by mass Epoxy resin curing agent: 1 part by mass The surface of the bump of the obtained chip with the resin layer forming bump was placed on a scanning electron microscope (SEM). According to the same criteria as in Example 1, the removability of the resin layer was evaluated. The obtained results are shown in Table 2.
  • Example 9 to 14 According to the conditions shown in Table 2, a chip with a resin layer forming bump was obtained in the same manner as in Example 8 except that the type and flow rate of the processing gas in the plasma processing were changed. The surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 2.
  • Example 2 A chip with a resin layer forming bump was obtained in the same manner as in Example 8 except that the plasma treatment was not performed.
  • the surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 2.
  • the present invention can be used in a method for manufacturing a semiconductor device.

Landscapes

  • Dicing (AREA)
  • Wire Bonding (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

The present invention is characterized by including: a step for forming a resin layer (13) on the bump formation surface of a bump-equipped member (2) on which a plurality of bumps (22) are formed; and a step for performing a plasma treatment on the resin layer (13) to remove the resin layer (13) which covers the surface of the bumps (22).

Description

半導体装置の製造方法Manufacturing method of semiconductor device
　本発明は、半導体装置の製造方法に関する。 The present invention relates to a method for manufacturing a semiconductor device.
　近年、電子機器の小型化や薄型化に伴い、半導体パッケージの薄型化や小型化に対する要求も高まっている。そのため、半導体素子の実装方式として、金属ワイヤを用いて接続する従来のワイヤーボンディング方式に代えて、チップの電極上にバンプと呼ばれる突起電極を形成し、基板の電極とチップの電極とをバンプを介して直接接続するフリップチップ接続方式の実装方法が提案されている。
　このようなフリップチップ接続方式の実装方法では、様々な目的に応じて、バンプ付ウエハやバンプ付チップなどのバンプを覆うように樹脂層が設けられる。このような樹脂層としては、例えば、バンプ付チップと基板とを接着するための接着剤層、バンプ付チップと基板との接続を補強するためのアンダーフィル層、バンプ付ウエハまたはバンプ付チップを保護するための保護層などが挙げられる。 In recent years, with the miniaturization and thinning of electronic devices, demands for thinning and miniaturization of semiconductor packages are also increasing. Therefore, as a semiconductor device mounting method, instead of the conventional wire bonding method in which metal wires are used for connection, bump electrodes called bumps are formed on the chip electrodes, and bumps are formed between the substrate electrodes and the chip electrodes. There has been proposed a flip-chip mounting method in which direct connection is made.
In such a flip-chip connection method, a resin layer is provided so as to cover bumps such as a bumped wafer and a bumped chip according to various purposes. Examples of such a resin layer include an adhesive layer for bonding the chip with bump and the substrate, an underfill layer for reinforcing the connection between the chip with bump and the substrate, a wafer with bump, or a chip with bump. Examples include a protective layer for protection.
　しかしながら、樹脂層がバンプを覆っている場合には、バンプ上の樹脂層を機械的に押しのけて、バンプと基板の電極との電気的な接続を確保しなければならない。そのため、バンプ付チップと基板との接続信頼性の点で問題があった。また、リフロー処理により、バンプ付チップと基板とを接続する場合には、バンプに由来する溶融はんだが樹脂層に覆われているため、セルフアライメント効果（チップおよび基板の電極同士の位置合わせ精度が悪く、ずれを生じていてもリフロー時に正常な位置へ自動的に補正される現象）が得られないという問題があった。
　上記のような問題を解決するために、例えば、バンプ付ウエハの裏面を研削する工程において、回路面と接する熱硬化性樹脂層と、この層の上に積層され、バンプを埋め込むための柔軟性のある熱可塑性樹脂層と、この層の上に積層される最外層とを備える積層シートを用いる方法が提案されている（特許文献１参照）。 However, when the resin layer covers the bump, the resin layer on the bump must be mechanically pushed away to ensure electrical connection between the bump and the electrode on the substrate. Therefore, there is a problem in connection reliability between the bumped chip and the substrate. Also, when the bumped chip and the substrate are connected by the reflow process, the molten solder derived from the bump is covered with the resin layer, so the self-alignment effect (the alignment accuracy between the chip and substrate electrodes is Unfortunately, there is a problem that even if a deviation occurs, a phenomenon that is automatically corrected to a normal position at the time of reflow cannot be obtained.
In order to solve the above problems, for example, in the process of grinding the back surface of the wafer with bumps, a thermosetting resin layer in contact with the circuit surface and the flexibility to embed the bumps laminated on this layer There has been proposed a method of using a laminated sheet including a thermoplastic resin layer having an outermost layer and an outermost layer laminated on this layer (see Patent Document 1).
特開２００５－２８７３４号公報JP 2005-28734 A
　特許文献１に記載の積層シートを用いる場合には、バンプに熱硬化性樹脂層を貫通させた上で、この熱硬化性樹脂層以外の層を剥離する。そのため、バンプ付ウエハのバンプの形状を針状などにする必要があった。また、バンプの断面形状が半円形や台形の場合には、バンプ上に樹脂層が残りやすく、接続信頼性の点で問題があった。 When the laminated sheet described in Patent Document 1 is used, a layer other than the thermosetting resin layer is peeled off after a thermosetting resin layer is passed through the bumps. Therefore, it has been necessary to make the bump shape of the wafer with bumps into a needle shape or the like. Further, when the bump has a semicircular or trapezoidal cross-sectional shape, a resin layer tends to remain on the bump, which causes a problem in connection reliability.
　そこで、本発明の目的は、接続信頼性に優れた半導体装置を効率よく製造できる半導体装置の製造方法を提供することである。 Therefore, an object of the present invention is to provide a semiconductor device manufacturing method capable of efficiently manufacturing a semiconductor device excellent in connection reliability.
　本発明の一態様に係る半導体装置の製造方法は、複数のバンプが形成されているバンプ付部材のバンプ形成面に樹脂層を形成する工程と、前記樹脂層にプラズマ処理を施して、前記バンプの表面を覆っている前記樹脂層を除去する工程と、を備えることを特徴とする方法である。
　この構成によれば、バンプ付部材のバンプ形成面に、様々な目的に応じて、樹脂層を設けることができる。この樹脂層としては、例えば、バンプ付チップと基板とを接着するための接着剤層、バンプ付チップと基板との接続を補強するためのアンダーフィル層、バンプ付ウエハまたはバンプ付チップを保護するための保護層などが挙げられる。
　そして、この樹脂層に対してプラズマ処理を施すことで、バンプの表面を覆っている樹脂層を除去できる。また、プラズマ処理は、バンプ形成面上の樹脂層の全面に均一に処理ができる。そのため、バンプの表面を覆っている樹脂層を、機械的に除去するよりも、簡便で効率よく除去できる。そして、バンプの表面を覆っている樹脂層が除去され、表面が露出されたバンプと、基板の電極とを電気的に接続することで、接続信頼性に優れた半導体装置を効率よく製造できる。 A method for manufacturing a semiconductor device according to an aspect of the present invention includes: a step of forming a resin layer on a bump forming surface of a bumped member on which a plurality of bumps are formed; Removing the resin layer covering the surface of the substrate.
According to this configuration, the resin layer can be provided on the bump forming surface of the bumped member according to various purposes. As this resin layer, for example, an adhesive layer for bonding the bumped chip and the substrate, an underfill layer for reinforcing the connection between the bumped chip and the substrate, a bumped wafer or a bumped chip is protected. For example, a protective layer.
And the resin layer which has covered the surface of bump can be removed by performing a plasma process with respect to this resin layer. Further, the plasma treatment can uniformly treat the entire surface of the resin layer on the bump forming surface. Therefore, the resin layer covering the surface of the bump can be easily and efficiently removed rather than mechanically removed. Then, the resin layer covering the surface of the bump is removed, and the bump whose exposed surface is electrically connected to the electrode of the substrate, whereby a semiconductor device having excellent connection reliability can be efficiently manufactured.
　本発明の一態様に係る半導体装置の製造方法においては、前記樹脂層が除去され、表面が露出された前記バンプと、基板の電極とを電気的に接続する工程を、さらに備えることが好ましい。
　この構成によれば、バンプの表面を覆っている樹脂層が除去され、表面が露出されたバンプと、基板の電極とを電気的に接続することで、接続信頼性に優れた半導体装置が得られる。 In the method for manufacturing a semiconductor device according to one aspect of the present invention, it is preferable that the method further includes a step of electrically connecting the bump from which the resin layer is removed and the surface is exposed to the electrode of the substrate.
According to this configuration, the resin layer covering the surface of the bump is removed, and the bump whose surface is exposed is electrically connected to the electrode of the substrate, thereby obtaining a semiconductor device having excellent connection reliability. It is done.
　本発明の一態様に係る半導体装置の製造方法においては、前記プラズマ処理における処理ガスが、酸素、アルゴン、三フッ化メタン、四フッ化メタン、および、六フッ化硫黄からなる群から選択される少なくとも１種であることが好ましい。
　このように、プラズマ処理における処理ガスとして、酸素、アルゴン、三フッ化メタン、四フッ化メタンおよび六フッ化硫黄などを用いる場合には、バンプの表面を覆っている樹脂層を効率よく除去できる。 In the method for manufacturing a semiconductor device according to one embodiment of the present invention, a processing gas in the plasma processing is selected from the group consisting of oxygen, argon, trifluoromethane, tetrafluoromethane, and sulfur hexafluoride. It is preferable that there is at least one.
As described above, when oxygen, argon, trifluoromethane, tetrafluoromethane, sulfur hexafluoride, or the like is used as a processing gas in the plasma processing, the resin layer covering the bump surface can be efficiently removed. .
　本発明の一態様に係る半導体装置の製造方法においては、前記プラズマ処理における処理ガスの流量が、１ｃｍ３／ｍｉｎ以上１０００ｃｍ３／ｍｉｎ以下であることが好ましい。
　この構成のように、プラズマ処理における処理ガスの流量を前記範囲内とすれば、バンプの表面を覆っている樹脂層を効率よく除去できる。 In the method for manufacturing a semiconductor device according to one embodiment of the present invention, the flow rate of the processing gas in the plasma processing is preferably 1 cm 3 / min to 1000 cm 3 / min.
As in this configuration, if the flow rate of the processing gas in the plasma processing is within the above range, the resin layer covering the surface of the bump can be efficiently removed.
　本発明の一態様に係る半導体装置の製造方法においては、前記プラズマ処理における処理圧力が、１Ｐａ以上３０００Ｐａ以下である
　この構成のように、プラズマ処理における処理圧力を前記範囲内とすれば、バンプの表面を覆っている樹脂層を効率よく除去できる。 In the method for manufacturing a semiconductor device according to one aspect of the present invention, the processing pressure in the plasma processing is 1 Pa or more and 3000 Pa or less. As in this configuration, if the processing pressure in the plasma processing is within the above range, The resin layer covering the surface can be efficiently removed.
本発明の第一実施形態に係る樹脂層を形成するための積層シートを示す概略断面図である。It is a schematic sectional drawing which shows the lamination sheet for forming the resin layer which concerns on 1st embodiment of this invention. 本発明の第一実施形態に係るバンプ付部材（バンプ付ウエハ）を示す概略断面図である。It is a schematic sectional drawing which shows the member with bump (wafer with bump) which concerns on 1st embodiment of this invention. 本発明の第一実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st embodiment of this invention. 本発明の第一実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st embodiment of this invention. 本発明の第一実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st embodiment of this invention. 本発明の第一実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st embodiment of this invention. 本発明の第一実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st embodiment of this invention. 本発明の第一実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st embodiment of this invention. 本発明の第二実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd embodiment of this invention. 本発明の第二実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd embodiment of this invention. 本発明の第二実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd embodiment of this invention. 本発明の第二実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd embodiment of this invention.
　［第一実施形態］
　以下、本発明について実施形態を例に挙げて、図面に基づいて説明する。本発明は実施形態の内容に限定されない。なお、図面においては、説明を容易にするために拡大または縮小をして図示した部分がある。
　まず、本実施形態に用いる接着シートおよびバンプ付ウエハについて説明する。 [First embodiment]
Hereinafter, the present invention will be described with reference to the drawings, taking an embodiment as an example. The present invention is not limited to the contents of the embodiment. In the drawings, there are portions enlarged or reduced for easy explanation.
First, the adhesive sheet and the wafer with bumps used in this embodiment will be described.
　（接着シート）
　本実施形態に用いる接着シート１は、図１に示すように、支持体層１１と、粘着剤層１２と、接着剤を含有する樹脂層１３と、を備えている。なお、樹脂層１３の表面は、ウエハに貼着されるまでの間、剥離フィルムなどにより保護されていてもよい。 (Adhesive sheet)
The adhesive sheet 1 used for this embodiment is provided with the support body layer 11, the adhesive layer 12, and the resin layer 13 containing an adhesive agent as shown in FIG. Note that the surface of the resin layer 13 may be protected by a release film or the like until it is attached to the wafer.
　支持体層１１としては、接着シートの支持体として公知の支持体を用いることができ、例えば、プラスチックフィルムなどを用いることができる。このような支持体層１１は、被着体を加工している間に、被着体を支持する。
　プラスチックフィルムとしては、例えば、ポリエチレンフィルム、ポリプロピレンフィルム、ポリブテンフィルム、ポリブタジエンフィルム、ポリメチルペンテンフィルム、ポリ塩化ビニルフィルム、塩化ビニル共重合体フィルム、ポリエチレンテレフタレートフィルム、ポリエチレンナフタレートフィルム、ポリブチレンテレフタレートフィルム、ポリウレタンフィルム、エチレン酢酸ビニル共重合体フィルム、アイオノマー樹脂フィルム、エチレン・（メタ）アクリル酸共重合体フィルム、エチレン・（メタ）アクリル酸エステル共重合体フィルム、ポリスチレンフィルム、ポリカーボネートフィルム、ポリイミドフィルム、およびフッ素樹脂フィルムなどが挙げられる。これらのフィルムは、単層フィルムであってもよく、積層フィルムであってもよい。また、積層フィルムの場合には、１種のフィルムを積層してもよく、２種以上のフィルムを積層してもよい。 As the support layer 11, a known support can be used as a support for the adhesive sheet, and for example, a plastic film or the like can be used. Such a support layer 11 supports the adherend while processing the adherend.
Examples of the plastic film include polyethylene film, polypropylene film, polybutene film, polybutadiene film, polymethylpentene film, polyvinyl chloride film, vinyl chloride copolymer film, polyethylene terephthalate film, polyethylene naphthalate film, polybutylene terephthalate film, Polyurethane film, ethylene vinyl acetate copolymer film, ionomer resin film, ethylene (meth) acrylic acid copolymer film, ethylene (meth) acrylic acid ester copolymer film, polystyrene film, polycarbonate film, polyimide film, and A fluororesin film etc. are mentioned. These films may be single-layer films or laminated films. In the case of a laminated film, one kind of film may be laminated, or two or more kinds of films may be laminated.
　粘着剤層１２は、接着シートの粘着剤として公知の粘着剤を用いて形成することができる。このような粘着剤層１２により、被着体を加工している間は支持体層１１と樹脂層１３の間を強固に固定し、その後、樹脂層１３を被着体に固着残存させて支持体層１１から剥離することが容易となる。なお、粘着剤層１２に、紫外線などのエネルギー線を照射することで硬化させて、樹脂層１３との剥離が容易になるようにしてもよい。
　粘着剤としては、例えば、アクリル系粘着剤、ゴム系粘着剤、シリコーン系粘着剤およびウレタン系粘着剤などが挙げられる。 The pressure-sensitive adhesive layer 12 can be formed using a known pressure-sensitive adhesive as the pressure-sensitive adhesive for the adhesive sheet. With the pressure-sensitive adhesive layer 12, the support layer 11 and the resin layer 13 are firmly fixed while the adherend is processed, and then the resin layer 13 is fixedly left on the adherend and supported. It becomes easy to peel from the body layer 11. The pressure-sensitive adhesive layer 12 may be cured by irradiating energy rays such as ultraviolet rays so as to be easily separated from the resin layer 13.
Examples of the adhesive include acrylic adhesives, rubber adhesives, silicone adhesives, and urethane adhesives.
　樹脂層１３は、接着シートの接着剤として公知の接着剤を用いて形成することができる。このような接着剤を含有する樹脂層１３により、後述するバンプ付チップ２ａと基板４とを接着することができる。
　接着剤としては、例えば、エポキシ樹脂などの熱硬化性樹脂と、熱硬化剤とを含有するものが挙げられる。また、接着剤は、硬化物の熱膨張係数を調整するという観点から、無機充填材をさらに含有していてもよい。無機充填材としては、シリカ、アルミナ、タルク、炭酸カルシウム、チタンホワイト、ベンガラ、炭化珪素、および窒化ホウ素などが挙げられる。 The resin layer 13 can be formed using a known adhesive as an adhesive for the adhesive sheet. By using the resin layer 13 containing such an adhesive, the later-described bumped chip 2a and the substrate 4 can be bonded.
Examples of the adhesive include those containing a thermosetting resin such as an epoxy resin and a thermosetting agent. The adhesive may further contain an inorganic filler from the viewpoint of adjusting the thermal expansion coefficient of the cured product. Examples of the inorganic filler include silica, alumina, talc, calcium carbonate, titanium white, bengara, silicon carbide, and boron nitride.
　（バンプ付ウエハ）
　本実施形態に用いるバンプ付ウエハ２（バンプ付部材）は、図２に示すように、半導体ウエハ２１と、バンプ２２と、を備えている。なお、バンプ２２は、半導体ウエハ２１の回路のある側に形成される。 (Wafer with bump)
As shown in FIG. 2, the bumped wafer 2 (bumped member) used in this embodiment includes a semiconductor wafer 21 and bumps 22. The bumps 22 are formed on the circuit side of the semiconductor wafer 21.
　半導体ウエハ２１としては、公知の半導体ウエハを用いることができ、例えば、シリコンウエハなどを用いることができる。
　半導体ウエハ２１の厚みは、通常、１０μｍ以上１０００μｍ以下であり、好ましくは、５０μｍ以上７５０μｍ以下である。 As the semiconductor wafer 21, a known semiconductor wafer can be used. For example, a silicon wafer or the like can be used.
The thickness of the semiconductor wafer 21 is usually 10 μm or more and 1000 μm or less, and preferably 50 μm or more and 750 μm or less.
　バンプ２２の材料としては、公知の導電性材料を用いることができ、例えば、ハンダなどを用いることができる。ハンダとしては、公知のハンダ材料を用いることができ、例えば、スズ、銀および銅を含有する鉛フリーハンダを用いることができる。
　バンプ２２の高さは、通常、５μｍ以上１０００μｍ以下であり、好ましくは、５０μｍ以上５００μｍ以下である。
　バンプ２２の側方から見た断面形状は、特に限定されないが、半円形、半楕円形、円形、長方形または台形などであってもよい。
　バンプ２２の種類としては、特に限定されないが、ボールバンプ、マッシュルームバンプ、スタッドバンプ、コーンバンプ、シリンダーバンプ、ドットバンプ、およびキューブバンプなどが挙げられる。 As a material of the bump 22, a known conductive material can be used, for example, solder or the like can be used. As the solder, a known solder material can be used. For example, lead-free solder containing tin, silver and copper can be used.
The height of the bump 22 is usually 5 μm or more and 1000 μm or less, and preferably 50 μm or more and 500 μm or less.
The cross-sectional shape viewed from the side of the bump 22 is not particularly limited, but may be a semicircular shape, a semielliptical shape, a circular shape, a rectangular shape, a trapezoidal shape, or the like.
Although it does not specifically limit as a kind of bump 22, A ball bump, a mushroom bump, a stud bump, a cone bump, a cylinder bump, a dot bump, a cube bump, etc. are mentioned.
　（半導体装置の製造方法）
　次に、本実施形態に係る半導体装置の製造方法について説明する。
　図３Ａ～図３Ｆは、第一実施形態に係る半導体装置の製造方法を示す説明図である。
　本実施形態に係る半導体装置の製造方法においては、先ず、複数のバンプ２２が形成されているバンプ付ウエハ２のバンプ形成面２Ａに樹脂層１３を形成する。具体的には、図３Ａ～図３Ｃに示すように、接着シート１の樹脂層１３をバンプ付ウエハ２のバンプ形成面２Ａに貼り合わせる工程（接着シート貼着工程）と、ダイシングテープ３をバンプ付ウエハ２の裏面に貼り合わせる工程（ダイシングテープ貼着工程）と、接着シート１の支持体層１１および粘着剤層１２を、樹脂層１３から剥離する工程（支持体剥離工程）と、を備える方法により、複数のバンプ２２が形成されているバンプ付ウエハ２のバンプ形成面２Ａに樹脂層１３を形成する。
　本実施形態に係る半導体装置の製造方法においては、次に、図３Ｄに示すように、樹脂層１３にプラズマ処理を施して、バンプ２２の表面を覆っている樹脂層１３を除去する（プラズマ処理工程）。
　そして、図３Ｅおよび図３Ｆに示すように、ダイシングブレードによりバンプ付ウエハ２をダイシングする工程（ダイシング工程）と、ダイシングにより個片化したバンプ付チップ２ａをピックアップし、被着体である基板４に接着固定する工程（ボンディング工程）と、を備える方法により、樹脂層１３が除去され、表面が露出されたバンプ２２と、基板４の電極４２とを電気的に接続する。
　以下、接着シート貼着工程、ダイシングテープ貼着工程、支持体剥離工程、プラズマ処理工程、ダイシング工程およびボンディング工程について、より詳細に説明する。 (Method for manufacturing semiconductor device)
Next, a method for manufacturing the semiconductor device according to the present embodiment will be described.
3A to 3F are explanatory views showing a method for manufacturing the semiconductor device according to the first embodiment.
In the method for manufacturing a semiconductor device according to the present embodiment, first, the resin layer 13 is formed on the bump forming surface 2A of the bumped wafer 2 on which the plurality of bumps 22 are formed. Specifically, as shown in FIGS. 3A to 3C, a step of bonding the resin layer 13 of the adhesive sheet 1 to the bump forming surface 2A of the wafer 2 with bumps (adhesive sheet attaching step), and a dicing tape 3 as a bump A step of attaching to the back surface of the attached wafer 2 (dicing tape attaching step) and a step of peeling the support layer 11 and the adhesive layer 12 of the adhesive sheet 1 from the resin layer 13 (support peeling step). By the method, the resin layer 13 is formed on the bump forming surface 2A of the bumped wafer 2 on which the plurality of bumps 22 are formed.
In the semiconductor device manufacturing method according to the present embodiment, as shown in FIG. 3D, the resin layer 13 is then subjected to plasma treatment to remove the resin layer 13 covering the surface of the bump 22 (plasma treatment). Process).
Then, as shown in FIGS. 3E and 3F, a process (dicing process) of dicing the bumped wafer 2 with a dicing blade, and the bumped chip 2a separated by dicing are picked up, and the substrate 4 as an adherend is picked up. The bump 22 whose surface is exposed and the electrode 42 of the substrate 4 are electrically connected to each other by a method including a step of bonding and fixing to the substrate (bonding step).
Hereinafter, the adhesive sheet attaching step, the dicing tape attaching step, the support peeling step, the plasma treatment step, the dicing step, and the bonding step will be described in more detail.
　接着シート貼着工程においては、図３Ａに示すように、接着シート１の樹脂層１３をバンプ付ウエハ２のバンプ２２の形成されている面（バンプ形成面２Ａ）に貼り合わせる。
　ここで、貼着方法としては公知の方法を採用でき、特に限定されないが、圧着による方法が好ましい。圧着は、通常、圧着ロールなどにより押圧しながら行われる。圧着の条件は特に限定されないが、圧着温度は、４０℃以上１２０℃以下が好ましい。ロール圧力は、０．１ＭＰａ以上２０ＭＰａ以下が好ましい。圧着速度は、１ｍｍ／ｓｅｃ以上２０ｍｍ／ｓｅｃ以下が好ましい。
　また、接着シート１の樹脂層１３の厚みは、バンプ２２の高さ寸法より小さくすることが好ましく、バンプ２２の高さ寸法の０．８倍以下であることがより好ましく、バンプ２２の高さ寸法の０．１倍以上０．７倍以下であることが特に好ましい。樹脂層１３の厚みが前記上限以下であれば、バンプ２２の表面を覆う樹脂層１３を、より薄くすることができ、後述するプラズマ処理工程で容易に除去できる。 In the adhesive sheet attaching step, as shown in FIG. 3A, the resin layer 13 of the adhesive sheet 1 is attached to the surface on which the bumps 22 of the wafer 2 with bumps are formed (bump forming surface 2A).
Here, as a sticking method, a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable. The crimping is usually performed while pressing with a crimping roll or the like. The conditions for pressure bonding are not particularly limited, but the pressure bonding temperature is preferably 40 ° C. or higher and 120 ° C. or lower. The roll pressure is preferably from 0.1 MPa to 20 MPa. The crimping speed is preferably 1 mm / sec or more and 20 mm / sec or less.
The thickness of the resin layer 13 of the adhesive sheet 1 is preferably smaller than the height dimension of the bump 22, more preferably 0.8 times or less the height dimension of the bump 22, and the height of the bump 22. It is particularly preferable that the size is 0.1 to 0.7 times the size. If the thickness of the resin layer 13 is less than or equal to the above upper limit, the resin layer 13 covering the surface of the bump 22 can be made thinner, and can be easily removed by a plasma processing step described later.
　ダイシングテープ貼着工程においては、図３Ｂに示すように、ダイシングテープ３をバンプ付ウエハ２のバンプ２２の形成されていない面（裏面２Ｂ）に貼り合わせる。
　ここで、貼着方法としては公知の方法を採用でき、特に限定されないが、圧着による方法が好ましい。圧着は、通常、圧着ロールなどにより押圧しながら行われる。圧着の条件は、特に限定されず、適宜設定できる。また、ダイシングテープ３についても、公知のダイシングテープを用いることができる。 In the dicing tape attaching step, as shown in FIG. 3B, the dicing tape 3 is attached to the surface (back surface 2B) where the bumps 22 of the wafer 2 with bumps are not formed.
Here, as a sticking method, a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable. The crimping is usually performed while pressing with a crimping roll or the like. The conditions for pressure bonding are not particularly limited and can be set as appropriate. Also for the dicing tape 3, a known dicing tape can be used.
　支持体剥離工程においては、図３Ｃに示すように、接着シート１の支持体層１１および粘着剤層１２を、樹脂層１３から剥離する。
　粘着剤層１２が紫外線硬化性を有する場合には、必要に応じて、支持体層１１側から紫外線を照射する。これにより、粘着剤層１２が硬化し、粘着剤層１２と樹脂層１３との界面の接着力が低下して、粘着剤層１２を樹脂層１３から剥離しやすくなる。 In the support peeling process, as shown in FIG. 3C, the support layer 11 and the pressure-sensitive adhesive layer 12 of the adhesive sheet 1 are peeled from the resin layer 13.
In the case where the pressure-sensitive adhesive layer 12 has ultraviolet curing properties, ultraviolet rays are irradiated from the support layer 11 side as necessary. Thereby, the pressure-sensitive adhesive layer 12 is cured, the adhesive force at the interface between the pressure-sensitive adhesive layer 12 and the resin layer 13 is reduced, and the pressure-sensitive adhesive layer 12 is easily peeled from the resin layer 13.
　プラズマ処理工程においては、図３Ｄに示すように、樹脂層１３にプラズマ処理を施して、バンプ２２の表面を覆っている樹脂層１３を除去する。ここで、樹脂層１３は、その目的に応じて、除去できる。例えば、表面が露出されたバンプ２２と、基板４の電極４２との電気的な接続が目的であれば、電気的な接続ができる程度に除去すればよい。具体的には、接続信頼性と樹脂層１３の機能の確保とのバランスの観点から、樹脂層１３の除去量を調整できる。
　プラズマ処理を行うプラズマ処理装置は、特に限定されず、公知のプラズマ処理装置を用いることができる。また、プラズマ処理の条件は、樹脂層１３の種類などに応じて異なり、特に限定されないが、例えば、以下のような条件を採用できる。
　プラズマ処理における処理ガスとしては、樹脂層の除去性の観点から、酸素、アルゴン、三フッ化メタン、四フッ化メタンおよび六フッ化硫黄などが挙げられる。これらの中でも、樹脂層がシリカなどの無機充填材を含有する場合にも除去性が優れるという観点から、三フッ化メタン、四フッ化メタンおよび六フッ化硫黄からなる群から選択される少なくとも１種が好ましく、六フッ化硫黄がより好ましい。また、これらの処理ガスは、１種を単独で用いてもよく、２種以上を併用してもよい。 In the plasma processing step, as shown in FIG. 3D, the resin layer 13 is subjected to plasma processing to remove the resin layer 13 covering the surface of the bump 22. Here, the resin layer 13 can be removed according to the purpose. For example, if the electrical connection between the bump 22 whose surface is exposed and the electrode 42 of the substrate 4 is intended, it may be removed to the extent that electrical connection is possible. Specifically, the removal amount of the resin layer 13 can be adjusted from the viewpoint of a balance between connection reliability and ensuring of the function of the resin layer 13.
The plasma processing apparatus for performing the plasma processing is not particularly limited, and a known plasma processing apparatus can be used. Moreover, the conditions of plasma processing differ according to the kind of resin layer 13, etc., and are not specifically limited, For example, the following conditions are employable.
Examples of the processing gas in the plasma processing include oxygen, argon, trifluoromethane, tetrafluoromethane, and sulfur hexafluoride from the viewpoint of resin layer removability. Among these, at least 1 selected from the group consisting of trifluoromethane, tetrafluoromethane, and sulfur hexafluoride from the viewpoint of excellent removability even when the resin layer contains an inorganic filler such as silica. Species are preferred, and sulfur hexafluoride is more preferred. Moreover, these process gas may be used individually by 1 type, and may use 2 or more types together.
　プラズマ処理における処理ガスの流量は、樹脂層を効率よく除去するという観点から、１ｃｍ３／ｍｉｎ以上１０００ｃｍ３／ｍｉｎ以下であることが好ましく、１０ｃｍ３／ｍｉｎ以上１００ｃｍ３／ｍｉｎ以下であることがより好ましい。
　プラズマ処理における処理圧力は、樹脂層を効率よく除去するという観点から、１Ｐａ以上３０００Ｐａ以下であることが好ましく、１０Ｐａ以上２００Ｐａ以下であることがより好ましい。
　プラズマ処理における出力は、樹脂層を効率よく除去するという観点から、１０Ｗ以上６００Ｗ以下であることが好ましい。
　プラズマ処理における処理時間は、樹脂層を効率よく除去するという観点から、３０秒間以上６０分間以下であることが好ましい。 From the viewpoint of efficiently removing the resin layer, the flow rate of the processing gas in the plasma treatment is preferably 1 cm 3 / min or more and 1000 cm 3 / min or less, and preferably 10 cm 3 / min or more and 100 cm 3 / min or less. More preferred.
The treatment pressure in the plasma treatment is preferably 1 Pa or more and 3000 Pa or less, more preferably 10 Pa or more and 200 Pa or less, from the viewpoint of efficiently removing the resin layer.
The output in the plasma treatment is preferably 10 W or more and 600 W or less from the viewpoint of efficiently removing the resin layer.
The treatment time in the plasma treatment is preferably from 30 seconds to 60 minutes from the viewpoint of efficiently removing the resin layer.
　ダイシング工程においては、図３Ｅに示すように、ダイシングブレードによりバンプ付ウエハ２をダイシングする。このようにして、バンプ付ウエハ２をバンプ付チップ２ａに個片化できる。
　ダイシング装置は、特に限定されず、公知のダイシング装置を用いることができる。また、ダイシングの条件についても、特に限定されない。なお、ダイシングブレードの代わりに、レーザーダイシングおよびステルスダイシングなどを用いてもよい。 In the dicing step, as shown in FIG. 3E, the bumped wafer 2 is diced by a dicing blade. In this way, the bumped wafer 2 can be separated into the bumped chips 2a.
The dicing apparatus is not particularly limited, and a known dicing apparatus can be used. Also, the dicing conditions are not particularly limited. Laser dicing and stealth dicing may be used instead of the dicing blade.
　ボンディング工程においては、図３Ｆに示すように、ダイシングにより個片化したバンプ付チップ２ａをピックアップし、基材４１と電極４２とを備える基板４に接着固定する。バンプ付チップ２ａのバンプ２２は、樹脂層１３が除去され、表面が露出されているため、バンプ２２と、基板４の電極４２とを電気的に接続することができる。
　基板４としては、特に限定されないが、リードフレーム、配線基板、並びに、表面に回路が形成されたシリコンウエハおよびシリコンチップなどを用いることができる。基材４１の材質としては、特に限定されないが、セラミックおよびプラスチックなどが挙げられる。また、プラスチックとしては、エポキシ、ビスマレイミドトリアジン、およびポリイミドなどが挙げられる。 In the bonding step, as shown in FIG. 3F, the bumped chip 2 a separated by dicing is picked up and bonded and fixed to the substrate 4 including the base material 41 and the electrode 42. Since the resin layer 13 is removed and the surface of the bump 22 of the chip with bump 2a is exposed, the bump 22 and the electrode 42 of the substrate 4 can be electrically connected.
Although it does not specifically limit as the board | substrate 4, A lead frame, a wiring board, a silicon wafer with a circuit formed on the surface, a silicon chip, etc. can be used. Although it does not specifically limit as a material of the base material 41, A ceramic, a plastics, etc. are mentioned. Examples of the plastic include epoxy, bismaleimide triazine, and polyimide.
　ボンディング工程においては、必要に応じて、加熱処理を施して、接着剤を硬化させてもよい。
　加熱処理の条件は、接着剤の種類などに応じて、適宜設定できる。
　ボンディング工程においては、必要に応じて、リフロー処理を施して、バンプ付チップ２ａのバンプ２２を溶融させて、バンプ付チップ２ａと基板４とをはんだ接合させてもよい。
　リフロー処理の条件は、はんだの種類などに応じて、適宜設定できる。
　以上のようにして、半導体装置１００を製造することができる。 In the bonding step, heat treatment may be performed as necessary to cure the adhesive.
The conditions for the heat treatment can be set as appropriate according to the type of adhesive and the like.
In the bonding step, if necessary, a reflow process may be performed to melt the bumps 22 of the bumped chip 2a, and the bumped chip 2a and the substrate 4 may be soldered.
The reflow processing conditions can be set as appropriate according to the type of solder and the like.
As described above, the semiconductor device 100 can be manufactured.
　（第一実施形態の作用効果）
　本実施形態によれば、次のような作用効果を奏することができる。
（１）樹脂層１３に対してプラズマ処理を施すことで、バンプ２２の表面を覆っている樹脂層１３を除去できる。プラズマ処理は、バンプ形成面２Ａ上の樹脂層の全面に均一に処理ができる。そのため、バンプ２２の表面を覆っている樹脂層１３を、機械的に除去するよりも、簡便で効率よく除去できる。また、バンプ２２の側方から見た断面形状が半円形、半楕円形、円形、長方形または台形である場合でも、バンプ２２の表面を覆っている樹脂層１３を除去できる。さらに、プラズマ処理においては、バンプ２２を削ることなく、バンプ２２の表面を覆っている樹脂層１３のみを容易に除去できる。
（２）バンプ２２の表面を覆っている樹脂層１３が除去され、表面が露出されたバンプ２２と、基板４の電極４２とを電気的に接続することで、表面が露出されたバンプ２２により、バンプ付チップ２ａおよび基板４の電極同士をはんだ接合で接続できる。このようにして、接続信頼性に優れた半導体装置１００が得られる。
（３）バンプ付チップ２ａのバンプ形成面２Ａに、バンプ付チップ２ａと基板４とを接着するための接着剤層（樹脂層１３）を設けることができる。
（４）バンプ付ウエハ２に樹脂層１３を設け、プラズマ処理をした後に、バンプ付チップ２ａに個片化しているので、複数のバンプ付チップ２ａにまとめて樹脂層１３を設けることができる。 (Operational effects of the first embodiment)
According to this embodiment, the following operational effects can be achieved.
(1) By applying plasma treatment to the resin layer 13, the resin layer 13 covering the surface of the bump 22 can be removed. The plasma treatment can uniformly treat the entire surface of the resin layer on the bump forming surface 2A. Therefore, the resin layer 13 covering the surface of the bump 22 can be easily and efficiently removed rather than mechanically removed. Further, even when the cross-sectional shape viewed from the side of the bump 22 is a semicircular shape, a semi-elliptical shape, a circular shape, a rectangular shape or a trapezoidal shape, the resin layer 13 covering the surface of the bump 22 can be removed. Further, in the plasma treatment, only the resin layer 13 covering the surface of the bump 22 can be easily removed without removing the bump 22.
(2) The resin layer 13 covering the surface of the bump 22 is removed, and the bump 22 whose surface is exposed and the electrode 42 of the substrate 4 are electrically connected to each other by the bump 22 whose surface is exposed. The bumped chip 2a and the electrodes of the substrate 4 can be connected by soldering. In this way, the semiconductor device 100 having excellent connection reliability can be obtained.
(3) An adhesive layer (resin layer 13) for bonding the bumped chip 2a and the substrate 4 can be provided on the bump forming surface 2A of the bumped chip 2a.
(4) Since the resin layer 13 is provided on the wafer 2 with bumps and the plasma treatment is performed, the resin layer 13 is separated into the chips 2a with bumps, so that the resin layer 13 can be provided collectively on the plurality of chips 2a with bumps.
　［第二実施形態］
　次に、本発明の第二実施形態を図面に基づいて説明する。
　なお、本実施形態の接着シート１および基板４は、前記第一実施形態における接着シート１および基板４とそれぞれ実質的に同様であるから、その詳細な説明は省略または簡略化する。
　図４Ａ～図４Ｄは、第二実施形態に係る半導体装置の製造方法を示す説明図である。
　前記第一実施形態では、バンプ付ウエハ２に樹脂層１３を形成した後に、プラズマ処理を施し、その後、ダイシングによりバンプ付チップ２ａに個片化した。これに対し、第二実施形態では、予め個片化されたバンプ付チップ２ａに樹脂層１３を形成した後に、プラズマ処理を施している。 [Second Embodiment]
Next, a second embodiment of the present invention will be described based on the drawings.
In addition, since the adhesive sheet 1 and the board | substrate 4 of this embodiment are respectively substantially the same as the adhesive sheet 1 and the board | substrate 4 in said 1st embodiment, the detailed description is abbreviate | omitted or simplified.
4A to 4D are explanatory views showing a method for manufacturing a semiconductor device according to the second embodiment.
In the first embodiment, after the resin layer 13 is formed on the bumped wafer 2, plasma treatment is performed, and then the chips are separated into the bumped chips 2 a by dicing. On the other hand, in the second embodiment, the plasma treatment is performed after the resin layer 13 is formed on the bumped chip 2a that has been separated into pieces.
　本実施形態に係る半導体装置の製造方法においては、先ず、複数のバンプ２２が形成されているバンプ付チップ２ａのバンプ形成面２Ａに樹脂層１３を形成する。具体的には、図４Ａおよび図４Ｂに示すように、接着シート１の樹脂層１３をバンプ付チップ２ａのバンプ形成面２Ａに貼り合わせる工程（接着シート貼着工程）と、接着シート１の支持体層１１および粘着剤層１２を、樹脂層１３から剥離する工程（支持体剥離工程）と、を備える方法により、複数のバンプ２２が形成されているバンプ付チップ２ａのバンプ形成面２Ａに樹脂層１３を形成する。
　本実施形態に係る半導体装置の製造方法においては、次に、図４Ｃに示すように、樹脂層１３にプラズマ処理を施して、バンプ２２の表面を覆っている樹脂層１３を除去する（プラズマ処理工程）。
　そして、図４Ｄに示すように、バンプ付チップ２ａをピックアップし、被着体である基板４に接着固定する工程（ボンディング工程）と、を備える方法により、樹脂層１３が除去され、表面が露出されたバンプ２２と、基板４の電極４２とを電気的に接続する。 In the manufacturing method of the semiconductor device according to the present embodiment, first, the resin layer 13 is formed on the bump forming surface 2A of the bumped chip 2a on which the plurality of bumps 22 are formed. Specifically, as shown in FIGS. 4A and 4B, a step of bonding the resin layer 13 of the adhesive sheet 1 to the bump forming surface 2A of the bumped chip 2a (adhesive sheet attaching step), and the support of the adhesive sheet 1 The body layer 11 and the pressure-sensitive adhesive layer 12 are separated from the resin layer 13 by a method (support body peeling step), and the resin is applied to the bump forming surface 2A of the bumped chip 2a on which the plurality of bumps 22 are formed. Layer 13 is formed.
In the method for manufacturing a semiconductor device according to the present embodiment, next, as shown in FIG. 4C, the resin layer 13 is subjected to plasma treatment to remove the resin layer 13 covering the surface of the bump 22 (plasma treatment). Process).
Then, as shown in FIG. 4D, the resin layer 13 is removed and the surface is exposed by a method including a step (bonding step) of picking up the bumped chip 2a and bonding and fixing it to the substrate 4 as an adherend. The formed bump 22 and the electrode 42 of the substrate 4 are electrically connected.
　本実施形態における接着シート貼着工程、支持体剥離工程、プラズマ処理工程およびボンディング工程については、前記第一実施形態における接着シート貼着工程、支持体剥離工程、プラズマ処理工程およびボンディング工程と同様の方法を採用できる。
　本実施形態によれば、前記第一実施形態における作用効果（１）～（３）と同様の作用効果を奏することができる。 About the adhesive sheet sticking process in this embodiment, a support body peeling process, a plasma processing process, and a bonding process, it is the same as the adhesive sheet sticking process in the said 1st embodiment, a support body peeling process, a plasma processing process, and a bonding process. The method can be adopted.
According to this embodiment, the same operational effects as the operational effects (1) to (3) in the first embodiment can be achieved.
　［実施形態の変形］
　本発明は前述の実施形態に限定されず、本発明の目的を達成できる範囲での変形、改良などは本発明に含まれる。
　例えば、前述の実施形態では、樹脂層１３は、バンプ付チップ２ａと基板４とを接着するための接着剤層として設けられているが、これに限定されない。すなわち、本発明においては、樹脂層を、様々な目的に応じて、設けることができる。例えば、樹脂層１３は、バンプ付チップ２ａと基板４との接続を補強するためのアンダーフィル層として設けられてもよい。また、樹脂層１３は、バンプ付ウエハ２またはバンプ付チップ２ａを保護するための保護層として設けられてもよい。なお、このような場合、樹脂層１３の材料としては、アンダーフィルまたは保護層の材料として公知の材料を用いることができる。
　前述の実施形態では、樹脂層１３は、バンプ付チップ２ａおよび基板４の両方に接しているが、これに限定されない。例えば、樹脂層１３がバンプ付チップ２ａを保護するための保護層として設けられる場合には、樹脂層１３はバンプ付チップ２ａに接していればよく、基板４に接していなくともよい。 [Modification of Embodiment]
The present invention is not limited to the above-described embodiments, and modifications, improvements, and the like within the scope that can achieve the object of the present invention are included in the present invention.
For example, in the above-described embodiment, the resin layer 13 is provided as an adhesive layer for bonding the bumped chip 2 a and the substrate 4, but is not limited thereto. That is, in the present invention, the resin layer can be provided according to various purposes. For example, the resin layer 13 may be provided as an underfill layer for reinforcing the connection between the bumped chip 2 a and the substrate 4. The resin layer 13 may be provided as a protective layer for protecting the bumped wafer 2 or the bumped chip 2a. In such a case, as the material for the resin layer 13, a known material can be used as the material for the underfill or protective layer.
In the above-described embodiment, the resin layer 13 is in contact with both the bumped chip 2a and the substrate 4, but is not limited thereto. For example, when the resin layer 13 is provided as a protective layer for protecting the bumped chip 2 a, the resin layer 13 may be in contact with the bumped chip 2 a and may not be in contact with the substrate 4.
　前述の実施形態では、バンプ付部材として、バンプ付ウエハ２またはバンプ付チップ２ａを用いているが、これに限定されない。例えば、バンプ付部材は、バンプを有するパッケージ（例えば、ＢＧＡ（Ｂａｌｌ　ｇｒｉｄ　ａｒｒａｙ）、ＣＳＰ（Ｃｈｉｐ　ｓｉｚｅ　ｐａｃｋａｇｅ）など）であってもよい。
　前述の実施形態では、接着シート１を用いて樹脂層１３をバンプ形成面２Ａに形成し、バンプ２２を覆っているが、これに限定されない。例えば、樹脂組成物をバンプ形成面２Ａに塗布し硬化させることにより樹脂層１３を形成し、バンプ２２を覆ってもよい。
　前述の実施形態では、支持体層１１、粘着剤層１２および樹脂層１３を備える接着シート１を用いているが、これに限定されない。例えば、接着シート１は、支持体層１１および樹脂層１３を備える積層シートであってもよい。この場合、支持体剥離工程において、樹脂層１３から支持体層１１を剥離すればよい。 In the above-described embodiment, the bumped wafer 2 or the bumped chip 2a is used as the bumped member, but the present invention is not limited to this. For example, the bumped member may be a package having a bump (for example, a BGA (Ball Grid Array), a CSP (Chip size package), or the like).
In the above-described embodiment, the resin layer 13 is formed on the bump forming surface 2A using the adhesive sheet 1 and covers the bumps 22. However, the present invention is not limited to this. For example, the resin layer 13 may be formed by applying and curing a resin composition on the bump forming surface 2A and covering the bumps 22.
In the above-described embodiment, the adhesive sheet 1 including the support layer 11, the pressure-sensitive adhesive layer 12, and the resin layer 13 is used, but is not limited thereto. For example, the adhesive sheet 1 may be a laminated sheet including the support layer 11 and the resin layer 13. In this case, what is necessary is just to peel the support body layer 11 from the resin layer 13 in a support body peeling process.
　以下に、実施例を挙げて本発明をさらに詳細に説明するが、本発明はこれらの実施例に何ら限定されるものではない。
　［実施例１］
　バンプ付チップ（チップの大きさ：６ｍｍ×６ｍｍ、チップの厚み：２００μｍ、バンプの種類：ボールバンプ、バンプの高さ：２００μｍ、バンプの直径：２５０μｍ、バンプのピッチ：４００μｍ）を準備した。また、下記樹脂組成物からなる樹脂層と、粘着剤層（ＵＶ硬化系）と、支持体層とを備える積層シートを準備した。
（樹脂組成物）
アクリル重合体：１００質量部
エポキシ樹脂：３０質量部
エポキシ樹脂硬化剤：１質量部
　積層シートの樹脂層をバンプ付チップのバンプ形成面に貼り合わせた後、積層シート側からＵＶ照射（積算光量：１５０ｍＪ／ｃｍ２）を行い、積層シートの粘着剤層を硬化させた。その後、積層シートの支持体層および粘着剤層を、樹脂層から剥離し、この樹脂層に、熱処理（処理温度：１３０℃、処理時間：２時間）を施した。このようにして、バンプ付チップのバンプ形成面に樹脂層を形成した。そして、このバンプ付チップの樹脂層に、下記の条件にて、プラズマ処理を施し、バンプの表面を覆っている樹脂層を除去して、樹脂層形成バンプ付チップを得た。
（プラズマ処理の条件）
処理ガス：アルゴン
処理ガスの流量：４０ｃｍ３／ｍｉｎ
処理圧力：１００Ｐａ
出力：２５０Ｗ
処理時間：１５分間
パージ：１回
　得られた樹脂層形成バンプ付チップのバンプの表面を、走査型電子顕微鏡（ＳＥＭ）にて観察し、下記基準に従い、樹脂層の除去性を評価した。得られた結果を表１に示す。
Ａ：バンプ上の樹脂層を残渣なく完全に除去できた。
Ｂ：バンプ上の樹脂層を概ね除去できたが、僅かに残渣が残っている。
Ｃ：バンプ上の樹脂層が除去されずに残っている。 Hereinafter, the present invention will be described in more detail with reference to examples. However, the present invention is not limited to these examples.
[Example 1]
A chip with bumps (chip size: 6 mm × 6 mm, chip thickness: 200 μm, bump type: ball bump, bump height: 200 μm, bump diameter: 250 μm, bump pitch: 400 μm) was prepared. Moreover, the laminated sheet provided with the resin layer which consists of the following resin composition, an adhesive layer (UV hardening type), and a support body layer was prepared.
(Resin composition)
Acrylic polymer: 100 parts by mass Epoxy resin: 30 parts by mass Epoxy resin curing agent: 1 part by mass After the resin layer of the laminated sheet is bonded to the bump forming surface of the chip with bumps, UV irradiation (integrated light amount: 150 mJ / cm 2 ), and the pressure-sensitive adhesive layer of the laminated sheet was cured. Thereafter, the support layer and the pressure-sensitive adhesive layer of the laminated sheet were peeled from the resin layer, and heat treatment (treatment temperature: 130 ° C., treatment time: 2 hours) was performed on the resin layer. In this way, a resin layer was formed on the bump forming surface of the bumped chip. Then, the resin layer of the bumped chip was subjected to plasma treatment under the following conditions, and the resin layer covering the surface of the bump was removed to obtain a resin layer-formed bumped chip.
(Plasma treatment conditions)
Process gas: Argon process gas flow rate: 40 cm 3 / min
Processing pressure: 100Pa
Output: 250W
Treatment time: 15 minutes purge: 1 time The surface of the bump of the obtained chip with resin layer forming bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the following criteria. The obtained results are shown in Table 1.
A: The resin layer on the bump was completely removed without residue.
B: Although the resin layer on the bump was almost removed, a slight residue remained.
C: The resin layer on the bump remains without being removed.
　［実施例２～７］
　表１に示す条件に従い、プラズマ処理における処理ガスの種類および流量を変更した以外は実施例１と同様にして、樹脂層形成バンプ付チップを得た。
　得られた樹脂層形成バンプ付チップのバンプの表面を、走査型電子顕微鏡（ＳＥＭ）にて観察し、実施例１と同様の基準に従い、樹脂層の除去性を評価した。得られた結果を表１に示す。 [Examples 2 to 7]
According to the conditions shown in Table 1, a chip with a resin layer forming bump was obtained in the same manner as in Example 1 except that the type and flow rate of the processing gas in the plasma processing were changed.
The surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 1.
　［比較例１］
　プラズマ処理を施さなかった以外は実施例１と同様にして、樹脂層形成バンプ付チップを得た。
　得られた樹脂層形成バンプ付チップのバンプの表面を、走査型電子顕微鏡（ＳＥＭ）にて観察し、実施例１と同様の基準に従い、樹脂層の除去性を評価した。得られた結果を表１に示す。 [Comparative Example 1]
A chip with a resin layer forming bump was obtained in the same manner as in Example 1 except that the plasma treatment was not performed.
The surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 1.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
　表１に示す結果からも明らかなように、実施例１～７で得られた樹脂層形成バンプ付チップでは、バンプ上の樹脂を除去できることが確認された。そのため、樹脂層が除去され、表面が露出されたバンプと、基板の電極とを電気的に接続することで、接続信頼性に優れた半導体装置が製造できる。
　これに対し、比較例１で得られた樹脂層形成バンプ付チップでは、バンプ上の樹脂が残っていることが分かった。 As is clear from the results shown in Table 1, it was confirmed that the resin on the bumps can be removed in the chips with resin layer-formed bumps obtained in Examples 1 to 7. Therefore, a semiconductor device having excellent connection reliability can be manufactured by electrically connecting the bumps whose surfaces are exposed and the electrodes of the substrate are removed from the resin layer.
On the other hand, it was found that the resin on the bumps obtained in Comparative Example 1 remained the resin on the bumps.
　［実施例８］
　下記樹脂組成物からなる樹脂層と、粘着剤層（ＵＶ硬化系）と、支持体層とを備える積層シートを用いた以外は実施例１と同様にして、樹脂層形成バンプ付チップを得た。
（樹脂組成物）
アクリル重合体：１００質量部
エポキシ樹脂：３０質量部
シリカフィラー：３０質量部
エポキシ樹脂硬化剤：１質量部
　得られた樹脂層形成バンプ付チップのバンプの表面を、走査型電子顕微鏡（ＳＥＭ）にて観察し、実施例１と同様の基準に従い、樹脂層の除去性を評価した。得られた結果を表２に示す。 [Example 8]
A chip with a resin layer forming bump was obtained in the same manner as in Example 1 except that a laminated sheet comprising a resin layer comprising the following resin composition, an adhesive layer (UV curing system), and a support layer was used. .
(Resin composition)
Acrylic polymer: 100 parts by mass Epoxy resin: 30 parts by mass Silica filler: 30 parts by mass Epoxy resin curing agent: 1 part by mass The surface of the bump of the obtained chip with the resin layer forming bump was placed on a scanning electron microscope (SEM). According to the same criteria as in Example 1, the removability of the resin layer was evaluated. The obtained results are shown in Table 2.
　［実施例９～１４］
　表２に示す条件に従い、プラズマ処理における処理ガスの種類および流量を変更した以外は実施例８と同様にして、樹脂層形成バンプ付チップを得た。
　得られた樹脂層形成バンプ付チップのバンプの表面を、走査型電子顕微鏡（ＳＥＭ）にて観察し、実施例１と同様の基準に従い、樹脂層の除去性を評価した。得られた結果を表２に示す。 [Examples 9 to 14]
According to the conditions shown in Table 2, a chip with a resin layer forming bump was obtained in the same manner as in Example 8 except that the type and flow rate of the processing gas in the plasma processing were changed.
The surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 2.
　［比較例２］
　プラズマ処理を施さなかった以外は実施例８と同様にして、樹脂層形成バンプ付チップを得た。
　得られた樹脂層形成バンプ付チップのバンプの表面を、走査型電子顕微鏡（ＳＥＭ）にて観察し、実施例１と同様の基準に従い、樹脂層の除去性を評価した。得られた結果を表２に示す。 [Comparative Example 2]
A chip with a resin layer forming bump was obtained in the same manner as in Example 8 except that the plasma treatment was not performed.
The surface of the bump of the obtained chip with resin layer-formed bump was observed with a scanning electron microscope (SEM), and the removability of the resin layer was evaluated according to the same criteria as in Example 1. The obtained results are shown in Table 2.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
　表２に示す結果からも明らかなように、実施例８～１４で得られた樹脂層形成バンプ付チップでは、バンプ上の樹脂を除去できることが確認された。そのため、樹脂層が除去され、表面が露出されたバンプと、基板の電極とを電気的に接続することで、接続信頼性に優れた半導体装置が製造できる。
　また、実施例１～７と実施例８～１４との結果を比較すると、樹脂層がシリカフィラーを含有しない場合の方が、樹脂層の除去性が優れることが分かった。ただし、樹脂層がシリカフィラーを含有する場合でも、処理ガスとして少なくとも六フッ化硫黄を用いた場合や、処理ガスとして四フッ化メタンおよび酸素を併用した場合には、樹脂層の除去性が優れることが確認された。
　これに対し、比較例２で得られた樹脂層形成バンプ付チップでは、バンプ上の樹脂が残っていることが分かった。 As is clear from the results shown in Table 2, it was confirmed that the resin on the bumps could be removed in the resin layer-formed bumped chips obtained in Examples 8 to 14. Therefore, a semiconductor device having excellent connection reliability can be manufactured by electrically connecting the bumps whose surfaces are exposed and the electrodes of the substrate are removed from the resin layer.
Further, comparing the results of Examples 1 to 7 and Examples 8 to 14, it was found that the resin layer has better removability when the resin layer does not contain silica filler. However, even when the resin layer contains a silica filler, when at least sulfur hexafluoride is used as the processing gas, or when tetrafluoromethane and oxygen are used in combination as the processing gas, the resin layer has excellent removability. It was confirmed.
On the other hand, it was found that the resin on the bump remained in the resin layer-formed bumped chip obtained in Comparative Example 2.
　本発明は、半導体装置の製造方法に利用できる。 The present invention can be used in a method for manufacturing a semiconductor device.
　１３…樹脂層、２…バンプ付ウエハ、２２…バンプ、２ａ…バンプ付チップ、４…基板、４２…電極、１００…半導体装置。 DESCRIPTION OF SYMBOLS 13 ... Resin layer, 2 ... Bumped wafer, 22 ... Bump, 2a ... Bumped chip, 4 ... Board | substrate, 42 ... Electrode, 100 ... Semiconductor device.

Claims (5)

  1. 　複数のバンプが形成されているバンプ付部材のバンプ形成面に樹脂層を形成する工程と、
    　前記樹脂層にプラズマ処理を施して、前記バンプの表面を覆っている前記樹脂層を除去する工程と、を備える
    　ことを特徴とする半導体装置の製造方法。     Forming a resin layer on the bump forming surface of the bumped member on which a plurality of bumps are formed;
    Applying a plasma treatment to the resin layer to remove the resin layer covering the surface of the bump. A method for manufacturing a semiconductor device, comprising:
  2. 　請求項１に記載の半導体装置の製造方法において、
    　前記樹脂層が除去され、表面が露出された前記バンプと、基板の電極とを電気的に接続する工程を、さらに備える
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device according to claim 1,
    A method of manufacturing a semiconductor device, further comprising a step of electrically connecting the bump from which the resin layer is removed and the surface is exposed to an electrode of a substrate.
  3. 　請求項１または請求項２に記載の半導体装置の製造方法において、
    　前記プラズマ処理における処理ガスが、酸素、アルゴン、三フッ化メタン、四フッ化メタン、および、六フッ化硫黄からなる群から選択される少なくとも１種である
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device according to claim 1 or 2,
    A process gas in the plasma process is at least one selected from the group consisting of oxygen, argon, trifluoromethane, tetrafluoromethane, and sulfur hexafluoride. .
  4. 　請求項１から請求項３のいずれか１項に記載の半導体装置の製造方法において、
    　前記プラズマ処理における処理ガスの流量が、１ｃｍ３／ｍｉｎ以上１０００ｃｍ３／ｍｉｎ以下である
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device of any one of Claims 1-3,
    A manufacturing method of a semiconductor device, wherein a flow rate of a processing gas in the plasma processing is 1 cm 3 / min or more and 1000 cm 3 / min or less.
  5. 　請求項１から請求項４のいずれか１項に記載の半導体装置の製造方法において、
    　前記プラズマ処理における処理圧力が、１Ｐａ以上３０００Ｐａ以下である
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device of any one of Claims 1-4,
    The process pressure in the said plasma processing is 1 Pa or more and 3000 Pa or less. The manufacturing method of the semiconductor device characterized by the above-mentioned.
PCT/JP2016/057437 2015-05-29 2016-03-09 Method for manufacturing semiconductor device WO2016194431A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2017521714A JP6698647B2 (en) 2015-05-29 2016-03-09 Method of manufacturing semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-109679 2015-05-29
JP2015109679 2015-05-29

Publications (1)

Publication Number Publication Date
WO2016194431A1 true WO2016194431A1 (en) 2016-12-08

Family

ID=57441928

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2016/057437 WO2016194431A1 (en) 2015-05-29 2016-03-09 Method for manufacturing semiconductor device

Country Status (3)

Country Link
JP (1) JP6698647B2 (en)
TW (1) TWI697968B (en)
WO (1) WO2016194431A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017163059A (en) * 2016-03-11 2017-09-14 パナソニックＩｐマネジメント株式会社 Electrode junction method
WO2019189173A1 (en) * 2018-03-30 2019-10-03 リンテック株式会社 Method for manufacturing semiconductor chip
WO2020110619A1 (en) * 2018-11-27 2020-06-04 リンテック株式会社 Semiconductor device manufacturing method
KR20210095863A (en) 2018-11-27 2021-08-03 린텍 가부시키가이샤 Method of manufacturing a semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62136049A (en) * 1985-12-10 1987-06-19 Fuji Electric Co Ltd Manufacture of semiconductor device
JP2005093774A (en) * 2003-09-18 2005-04-07 Fuji Electric Holdings Co Ltd Semiconductor device and micro power converting device, and their manufacturing method

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6338980B1 (en) * 1999-08-13 2002-01-15 Citizen Watch Co., Ltd. Method for manufacturing chip-scale package and manufacturing IC chip
JP2002299505A (en) * 2001-03-29 2002-10-11 Nippon Steel Chem Co Ltd Manufacturing method of semiconductor element
JP2003282614A (en) * 2002-03-20 2003-10-03 Seiko Epson Corp Semiconductor device and its manufacturing method
KR100592866B1 (en) * 2003-03-31 2006-06-23 산요덴키가부시키가이샤 Semiconductor module and manufacturing method thereof
JP2006222232A (en) * 2005-02-09 2006-08-24 Fujitsu Ltd Semiconductor device and its manufacturing method
JP4638768B2 (en) * 2005-05-20 2011-02-23 三井金属鉱業株式会社 Film carrier tape with capacitor circuit and manufacturing method thereof, surface mount film carrier tape with capacitor circuit and manufacturing method thereof
JP4892209B2 (en) * 2005-08-22 2012-03-07 日立化成デュポンマイクロシステムズ株式会社 Manufacturing method of semiconductor device
JP2013021119A (en) * 2011-07-11 2013-01-31 Shin Etsu Chem Co Ltd Wafer-level underfill agent composition, semiconductor device using the same and manufacturing method therefor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62136049A (en) * 1985-12-10 1987-06-19 Fuji Electric Co Ltd Manufacture of semiconductor device
JP2005093774A (en) * 2003-09-18 2005-04-07 Fuji Electric Holdings Co Ltd Semiconductor device and micro power converting device, and their manufacturing method

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017163059A (en) * 2016-03-11 2017-09-14 パナソニックＩｐマネジメント株式会社 Electrode junction method
JP7267259B2 (en) 2018-03-30 2023-05-01 リンテック株式会社 Semiconductor chip manufacturing method
CN111656491A (en) * 2018-03-30 2020-09-11 琳得科株式会社 Method for manufacturing semiconductor chip
KR20200138154A (en) 2018-03-30 2020-12-09 린텍 가부시키가이샤 Semiconductor chip manufacturing method
JPWO2019189173A1 (en) * 2018-03-30 2021-03-25 リンテック株式会社 Semiconductor chip manufacturing method
WO2019189173A1 (en) * 2018-03-30 2019-10-03 リンテック株式会社 Method for manufacturing semiconductor chip
WO2020110619A1 (en) * 2018-11-27 2020-06-04 リンテック株式会社 Semiconductor device manufacturing method
KR20210093915A (en) 2018-11-27 2021-07-28 린텍 가부시키가이샤 Method of manufacturing a semiconductor device
KR20210095863A (en) 2018-11-27 2021-08-03 린텍 가부시키가이샤 Method of manufacturing a semiconductor device
JPWO2020110619A1 (en) * 2018-11-27 2021-10-14 リンテック株式会社 Manufacturing method of semiconductor devices
JP7402176B2 (en) 2018-11-27 2023-12-20 リンテック株式会社 Manufacturing method of semiconductor device
TWI832923B (en) * 2018-11-27 2024-02-21 日商琳得科股份有限公司 Semiconductor device manufacturing method
KR102715198B1 (en) * 2018-11-27 2024-10-08 린텍 가부시키가이샤 Method for manufacturing semiconductor devices

Also Published As

Publication number Publication date
TWI697968B (en) 2020-07-01
JP6698647B2 (en) 2020-05-27
JPWO2016194431A1 (en) 2018-03-22
TW201715623A (en) 2017-05-01

Similar Documents

Publication Publication Date Title
US8124471B2 (en) Method of post-mold grinding a semiconductor package
JP7093210B2 (en) How to process plate-shaped objects
WO2016194431A1 (en) Method for manufacturing semiconductor device
JP2011181822A (en) Method of fabricating semiconductor device
JP6482866B2 (en) Manufacturing method of semiconductor device
TWI601218B (en) Method for manufacturing a chip package having a high-temperature coating layer
TWI819172B (en) Manufacturing method of electronic component packaging
JP6876614B2 (en) Manufacturing method of semiconductor devices and sheets for forming protective films
JP2022123045A (en) Manufacturing method for semiconductor device
JP2017103362A (en) Semiconductor device manufacturing method
JP5710098B2 (en) Manufacturing method of semiconductor device
KR20140017544A (en) Pre-cut wafer applied underfill film on dicing tape
JP2017084903A (en) Method of manufacturing semiconductor device
JP4774999B2 (en) Manufacturing method of semiconductor device
JP7438973B2 (en) Manufacturing method of semiconductor device
JP7065035B2 (en) Manufacturing method of semiconductor device
JP7402176B2 (en) Manufacturing method of semiconductor device
KR20070095636A (en) Method for bonding semiconductor chip and stacking
JP6058414B2 (en) Manufacturing method of semiconductor chip

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16802870

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2017521714

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16802870

Country of ref document: EP

Kind code of ref document: A1