Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
  • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
  • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
  • H03F1/0277—Selecting one or more amplifiers from a plurality of amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
  • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/62—Two-way amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04W—WIRELESS COMMUNICATION NETWORKS
  • H04W24/00—Supervisory, monitoring or testing arrangements
  • H04W24/02—Arrangements for optimising operational condition
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2200/00—Indexing scheme relating to amplifiers
  • H03F2200/111—Indexing scheme relating to amplifiers the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2200/00—Indexing scheme relating to amplifiers
  • H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2200/00—Indexing scheme relating to amplifiers
  • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
  • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
  • H03F2203/21106—An input signal being distributed in parallel over the inputs of a plurality of power amplifiers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
  • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
  • H03F2203/21142—Output signals of a plurality of power amplifiers are parallel combined to a common output
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
  • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
  • H03F2203/21145—Output signals are combined by switching a plurality of paralleled power amplifiers to a common output

Definitions

• the exemplary embodiments relate generally to amplifiers, and specifically to a configurable low noise amplifier module with an output coupler.
• a wireless device in a wireless communication system may transmit and receive data for two-way communication.
• the wireless device may include a transmitter for data transmission and a receiver for data reception.
• the transmitter may modulate a radio frequency (RF) carrier signal with data to generate a modulated RF signal, amplify the modulated RF signal to generate a transmit RF signal having the proper output power level, and transmit the transmit RF signal via an antenna to another device such as, for example, a base station.
• the receiver may obtain a received RF signal via the antenna and may amplify and process the received RF signal to recover data sent by the other device.
• RF radio frequency
• the wireless device may operate within multiple frequency bands. For example, the wireless device may transmit and/or receive an RF signal within a first frequency band and/or within a second frequency band. To support multiple frequency bands and/or diversity operation, the wireless device may include a plurality of transceivers. Each transceiver may include an independent transmitter and receiver that may be tuned to operate within different frequency bands through independent local oscillators.
• Calibration of the receivers may require one or more calibration signals with characteristics (e.g., frequencies) similar to local oscillator frequencies of one or more nearby receivers.
• Implementing signal generators to generate the calibration signals may increase a die size (and therefore the cost) of an associated integrated circuit and introduce complex calibration signal circuit routing to the receiver design.
• FIG. 1 shows a wireless device communicating with a wireless communication system, in accordance with some exemplary embodiments.
• FIG. 2 shows a block diagram of an exemplary design of the wireless device of FIG. 1 .
• FIG. 3 is a band diagram depicting three exemplary band groups that may be supported by the wireless device of FIG. 1 .
• FIG. 4 shows a wireless device that is another embodiment of the wireless device of FIG. 2.
• FIG. 5 is a block diagram showing an LNA module and a transceiver module of the wireless device of FIG. 1 , in accordance with example embodiments.
• FIG. 6A is a block diagram of an LNA module, in accordance with example embodiments.
• FIG. 6B is a block diagram of a coupler of FIG. 6A, in accordance with example embodiments.
• FIG. 7 shows an illustrative flow chart depicting an exemplary operation for operating an LNA module, in accordance with example embodiments.
• circuit elements or software blocks may be shown as buses or as single signal lines.
• Each of the buses may alternatively be a single signal line, and each of the single signal lines may alternatively be buses, and a single line or bus might represent any one or more of a myriad of physical or logical mechanisms for communication between components.
• the present embodiments are not to be construed as limited to specific examples described herein but rather to include within their scope all embodiments defined by the appended claims.
• FIG. 1 shows a wireless device 1 10 communicating with a wireless
• Wireless communication system 120 may be a Long Term Evolution (LTE) system, an LTE Advanced (LTE-A) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a wireless local area network (WLAN) system, or some other wireless system.
• LTE Long Term Evolution
• LTE-A LTE Advanced
• CDMA Code Division Multiple Access
• GSM Global System for Mobile Communications
• WLAN wireless local area network
• a CDMA system may implement Wideband CDMA (WCDMA), CDMA 1X, Evolution-Data Optimized (EVDO), Time Division Synchronous CDMA (TD-SCDMA), or some other version of CDMA.
• WCDMA Wideband CDMA
• CDMA 1X Code Division Multiple Access
• EVDO Evolution-Data Optimized
• TD-SCDMA Time Division Synchronous CDMA
• FIG. 1 shows wireless communication system 120 including two base stations 130 and 132 and one system controller 140.
• a wireless system may include any number of base stations and any set of
• Wireless device 1 10 may also be referred to as user equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a station, etc.
• Wireless device 1 10 may be a cellular phone, a smartphone, a tablet, a wireless modem, a personal digital assistant (PDA), a handheld device, a laptop computer, a smartbook, a netbook, a cordless phone, a wireless local loop (WLL) station, a Bluetooth device, etc.
• Wireless device 1 10 may be referred to as user equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a station, etc.
• Wireless device 1 10 may be a cellular phone, a smartphone, a tablet, a wireless modem, a personal digital assistant (PDA), a handheld device, a laptop computer, a smartbook, a netbook, a cordless phone, a wireless local loop (WLL) station, a Bluetooth device, etc.
• WLL wireless local loop
• Wireless device 1 10 may also receive signals from broadcast stations (e.g. , a broadcast station 134), signals from satellites (e.g., a satellite 150) in one or more global navigation satellite systems (GNSS), etc.
• Wireless device 1 10 may support one or more radio technologies for wireless communication such as LTE, LTE- A, WCDMA, CDMA 1X, EVDO, TD-SCDMA, GSM, 802.1 1 , etc.
• FIG. 2 shows a block diagram of an exemplary design of wireless device 1 10 in FIG. 1 .
• wireless device 1 10 includes a primary transceiver 220 coupled to a primary antenna 210, a secondary transceiver 222 coupled to a secondary antenna 212, and a data processor/controller 280.
• Primary transceiver 220 includes a number (K) of primary receivers 230pa to 230pk and a number (K) of primary transmitters 250pa to 250pk to support multiple frequency bands, multiple radio technologies, carrier aggregation, etc.
• Secondary transceiver 222 includes a number (L) of secondary receivers 230sa to 230sl and a number (L) of secondary transmitters 250sa to 250sl to support multiple frequency bands, multiple radio technologies, carrier aggregation, receive diversity, multiple-input multiple-output (MIMO) transmission from multiple transmit antennas to multiple receive antennas, etc.
• L number of secondary receivers 230sa to 230sl
• L number of secondary transmitters 250sa to 250sl to support multiple frequency bands, multiple radio technologies, carrier aggregation, receive diversity, multiple-input multiple-output (MIMO) transmission from multiple transmit antennas to multiple receive antennas, etc.
• MIMO multiple-input multiple-output
• primary receivers 230pa to 230pk may be coupled to a primary low noise amplifier (LNA) module 240p and primary receive circuits 242pa to 242pk.
• Primary LNA module 240p may include LNAs 240pa to 240pk and secondary LNA module 240s may include LNAs 240sa to 240sl.
• primary antenna 210 receives signals from base stations and/or other transmitter stations and provides a received radio frequency (RF) signal, which is routed through a primary antenna interface circuit 224 and presented as an input RF signal to a selected receiver.
• Primary antenna interface circuit 224 may include switches, duplexers, transmit filters, receive filters, matching circuits, etc.
• primary receiver 230pa is the selected receiver.
• LNA 240pa amplifies the input RF signal and provides an output RF signal.
• Primary receive circuits 242pa downconvert the output RF signal from RF to baseband, amplify and filter the downconverted signal, and provide an analog input signal to data
• Primary receive circuits 242pa may include mixers, filters, amplifiers, matching circuits, an oscillator, a local oscillator (LO) generator, a phase locked loop (PLL), etc.
• LO local oscillator
• PLL phase locked loop
• each primary transmitter 250pa to 250pk includes primary transmit circuits 252pa to 252pk and is coupled to a primary power amplifier module (PA) 254p.
• Primary PA module 254p may include primary power amplifiers 254pa to 254pk and secondary PA module 254s may include secondary power amplifiers 254sa to 254sl.
• data processor/controller 280 processes (e.g., encodes and modulates) data to be transmitted and provides an analog output signal to a selected transmitter. The description below assumes that primary transmitter 250pa is the selected transmitter.
• primary transmit circuits 252pa amplify, filter, and upconvert the analog output signal from baseband to RF and provide a modulated RF signal.
• Primary transmit circuits 252pa may include amplifiers, filters, mixers, matching circuits, an oscillator, an LO generator, a PLL, etc.
• a primary PA 254pa receives and amplifies the modulated RF signal and provides a transmit RF signal having the proper output power level.
• the transmit RF signal is routed through primary antenna interface circuit 224 and transmitted via primary antenna 210.
• Each remaining primary transmitter 250pa to 250pk in primary transceiver 220 and secondary transmitters 250sa to 250sl in second transceiver 222 may operate in similar manner as transmitter 250pa.
• secondary antenna interface circuit 226 may route RF signals between secondary antenna 212 and secondary LNA module 240s and/or secondary power amplifier module 254s.
• Each primary and secondary receiver 230 may also include other circuits not shown in FIG. 2, such as filters, matching circuits, etc.
• All or a portion of primary transceiver 220 and secondary transceiver 222 may be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixed-signal ICs, etc.
• ICs analog integrated circuits
• RFICs RF ICs
• LNAs 240 and receive circuits 242 within transceivers 220 and 222 may be implemented on multiple IC chips, as described below.
• the circuits in transceivers 220 and 222 may also be implemented in other manners.
• primary and secondary receiver 230 may support carrier aggregation and may receive two or more concurrent signals with different carrier frequencies.
• Data processor/controller 280 may perform various functions for wireless device 1 10. For example, data processor/controller 280 may perform processing for data being received via receivers 230 and data being transmitted via transmitters 250. Data
• processor/controller 280 may control the operation of the various circuits within transceivers 220 and 222.
• a memory 282 may store program codes and data for data processor/controller 280.
• Data processor/controller 280 may be implemented on one or more application specific integrated circuits (ASICs) and/or other ICs.
• ASICs application specific integrated circuits
• FIG. 3 is a band diagram 300 depicting three exemplary band groups that may be supported by wireless device 1 10.
• wireless device 1 10 may operate in a low-band (LB) including RF signals having frequencies lower than 1000 megahertz (MHz), a mid-band (MB) including RF signals having frequencies from 1475 MHz to 2170 MHz, a high- band (HB) including RF signals having frequencies from 2300 MHz to 2690 MHz, and/or an ultra-high-band (UHB) including RF signals having frequencies higher than 3400 MHz.
• LB low-band
• MB mid-band
• HB high- band
• UHB ultra-high-band
• low-band RF signals may cover from 698 MHz to 960 MHz
• mid-band RF signals may cover from 1475 MHz to 2170 MHz
• high-band RF signals may cover from 2300 MHz to 2690 MHz
• ultra-high-band RF signals may cover from 3400 MHz to 3800 MHz and
• Low-band, mid-band, and high-band, and ultrahigh band refer to four groups of bands (or band groups), with each band group including a number of frequency bands (or simply, "bands").
• LTE Release 1 1 supports 35 bands, which are referred to as LTE/UMTS bands and are listed in 3GPP TS 36.101 .
• Each band group may cover any range of frequencies, which may or may not match any of the frequency ranges shown in FIG. 3.
• Each band group may also include any number of bands.
• FIG. 4 shows a wireless device 400 that is another embodiment of the wireless device 1 10 of FIG. 2.
• Wireless device 400 includes a first antenna 412, a second antenna 413, a first LNA module 410, a second LNA module 41 1 , a transceiver 420, a processor 430, and a memory 440.
• First LNA module 410 may be another embodiment of LNA module 240p or LNA module 500.
• second LNA module 41 1 may be another embodiment of LNA module 240s or LNA module 500.
• First antenna 412 may be another embodiment of primary antenna 210, and second antenna 413 may be another embodiment of secondary antenna 212.
• transceiver 420 may include transmitters to transmit communication signals and receivers to receive communication signals from other wireless devices.
• first LNA module 410 and second LNA module 41 1 may receive communication signals through first antenna 412 and second antenna 413, respectively. Although only two antennas and two LNA modules are shown in FIG. 4, other embodiments may include other numbers of antennas and/or LNA modules.
• Memory 440 may include a non-transitory computer-readable storage medium (e.g., one or more nonvolatile memory elements, such as EPROM, EEPROM, Flash memory, a hard drive, etc.) that may store the following software modules:
• transceiver control module 442 to control transceiver 420 to transmit and receive
• LNA control software module 444 to control first LNA module 410 and/or second LNA module 41 1 .
• Each software module includes program instructions that, when executed by processor 430, may cause wireless device 400 to perform the corresponding function(s).
• the non- transitory computer-readable storage medium of memory 440 may include instructions for performing all or a portion of the operations of FIG. 7.
• Processor 430 which is coupled to transceiver 420, first LNA module 410, second
• LNA module 41 1 and memory 440, may be any one or more suitable processors capable of executing scripts or instructions of one or more software programs stored in wireless device 400 (e.g., within memory 440).
• Processor 430 may execute transceiver control module 442 to configure transceiver 420 to receive and/or transmit communication signals in accordance with a communication protocol.
• transceiver control module 442 may determine an operating frequency (e.g. , carrier frequency and/or local oscillator frequency) for transceiver 420.
• Transceiver control module 442 may control one or more local oscillators within transceiver 420 that may be used to generate a calibration signal.
• Transceiver control module 442 may also calibrate one or more receivers within transceiver 420 by analyzing an output signal of the receiver and modifying one or more settings associated with the receiver, based on a received calibration signal.
• Processor 430 may execute LNA control software module 444 to control first LNA module 410 and/or second LNA module 41 1 .
• LNA control software module 444 may select a normal operating mode or an output coupling operating mode for first LNA module 410 and/or second LNA module 41 1 .
• LNA control software module 444 may operate first LNA module 410 and/or second LNA module 41 1 in the output coupling operating mode to provide a calibration signal to a receiver within transceiver 420.
• FIG. 5 is a block diagram 500 showing an LNA module 510 and a transceiver module 550 of wireless device 1 10, in accordance with example embodiments.
• LNA module 510 may be another embodiment of primary LNA module 240p and/or secondary LNA module 240s of FIG. 2.
• LNA module 510 may receive RF signals in different frequency bands, including LB, MB, HB and/or UHB.
• transceiver module 550 may be another embodiment of primary transceiver 220 and/or secondary transceiver 222 of FIG. 2.
• LNA module 510 may include a plurality of LNA module input terminals 515, a first LNA module output terminal 517, a second LNA module output terminal 518, and a plurality of LNAs. As shown, LNA module 510 may include a first LNA 520 and a second LNA 521 . In other embodiments, LNA module 510 may include more than two LNAs. Although shown as LNAs, in other embodiments, first LNA 520 and second LNA 521 may be any technically feasible amplifier. In some embodiments, each LNA within LNA module 510 may be coupled to a corresponding LNA module input terminal (e.g., a dedicated input terminal within LNA module input terminals 515).
• LNA module 510 may include other numbers of LNA module output terminals.
• each LNA module output terminal may be coupled to two or more LNA outputs.
• first LNA module output terminal 517 may be coupled to an output from first LNA 520 and an output from second LNA 521 .
• second LNA module output terminal 518 may also be coupled to the output from first LNA 520 and the output from second LNA 521 .
• outputs from each LNA may be routed to a subset of all LNA module output terminals.
• the number of LNA module output terminals may be less than the number of LNA module input terminals.
• LNA module may include a number M of LNA module input terminals and a number N of LNA module output terminals, where M > N.
• Transceiver module 550 may include a plurality of receivers and transmitters. As shown in FIG. 5, transceiver module 550 may include a first receiver 560, a second receiver 561 , a third receiver 562, and a fourth receiver 563. In other embodiments, transceiver module 550 may include other numbers of receivers. Transceiver module 550 may include one or more transmitters (not shown for simplicity). For example, each receiver within transceiver module 550 may be associated with a corresponding transmitter. Each receiver may include a buffer and a mixer.
• first receiver 560 may include a first buffer 570 and a first mixer 571
• second receiver 561 may include a second buffer 572 and a second mixer 573
• third receiver 562 may include a third buffer 574 and a third mixer 575
• fourth receiver 563 may include a fourth buffer 576 and a fourth mixer 577.
• each receiver may include different numbers of buffers, different numbers of mixers, additional components, and/or fewer components.
• each receiver may be associated with an input terminal to receive an input signal.
• first receiver 560 may include a first receiver input terminal 551 coupled to first buffer 570.
• second receiver 561 may include a second receiver input terminal 552 coupled to second buffer 572
• third receiver 562 may include a third receiver input terminal 553 coupled to third buffer 574
• fourth receiver 563 may include a fourth receiver input terminal 554 coupled to fourth buffer 576.
• each receiver may operate with a different local oscillator (LO) signal (e.g., a different LO frequency).
• LO local oscillator
• first receiver 560 may operate with an LOcAi signal
• second receiver 561 may operate with an LO C A2 signal
• third receiver 562 may operate with an LO C A3 signal
• fourth receiver 563 may operate with an LO C A 4 signal.
• first mixer 571 may generate a first mixer output signal 564 based on an output signal from first buffer 570 and LO C AI .
• second mixer 573 may generate a second mixer output signal 565 based on an output signal from second buffer 572 and LO C A2
• third mixer 575 may generate a third mixer output signal 566 based on an output signal from third buffer 574 and LO C A3
• fourth mixer 577 may generate a fourth mixer output signal 567 based on an output signal from fourth buffer 576 and LO C A 4 -
• Each mixer output signal may be coupled to additional components within each respective receiver (not shown for simplicity) to decode and recover data transmitted from other wireless devices.
• LNA module 510 may be coupled to transceiver module 550 through a plurality of circuits to couple LNA module output terminals 517 and 518 to receiver input terminals 551 - 554.
• Circuits may be conductive traces disposed on a circuit board, wires between LNA module 510 and transceiver module 550, or any other technically feasible conductive coupling.
• LNA module 510 and transceiver module 550 may be co-located on a common integrated circuit.
• circuits may be conductive routes (e.g., metal layers, doped silicon, etc.), bond wires, or other on-chip conductive connection.
• an LNA module output terminal may be coupled to two or more input terminals of transceiver module 550.
• first LNA module output terminal 517 may be coupled to first receiver input terminal 551 via a first circuit 540 and to second receiver input terminal 552 via a second circuit 541 .
• second LNA module output terminal 518 may be coupled to third receiver input terminal 553 via a third circuit 542 and to fourth receiver input terminal 554 via a fourth circuit 543.
• other circuit connections between LNA module 510 and transceiver module 550 may be implemented.
• first receiver 560 may be a quadrature receiver receiving an in- phase (I) input signal and a quadrature (Q) input signal through first receiver input terminal 551 .
• First receiver 560 may include two signal processing pathways: a first processing pathway to process the in-phase input signal and a second processing pathway to process the quadrature input signal (processing pathways not shown for simplicity). If signal processing is not balanced (i.e., substantially similar) within the two signal processing pathways, an l/Q mismatch may occur. The l/Q mismatch may reduce an associated signal to noise ratio measurement and may also cause decoding errors associated with a received signal.
• a receiver may be calibrated by receiving and processing a known (e.g. , calibration) signal. An output of the receiver may then be examined and adjustments may be made within the two signal processing pathways to correct any signal processing imbalance.
• a signal provided by one receiver within transceiver module 550 may be used as a calibration signal for another receiver within transceiver module 550.
• Receiver input terminals 551 - 554 may typically receive input signals.
• a receiver input terminal may also generate an output signal. For example, as described above, first receiver 560 may mix LO C AI with an input signal to generate first mixer output signal 564.
• LO C AI may leak through first mixer 571 and buffer 570 to first receiver input terminal 551 .
• LO C AI may be coupled to first receiver input terminal 551 .
• LO C AI may be used as a calibration signal for receivers other than first receiver 560.
• second receiver 561 may receive LO C AI from first receiver 560 through first circuit 540 and second circuit 541 (e.g., via LNA module output terminal 517).
• LNA module 510 may include a configurable coupler to selectively couple two or more LNA module output terminals together. Accordingly, a signal received at a first module output terminal of LNA module 510 (e.g., a leakage signal from a receiver) may be coupled to a second module output terminal of LNA module 510. For example, this allows third receiver 562 and fourth receiver 563 to receive LO C AI and/or LO C A2-
• the configurable coupler is described in more detail below in conjunction with FIGS. 6A and 6B.
• FIG. 6A is a block diagram of an LNA module 600, in accordance with example embodiments.
• LNA module 600 may be another embodiment of LNA module 510 of FIG. 5.
• LNA module 600 may include LNA module input terminals 601 - 605, LNA module output terminals 610 and 61 1 , LNAs 620 - 624, a control signal generator 632, a control block 630, and a coupler 640. In other embodiments, other numbers of LNA module input terminals, LNA module output terminals, and LNAs may be used.
• Each LNA 620 - 624 may be associated with one of LNA module input terminals
• a first LNA module input terminal 601 may be coupled to an input of a first LNA 620.
• LNA module input terminals 602 - 605 may be coupled to LNAs 621 - 624, respectively.
• Outputs from LNAs 620 - 624 (e.g., amplifier output terminals) may be coupled together and also coupled to LNA module output terminals 610 and 61 1 .
• an output from each of LNAs 620 - 624 may be coupled to a first LNA module output terminal 610 and second LNA module output terminal 61 1 .
• the number of LNA module output terminals may be less than the number of LNA module input terminals.
• LNAs 620 - 624 may be controlled via independent LNA control signals 660 - 664, respectively.
• each LNA 620 - 624 may have an independent gain control and/or an independent mode control (e.g., operating mode or inactive mode) through LNA control signals 660 - 664.
• independent mode control e.g., operating mode or inactive mode
• Coupler 640 may couple two LNA module output terminals together. Although only one coupler 640 is shown within LNA module 600, in other embodiments, other numbers of coupler 640 may be used. In some embodiments, coupler 640 may enable a signal received at a first module output terminal to be output by a second module output terminal. For example, coupler 640 may enable a signal received at first LNA module output terminal 610 to be provided to second LNA module output terminal 61 1 . In another example, coupler 640 may enable a signal received at second LNA module output terminal 61 1 to be provided to first LNA module output terminal 610.
• LNAs 620 - 624 when coupler 640 is active (e.g., coupling a first module output terminal to a second module output terminal), LNAs 620 - 624 may be inactive or operating in a minimum gain configuration. In still other embodiments, coupler 640 may isolate the first module output terminal from the second module output terminal.
• coupler 640 may be implemented with a switch unit that may include a mechanical and/or an electrical switch to couple first LNA module output terminal 610 to second LNA module output terminal 61 1 .
• Exemplary electrical switches may be a relay, and/or a transistor (e.g., a bipolar transistor or a MOSFET).
• coupler 640 may include an optional amplifier, such as a bidirectional amplifier. The bidirectional amplifier may receive and amplify signals from a first LNA output terminal and provide them to a second LNA output terminal. Coupler 640 may be controlled by a coupler control signal 665. Coupler 640 is described in more detail below in conjunction with FIG. 6B.
• Control block 630 may receive a module control signal 606 and, in response thereto, drive a mode control signal 631 to a state that may cause LNA module 600 to operate in a normal operating mode or an output coupling operating mode.
• Module control signal 606 may be provided by data processor/controller 280, another device within wireless device 1 10, a separate processor, or any other technically feasible device.
• coupler 640 may be disabled, and at least one LNA from LNAs 620 - 624 may be enabled to provide an LNA output signal to first LNA module output terminal 610 and/or second LNA module output terminal 61 1 .
• LNAs 620 - 624 may be inactive or operate in a minimum gain configuration.
• coupler 640 may couple and/or amplify a signal from a first LNA module output terminal to a second LNA module output terminal.
• Control signal generator 632 may receive mode control signal 631 and, in response thereto, may generate one or more LNA control signals 660 - 664 and coupler control signal 665. In some embodiments, there may be five normal operating modes and two output coupling operating modes. For example, when LNA module 600 operates in one of the normal operating modes, control signal generator 632 may receive mode control signal 631 and assert one or more LNA control signals 660 - 664 to operate one of LNAs 620 - 624, respectively, in a normal mode of operation. Additionally, control signal generator 632 may assert coupler control signal 665 to disable coupler 640.
• control signal generator 632 may assert LNA control signals 660 - 664 to cause respective LNAs 620 - 624 to be inactive or operate them in a minimum gain configuration. Additionally, control signal generator 632 may assert coupler control signal 665 to enable coupler 640, to determine a signal flow direction for coupler 640, and/or to determine an amount of gain that may be provided by coupler 640.
• Example modes and control signals are shown below in Table 1 . For simplicity, table entries associated with variable gain control for coupler 640 have been omitted.
• a signal provided by a first receiver may be used by a second receiver to perform calibration and/or testing.
• Dedicated test signal generators may be eliminated from the receiver design, and LO signal generators from other receivers may be used to provide a calibration and/or test signal.
• FIG. 6B is a block diagram of coupler 640 of FIG. 6A, in accordance with example embodiments.
• Coupler 640 may include an optional bidirectional amplifier 645 (shown within dashed lines).
• Bidirectional amplifier 645 may couple LNA module output terminal 610 to LNA module output terminal 620.
• bidirectional amplifier 645 may receive an LO (leakage) signal as an amplifier input signal through LNA module output terminal 610. Bidirectional amplifier 645 may amplify the LO signal, and couple the amplified LO signal to LNA module output terminal 620. In some embodiments, bidirectional amplifier 645 may also provide selectable amounts of gain, such as between 10 to 20 dB of gain to the received signal.
• LO leakage
• coupler control signal 665 may enable (make active) coupler 640, disable (make inactive and/or isolate) coupler 640, determine gain amounts of bidirectional amplifier 645, and/or determine bidirectional amplifier 645 signal flow direction (e.g., from first LNA module output terminal 610 to second LNA module output terminal 61 1 or from second LNA module output terminal 61 1 to first LNA module output terminal 610).
• coupler control signal 665 may be driven by control signal generator 632.
• FIG. 7 shows an illustrative flow chart depicting an exemplary operation 700 for operating LNA module 600, in accordance with example embodiments.
• an operating mode of LNA module 600 is determined (702).
• LNA module 600 may be operated in an output coupling operating mode to calibrate one or more receivers (e.g., receivers 560 - 563) within wireless device 1 10.
• LNA module 600 may be operated in a normal operating mode to receive communication signals through one or more receivers within wireless device 1 10.
• the operating mode of LNA module 600 may be determined by a module control signal 606 received by LNA module 600.
• LNA module 600 may be configured based on the determined operating mode (704).
• configuration of LNA module 600 may include configuring coupler 640 based on the determined operating mode of LNA module 600 (706).
• coupler 640 may be configured based on the operating mode of LNA module 600 as described above with respect to Table 1 .
• configuration of LNA module 600 may include configuring one or more LNAs included within LNA module 600 based on the
• LNA module 600 determines operating mode of LNA module 600 (708). For example, configuration of LNAs 620 - 624 may be based on the operating mode of LNA module 600 as described above with respect to Table 1 .
• LNA module 600 is operated (710).
• LNA module 600 may be operated based on the LNA module 600 configuration (as determined at 704).
• communication signals may be amplified and/or routed between LNA output terminals based on the determined operating mode of LNA module 600.
• a calibration signal may be routed from a first LNA module output terminal to a second LNA module output terminal.
• a change of the operating mode is determined (712). If the operating mode is to change, then operations proceed to 702. If the operating mode is to remain the same, then operations proceed to 710.
• DSP Digital Signal Processor
• ASIC Application Specific Integrated Circuit
• FPGA Field Programmable Gate Array
• a general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine.
• a processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
• the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
• Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
• a storage media may be any available media that can be accessed by a computer.
• such computer- readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
• any connection is properly termed a computer- readable medium.
• the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave
• the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium.
• Disk and disc includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

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• Transceivers (AREA)
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• Physics & Mathematics (AREA)
• Electromagnetism (AREA)

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