WO2016165550A1 - 触控驱动单元和电路、显示面板及显示装置 - Google Patents

触控驱动单元和电路、显示面板及显示装置 Download PDF

Info

Publication number
WO2016165550A1
WO2016165550A1 PCT/CN2016/077485 CN2016077485W WO2016165550A1 WO 2016165550 A1 WO2016165550 A1 WO 2016165550A1 CN 2016077485 W CN2016077485 W CN 2016077485W WO 2016165550 A1 WO2016165550 A1 WO 2016165550A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
control module
output
touch
pole
Prior art date
Application number
PCT/CN2016/077485
Other languages
English (en)
French (fr)
Inventor
逯家宁
李玮旭
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/307,985 priority Critical patent/US9880662B2/en
Publication of WO2016165550A1 publication Critical patent/WO2016165550A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G06F3/04184—Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a touch driving unit and circuit, a display panel, and a display device.
  • In Cell technology (a technology that integrates touch components into the inside of the display panel) allows the display panel to integrate touch functions, making the module thinner and lighter and more transparent.
  • Hybrid In Cell technology a hybrid touch technology
  • the RX (touch receiving electrode) layer is on the outside of the color film substrate
  • the TX (touch emission electrode) layer is in the Hybrid In Cell technology. It is shared with the common electrode layer of the display panel.
  • the touch drive circuit of the touch emitter electrode needs to be integrated into the driver IC, that is, it needs to be separate.
  • a touch drive circuit for customizing TX in a driver chip is produced, so that once a component in the touch drive circuit has a problem, the entire driver IC needs to be reworked, which is disadvantageous for cost control and gives a narrow border of the display panel. Turning obstacles.
  • Embodiments of the present invention provide a touch driving unit and circuit, a display panel, and a display device, which are advantageous for achieving a narrow frame of the display panel and capable of effectively controlling cost.
  • An aspect of the present invention provides a touch driving unit, where the touch driving unit includes:
  • the shift control module includes a start signal end, an output end, and at least one clock signal end;
  • the selection module includes a first input end and a second input And an output terminal;
  • the buffer module includes an input end and an output end;
  • the amplitude control module includes an input end and an output end;
  • the output end of the selection control module is connected to the first input end of the selection module; the second input end of the selection module inputs a touch time division control signal, and the output end of the selection module is connected to the buffer An input end of the module, an output end of the buffer module is connected to an input end of the amplitude control module; an output end of the amplitude control module is connected to a touch transmitting electrode;
  • the shift control module is configured to generate a shift register signal at the output end under the control of the start signal end and the at least one clock signal end;
  • the selecting module is configured to output a high level signal or a low level signal according to the joint action of the touch time sharing control signal and the shift register signal generated by the shift control module;
  • the buffer module is configured to convert a level of a signal output by the selection module to a level equal to a control signal of an input end of the signal amplitude control module;
  • the amplitude control module is configured to pull up or lower the amplitude of the signal output by the buffer module to generate a touch time-division driving signal, and output the touch time-sharing driving signal to the touch transmitting electrode.
  • the selection module includes: an AND gate circuit.
  • the AND gate circuit includes:
  • a first transistor a first pole of the first transistor is connected to a voltage terminal, a gate of the first transistor is input to the touch time sharing control signal, and a second pole and a fifth transistor of the first transistor are Gate connection
  • a third transistor a first pole of the third transistor is connected to a second pole of the first transistor, a gate of the third transistor is input to the touch time sharing control signal, and a second pole of the third transistor Connected to the first pole of the fourth transistor;
  • a gate of the fourth transistor is connected to an output end of the shift control module, and a second pole of the fourth transistor is grounded;
  • a first pole of the second transistor is connected to a voltage terminal, a gate of the second transistor is connected to a gate of the fourth transistor, and a second pole of the second transistor is opposite to the first transistor a first pole connection of three transistors;
  • a fifth transistor a first pole of the fifth transistor is connected to the voltage terminal, a gate of the fifth transistor is connected to a gate of the sixth transistor, and a second pole of the fifth transistor is opposite to the selection module Output connection;
  • a sixth transistor a first pole of the sixth transistor is connected to a second pole of the fifth transistor, and a second pole of the sixth transistor is grounded.
  • the first transistor, the second transistor, and the fifth transistor belong to the same type of transistor
  • the third transistor, the fourth transistor, and the sixth transistor belong to the same type of transistor.
  • the shift control module includes a shift register.
  • the buffer module includes: a first inverter and a second inverter, wherein:
  • An input end of the first inverter is connected to an output end of the selection module, and an output end of the first inverter is connected to an input end of the second inverter;
  • An output of the second inverter is coupled to an input of the amplitude control module.
  • the amplitude control module includes:
  • a cathode of the first diode is connected to the first level terminal, and an anode of the first diode is connected to an output end of the buffer module;
  • a second diode an anode of the second diode being coupled to the second level terminal, and a cathode of the second diode being coupled to an output of the buffer module.
  • the amplitude control module comprises: a transmission gate circuit.
  • the transmission gate circuit includes:
  • a third inverter an input end of the third inverter is connected to an output end of the buffer module, and an output end of the third inverter is connected to a gate of the seventh transistor;
  • a first pole of the seventh transistor is connected to the second level terminal, and a second pole of the seventh transistor is connected to an output end of the amplitude control module;
  • a first pole of the eighth transistor is connected to the second level terminal, a gate of the eighth transistor is connected to an output end of the buffer module, and a second pole of the eighth transistor is opposite to the amplitude control module Output connection;
  • a gate of the ninth transistor is connected to an output of the third inverter, a first pole of the ninth transistor is connected to the first level terminal, and a second pole of the ninth transistor is opposite to the frame
  • the output of the value control module is connected;
  • a first pole of the tenth transistor is connected to the first level terminal, a gate of the tenth transistor is connected to an output end of the buffer module, and a second pole of the tenth transistor and an output of the amplitude control module End connection.
  • a touch driving circuit includes a plurality of stages, such as any one of the above touch driving units;
  • the start signal end of each of the touch control unit of the touch driving unit is connected to the adjacent one-level touch driving unit The output of the shift control module;
  • the output end of the shift control module in each of the touch driving units is connected to the start signal end of the shift control module of the adjacent lower touch driving unit.
  • An aspect of the present invention provides a display panel including a gate driving circuit and a touch driving circuit disposed in a non-display area, wherein the touch driving circuit is a touch driving circuit as described above, wherein:
  • the touch driving circuit is disposed outside the gate driving circuit and is driven by the same clock signal as the gate driving circuit.
  • a display device including the display panel as described above is provided.
  • Embodiments of the present invention provide a touch driving unit and circuit, a display panel, and a display device, including a shift control module, a selection module, a buffer module, and an amplitude control module, which can be shared by the touch transmitting electrode and the common electrode.
  • the touch-sensing electrode layer of the touch-display panel of the time-division-driven touch display panel outputs a touch-time driving signal and a VCOM common voltage of the common electrode layer, and the touch driving circuit can be fabricated in the non-display area of the display panel.
  • the touch driving circuit of the TX is customized as in the prior art, which is beneficial to realize the narrow frame of the display panel, and at the same time, the touch driving circuit is beneficial to ensure the product yield in the manufacturing process of the display panel. Thus, effective control of costs can be achieved.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a touch driving circuit according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a touch driving circuit according to another embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a touch driving unit according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a selection film block according to another embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a buffer module according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of an amplitude control module according to an embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of an amplitude control module according to another embodiment of the present invention.
  • FIG. 9 is a schematic diagram showing a timing state of a driving signal of a touch driving circuit according to an embodiment of the present invention.
  • the transistor used in all embodiments of the present invention may be a thin film transistor or a field effect transistor or other device having the same characteristics. Since the source and the drain of the transistor used herein are symmetrical, the source and the drain are interchangeable. of. In the embodiment of the present invention, in order to distinguish the two poles of the transistor except the gate, one of the poles is referred to as a source and the other pole is referred to as a drain. In addition, the transistor used in the embodiment of the present invention includes two types of a P-type transistor and an N-type transistor.
  • an embodiment of the present invention provides a display panel including a gate driving circuit GOA and a touch driving circuit TX-GOA disposed in a non-display area, and a touch driving circuit TX-GOA is disposed on the gate driving.
  • the outside of the circuit GOA is driven by the same clock signal as the gate drive circuit GOA.
  • the display panel includes a display area AA and a non-display area other than the display area AA, wherein only one gate driving circuit GOA and the touch driving circuit TX-GOA are shown in FIG. 1 .
  • a double-sided driving example is given in the legend.
  • the gate driving circuit GOA and the touch driving circuit including only the left side or the right side of the display area AA in the legend may be included.
  • the TX-GOA, or the gate driving circuit GOA and the touch driving circuit TX-GOA are respectively disposed on both sides of the display area AA; in addition, according to the prior art display panel, the method further includes: an ESD module (Chinese: electrostatic discharge, English: Electro-Static discharge), Buffer Storage capacitors), COG (Chinese: Chip-on Glass, English: Chip On Glass), and FPC (English: Flexible Printed Circuit Board) for signal output display panels. It is not shown in the drawings, but it can be understood that the implementation of the present scheme can include these structures.
  • ESD module Choinese: electrostatic discharge, English: Electro-Static discharge
  • Buffer Storage capacitors Buffer Storage capacitors
  • COG Chip-on Glass
  • English Chip On Glass
  • FPC Flexible Printed Circuit Board
  • the touch driving circuit can be fabricated in the non-display area of the display panel, the touch driving circuit of the TX is customized as in the prior art, and the display panel is narrowed.
  • the frame is formed, and at the same time, the touch driving circuit is manufactured in the manufacturing process of the display panel to ensure the product yield, thereby enabling cost effective control.
  • an embodiment of the present invention provides a touch driving circuit, which is applied to the above display panel, and includes: a multi-level touch driving unit TXDU.
  • the touch driving unit TXDU includes: a shift control module (SRU) 21, a selection module (AND) 22, a buffer module (Buffer) 23, and an amplitude control module (VC) 24;
  • the module 25 includes a start signal terminal STV, an output terminal OUT1 and at least one clock signal terminal CLK.
  • the selection module 22 includes a first input terminal IN1, a second input terminal IN2 and an output terminal OUT2.
  • the buffer module 23 includes an input terminal IN3 and an output terminal.
  • the amplitude control module 24 includes an input terminal IN4, a first level terminal V1, a second level terminal V2 and an output terminal OUT4; wherein the output terminal OUT1 of the shift control module 11 is connected to the first input terminal IN1 of the selection module 12;
  • the second input terminal IN of the selection module 12 inputs the touch time-sharing control signal EXVCOM, the output terminal OUT2 of the selection module 12 is connected to the input terminal IN3 of the buffer module 13, and the output terminal OUT3 of the buffer module 13 is connected to the input terminal of the amplitude control module 14.
  • IN4; the output terminal OUT4 of the amplitude control module 14 is connected to the touch transmitting electrode TX.
  • the shift control module 21 can be a shift register, wherein FIG.
  • FIG. 2 and FIG. 3 exemplarily show a scheme controlled by two system clocks clockA and clockB, wherein clockA controls an odd-numbered shift register, clockB Control the shift register of even rows; or, clockA controls the shift register of even rows, clockB controls the shift register of odd rows; wherein clockA and clockB have opposite phases, of course, each of the above shift registers is controlled by a clock signal.
  • the shift register may also be a shift register controlled by two or more system clocks, that is, the specific structure of the shift register is not limited in the present application, as long as the technical solution of the present invention can be implemented. Any of the shift registers can be used.
  • the start signal end of each of the touch control units of the touch driving unit is connected to the adjacent upper-level touch.
  • the output of the shift control module in the driving unit except for the last stage shift register unit, the output of the shift control module in each of the touch driving units and the adjacent lower touch driving unit
  • the start signal terminal of the shift control module is connected.
  • the shift control module (SRU) 21 further includes a reset signal terminal RES for resetting the signal of the output terminal OUT1, thereby avoiding a multi-output phenomenon; of course, as shown in FIG.
  • the reset signal terminal RES may be set only in the shift control module (SRU) 21 in the touch driving unit TXDU corresponding to the first row of pixels.
  • the reset signal terminal RES can also be set in the shift control module (SRU) 21 in the touch driving unit TXDU corresponding to each subsequent row of pixels.
  • the reset signal end of the shift control module in each touch driving unit is connected to the output end of the shift control module in the adjacent lower touch driving unit.
  • the second shows a touch drive unit corresponding to the TX of the n-1th row, the nth row, and the n+1th row.
  • the first-level touch driving unit ie, the touch driving unit corresponding to the TX of the first row
  • the selection module 22 includes an AND gate circuit.
  • an AND gate circuit is provided, and the AND circuit includes:
  • the first transistor T1 the first electrode of the first transistor T1 is connected to the voltage terminal Vdd, the gate of the first transistor T1 inputs a touch time division control signal, the second electrode of the first transistor T1 and the gate of the fifth transistor T5 connection;
  • the third transistor T3, the first pole of the third transistor T3 is connected to the second pole of the first transistor T1, the gate of the third transistor T3 is input with the touch time division control signal, and the second pole and the fourth transistor of the third transistor T3 a first pole of the transistor T4 is connected;
  • the fourth transistor T4 the gate of the fourth transistor T4 is connected to the output terminal OUT1 of the shift control module 21, the second pole of the fourth transistor T4 is grounded, that is, connected to Vss;
  • the second transistor T2 the first transistor of the second transistor T2 is connected to the voltage terminal Vdd, the gate of the second transistor T2 is connected to the gate of the fourth transistor T4, and the second electrode of the second transistor T2 is connected to the second transistor T3.
  • the fifth transistor T5, the first electrode of the fifth transistor T5 is connected to the voltage terminal Vdd, the gate of the fifth transistor T5 is connected to the gate of the sixth transistor T6, and the second electrode of the fifth transistor T5 is connected to the output of the selection module 22.
  • Terminal OUT2 is connected;
  • the sixth transistor T6, the first pole of the sixth transistor T6 is connected to the second pole of the fifth transistor T5, and the second pole of the sixth transistor T6 is grounded, that is, connected to Vss.
  • the first transistor T1, the second transistor T2, and the fifth transistor T5 belong to the same type of transistor; for example, the same type of P-type transistor; the third transistor T3, the fourth transistor T4, and the sixth transistor T6 belongs to the same type of transistor, for example, an N-type transistor.
  • the buffer module 23 includes: a first inverter NG1 and a second inverter NG2, wherein:
  • the input end of the first inverter NG1 is connected to the output terminal OUT2 of the selection module 22, the output end of the first inverter NG1 is connected to the input end of the second inverter NG2; the output end of the second inverter NG2 is The input terminal IN4 of the amplitude control module 24 is connected.
  • the amplitude control module 24 includes:
  • the first diode D1, the cathode of the first diode D1 is connected to the first level terminal V1, the anode of the first diode D1 is connected to the output terminal OUT3 of the buffer module 23; the second diode D2, the second The anode of the diode D2 is connected to the second level terminal V2, and the cathode of the second diode is connected to the output terminal OUT3 of the buffer module 23.
  • the amplitude control module 24 includes a transmission gate circuit.
  • the transmission gate circuit includes:
  • the third inverter NG3 the input end of the third inverter NG3 is connected to the output terminal OUT3 of the buffer module 23, and the output end of the third inverter NG3 is connected to the gate of the seventh transistor T7;
  • the first pole of the seventh transistor T7 is connected to the second level terminal V2, and the second pole of the seventh transistor T7 is connected to the output terminal OUT4 of the amplitude control module 24;
  • the first pole of the eighth transistor T8 is connected to the second level terminal V2, the gate of the eighth transistor T8 is connected to the output terminal OUT3 of the buffer module 23, and the second pole of the eighth transistor T8 is connected to the output terminal of the amplitude control module 24. OUT4 connection;
  • the gate of the ninth transistor T9 is connected to the output terminal of the third inverter NG3, the first pole of the ninth transistor T9 is connected to the first level terminal V1, and the second pole of the ninth transistor T9 is connected to the amplitude control module 24
  • the output terminal OUT4 is connected;
  • the first pole of the tenth transistor T10 is connected to the first level terminal V1
  • the gate of the tenth transistor T10 is connected to the output terminal OUT3 of the buffer module 23
  • the second pole of the tenth transistor T10 is connected to the output terminal of the amplitude control module 24. OUT4 connection.
  • a shift control module 21 is used for controlling the start signal terminal STV and at least one clock signal terminal CLK.
  • a shift register signal is generated at the output terminal OUT1;
  • the selection module 22 is configured to output a high level signal VGH or a low level signal VGL according to the interaction of the touch time division control signal EXVCOM and the shift register signal generated by the shift control module 12;
  • the buffer module 23 is configured to convert the level of the signal output by the selection module 22 to a level equal to the control signal of the input end of the signal amplitude control module 24;
  • the amplitude control module 24 is configured to pull up or lower the amplitude of the signal output by the buffer module 23 to generate a touch time-division driving signal, and output a touch time-sharing driving signal to the touch transmitting electrode TX.
  • the touch time-division driving signal is output to the TX (touch emitter electrode) layer or the common electrode of the display panel to meet the touch and display requirements when the TX (touch emitter electrode) layer is shared with the common electrode layer of the display panel.
  • the first level terminal V1 is at a high level VCOMHI
  • the second level terminal V2 is at a low level VCOMLOW.
  • the duration of an STV signal includes a touch period t1 and a display period t2.
  • the scan start signal STV is input to the first-level touch driving unit, referring to the circuit shown in FIG. If the n-1th line is in the first line, under the control of clockA, the shift control module (SRU(n-1)) 21 is at the end time of the t1 time period to the end time of the t2 time period node A (n- 1) Output shift register signal, wherein the shift register signal in FIG.
  • the touch time-sharing control signal EXVCOM is a periodic signal, and in one cycle, the high-level t1 time period outputs a high level, t2 time The segment outputs a low level;
  • the selection module (AND) 22 performs an AND operation on the touch time-sharing control signal EXVCOM and the shift register signal generated by the shift control module 21, and outputs the operation result to the amplitude control module through the cache module 23. 24.
  • the high level signal or the low level signal generated by the AND operation result of the selection module (AND) 22 is boosted by the buffer module 23, and the amplitude control module 24 pulls the input signal to the high level of the first level end.
  • the t1 time period amplitude control module 24 outputs the high level VCOMHI of the first level end to the touch transmitting electrode TX, so that the time period is realized.
  • the low level VCOMLOW, the ground Vss, and the low level of the second level terminal may be the same zero potential or negative voltage, wherein the signal of the node A(n-1) is simultaneously used as the shift control corresponding to the next row.
  • the STV input signal of the module (SRU(n)) 21 triggers the next line (nth line) to start working.
  • the working principle is the same as that of the n-1th line.
  • the node A of the nth line circuit is shown in FIG. The signal timing of (n) and TX(n) will not be described here.
  • the touch driving unit and the circuit provided by the embodiment of the invention include a shift control module, a selection module, a buffer module and an amplitude control module, which can realize the touch output layer of the touch display layer of the touch display panel driven by the time division
  • the VCOM common voltage of the driving signal and the common electrode layer is controlled, and since the touch driving circuit can be fabricated in the non-display area of the display panel, the touch driving circuit for customizing the TX as in the prior art is avoided. It is advantageous to realize the narrow frame of the display panel, and at the same time, since the touch driving circuit is manufactured in the manufacturing process of the display panel, it is beneficial to ensure the product yield, thereby realizing cost effective control.
  • Embodiments of the present invention provide a display device including any of the above display circuits.
  • the display circuit includes a pixel unit, a first gate driving unit, and a second gate driving unit.
  • the display device can be a display device such as an electronic paper, a mobile phone, a television, a digital photo frame, or the like.

Abstract

本发明的实施例提供一种触控驱动单元和电路、显示面板及显示装置。该触控驱动单元包括：移位控制模块，选择模块、缓冲模块和幅值控制模块；所述移位控制模块包括起始信号端、输出端和至少一个时钟信号端；所述选择模块包括第一输入端、第二输入端和输出端；所述缓冲模块包括输入端和输出端；所述幅值控制模块包括输入端和输出端。本发明的实施例用于显示器制造。

Description

触控驱动单元和电路、显示面板及显示装置 技术领域
本发明涉及显示技术领域，尤其涉及触控驱动单元和电路、显示面板及显示装置。
背景技术
由于In Cell技术(一种将触控元器件集成到显示面板内部的技术)可以使显示面板集成触控功能，使模组更加轻薄，透过率更高。目前，越来越多的产品开始采用In Cell屏幕。现在大多数厂商采用Hybrid In Cell技术(一种混合触控技术)，其中在Hybrid In Cell技术中，即RX(触控接收电极)层在彩膜基板的外侧，TX(触控发射电极)层与显示面板的公共电极层共用。
In Cell技术也有其自身的缺点，单就IC(中文：集成电路，英文全称：integrated circuit)而言，需要将触控发射电极(TX)的触控驱动电路整合在驱动IC中，即需要单独制作在一个驱动芯片定制化制作TX的触控驱动电路，这样一旦触控驱动电路中的元器件出现问题，则整个驱动IC都需要重新制作，这样不利于成本控制，而且给显示面板的窄边框化带来阻碍。
发明内容
本发明的实施例提供一种触控驱动单元和电路、显示面板及显示装置，有利于实现显示面板的窄边框化，并能够实现成本的有效控制。
本发明实施例的一方面，提供一种触控驱动单元，所述触控驱动单元包括：
移位控制模块，选择模块、缓冲模块和幅值控制模块；所述移位控制模块包括起始信号端、输出端和至少一个时钟信号端；所述选择模块包括第一输入端、第二输入端和输出端；所述缓冲模块包括输入端和输出端；所述幅值控制模块包括输入端和输出端；
其中，所述移位控制模块的输出端连接所述选择模块的第一输入端；所述选择模块的第二输入端输入触控分时控制信号，所述选择模块的输出端连接所述缓冲模块的输入端，所述缓冲模块的输出端连接所述幅值控制模块的输入端；所述幅值控制模块的输出端连接触控发射电极；
其中，所述移位控制模块，用于在起始信号端和至少一个时钟信号端的控制下在输出端产生移位寄存信号；
所述选择模块，用于根据所述触控分时控制信号和所述移位控制模块产生的移位寄存信号的共同作用输出高电平信号或者低电平信号；
所述缓冲模块，用于将所述选择模块输出的信号的电平转换至与所述信号幅值控制模块的输入端的控制信号相等的电平；
所述幅值控制模块，用于拉升或者降低所述缓冲模块输出的信号的幅值生成触控分时驱动信号，并向所述触控发射电极输出所述触控分时驱动信号。
可选的，所述选择模块包括：与门电路。
可选的，所述与门电路包括：
第一晶体管，所述第一晶体管的第一极与电压端连接，所述第一晶体管的栅极输入所述触控分时控制信号，所述第一晶体管的第二极与第五晶体管的栅极连接；
第三晶体管，所述第三晶体管的第一极与第一晶体管的第二极连接，所述第三晶体管的栅极输入所述触控分时控制信号，所述第三晶体管的第二极与第四晶体管的第一极连接；
第四晶体管，所述第四晶体管的栅极与所述移位控制模块的输出端连接，所述第四晶体管的第二极接地；
第二晶体管，所述第二晶体管的第一极与电压端连接，所述第二晶体管的栅极与所述第四晶体管的栅极连接，所述第二晶体管的第二极与所述第三晶体管的第一极连接；
第五晶体管，所述第五晶体管的第一极与电压端连接，所述第五晶体管的栅极与第六晶体管的栅极连接，所述第五晶体管的第二极与所述选择模块的输出端连接；
第六晶体管，所述第六晶体管的第一极与所述第五晶体管的第二极连接，所述第六晶体管的第二极接地。
可选的，所述第一晶体管、所述第二晶体管和所述第五晶体管属于同一类型的晶体管；
所述第三晶体管、所述第四晶体管和所述第六晶体管属于同一类型的晶体管。
可选的，所述移位控制模块包括移位寄存器。
可选的，所述缓冲模块包括：第一反相器和第二反相器，其中：
所述第一反相器的输入端与所述选择模块的输出端连接，所述第一反相器的输出端与所述第二反相器的输入端连接；
所述第二反相器的输出端与所述幅值控制模块的输入端连接。
可选的，所述幅值控制模块包括：
第一二极管，所述第一二极管的阴极与所述第一电平端连接，所述第一二极管的阳极与所述缓冲模块的输出端连接；
第二二极管，所述第二二极管的阳极与所述第二电平端连接，所述第二二极管的阴极与所述缓冲模块的输出端连接。
可选的，所述幅值控制模块包括：传输门电路。
可选的，所述传输门电路包括：
第三反相器，所述第三反相器的输入端与所述缓冲模块的输出端连接，所述第三反相器的输出端与第七晶体管的栅极连接；
所述第七晶体管的第一极与所述第二电平端连接，所述第七晶体管的第二极与所述幅值控制模块的输出端连接；
第八晶体管的第一极与所述第二电平端连接，所述第八晶体管的栅极与所述缓冲模块的输出端连接，所述第八晶体管的第二极与所述幅值控制模块的输出端连接；
第九晶体管的栅极与所述第三反相器的输出端连接，所述第九晶体管的第一极与所述第一电平端连接，所述第九晶体管的第二极与所述幅值控制模块的输出端连接；
第十晶体管的第一极与所述第一电平端连接，第十晶体管的栅极与所述缓冲模块的输出端连接，所述第十晶体管的第二极与所述幅值控制模块的输出端连接。
一方面，提供一种触控驱动电路，所述触控驱动电路包括多级如上述任一触控驱动单元；
其中，除第一级触控驱动单元外，其余每个触控驱动单元的移位控制模块的起始信号端连接与其相邻的上一级触控驱动单元中的 移位控制模块的输出端；
除最后一级移位寄存器单元外，其余每个触控驱动单元中的移位控制模块的输出端与其相邻的下一级触控驱动单元的移位控制模块的起始信号端连接。
本发明实施例的一方面，提供一种显示面板，包括设置在非显示区域的栅极驱动电路和触控驱动电路，所述触控驱动电路为如上述的触控驱动电路，其中：
所述触控驱动电路设置在所述栅极驱动电路的外侧，且与所述栅极驱动电路采用相同的时钟信号驱动。
本发明实施例的一方面，提供一种显示装置，包括如上述的显示面板。
本发明的实施例提供一种触控驱动单元和电路、显示面板及显示装置，包括移位控制模块，选择模块、缓冲模块和幅值控制模块，能够在触控发射电极和公共电极共用的情况下，实现向分时驱动的触控显示面板的触控发射电极层输出触控分时驱动信号和公共电极层的VCOM公共电压，并且由于该触控驱动电路可以制作在显示面板的非显示区域，因此避免了如现有技术中定制化制作TX的触控驱动电路，有利于实现显示面板的窄边框化，同时由于该触控驱动电路在显示面板的制程工艺中制作有利于保证产品良率，从而能够实现成本的有效控制。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明的实施例提供的一种显示面板的结构示意图；
图2为本发明的实施例提供的一种触控驱动电路的结构示意图；
图3为本发明的另一实施例提供的一种触控驱动电路的结构示意图；
图4为本发明的实施例提供的一种触控驱动单元的结构示意图；
图5为本发明的另一实施例提供的一种选择膜块的结构示意图；
图6为本发明的实施例提供的一种缓冲模块的结构示意图；
图7为本发明的实施例提供的一种幅值控制模块的结构示意图；
图8为本发明的另一实施例提供的一种幅值控制模块的结构示意图；
图9为本发明的实施例提供的触控驱动电路的驱动信号的时序状态示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明所有实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件，由于这里采用的晶体管的源极、漏极是对称的，所以其源极、漏极是可以互换的。在本发明实施例中，为区分晶体管除栅极之外的两极，将其中一极称为源极，另一极称为漏极。此外本发明实施例所采用的晶体管包括P型晶体管和N型晶体管两种。
参照图1所示，本发明的实施例提供一种显示面板，包括设置在非显示区域的栅极驱动电路GOA和触控驱动电路TX-GOA，触控驱动电路TX-GOA设置在栅极驱动电路GOA的外侧，且与栅极驱动电路GOA采用相同的时钟信号驱动。
其中，如图1所示，显示面板包括显示区域A-A，和显示区域A-A之外的非显示区域，其中图1中仅示出了一种栅极驱动电路GOA和触控驱动电路TX-GOA的位置关系，图例中给出了一种双侧驱动示例，当然在单侧驱动的技术方案中也可以是只包括图例中显示区域A-A左侧或右侧的栅极驱动电路GOA和触控驱动电路TX-GOA，或者将栅极驱动电路GOA和触控驱动电路TX-GOA分别设置在显示区域A-A的两侧；此外，根据现有技术显示面板上，还包括：ESD模块(中文：静电释放，英文：Electro-Static discharge)，Buffer(存 储电容)，COG(中文：芯片绑定在玻璃，英文：Chip On Glass)，以及用于信号输出显示面板的FPC(英文：Flexible Printed Circuit board，中文：挠性印刷电路板)，这些结构并未在附图中示出，但是可以理解的是本方案的实现是可以包含这些结构的。
本发明的实施例提供的显示面板，由于触控驱动电路可以制作在显示面板的非显示区域，因此避免了如现有技术中定制化制作TX的触控驱动电路，有利于实现显示面板的窄边框化，同时由于该触控驱动电路在显示面板的制程工艺中制作有利于保证产品良率，从而能够实现成本的有效控制。
参照图2所示，本发明的实施例提供一种触控驱动电路，应用于上述的显示面板，包括：多级触控驱动单元TXDU，
其中，如图4所示，触控驱动单元TXDU包括：移位控制模块(SRU)21，选择模块(AND)22、缓冲模块(Buffer)23和幅值控制模块(VC)24；移位控制模块25包括起始信号端STV、输出端OUT1和至少一个时钟信号端CLK；选择模块22包括第一输入端IN1、第二输入端IN2和输出端OUT2；缓冲模块23包括输入端IN3和输出端OUT3；幅值控制模块24包括输入端IN4、第一电平端V1、第二电平端V2和输出端OUT4；其中，移位控制模块11的输出端OUT1连接选择模块12的第一输入端IN1；选择模块12的第二输入端IN输入触控分时控制信号EXVCOM，选择模块12的输出端OUT2连接缓冲模块13的输入端IN3，缓冲模块13的输出端OUT3连接幅值控制模块14的输入端IN4；幅值控制模块14的输出端OUT4连接触控发射电极TX。其中，移位控制模块21可以为移位寄存器，其中图2和3中示例性的给出了一种通过两个系统时钟clockA和clockB控制的方案，其中clockA控制奇数行的移位寄存器，clockB控制偶数行的移位寄存器；或者，clockA控制偶数行的移位寄存器，clockB控制奇数行的移位寄存器；其中clockA和clockB相位相反，当然以上每个移位寄存器均是通过一个时钟信号控制，当然移位寄存器也可以是通过两个或两个以上的系统时钟控制的移位寄存器，即本申请中并并不对移位寄存器的具体结构做任何限制，只要是能够实现本发明的技术方案的任意一种移位寄存器均可。
其中，如图2所示，除第一级触控驱动单元外，其余每个触控驱动单元的移位控制模块的起始信号端连接与其相邻的上一级触控 驱动单元中的移位控制模块的输出端；除最后一级移位寄存器单元外，其余每个触控驱动单元中的移位控制模块的输出端与其相邻的下一级触控驱动单元的移位控制模块的起始信号端连接。
参照图3所示，移位控制模块(SRU)21，还包括重置信号端RES，用于对输出端OUT1的信号进行复位，从而避免多输出现象发生；当然，如图3所示，可以当第n-1级为第一行像素对应的触控驱动单元TXDU时，可以仅在第一行像素对应的触控驱动单元TXDU中的移位控制模块(SRU)21设置重置信号端RES；当然也可以在之后的各行像素对应的触控驱动单元TXDU中的移位控制模块(SRU)21设置重置信号端RES。此时，每个触控驱动单元中的移位控制模块的重置信号端与其相邻的下一级触控驱动单元中的移位控制模块的输出端连接。
其中，图2中示出第n-1行、第n行及第n+1行的TX对应的触控驱动单元。第一级触控驱动单元(即第1行的TX对应的触控驱动单元)输入STV(扫描起始信号)。
可选的，选择模块22包括：与门电路。示例性的如图5所示，提供一种与门电路，与门电路包括：
第一晶体管T1，第一晶体管T1的第一极与电压端Vdd连接，第一晶体管T1的栅极输入触控分时控制信号，第一晶体管T1的第二极与第五晶体管T5的栅极连接；
第三晶体管T3，第三晶体管T3的第一极与第一晶体管T1的第二极连接，第三晶体管T3的栅极输入触控分时控制信号，第三晶体管T3的第二极与第四晶体管T4的第一极连接；
第四晶体管T4，第四晶体管T4的栅极与移位控制模块21的输出端OUT1连接，第四晶体管T4的第二极接地，即连接Vss；
第二晶体管T2，第二晶体管T2的第一极与电压端Vdd连接，第二晶体管T2的栅极与第四晶体管T4的栅极连接，第二晶体管T2的第二极与第三晶体管T3的第一极连接；
第五晶体管T5，第五晶体管T5的第一极与电压端Vdd连接，第五晶体管T5的栅极与第六晶体管T6的栅极连接，第五晶体管T5的第二极与选择模块22的输出端OUT2连接；
第六晶体管T6，第六晶体管T6的第一极与第五晶体管T5的第二极连接，第六晶体管T6的第二极接地，即连接Vss。
进一步的，上述图5提供的与门电路中，第一晶体管T1、第二晶体管T2和第五晶体管T5属于同一类型的晶体管；例如同为P型晶体管；第三晶体管T3、第四晶体管T4和第六晶体管T6属于同一类型的晶体管，例如同为N型晶体管。
可选的，参照图6所示，缓冲模块23包括：第一反相器NG1和第二反相器NG2，其中：
第一反相器NG1的输入端与选择模块22的输出端OUT2连接，第一反相器NG1的输出端与第二反相器NG2的输入端连接；第二反相器NG2的输出端与幅值控制模块24的输入端IN4连接。
可选的，参照图7所示，幅值控制模块24包括：
第一二极管D1，第一二极管D1的阴极与第一电平端V1连接，第一二极管D1的阳极与缓冲模块23的输出端OUT3连接；第二二极管D2，第二二极管D2的阳极与第二电平端V2连接，第二二极管的阴极与缓冲模块23的输出端OUT3连接。
可选的提供另一种实施方案，参照图8所示，幅值控制模块24包括：传输门电路。示例性的，传输门电路包括：
第三反相器NG3，第三反相器NG3的输入端与缓冲模块23的输出端OUT3连接，第三反相器NG3的输出端与第七晶体管T7的栅极连接；
第七晶体管T7的第一极与第二电平端V2连接，第七晶体管T7的第二极与幅值控制模块24的输出端OUT4连接；
第八晶体管T8的第一极与第二电平端V2连接，第八晶体管T8的栅极与缓冲模块23的输出端OUT3连接，第八晶体管T8的第二极与幅值控制模块24的输出端OUT4连接；
第九晶体管T9的栅极与第三反相器NG3的输出端连接，第九晶体管T9的第一极与第一电平端V1连接，第九晶体管T9的第二极与幅值控制模块24的输出端OUT4连接；
第十晶体管T10的第一极与第一电平端V1连接，第十晶体管T10的栅极与缓冲模块23的输出端OUT3连接，第十晶体管T10的第二极与幅值控制模块24的输出端OUT4连接。
参照图4所示，针对每一个触控驱动单元TXDU，移位控制模块21，用于在起始信号端STV和至少一个时钟信号端CLK的控制 下在输出端OUT1产生移位寄存信号；
选择模块22，用于根据触控分时控制信号EXVCOM和移位控制模块12产生的移位寄存信号的共同作用输出高电平信号VGH或者低电平信号VGL；
缓冲模块23，用于将选择模块22输出的信号的电平转换至与信号幅值控制模块24的输入端的控制信号相等的电平；
幅值控制模块24，用于拉升或者降低缓冲模块23输出的信号的幅值生成触控分时驱动信号，并向触控发射电极TX输出触控分时驱动信号。
如图9所示的时序状态图，其中在Hybrid In Cell技术中，由于TX(触控发射电极)层与显示面板的公共电极层共用，因此，在触控阶段，需要通过本申请提供的电路向TX(触控发射电极)层或显示面板的公共电极输出触控分时驱动信号，以满足TX(触控发射电极)层与显示面板的公共电极层共用时的触控和显示需求。以第一电平端V1为高电平VCOMHI，第二电平端V2为低电平VCOMLOW，进行说明。其中在一个STV信号的时长内，包括一个触控周期t1和一个显示周期t2；在一个帧扫描信号TSVD之后，扫描起始信号STV输入第一级触控驱动单元，参照图2所示的电路，若第n-1行为第一行，则在clockA的控制下，移位控制模块(SRU(n-1))21在t1时间段的开始时刻至t2时间段的结束时刻节点A(n-1)输出移位寄存信号，其中图9中移位寄存信号为高电平信号；触控分时控制信号EXVCOM为一种周期信号，在一个周期内，t1时间段输出高电平，t2时间段输出低电平；选择模块(AND)22将触控分时控制信号EXVCOM和移位控制模块21产生的移位寄存信号做与运算，并将运算结果通过缓存模块23输出至幅值控制模块24，选择模块(AND)22的与运算结果产生的高电平信号或者低电平信号通过缓存模块23后驱动能力加强，幅值控制模块24将输入信号拉高至第一电平端的高电平VCOMHI或者拉低至第二电平端的低电平VCOMLOW，其中参照图9中TX(n-1)的时序可知，t1时间段幅值控制模块24向触控发射电极TX输出第一电平端的高电平VCOMHI，使得在该时段实现触控功能；t2时间段幅值控制模块24向触控发射电极TX输出第二电平端的低电平VCOMLOW(即公共电极层的VCOM公共电 压)，使得在该时段实现显示功能。上述实施例中第二电平端的低电平VCOMLOW、接地Vss以及低电平可以为相同的零电势或负电压，其中，节点A(n-1)的信号同时作为下一行对应的移位控制模块(SRU(n))21的STV输入信号，触发下一行(第n行)电路开始工作，其工作原理同第n-1行相同，附图9中给出了第n行电路的节点A(n)、及TX(n)的信号时序，这里不再赘述。
本发明的实施例提供的触控驱动单元和电路，包括移位控制模块，选择模块、缓冲模块和幅值控制模块，能够实现向分时驱动的触控显示面板的触控发射电极层输出触控分时驱动信号和公共电极层的VCOM公共电压，并且由于该触控驱动电路可以制作在显示面板的非显示区域，因此避免了如现有技术中定制化制作TX的触控驱动电路，有利于实现显示面板的窄边框化，同时由于该触控驱动电路在显示面板的制程工艺中制作有利于保证产品良率，从而能够实现成本的有效控制。
本发明的实施例提供一种显示装置，包括：上述的任一显示电路。其中，显示电路，包括像素单元、第一栅极驱动单元和第二栅极驱动单元。该显示装置可以为电子纸、手机、电视、数码相框等等显示设备。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。
本公开要求于2015年4月16日递交的中国专利申请第201510182106.2号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (14)

  1. 一种触控驱动单元，包括：
    移位控制模块、选择模块、缓冲模块和幅值控制模块；所述移位控制模块包括起始信号端、输出端和至少一个时钟信号端；所述选择模块包括第一输入端、第二输入端和输出端；所述缓冲模块包括输入端和输出端；所述幅值控制模块包括输入端和输出端；
    其中，所述移位控制模块的输出端连接所述选择模块的第一输入端；所述选择模块的第二输入端输入触控分时控制信号，所述选择模块的输出端连接所述缓冲模块的输入端，所述缓冲模块的输出端连接所述幅值控制模块的输入端；所述幅值控制模块的输出端连接触控发射电极；
    其中，所述移位控制模块，用于在起始信号端和至少一个时钟信号端的控制下在输出端产生移位寄存信号；
    所述选择模块，用于根据所述触控分时控制信号和所述移位控制模块产生的移位寄存信号的共同作用输出高电平信号或者低电平信号；
    所述缓冲模块，用于将所述选择模块输出的信号的电平转换至与所述信号幅值控制模块的输入端的控制信号相等的电平；
    所述幅值控制模块，用于拉升或者降低所述缓冲模块输出的信号的幅值生成触控分时驱动信号，并向所述触控发射电极输出所述触控分时驱动信号。
  2. 根据权利要求1所述的触控驱动单元，其中，所述选择模块包括：与门电路。
  3. 根据权利要求2所述的触控驱动单元，其中，所述与门电路包括：
    第一晶体管，所述第一晶体管的第一极与电压端连接，所述第一晶体管的栅极输入所述触控分时控制信号，所述第一晶体管的第二极与第五晶体管的栅极连接；
    第三晶体管，所述第三晶体管的第一极与第一晶体管的第二极连接，所述第三晶体管的栅极输入所述触控分时控制信号，所述第三晶体管的第二极与第四晶体管的第一极连接；
    第四晶体管，所述第四晶体管的栅极与所述移位控制模块的输 出端连接，所述第四晶体管的第二极接地；
    第二晶体管，所述第二晶体管的第一极与电压端连接，所述第二晶体管的栅极与所述第四晶体管的栅极连接，所述第二晶体管的第二极与所述第三晶体管的第一极连接；
    第五晶体管，所述第五晶体管的第一极与电压端连接，所述第五晶体管的栅极与第六晶体管的栅极连接，所述第五晶体管的第二极与所述选择模块的输出端连接；
    第六晶体管，所述第六晶体管的第一极与所述第五晶体管的第二极连接，所述第六晶体管的第二极接地。
  4. 根据权利要求3所述的触控驱动单元，其中，
    所述第一晶体管、所述第二晶体管和所述第五晶体管属于同一类型的晶体管；
    所述第三晶体管、所述第四晶体管和所述第六晶体管属于同一类型的晶体管。
  5. 根据权利要求1所述的触控驱动单元，其中，所述移位控制模块包括移位寄存器。
  6. 根据权利要求1所述的触控驱动单元，其中，所述缓冲模块包括：第一反相器和第二反相器，其中：
    所述第一反相器的输入端与所述选择模块的输出端连接，所述第一反相器的输出端与所述第二反相器的输入端连接；
    所述第二反相器的输出端与所述幅值控制模块的输入端连接。
  7. 根据权利要求1所述的触控驱动单元，其中，所述幅值控制模块包括：
    第一电平端，所述第一电平端连接第一电平；
    第二电平端，所述第二电平端连接第二电平；
    第一二极管，所述第一二极管的阴极与所述第一电平端连接，所述第一二极管的阳极与所述缓冲模块的输出端连接；
    第二二极管，所述第二二极管的阳极与所述第二电平端连接，所述第二二极管的阴极与所述缓冲模块的输出端连接。
  8. 根据权利要求7所述的触控驱动单元，其中所述幅值控制模块根据所述第一电平拉升所述缓冲模块输出的信号的幅值并且根据所述第二电平降低所述缓冲模块输出的信号的幅值以生成触控分时驱动信号，并向所述触控发射电极输出所述触控分时驱动信号。
  9. 根据权利要求1所述的触控驱动单元，其中，所述幅值控制模块包括：传输门电路。
  10. 根据权利要求9所述的触控驱动单元，其中，所述幅值控制模块包括：
    第一电平端，所述第一电平端连接第一电平；
    第二电平端，所述第二电平端连接第二电平；
    所述传输门电路包括：
    第三反相器，所述第三反相器的输入端与所述缓冲模块的输出端连接，所述第三反相器的输出端与第七晶体管的栅极连接；
    所述第七晶体管的第一极与所述第二电平端连接，所述第七晶体管的第二极与所述幅值控制模块的输出端连接；
    第八晶体管的第一极与所述第二电平端连接，所述第八晶体管的栅极与所述缓冲模块的输出端连接，所述第八晶体管的第二极与所述幅值控制模块的输出端连接；
    第九晶体管的栅极与所述第三反相器的输出端连接，所述第九晶体管的第一极与所述第一电平端连接，所述第九晶体管的第二极与所述幅值控制模块的输出端连接；
    第十晶体管的第一极与所述第一电平端连接，第十晶体管的栅极与所述缓冲模块的输出端连接，所述第十晶体管的第二极与所述幅值控制模块的输出端连接。
  11. 根据权利要求10所述的触控驱动单元，其中所述幅值控制模块根据所述第一电平拉升所述缓冲模块输出的信号的幅值并且根据所述第二电平降低所述缓冲模块输出的信号的幅值以生成触控分时驱动信号，并向所述触控发射电极输出所述触控分时驱动信号。
  12. 一种触控驱动电路，包括多级如权利要求1～11任一所述的触控驱动单元；
    其中，除第一级触控驱动单元外，其余每个触控驱动单元的移位控制模块的起始信号端连接与其相邻的上一级触控驱动单元中的移位控制模块的输出端；
    除最后一级移位寄存器单元外，其余每个触控驱动单元中的移位控制模块的输出端与其相邻的下一级触控驱动单元的移位控制模块的起始信号端连接。
  13. 一种显示面板，包括设置在非显示区域的栅极驱动电路和 触控驱动电路，所述触控驱动电路为如权利要求12所述的触控驱动电路，其中：
    所述触控驱动电路设置在所述栅极驱动电路的外侧，且与所述栅极驱动电路采用相同的时钟信号驱动。
  14. 一种显示装置，包括如权利要求13所述的显示面板。
PCT/CN2016/077485 2015-04-16 2016-03-28 触控驱动单元和电路、显示面板及显示装置 WO2016165550A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/307,985 US9880662B2 (en) 2015-04-16 2016-03-28 Touch driving unit and circuit, display panel and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510182106.2 2015-04-16
CN201510182106.2A CN104777936B (zh) 2015-04-16 2015-04-16 触控驱动单元和电路、显示面板及显示装置

Publications (1)

Publication Number Publication Date
WO2016165550A1 true WO2016165550A1 (zh) 2016-10-20

Family

ID=53619446

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/077485 WO2016165550A1 (zh) 2015-04-16 2016-03-28 触控驱动单元和电路、显示面板及显示装置

Country Status (3)

Country Link
US (1) US9880662B2 (zh)
CN (1) CN104777936B (zh)
WO (1) WO2016165550A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104777936B (zh) 2015-04-16 2016-08-24 京东方科技集团股份有限公司 触控驱动单元和电路、显示面板及显示装置
CN105528984A (zh) 2016-02-02 2016-04-27 京东方科技集团股份有限公司 发射电极扫描驱动单元、驱动电路以及驱动方法、阵列基板
CN106569650B (zh) * 2016-11-02 2020-03-10 武汉华星光电技术有限公司 一种触摸面板及显示装置
KR20180078934A (ko) * 2016-12-30 2018-07-10 엘지디스플레이 주식회사 연산 증폭기를 갖는 터치 전원 회로 및 그를 이용한 터치 디스플레이 장치
CN107633798B (zh) * 2017-10-11 2020-03-17 深圳市华星光电半导体显示技术有限公司 电位转换电路及显示面板
CN108089769B (zh) * 2018-01-26 2020-11-24 武汉华星光电技术有限公司 触控显示面板
CN111223459B (zh) 2018-11-27 2022-03-08 元太科技工业股份有限公司 移位寄存器以及栅极驱动电路
CN110199344B (zh) * 2019-04-01 2021-10-15 京东方科技集团股份有限公司 栅极驱动电路、阵列基板及显示装置
KR102137638B1 (ko) * 2020-01-15 2020-07-27 주식회사 사피엔반도체 디스플레이 패널의 보다 세분화된 밝기 제어가 가능한 디스플레이 장치
CN112578940B (zh) * 2020-12-18 2022-06-10 武汉华星光电半导体显示技术有限公司 显示面板以及显示装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101604501A (zh) * 2008-06-12 2009-12-16 奇景光电股份有限公司 栅极驱动器及显示面板
CN104485082A (zh) * 2014-12-31 2015-04-01 厦门天马微电子有限公司 一种阵列基板和触控显示装置及其驱动方法
CN104635992A (zh) * 2015-03-11 2015-05-20 京东方科技集团股份有限公司 触控面板及显示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030169169A1 (en) * 2000-08-17 2003-09-11 Luc Wuidart Antenna generating an electromagnetic field for transponder
KR100795328B1 (ko) * 2006-11-30 2008-01-21 삼성전자주식회사 정전기 방전 특성을 고려한 전계효과 트랜지스터의 모델링회로
EP2457155B1 (en) * 2009-07-21 2017-10-11 Tadao Nakamura A lower energy comsumption and high speed computer without the memory bottleneck
JP6211409B2 (ja) * 2013-12-09 2017-10-11 株式会社ジャパンディスプレイ 表示装置
CN104536627B (zh) * 2014-12-29 2017-11-14 厦门天马微电子有限公司 一种触控驱动检测电路、显示面板和显示装置
CN104505014B (zh) * 2014-12-31 2017-02-22 厦门天马微电子有限公司 一种驱动电路、阵列基板和触控显示装置及其驱动方法
CN104777936B (zh) 2015-04-16 2016-08-24 京东方科技集团股份有限公司 触控驱动单元和电路、显示面板及显示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101604501A (zh) * 2008-06-12 2009-12-16 奇景光电股份有限公司 栅极驱动器及显示面板
CN104485082A (zh) * 2014-12-31 2015-04-01 厦门天马微电子有限公司 一种阵列基板和触控显示装置及其驱动方法
CN104635992A (zh) * 2015-03-11 2015-05-20 京东方科技集团股份有限公司 触控面板及显示装置

Also Published As

Publication number Publication date
US20170068385A1 (en) 2017-03-09
CN104777936B (zh) 2016-08-24
US9880662B2 (en) 2018-01-30
CN104777936A (zh) 2015-07-15

Similar Documents

Publication Publication Date Title
WO2016165550A1 (zh) 触控驱动单元和电路、显示面板及显示装置
US10127875B2 (en) Shift register unit, related gate driver and display apparatus, and method for driving the same
US11127478B2 (en) Shift register unit and driving method thereof, gate driving circuit, and display device
US10019949B2 (en) Shift register unit, gate driving circuit, display panel and display device
JP6434620B2 (ja) 液晶表示用ｇｏａ回路及び液晶表示装置
WO2017133117A1 (zh) 移位寄存器及其驱动方法、栅极驱动电路和显示装置
US9530521B2 (en) Shift register unit, gate driving circuit, and display device
KR102607402B1 (ko) 게이트 구동 회로와 이를 이용한 표시장치
KR101352289B1 (ko) 표시장치
WO2013177918A1 (zh) 移位寄存器单元、移位寄存器电路、阵列基板及显示器件
WO2019233225A1 (zh) 移位寄存器电路及显示装置
US10777289B2 (en) Shift register unit and driving method thereof, gate driving circuit, display panel and display device
KR101366877B1 (ko) 표시장치
US20210118373A1 (en) Shift register, driving method thereof, driving circuit, and display device
US10930198B2 (en) Shift register unit and driving method thereof, gate driving circuit and display panel
US20190385517A1 (en) Foldable display panel and driving method thereof
KR20120044771A (ko) 게이트 쉬프트 레지스터와 이를 이용한 표시장치
KR20160017390A (ko) 디스플레이 장치의 게이트 드라이버
WO2020164525A1 (zh) 移位寄存器单元、驱动方法、栅极驱动电路及显示装置
US20180174548A1 (en) Shift register, gate driving circuit and display panel
US10825412B2 (en) Liquid crystal panel including GOA circuit and driving method thereof
KR102455584B1 (ko) Oled 표시패널과 이를 이용한 oled 표시 장치
EP3742424B1 (en) Shift register, driving method therefor and gate drive circuit
CN107331295B (zh) 显示器面板
US20190073960A1 (en) Scan driving circuit for oled and display panel

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15307985

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16779525

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16779525

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 16779525

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 200418)

122 Ep: pct application non-entry in european phase

Ref document number: 16779525

Country of ref document: EP

Kind code of ref document: A1