WO2016145695A1 - 薄膜晶体管以及液晶显示器 - Google Patents

薄膜晶体管以及液晶显示器 Download PDF

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WO2016145695A1
WO2016145695A1 PCT/CN2015/075879 CN2015075879W WO2016145695A1 WO 2016145695 A1 WO2016145695 A1 WO 2016145695A1 CN 2015075879 W CN2015075879 W CN 2015075879W WO 2016145695 A1 WO2016145695 A1 WO 2016145695A1
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thin film
film transistor
light shielding
shielding layer
substrate
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PCT/CN2015/075879
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English (en)
French (fr)
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卢廷豪
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深圳市华星光电技术有限公司
武汉华星光电技术有限公司
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Priority to US14/778,117 priority Critical patent/US10082713B2/en
Publication of WO2016145695A1 publication Critical patent/WO2016145695A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices
    • H01L29/765—Charge-coupled devices
    • H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Definitions

  • the present invention relates to the field of liquid crystal display, and in particular to a thin film transistor.
  • the invention also relates to a liquid crystal display comprising such a thin film transistor.
  • thin film transistors i.e., TFTs well known to those skilled in the art
  • TFTs thin film transistors
  • the electrical properties of thin film transistors have an important relationship with the quality of liquid crystal displays.
  • a thin film transistor is formed by laminating a plurality of oxides (i.e., conductive laminates).
  • oxides i.e., conductive laminates
  • the electrical properties of these oxides are not stable enough and are very susceptible to external factors, especially light. For example, light can affect the electrical properties of these oxides, resulting in increased leakage currents that adversely affect the electrical performance of thin film transistors.
  • the present invention proposes a thin film transistor.
  • a light shielding layer that shields the conductive laminate is provided in the thin film transistor of the present invention, thereby effectively preventing the illumination from adversely affecting the electrical properties of these oxides, and thereby improving the electrical properties of the thin film transistor.
  • a thin film transistor comprising a substrate, a conductive stack disposed on the substrate, and a light shielding layer disposed on the substrate, wherein the light shielding layer is under the conductive stack and both The position is right.
  • the thin film transistor of the present invention since the light shielding layer is provided, the light under the substrate cannot be irradiated to the conductive laminate, thereby preventing the electrical properties of the conductive laminate from being deteriorated by light, thereby ensuring that the thin film transistor has good Performance.
  • the thin film transistor of the present invention when used in a liquid crystal display, the thin film transistor has good electrical properties, thereby ensuring good display quality of the liquid crystal display.
  • the pattern size of the light shielding layer is greater than or equal to the pattern size of the conductive stack. In this way, scattered light can be prevented from passing over the light shielding layer and irradiated onto the conductive laminate, ensuring that the electrical properties of the conductive laminate are not affected.
  • the conductive stack is disposed on the first surface of the substrate, and the light shielding layer is disposed on the second surface of the substrate, the first surface and the second surface being opposite each other.
  • the conductive laminate and the light shielding layer are on different sides of the substrate.
  • the conductive laminate is a completely flat structure, and there is no hill climbing region due to the conductive laminate having a convex region. Thereby, the adverse effect of the climbing area on the electrical performance of the conductive laminate is avoided. This helps to further improve the electrical performance of the thin film transistor.
  • a photosensitive material is disposed on the second surface of the substrate, and the light shielding layer is formed by exposing the photosensitive material corresponding to the conductive laminate and becoming opaque. This way, the position and area of the light shielding layer can be precisely controlled, and the light shielding layer can be prevented from being formed in a region other than the light shielding layer to be formed, which is very advantageous for implementing such a light shielding layer in a liquid crystal display.
  • an opaque layer is provided on a region of the second surface of the substrate facing the conductive stack to form a light shielding layer.
  • the opaque layer is a metal layer or a non-metal oxide layer.
  • the opaque layer is one of aluminum, molybdenum, aluminum bismuth alloy and silicon dioxide.
  • the conductive stack is disposed on a first surface of the substrate and the light shielding layer is disposed on an interior of the substrate.
  • the light shielding layer is completely free from damage from the external environment and does not cause a climbing area to be created in the conductive laminate.
  • a photosensitive material is disposed inside the substrate, and the light shielding layer is formed by exposing the photosensitive material corresponding to the conductive laminate and becoming opaque.
  • This method also precisely controls the position and area of the light shielding layer, and prevents the formation of a light shielding layer in a region other than the light shielding layer to be formed, which is very advantageous for implementing such a light shielding layer in a liquid crystal display.
  • a light shielding layer does not need to be fixedly disposed on the outer surface of the substrate or form an additional opaque layer or opaque substance, but only requires selective exposure. Light, which greatly simplifies the fabrication process of the thin film transistor or light shielding layer, and thereby reduces the cost.
  • a liquid crystal display comprising a thin film transistor according to the above.
  • the present invention has the advantages that: (1) a light shielding layer is provided in the thin film transistor of the present invention, so that light under the substrate cannot be irradiated to the conductive laminate, thereby preventing the conductive stack The electrical properties of the layer are degraded by illumination, ensuring good performance of the thin film transistor. Especially suitable for use in liquid crystal displays. (2) The conductive laminate and the light shielding layer are on different sides of the substrate. Thus, there is no hill climbing zone on the conductive laminate due to the conductive laminate having a raised region. Thereby, the adverse effect of the climbing area on the electrical performance of the conductive laminate is avoided. This helps to further improve the electrical performance of the thin film transistor.
  • Fig. 1 schematically shows a first embodiment of a thin film transistor according to the present invention.
  • Fig. 2 schematically shows a second embodiment of a thin film transistor according to the present invention.
  • Fig. 3 schematically shows the structure of a thin film transistor having a climbing area.
  • FIGS 4 and 5 schematically show the features of the materials of the different regions of Figure 3.
  • Fig. 1 schematically shows a first embodiment of a thin film transistor 10 in accordance with the present invention.
  • the thin film transistor 10 includes a substrate 1, a conductive laminate 2 disposed on the substrate 1, and a light shielding layer 3 disposed on the substrate 1.
  • the substrate 1 may be a transparent glass substrate.
  • the conductive stack 2 typically includes a source, a drain, an oxide active layer, a gate insulating layer, and a gate, which are well known to those skilled in the art and will not be described again.
  • the light shielding layer 3 is an opaque layer.
  • the light shielding layer 3 is below the conductive laminate 2 and the position of the light shielding layer 3 is directly opposite to the position of the conductive laminate 2.
  • light from under the substrate 1 is not irradiated onto the conductive laminate 2, so that the electrical properties of the conductive laminate 2 are not deteriorated by light, and the electrical properties of the thin film transistor 10 are thus kept better.
  • the pattern size of the light shielding layer 3 is greater than or equal to the pattern size of the conductive layer 2 to prevent scattered light.
  • the light shielding layer 3 is bypassed and irradiated onto the conductive laminate 2.
  • the conductive laminate 2 and the light shielding layer 3 are respectively disposed on different sides of the substrate 1. As shown in FIG. 1, the conductive laminate 2 is disposed on the first surface 11 of the substrate 1, and the light shielding layer 3 is disposed on the second surface 12 of the substrate 1, and the first surface 11 and the second surface 12 are opposed to each other.
  • the conductive laminate 2 is a completely flat structure, particularly a portion having no protrusion.
  • the grain size and morphology of the material of the conductive laminate 2 and the thickness of the conductive laminate 2 are substantially the same. This makes the electrical performance of the conductive laminate 2 uniform in each region as a whole, so that the electrical performance of the thin film transistor 10 is also good.
  • the conductive laminate 2' shown in Fig. 3 has a climbing area 40.
  • the climbing area 40 is formed for the following reason: an additional layer 41 is disposed between the conductive laminate 2' and the substrate 1'.
  • the additional layer 41 may be a light shielding layer. Since the additional layer 41 has a certain thickness, the region 42 of the conductive laminate 2' above the additional layer 41 is lifted, i.e., the conductive laminate 2' has a raised region 42 and a raw region 43.
  • a climbing area 40 is formed between the original area 43 and the convex area 42.
  • the grain size in the raised region 42 or the original region 43 (as shown in Figure 4) is much larger than the grain size in the climbing region 40 (as shown in Figure 5). Therefore, the electrical properties of the conductive laminate 2' also have different electrical properties in different regions due to different material characteristics in different regions, which has an adverse effect on the electrical properties of the thin film transistor.
  • the light shielding layer 3 shown in Fig. 1 can be realized by providing a photosensitive material layer on the second surface 12 of the substrate 1.
  • the light shielding layer 3 is formed by exposing the photosensitive material corresponding to the conductive laminate 2 and becoming opaque.
  • the photosensitive material may be a silver halide, such as silver iodide; it may also be a dichromate, such as ammonium dichromate. Other similar photosensitive materials can also be used herein, and will not be described again here.
  • the light-shielding layer 3 can be formed by selectively exposing the photosensitive material by means of a mask, which is very advantageous for controlling the position and area of the light-shielding layer 3.
  • the light shielding layer 3 shown in FIG. 1 can also be realized by providing an opaque layer on the region of the second surface 12 of the substrate 1 facing the conductive laminate 2 to form the light shielding layer 3.
  • the opaque layer can be a metal layer or a non-metal oxide layer.
  • the metal layer is an aluminum, molybdenum or aluminum tantalum alloy.
  • the non-metallic layer can be silicon dioxide.
  • the thickness of such an opaque layer can be between 5 microns and 8 microns.
  • Such an opaque layer can be formed by evaporation coating, magnetron sputtering, or the like, and can be firmly attached to the substrate 1.
  • Fig. 2 schematically shows the light shielding layer 32 of the second embodiment.
  • the light shielding layer 32 is formed inside the substrate 1, and the position of the light shielding layer 32 and the conductive laminate 2 is opposite. Since the light shielding layer 32 is inside the substrate 1, the influence and destruction of the light shielding layer 32 by external factors can be completely avoided. It is therefore also ensured that the electrically conductive laminate 2 is not affected by the illumination.
  • a photosensitive material may be disposed inside the substrate 1, and the light shielding layer 32 may be formed by exposing the photosensitive material corresponding to the conductive laminate 2 and becoming opaque.
  • the photosensitive material may be a silver halide such as silver iodide; it may also be a dichromate such as ammonium dichromate. Other similar photosensitive materials can also be used herein, and will not be described again here.
  • a photosensitive material can be added thereto when the substrate 1 is prepared. When a thin film transistor is prepared using such a substrate 1, the photosensitive material is selectively exposed by means of a mask (not shown) to form the light shielding layer 32. This eliminates the need to provide any opaque layer or opaque substance on the outer surface of the substrate 1, thus greatly simplifying the fabrication process of the thin film transistor or the liquid crystal display, and thereby reducing the cost.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Ceramic Engineering (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Health & Medical Sciences (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

一种薄膜晶体管（10）以及液晶显示器，该薄膜晶体管（10）包括基板（1），设置在基板（1）上的导电叠层（2），和设置在基板（1）上的光屏蔽层（3）。其中，光屏蔽层（3）处于导电叠层（2）的下方并且两者的位置正对。薄膜晶体管（10）中设置有为导电叠层（2）遮光的光屏蔽层（3），从而可有效防止光照不利地影响这些氧化物的电学性能，并由此提高了薄膜晶体管（10）的电性能。

Description

薄膜晶体管以及液晶显示器
相关申请的交叉引用
本申请要求享有于2015年3月17日提交的名称为“薄膜晶体管以及液晶显示器”的中国专利申请CN201510116545.3的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本发明涉及液晶显示领域，特别涉及一种薄膜晶体管。本发明还涉及包括这种薄膜晶体管的液晶显示器。
背景技术
目前，在液晶显示器中，广泛使用薄膜晶体管(即本领域的技术人员熟知的TFT)来驱动液晶显示器上的每个液晶像素点。因此，薄膜晶体管的电性能与液晶显示器的品质有着重要的关系。
通常，薄膜晶体管由多层氧化物(即导电叠层)层叠而成。但是，这些氧化物的电性能不够稳定，非常容易受到外界因素的影响，特别是光照。例如，光照会影响这些氧化物的电学性能，从而导致漏电流增加，对薄膜晶体管的电性能带来不利影响。
因此，需要对这种薄膜晶体管进行改进。
发明内容
针对上述问题，本发明提出了一种薄膜晶体管。在本发明的薄膜晶体管中设置有为导电叠层遮光的光屏蔽层，从而可有效防止光照不利地影响这些氧化物的电学性能，并由此提高了薄膜晶体管的电性能。
根据本发明的第一方面，提出了一种薄膜晶体管，包括基板，设置在基板上的导电叠层，和设置在基板上的光屏蔽层，其中光屏蔽层处于导电叠层的下方并且两者的位置正对。
根据本发明的薄膜晶体管，由于设置有光屏蔽层，因此基板下方的光就不能照射到导电叠层处，由此就可防止导电叠层的电学性能因光照而劣化，从而确保薄膜晶体管具有良好的性能。特别是，当将本发明的薄膜晶体管用在液晶显示器中时，这种薄膜晶体管具有良好的电性能，也就确保液晶显示器具有良好的显示品质。
在一个实施例中，光屏蔽层的图形尺寸大于或等于导电叠层的图形尺寸。这样，可以防止散射光绕过光屏蔽层而照射到导电叠层上，保证了导电叠层的电性能不受影响。
在一个实施例中，导电叠层设置在基板的第一表面上，光屏蔽层设置在基板的第二表面上，第一表面和第二表面彼此正对。根据这种结构，导电叠层和光屏蔽层处于基板的不同侧面上。这样，导电叠层就为完全平坦的结构，不存在由于导电叠层具有凸出区而导致的爬坡区。由此，就避免了爬坡区对导电叠层的电性能地不利影响。这有助于进一步提高薄膜晶体管的电性能。
在一个实施例中，在基板的第二表面上设置有感光材料，通过使对应于导电叠层的感光材料曝光并变为不透明而形成光屏蔽层。这种方式可精确地控制光屏蔽层位置和面积，能防止在待形成光屏蔽层之外的区域再形成光屏蔽层，这非常有利于在液晶显示器中实施这种光屏蔽层。
在一个实施例中，在基板的第二表面的正对导电叠层的区域设置不透明层而形成光屏蔽层。在一个实施例中，不透明层为金属层或非金属氧化物层。优选地，不透明层为铝、钼、铝钕合金和二氧化硅中的一种。这种光遮蔽层能够牢固地附着在基板上，也有利于用于在液晶显示器中。
在一个实施例中，导电叠层设置在基板的第一表面上，光屏蔽层设置在基板的内部。这样，光屏蔽层完全不受外界环境的损坏，并且不会导致在导电叠层中产生爬坡区。由此，可以在任何情况中确保薄膜晶体管不受外界光照的不利影响并且导电叠层也保持为完全平坦的结构。
在一个优选地实施例中，在基板的内部设置有感光材料，通过使对应于导电叠层的感光材料曝光并变为不透明而形成光屏蔽层。这种方式同样可精确地控制光屏蔽层位置和面积，能防止在待形成光屏蔽层之外的区域再形成光屏蔽层，这非常有利于在液晶显示器中实施这种光屏蔽层。此外，这种光遮蔽层无需在基板的外表面上固定设置或形成额外的不透明层或不透明物质，而是仅需要选择性曝 光，这大大简化了薄膜晶体管或光屏蔽层的制备工艺，并由此降低了成本。
根据本发明的第二方面，提出了一种液晶显示器，其包括根据上文所述的薄膜晶体管。
与现有技术相比，本发明的优点在于：(1)在本发明的薄膜晶体管中设置有光屏蔽层，因此基板下方的光就不能照射到导电叠层处，由此就可防止导电叠层的电学性能因光照而劣化，从而确保薄膜晶体管具有良好的性能。特别适用在液晶显示器中。(2)导电叠层和光屏蔽层处于基板的不同侧面上。这样，导电叠层上不存在由于导电叠层具有凸出区而导致的爬坡区。由此，就避免了爬坡区对导电叠层的电性能地不利影响。这有助于进一步提高薄膜晶体管的电性能。
附图说明
在下文中将基于实施例并参考附图来对本发明进行更详细的描述。其中：
图1示意性地显示了根据本发明的薄膜晶体管的第一实施例。
图2示意性地显示了根据本发明的薄膜晶体管的第二实施例。
图3示意性地显示了具有爬坡区的薄膜晶体管的结构。
图4和图5示意性地显示了图3中不同区域的材料的特征。
在附图中，相同的部件使用相同的附图标记。附图并未按照实际的比例。
具体实施方式
下面将结合附图对本发明作进一步说明。
图1示意性地显示了根据本发明的薄膜晶体管10的第一实施例。如图1所示，薄膜晶体管10包括基板1，设置在基板1上的导电叠层2，和设置在基板1上的光屏蔽层3。基板1可为透明的玻璃基板。导电叠层2通常包括源极、漏极、氧化物有源层、栅绝缘层和栅极，这是本领域的技术人员所熟知的，不再赘述。光遮蔽层3为不透明层。
光屏蔽层3处于导电叠层2的下方并且光屏蔽层3的位置与导电叠层2的位置正相对。这样，来自基板1下方的光就不会照射到导电叠层2上，使得导电叠层2的电性能就不会由于光照而劣化，薄膜晶体管10的电性能也因此保持为较好。这对于使用薄膜晶体管10的液晶显示器(未示出)而言是非常有利的。优选地，光遮蔽层3的图形尺寸大于或等于导电叠层2的图形尺寸，以防止散射光 绕过光遮蔽层3而照射到导电叠层2上。
为了使导电叠层2为完全平坦的结构，则将导电叠层2和光遮蔽层3分别设置在基板1的不同侧面上。如图1所示，导电叠层2设置在基板1的第一表面11上，而光遮蔽层3设置在基板1的第二表面12上，并且第一表面11和第二表面12彼此相对。这样，导电叠层2就为完全平坦的结构，特别是没有凸出的部分。导电叠层2的材料的晶粒大小和形态以及导电叠层2的厚度都大体相同。这使得从整体来看，导电叠层2在各个区域的电性能均相同，从而薄膜晶体管10的电性能也较好。
与图1所示的实施例相反地是，在图3中所示导电叠层2’具有爬坡区40。爬坡区40是由于下述原因而形成：在导电叠层2’和基板1’之间设置有附加层41。附加层41可以为光遮蔽层。由于附加层41具有一定的厚度，因此导电叠层2’的处于附加层41上方的区域42被抬升，即导电叠层2’具有凸出区域42和原始区域43。在原始区域43和凸出区域42之间就形成了爬坡区40。凸出区域42或原始区域43内的晶粒尺寸(如图4所示)远大于爬坡区40内的晶粒尺寸(如图5所示)。因此，导电叠层2’的电学性能也就由于在不同的区域有不同的材料特征而在不同的区域具有不同的电性能，这对薄膜晶体管的电性能具有不利的影响。
图1所示的光遮蔽层3可通过下面方式来实现，在基板1的第二表面12上设置感光材料层。通过使对应导电叠层2的感光材料曝光并变为不透明而形成光屏蔽层3。在一个实施例中，感光材料可为卤化银，例如碘化银；还可以为重铬酸盐，例如重铬酸铵。其他类似的感光材料也可用于此，这里不再赘述。可借助于掩膜板将感光材料选择性地曝光来形成光屏蔽层3，这非常有利于控制光屏蔽层3位置和面积。
图1所示的光遮蔽层3还可通过下面方式来实现，在基板1的第二表面12的正对导电叠层2的区域设置不透明层而形成光屏蔽层3。例如，不透明层可为金属层或非金属氧化物层。优选地，金属层为铝、钼或铝钕合金。非金属层可为二氧化硅。此外，这种不透明层的厚度可在5微米到8微米之间。这种不透明层可通过蒸发镀膜、磁控溅射等方式而形成，并且可牢固地附着在基板1上。
图2示意性地显示了第二实施例的光遮蔽层32。这里，光遮蔽层32形成在基板1的内部，并且光遮蔽层32与导电叠层2的位置正对。由于这种光屏蔽层32处于基板1的内部，因此可以完全避免外界因素对光遮蔽层32的影响和破坏， 也因此确保导电叠层2不会受到光照的影响。
在一个实施例中，可在基板1的内部设置感光材料，通过使对应于导电叠层2的感光材料曝光并变为不透明而形成光屏蔽层32。感光材料可为卤化银，例如碘化银；还可以为重铬酸盐，例如重铬酸铵。其他类似的感光材料也可用于此，这里不再赘述。实际上，可以在制备基板1时向其中添加感光材料。在使用这种基板1制备薄膜晶体管时，借助于掩膜板(未示出)将感光材料选择性地曝光来形成光屏蔽层32。这完全不需要在基板1的外表面上设置任何不透明层或不透明物质，因此大大简化了薄膜晶体管或液晶显示器的制备工艺，并由此降低了成本。
虽然已经参考优选实施例对本发明进行了描述，但在不脱离本发明的范围的情况下，可以对其进行各种改进并且可以用等效物替换其中的部件。尤其是，只要不存在结构冲突，各个实施例中所提到的各项技术特征均可以任意方式组合起来。本发明并不局限于文中公开的特定实施例，而是包括落入权利要求的范围内的所有技术方案。

Claims (12)

  1. 一种薄膜晶体管，包括基板，设置在所述基板上的导电叠层，和设置在所述基板上的光屏蔽层，
    其中，所述光屏蔽层处于所述导电叠层的下方并且两者的位置正对。
  2. 根据权利要求1所述的薄膜晶体管，其中，所述导电叠层设置在所述基板的第一表面上，所述光屏蔽层设置在所述基板的第二表面上，所述第一表面和第二表面彼此正对。
  3. 根据权利要求2所述的薄膜晶体管，其中，在所述基板的第二表面上设置有感光材料，通过使对应于所述导电叠层的感光材料曝光并变为不透明而形成所述光屏蔽层。
  4. 根据权利要求2所述的薄膜晶体管，其中，在所述基板的第二表面的正对所述导电叠层的区域设置不透明层而形成所述光屏蔽层。
  5. 根据权利要求4所述的薄膜晶体管，其中，所述不透明层为金属层或非金属氧化物层。
  6. 根据权利要求5所述的薄膜晶体管，其中，所述不透明层为铝、钼、铝钕合金和二氧化硅中的一种。
  7. 根据权利要求1所述的薄膜晶体管，其中，所述导电叠层设置在所述基板的第一表面上，所述光屏蔽层设置在所述基板的内部。
  8. 根据权利要求7所述的薄膜晶体管，其中，在所述基板的内部设置有感光材料，通过使对应于所述导电叠层的感光材料曝光并变为不透明而形成所述光屏蔽层。
  9. 根据权利要求1所述的薄膜晶体管，其中，所述光屏蔽层的图形尺寸大于或等于所述导电叠层的图形尺寸。
  10. 根据权利要求2所述的薄膜晶体管，其中，所述光屏蔽层的图形尺寸大于或等于所述导电叠层的图形尺寸。
  11. 根据权利要求7所述的薄膜晶体管，其中，所述光屏蔽层的图形尺寸大于或等于所述导电叠层的图形尺寸。
  12. 一种液晶显示器，其包括薄膜晶体管，所述薄膜晶体管包括基板，设置在所述基板上的导电叠层，和设置在所述基板上的光屏蔽层，其中，所述光屏蔽层处于所述导电叠层的下方并且两者的位置正对。
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CN103762244A (zh) * 2013-11-29 2014-04-30 深圳市华星光电技术有限公司 薄膜晶体管及其制造方法、薄膜晶体管阵列基板及液晶面板

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