WO2016138218A1 - Methods and apparatus for using alkyl amines for the selective removal of metal nitride - Google Patents
Methods and apparatus for using alkyl amines for the selective removal of metal nitride Download PDFInfo
- Publication number
- WO2016138218A1 WO2016138218A1 PCT/US2016/019484 US2016019484W WO2016138218A1 WO 2016138218 A1 WO2016138218 A1 WO 2016138218A1 US 2016019484 W US2016019484 W US 2016019484W WO 2016138218 A1 WO2016138218 A1 WO 2016138218A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- metal nitride
- nitride layer
- reactor
- metal
- mni
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67109—Apparatus for thermal treatment mainly by convection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
Definitions
- Embodiments of the present disclosure generally relate to methods and apparatus for using alkyl amines for the selective removal of metal nitrides.
- Metal nitride materials such as titanium nitride (TiN) and tantalum nitride (TaN) are commonly used in the semiconductor industry for many semiconductor applications, such as a masking material or as a barrier material.
- TiN titanium nitride
- TaN tantalum nitride
- selectively removing a metal nitride masking material without harming other structures is very difficult.
- the problem of selectively removing a metal nitride masking material without harming other structures becomes even more difficult where solution based or plasma based approaches are not feasible and/or desirable.
- the inventors have developed improved methods and apparatus for removing a metal nitride selectively with respect to exposed or underlying dielectric or metal layers.
- a method of etching a metal nitride layer atop a substrate includes: (a) oxidizing a metal nitride layer to form a metal oxynitride layer (MNi -x O x ) at a surface of the metal nitride layer, wherein M is one of titanium or tantalum and x is an integer from 0.05 to 0.95; and (b) exposing the metal oxynitride layer (MNi -x O x ) to a process gas, wherein the metal oxynitride layer (MN -x O x ) reacts with the process gas to form a volatile compound which desorbs from the surface of the metal nitride layer.
- MNi -x O x metal oxynitride layer
- a method of etching a titanium nitride layer atop a substrate includes: exposing a titanium nitride layer to a process gas formed by vaporizing a process solution comprising diethylamine and water, wherein the titanium nitride layer reacts with the process gas to form a volatile compound which desorbs from the surface of the titanium nitride layer.
- an apparatus for etching a metal nitride layer atop a substrate apparatus for etching a metal nitride layer atop a substrate includes: a reactor body comprising a processing volume to hold a liquid process solution, a body flange at a first end, and a first heater embedded within or coupled to the reactor body at a second end opposite the first end to heat the liquid process solution; a reactor lid comprising a lid flange at a first end configured to mate with the body flange; a circumferential clamp configured to clamp the reactor body to the reactor lid at the lid flange and the body flange; a vacuum chuck embedded within the reactor lid and configured to hold a substrate within the processing volume such that a metal nitride layer disposed on the substrate faces a bottom of the processing volume; a second heater embedded within or coupled to the reactor lid and configured to heat the substrate; and an exhaust system coupled to the reactor body to remove process byproducts from the processing volume.
- Figure 1 depicts a flowchart of a method of etching a metal nitride layer atop a substrate in accordance with some embodiments of the present disclosure.
- Figures 2A-C depicts the stages of etching a metal nitride layer atop a substrate in accordance with some embodiments of the present disclosure.
- Figure 3 depicts a cross-sectional view of an apparatus suitable to perform methods for etching a metal nitride layer atop a substrate in accordance with some embodiments of the present disclosure
- inventive methods and apparatus for etching a metal nitride selectively with respect to exposed or underlying dielectric or metal layers are provided herein.
- the inventive methods described herein advantageously provide an innovative method of etching a metal nitride, utilized as a masking material, selectively with respect to exposed or underlying dielectric or metal layers, for example BLACK DIAMOND ® dielectric material available from Applied Materials, Inc. of Santa Clara, California (hereinafter "Black Diamond” or "BD”) or silicon dioxide layers (e.g. SiOx).
- Black Diamond or “BD”
- the inventive methods described herein may also be used in other semiconductor manufacturing applications where etching a metal nitride may be necessary.
- an amine-based solution is vaporized and applied to a metal nitride material to selectively etch the metal nitride material from the top of structures without harming, for example, underlying or exposed Black Diamond, silicon dioxide, and/or copper (Cu) structures.
- Figure 1 is a flow diagram of a method 100 of etching a metal nitride layer atop a substrate in accordance with some embodiments of the present disclosure.
- Figures 2A-2C are illustrative cross-sectional views of the substrate during different stages of the processing sequence of Figure 1 in accordance with some embodiments of the present disclosure.
- the inventive methods may be performed in a suitable reactor vessel, such as the reactor vessel discussed below with respect to Figure 3.
- Figure 3 depicts a cross-sectional view of a reactor vessel 300 suitable for performing method 200.
- the reactor vessel 300 is a closed loop controlled system using materials for the wetted parts of the reactor vessel 300 that are compatible with chemicals utilized in method 200 described below.
- the reactor vessel 300 depicted in Figure 3 comprises a reactor body 302 and a reactor lid 304.
- the reactor body 302 and the reactor lid 304 comprise suitable openings for the addition of sensors, power, and vacuum inputs as described below.
- the reactor body 302 comprises a processing volume 306.
- the processing volume 306 holds a suitable liquid process solution 318 used in the method 100 described below. In some embodiments, the processing volume 306 can hold up to about 200 to about 300 ml of a suitable liquid process solution 318.
- the reactor body 302 and the reactor lid are made of material suitable for withstanding the temperature and pressures utilized in the method 200 described below.
- the reactor body 302 and the reactor lid are made of stainless steel (SST) material coated with, for example Teflon or Magnaplate 10K. The coating can be selected based on the compatibility with the chemicals, temperatures, and pressures utilized in the method 200.
- the reactor body 302 comprises a body flange 322 at a first end 324.
- the reactor lid 304 comprises a lid flange 326 at a first end 328 configured to mate with the body flange 322.
- the body flange 322 is clamped with the lid flange 326 and having a leak proof O-ring 330 seal.
- the body flange 322 has a chamfered back-surface 356.
- the lid flange 326 has a chamfered back-surface 358.
- the body flange 322 and the lid flange 326 are mated by a circumferential clamp 332 tightened by a bolt 334 around the chamfered back-surfaces 356, 358.
- Cooling channels 336 are added in the vicinity of the O-ring 330 to protect the O-ring 330 from high temperatures. Cooling channels 336 are also provided on the top of the reactor lid 304 to maintain the outer reactor lid 304 temperature below about 70°C for safety purposes. Suitable inlets 344 and outlets 346 are coupled to the cooling channels 336 to supply and remove a cooling fluid such as water from the cooling channels 336. The outside walls 338 of the reactor body 302 are covered with an insulation jacket 340 to avoid condensation of process gases and protection from high temperature surfaces. [0018] A vacuum chuck 308, coupled to a vacuum source 360, is embedded within the reactor lid 304 and configured to hold the substrate 314 within the processing volume 306. The vacuum chuck 308 holds the substrate 314 such that the metal nitride layer disposed on the substrate 314 faces the bottom 316 of the processing volume 306.
- the liquid process solution 318 within the processing volume 306 is heated using, for example, a first heater 310 embedded within or coupled to the reactor body 302 at a second end 362.
- the first heater 310 is coupled to a suitable power supply (not shown).
- the first heater 310 heats the liquid process solution 318 to a temperature sufficient to vaporize the solvent.
- the substrate 314 is heated using, for example, a second heater 312 embedded within or coupled to the reactor lid 304.
- the second heater 312 is coupled to a suitable power supply (not shown).
- the first heater 310 and the second heater 312 may be at the same temperature.
- the first heater 310 and the second heater 312 may be at different temperatures.
- the first heater may be at a temperature of about 25 degrees Celsius to about 300 degrees Celsius.
- the second heater is at a higher temperature than the first heater to avoid condensation of vapors onto the substrate 314.
- the second heater 312 is at a temperature that is about 10 to about 15 degrees greater than the first heater temperature.
- the reactor lid 304 is clamped to a top portion of the reactor body 302 to seal the processing volume 306.
- the reactor body 302 is also heated using for example heating coils within the reactor body 302. Heating the reactor body 302 prevents condensation of vapors onto the interior surface walls 320 of the processing volume 306.
- the liquid process solution 318 is injected inside the processing volume 306 through an opening 342 in the reactor body 302.
- a manual valve 364 is used to drain out the liquid process solution 318 from the processing volume 306.
- a closed loop controlled exhaust system 348 coupled to the reactor body 302 takes a feedback from a pressure transducer 350 setting to trigger a pneumatic valve 352 to releases byproducts of the method 200 to, for example a scrubber, via the overpressure line 354.
- a temperature loop feedback is maintained by thermocouples 354 & an over temperature switch 366 with heater controller.
- the method 100 begins at 102, and as depicted in Figure 2A, by oxidizing a metal nitride layer 204 atop a substrate 202.
- the substrate 202 may be any suitable substrate, such as a semiconductor wafer. Substrates having other geometries, such as rectangular, polygonal, or other geometric configurations may also be used.
- the substrate 202 may include a first layer 216.
- the first layer 216 may be a base material of the substrate 202 (e.g., the substrate itself), or a layer formed on the substrate.
- the first layer 216 may be a layer suitable for forming a feature within the first layer 216.
- the first layer 216 may be a dielectric layer, such as silicon oxide (Si02), silicon nitride (SiN), a low-k material, or the like.
- the low-k material may be carbon-doped dielectric materials (such as carbon-doped silicon oxide (SiOC), BLACK DIAMOND® dielectric material available from Applied Materials, Inc. of Santa Clara, California, or the like), an organic polymer (such as polyimide, parylene, or the like), organic doped silicon glass (OSG), fluorine doped silicon glass (FSG), or the like.
- the first layer 216 may be a copper layer.
- the metal nitride layer 204 is titanium nitride (TiN) or tantalum nitride (TaN).
- the metal nitride layer 204 is deposited using any suitable deposition process known in the semiconductor manufacturing industry, such as a physical vapor deposition (PVD) process or a chemical vapor deposition (CVD) process.
- the metal nitride layer may be a masking layer used for forming features, such as vias or trenches in underlying layers.
- Oxidation of the metal nitride layer 204 forms a metal oxynitride layer (MNi -x O x ) 208 at a surface 214 of the metal nitride layer 204, where M is one of titanium or tantalum and x is an integer from 0.05 to 0.95.
- the metal nitride layer 204 is oxidized by exposing the metal nitride layer 204 to an oxygen-containing gas 206.
- the oxygen containing gas is oxygen (O2) gas or ozone (O3) gas or combination thereof.
- the oxygen-containing gas 206 is provided at a flow rate of about 2 seem to about 20 seem for about 2 to about 30 seconds.
- the metal oxynitride layer (MN-i. ⁇ ) 208 is exposed to a process gas 210.
- the reaction of the process gas 210 and the metal oxynitride layer (MNi -x O x ) 208 forms a volatile compound 212 atop the metal nitride layer 204 which desorbs from the surface 214 of the metal nitride layer 204.
- the volatile compound 212 desorbs from the surface 214 of the metal nitride layer 204 at the temperature at which the process gas 210 is formed, accordingly a separate anneal process is unnecessary to desorb the volatile compound 212.
- the process gas 210 is produced by heating a liquid process solution within the reactor vessel 300 to at least the boiling point of the liquid process solution.
- the process solution comprises an etchant precursor of secondary amines having the formula Ri R 2 NH wherein Ri and R 2 can be an alkyl group such as methyl, ethyl, propyl, or butyl.
- the etchant precursor is diethylamine, tert-butylamine, ethyldenediamine, triethylamine, dicyclohexylamine, hydroxylamine, dipropylamine, dibutylamine, butylamine, isopropylamine, or propylamine.
- the liquid process solution is heated to a temperature of at least the boiling point of the liquid process solution or in some embodiments to a temperature of at least above the boiling point of the liquid process solution.
- the maximum temperature to which the liquid process solution is heated is limited by the decomposition temperature of the selected etchant precursor molecule.
- the process solution comprising diethylamine, which has a boiling point of about 55 degrees Celsius is heated to a temperature of about 80 to about 175 degrees Celsius.
- the process solution comprising dicyclohexylamine, having a boiling point of about 255 degrees Celsius is heated to a temperature of up to about 300 degrees Celsius.
- the inventors have also observed that increasing the volume of the etchant precursor, for example from about 5 ml to about 30 ml, and utilizing higher temperatures to vaporize the process solution (though still limited by decomposition temperature of the selected etchant precursor molecule), results in an increase in the pressure within the reactor vessel 300 which improves the etch rate of the metal nitride layer 204.
- the inventors have observed that a pressure range of about 1 atmosphere (atm) to about 10 atm, for example about 7 atm improves the etch rate of the metal nitride layer 204.
- the metal oxynitride layer (MNi -x O x ) 208 is exposed to the process gas 210 for about 10 to 1200 seconds, for example for about 10 to about 300 seconds, for example for about 60 to about 1200 seconds.
- the oxidation of the metal nitride layer 204 is done within the reactor vessel 300 without exposure to the oxygen-containing gas as described above (i.e., in-situ oxidation).
- the metal nitride layer is not exposed to an initial oxygen-containing gas.
- the liquid process solution comprises a mixture of the etchant precursor and water.
- the liquid process solution consists of, or consists essentially of, a mixture of the etchant precursor and water.
- the liquid process solution comprises about 0.1 wt. % to about 5 wt % of water and the balance etchant precursor.
- the process gas 210 shown in Figure 2B can advantageously oxidize and etch the metal nitride layer 204 in a single step and furthermore improve the etch rate of the metal nitride layer 204 as compared to an initial oxidation of the metal nitride layer 204 oxidation via exposure to the oxygen- containing gas.
- performing an in-situ oxidation results in an metal nitride layer 204 etch rate of about 3 to 4 angstroms/minute, whereas a separate oxidation step results in a lower metal nitride layer 204 etch rate.
- the method 100 can be repeated to etch the metal nitride layer 204 to a predetermined thickness. For example, in some embodiments, the method 100 is repeated to completely, or substantially completely, etch the metal nitride layer 204 without damaging the underlying first layer 216.
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017544596A JP2018511935A (ja) | 2015-02-25 | 2016-02-25 | 金属窒化物を選択的に除去するためにアルキルアミンを使用する方法及び装置 |
| KR1020177026904A KR20170121243A (ko) | 2015-02-25 | 2016-02-25 | 금속 질화물의 선택적 제거를 위해 알킬 아민들을 사용하기 위한 방법들 및 장치 |
| CN201680010536.9A CN107258010A (zh) | 2015-02-25 | 2016-02-25 | 使用烷基胺的选择性移除金属氮化物的方法及设备 |
| US15/552,207 US20180033643A1 (en) | 2015-02-25 | 2016-02-25 | Methods and apparatus for using alkyl amines for the selective removal of metal nitride |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IN551DE2015 | 2015-02-25 | ||
| IN551/DEL/2015 | 2015-02-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2016138218A1 true WO2016138218A1 (en) | 2016-09-01 |
| WO2016138218A8 WO2016138218A8 (en) | 2017-03-16 |
Family
ID=56789186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2016/019484 Ceased WO2016138218A1 (en) | 2015-02-25 | 2016-02-25 | Methods and apparatus for using alkyl amines for the selective removal of metal nitride |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20180033643A1 (enExample) |
| JP (1) | JP2018511935A (enExample) |
| KR (1) | KR20170121243A (enExample) |
| CN (1) | CN107258010A (enExample) |
| TW (1) | TW201703130A (enExample) |
| WO (1) | WO2016138218A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190105129A (ko) * | 2017-02-06 | 2019-09-11 | 어플라이드 머티어리얼스, 인코포레이티드 | 자기-제한적 원자 열 식각 시스템들 및 방법들 |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9132436B2 (en) | 2012-09-21 | 2015-09-15 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
| US10256079B2 (en) | 2013-02-08 | 2019-04-09 | Applied Materials, Inc. | Semiconductor processing systems having multiple plasma configurations |
| US11637002B2 (en) | 2014-11-26 | 2023-04-25 | Applied Materials, Inc. | Methods and systems to enhance process uniformity |
| US20160225652A1 (en) | 2015-02-03 | 2016-08-04 | Applied Materials, Inc. | Low temperature chuck for plasma processing systems |
| US9741593B2 (en) | 2015-08-06 | 2017-08-22 | Applied Materials, Inc. | Thermal management systems and methods for wafer processing systems |
| US10504700B2 (en) | 2015-08-27 | 2019-12-10 | Applied Materials, Inc. | Plasma etching systems and methods with secondary plasma injection |
| US10504754B2 (en) | 2016-05-19 | 2019-12-10 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
| US9865484B1 (en) | 2016-06-29 | 2018-01-09 | Applied Materials, Inc. | Selective etch using material modification and RF pulsing |
| US10546729B2 (en) | 2016-10-04 | 2020-01-28 | Applied Materials, Inc. | Dual-channel showerhead with improved profile |
| US10014185B1 (en) * | 2017-03-01 | 2018-07-03 | Applied Materials, Inc. | Selective etch of metal nitride films |
| US11276590B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Multi-zone semiconductor substrate supports |
| JP7176860B6 (ja) | 2017-05-17 | 2022-12-16 | アプライド マテリアルズ インコーポレイテッド | 前駆体の流れを改善する半導体処理チャンバ |
| US11276559B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Semiconductor processing chamber for multiple precursor flow |
| US10297458B2 (en) | 2017-08-07 | 2019-05-21 | Applied Materials, Inc. | Process window widening using coated parts in plasma etch processes |
| US11328909B2 (en) | 2017-12-22 | 2022-05-10 | Applied Materials, Inc. | Chamber conditioning and removal processes |
| US10964512B2 (en) | 2018-02-15 | 2021-03-30 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus and methods |
| US10319600B1 (en) | 2018-03-12 | 2019-06-11 | Applied Materials, Inc. | Thermal silicon etch |
| US11049755B2 (en) | 2018-09-14 | 2021-06-29 | Applied Materials, Inc. | Semiconductor substrate supports with embedded RF shield |
| US11062887B2 (en) | 2018-09-17 | 2021-07-13 | Applied Materials, Inc. | High temperature RF heater pedestals |
| US11417534B2 (en) | 2018-09-21 | 2022-08-16 | Applied Materials, Inc. | Selective material removal |
| US11682560B2 (en) | 2018-10-11 | 2023-06-20 | Applied Materials, Inc. | Systems and methods for hafnium-containing film removal |
| US11121002B2 (en) | 2018-10-24 | 2021-09-14 | Applied Materials, Inc. | Systems and methods for etching metals and metal derivatives |
| US11437242B2 (en) | 2018-11-27 | 2022-09-06 | Applied Materials, Inc. | Selective removal of silicon-containing materials |
| US11984325B2 (en) * | 2021-07-12 | 2024-05-14 | Applied Materials, Inc. | Selective removal of transition metal nitride materials |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6743720B2 (en) * | 1999-08-30 | 2004-06-01 | Micron Technology, Inc. | Method of manufacturing a portion of a memory by selectively etching to remove metal nitride or metal oxynitride extrusions |
| US20060016783A1 (en) * | 2004-07-22 | 2006-01-26 | Dingjun Wu | Process for titanium nitride removal |
| US20070117396A1 (en) * | 2005-11-22 | 2007-05-24 | Dingjun Wu | Selective etching of titanium nitride with xenon difluoride |
| US20140224427A1 (en) * | 2013-02-14 | 2014-08-14 | Fujifilm Corporation | Dry etching apparatus and clamp therefor |
| US20150027978A1 (en) * | 2011-12-28 | 2015-01-29 | Advanced Technology Materials, Inc. | Compositions and methods for selectively etching titanium nitride |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05283362A (ja) * | 1992-04-03 | 1993-10-29 | Sony Corp | 多層配線の形成方法 |
| JP3179212B2 (ja) * | 1992-10-27 | 2001-06-25 | 日本電気株式会社 | 半導体装置の製造方法 |
| US6849471B2 (en) * | 2003-03-28 | 2005-02-01 | Reflectivity, Inc. | Barrier layers for microelectromechanical systems |
| JPH11163138A (ja) * | 1997-11-28 | 1999-06-18 | Sony Corp | 半導体装置の製造方法 |
| JP4686006B2 (ja) * | 2000-04-27 | 2011-05-18 | 大日本印刷株式会社 | ハーフトーン位相シフトフォトマスクとハーフトーン位相シフトフォトマスク用ブランクス、及びハーフトーン位相シフトフォトマスクの製造方法 |
| JP2005067164A (ja) * | 2003-08-28 | 2005-03-17 | Sony Corp | 液体吐出ヘッド、液体吐出装置及び液体吐出ヘッドの製造方法 |
| JP3889023B2 (ja) * | 2005-08-05 | 2007-03-07 | シャープ株式会社 | 可変抵抗素子とその製造方法並びにそれを備えた記憶装置 |
| JP5334199B2 (ja) * | 2008-01-22 | 2013-11-06 | ルネサスエレクトロニクス株式会社 | 容量素子を有する半導体装置 |
| JP5042162B2 (ja) * | 2008-08-12 | 2012-10-03 | 株式会社日立ハイテクノロジーズ | 半導体加工方法 |
| JP5590113B2 (ja) * | 2010-03-02 | 2014-09-17 | 旭硝子株式会社 | Euvリソグラフィ用反射型マスクブランクおよびその製造方法 |
| JP5434970B2 (ja) * | 2010-07-12 | 2014-03-05 | セントラル硝子株式会社 | ドライエッチング剤 |
| US9831088B2 (en) * | 2010-10-06 | 2017-11-28 | Entegris, Inc. | Composition and process for selectively etching metal nitrides |
| KR102192281B1 (ko) * | 2012-07-16 | 2020-12-18 | 베이징 이타운 세미컨덕터 테크놀로지 컴퍼니 리미티드 | 순수 환원성 플라즈마에서 높은 종횡비 포토레지스트 제거를 위한 방법 |
| US8987133B2 (en) * | 2013-01-15 | 2015-03-24 | International Business Machines Corporation | Titanium oxynitride hard mask for lithographic patterning |
| JP6336866B2 (ja) * | 2013-10-23 | 2018-06-06 | 株式会社日立国際電気 | 半導体デバイスの製造方法、基板処理装置およびプログラム |
| US9543157B2 (en) * | 2014-09-30 | 2017-01-10 | Infineon Technologies Ag | Method for processing a carrier, a method for operating a plasma processing chamber, and a method for processing a semiconductor wafer |
| JP6523091B2 (ja) * | 2015-07-24 | 2019-05-29 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置およびプログラム |
| JP6462602B2 (ja) * | 2016-01-12 | 2019-01-30 | 信越化学工業株式会社 | 多層膜形成方法及びパターン形成方法 |
| US10522467B2 (en) * | 2016-07-06 | 2019-12-31 | Tokyo Electron Limited | Ruthenium wiring and manufacturing method thereof |
| US9941142B1 (en) * | 2017-01-12 | 2018-04-10 | International Business Machines Corporation | Tunable TiOxNy hardmask for multilayer patterning |
| US10014185B1 (en) * | 2017-03-01 | 2018-07-03 | Applied Materials, Inc. | Selective etch of metal nitride films |
-
2016
- 2016-02-25 KR KR1020177026904A patent/KR20170121243A/ko not_active Withdrawn
- 2016-02-25 WO PCT/US2016/019484 patent/WO2016138218A1/en not_active Ceased
- 2016-02-25 JP JP2017544596A patent/JP2018511935A/ja active Pending
- 2016-02-25 TW TW105105685A patent/TW201703130A/zh unknown
- 2016-02-25 CN CN201680010536.9A patent/CN107258010A/zh active Pending
- 2016-02-25 US US15/552,207 patent/US20180033643A1/en not_active Abandoned
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6743720B2 (en) * | 1999-08-30 | 2004-06-01 | Micron Technology, Inc. | Method of manufacturing a portion of a memory by selectively etching to remove metal nitride or metal oxynitride extrusions |
| US20060016783A1 (en) * | 2004-07-22 | 2006-01-26 | Dingjun Wu | Process for titanium nitride removal |
| US20070117396A1 (en) * | 2005-11-22 | 2007-05-24 | Dingjun Wu | Selective etching of titanium nitride with xenon difluoride |
| US20150027978A1 (en) * | 2011-12-28 | 2015-01-29 | Advanced Technology Materials, Inc. | Compositions and methods for selectively etching titanium nitride |
| US20140224427A1 (en) * | 2013-02-14 | 2014-08-14 | Fujifilm Corporation | Dry etching apparatus and clamp therefor |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190105129A (ko) * | 2017-02-06 | 2019-09-11 | 어플라이드 머티어리얼스, 인코포레이티드 | 자기-제한적 원자 열 식각 시스템들 및 방법들 |
| CN110313054A (zh) * | 2017-02-06 | 2019-10-08 | 应用材料公司 | 自限制原子热蚀刻系统和方法 |
| JP2020505780A (ja) * | 2017-02-06 | 2020-02-20 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | 自己制御原子熱エッチングシステム及び方法 |
| KR102332767B1 (ko) * | 2017-02-06 | 2021-11-30 | 어플라이드 머티어리얼스, 인코포레이티드 | 자기-제한적 원자 열 식각 시스템들 및 방법들 |
| CN110313054B (zh) * | 2017-02-06 | 2022-12-30 | 应用材料公司 | 自限制原子热蚀刻系统和方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2018511935A (ja) | 2018-04-26 |
| TW201703130A (zh) | 2017-01-16 |
| WO2016138218A8 (en) | 2017-03-16 |
| US20180033643A1 (en) | 2018-02-01 |
| KR20170121243A (ko) | 2017-11-01 |
| CN107258010A (zh) | 2017-10-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20180033643A1 (en) | Methods and apparatus for using alkyl amines for the selective removal of metal nitride | |
| US10373840B2 (en) | Technique to deposit sidewall passivation for high aspect ratio cylinder etch | |
| US9997373B2 (en) | Technique to deposit sidewall passivation for high aspect ratio cylinder etch | |
| JP7184810B6 (ja) | 基板に堆積された膜の品質改善 | |
| US10297459B2 (en) | Technique to deposit sidewall passivation for high aspect ratio cylinder etch | |
| US9543158B2 (en) | Technique to deposit sidewall passivation for high aspect ratio cylinder etch | |
| US9887097B2 (en) | Technique to deposit sidewall passivation for high aspect ratio cylinder etch | |
| US9997372B2 (en) | Technique to deposit sidewall passivation for high aspect ratio cylinder etch | |
| KR102206927B1 (ko) | 금속을 함유하는 화합물들을 에칭하기 위한 다단계 방법 및 장치 | |
| JP2018511935A5 (enExample) | ||
| US8216861B1 (en) | Dielectric recovery of plasma damaged low-k films by UV-assisted photochemical deposition | |
| JP6469705B2 (ja) | エッチング後のインターフェースを安定化し、次の処理ステップ前のキュータイム問題を最小化する方法 | |
| TWI440089B (zh) | 基板處理方法及基板處理裝置 | |
| KR20170013832A (ko) | 센서티브 재료들 상에 할라이드 함유 ald 막을 집적하는 방법 | |
| JP4342895B2 (ja) | 熱処理方法及び熱処理装置 | |
| KR20160111508A (ko) | 듀얼 다마신 구조에서 유전체 배리어 층을 에칭하기 위한 방법들 | |
| WO2018026867A1 (en) | Technique to deposit sidewall passivation for high aspect ratio cylinder etch | |
| TW201622029A (zh) | 半導體裝置之製造方法、以及表面覆膜之形成方法及形成裝置 | |
| TW201926481A (zh) | 半導體裝置之製造方法及基板處理裝置 | |
| KR20170132671A (ko) | 고 종횡비 실린더 에칭에 대한 측벽 패시베이션을 증착하기 위한 기법 | |
| US20250188600A1 (en) | Sidewall passivation using aldehyde or isocyanate chemistry for high aspect ratio etch | |
| TWI869676B (zh) | 金屬氧化物滲入光阻劑中之方法及半導體處理系統 | |
| US10818490B2 (en) | Controlled growth of thin silicon oxide film at low temperature | |
| US20240234162A9 (en) | Substrate-processing method and substrate-processing apparatus | |
| JP4889376B2 (ja) | 脱水方法および脱水装置、ならびに基板処理方法および基板処理装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 16756332 Country of ref document: EP Kind code of ref document: A1 |
|
| ENP | Entry into the national phase |
Ref document number: 2017544596 Country of ref document: JP Kind code of ref document: A |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| ENP | Entry into the national phase |
Ref document number: 20177026904 Country of ref document: KR Kind code of ref document: A |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 16756332 Country of ref document: EP Kind code of ref document: A1 |