WO2016135824A1 - 光受信装置 - Google Patents
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- WO2016135824A1 WO2016135824A1 PCT/JP2015/055037 JP2015055037W WO2016135824A1 WO 2016135824 A1 WO2016135824 A1 WO 2016135824A1 JP 2015055037 W JP2015055037 W JP 2015055037W WO 2016135824 A1 WO2016135824 A1 WO 2016135824A1
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- control signal
- voltage
- optical receiver
- temperature
- level conversion
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- 230000003287 optical effect Effects 0.000 title claims abstract description 78
- 238000006243 chemical reaction Methods 0.000 claims abstract description 70
- 230000035945 sensitivity Effects 0.000 claims abstract description 7
- 238000000098 azimuthal photoelectron diffraction Methods 0.000 description 40
- 238000000034 method Methods 0.000 description 25
- 238000010586 diagram Methods 0.000 description 15
- 230000008569 process Effects 0.000 description 12
- 230000007423 decrease Effects 0.000 description 6
- 230000008859 change Effects 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 230000004044 response Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
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-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/691—Arrangements for optimizing the photodetector in the receiver
- H04B10/6911—Photodiode bias control, e.g. for compensating temperature variations
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3084—Automatic control in amplifiers having semiconductor devices in receivers or transmitters for electromagnetic waves other than radiowaves, e.g. lightwaves
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J14/00—Optical multiplex systems
- H04J14/02—Wavelength-division multiplex systems
- H04J14/0227—Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
- H04J14/0254—Optical medium access
- H04J14/0256—Optical medium access at the optical channel layer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
- G01J2001/4406—Plural ranges in circuit, e.g. switchable ranges; Adjusting sensitivity selecting gain values
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
- G01J2001/4446—Type of detector
- G01J2001/446—Photodiode
- G01J2001/4466—Avalanche
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J40/00—Photoelectric discharge tubes not involving the ionisation of a gas
- H01J40/02—Details
- H01J40/14—Circuit arrangements not adapted to a particular application of the tube and not otherwise provided for
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
- H03G3/20—Automatic control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/40—Transceivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
Definitions
- the present invention relates to an optical receiver for optical communication.
- An optical receiver for optical communication may include an APD (avalanche photodiode, hereinafter referred to as “avalanche photodiode”) that can amplify an optical reception signal and receive light.
- APD is a photodiode whose light receiving sensitivity is increased by utilizing a phenomenon called avalanche multiplication.
- the optical receiver can receive an optical signal attenuated by long-distance transmission.
- the present invention has been made in view of the above, and an object of the present invention is to obtain an optical receiving apparatus that can suppress an increase in the size of its own apparatus, can realize a low-cost configuration with low power consumption.
- an optical receiver is an optical receiver that receives an optical signal, and a plurality of avalanches whose reception sensitivity is set by a given bias signal.
- the optical receiving apparatus can suppress an increase in the size of its own apparatus, and has an effect of realizing a low-cost configuration with low power consumption.
- FIG. 1 is a block diagram showing an optical receiver according to a first embodiment of the present invention.
- the flowchart which shows the example of a process of the processor of the optical receiver concerning Embodiment 1 of this invention
- the figure which shows the structural example of the variable resistance part of the optical receiver concerning Embodiment 1 of this invention. 6 is a flowchart showing a table generation procedure for associating temperature information of the optical receiver according to the first embodiment of the present invention with a control signal to the booster circuit.
- FIG. 4 is a diagram illustrating an example of temperature characteristics of a base-emitter voltage of a transistor used in the optical receiver according to the first embodiment of the present invention.
- FIG. 3 is a diagram showing an example of a temperature dependence table of a base-emitter voltage of a transistor used in the optical receiver according to the first embodiment of the present invention.
- 6 is a flowchart showing a table generation procedure for associating temperature information of the optical receiver according to the first embodiment of the present invention with a control signal to the level conversion circuit.
- FIG. 3 is a diagram illustrating an example of a lookup table of the optical receiver according to the first embodiment of the present invention.
- FIG. 1 is a block diagram showing an optical receiving apparatus according to Embodiment 1 of the present invention.
- 1 includes a booster circuit 11, a filter 12, level conversion circuits 13 1 ,..., 13 n , n APDs 16 1 ,..., 16 n , a control unit 14, and temperature detection. , 17 n , and n amplifiers 18 1 ,..., 18 n, and n TIAs (Trans Impedance Amplifiers) 17 1 ,. n is an integer of 2 or more, and so on.
- the booster circuit 11 is a booster that boosts the power supply voltage of its own device.
- the filter 12 removes voltage noise generated by the booster circuit 11.
- the n level conversion circuits 13 1 ,..., 13 n are n level conversion units that convert the voltage level of the DC voltage that has passed through the filter 12 to generate a bias voltage that is a bias signal.
- the receiving sensitivity of the n APDs 16 1 ,..., 16 n is set by a given bias voltage.
- the control unit 14 provides the first control signal S1 based on the temperature information to the level conversion circuits 13 1 ,..., 13 n and also provides the second control signal S2 based on the temperature information to the booster circuit 11.
- the temperature detector 15 detects the temperature of the device itself and outputs temperature information to the control unit 14.
- n pieces of TIA17 1, ..., 17 n are, APD16 1, ..., it converts the current outputted from the 16 n to a voltage.
- n number of amplifiers 18 1, ..., 18 n are, TIA17 1, ..., it amplifies the converted voltage by 17 n.
- the self apparatus is the optical receiving apparatus 10.
- the booster circuit 11 includes a booster IC (Integrated Circuit) 110 and an inductor L1.
- the booster circuit 11 generates a voltage obtained by boosting the power supply voltage based on the second control signal S2 input to the booster IC 110 and the inductance of the inductor L1.
- Voltage boosting circuit 11 generates is a DC voltage, APD16 1, ..., 16 level conversion circuit 13 1 in order to obtain a bias voltage applied to the n, ..., it is the reference voltage applied to 13 n.
- the booster circuit 11 may include a conversion circuit that converts the digital signal into an analog signal.
- the filter 12 includes an inductor L2 having one end connected to the output of the booster circuit 11, and a capacitor C1 connected between the other end of the inductor L2 and the ground.
- the filter 12 acts as a low pass filter.
- the filter 12 removes the high frequency component of the reference voltage generated by the booster circuit 11.
- the voltage V1 at the other end of the inductor L2 is applied to the level conversion circuits 13 1 ,..., 13 n as the reference voltage V1.
- the n level conversion circuits 13 1 ,..., 13n are provided corresponding to the n APDs 16 1 ,.
- Level conversion circuit 13 1, ..., 13 n the corresponding APD16 1, ..., and generates a bias voltage applied to 16 n.
- the level conversion circuits 13 1 ,..., 13 n convert the voltage level of the reference voltage V1 to generate the bias voltage Vapd.
- Level conversion circuit 13 1, ..., 13 n gives the bias voltage Vapd, corresponding APD16 1, ..., to 16 n.
- the control unit 14 generates a control signal S1 corresponding to the temperature of the device itself, and controls the level conversion amounts of the plurality of level conversion circuits 13 1 ,..., 13 n by the control signal S1.
- the control unit 14 generates a control signal S2 corresponding to the temperature of the device itself, and controls the reference voltage generated by the booster circuit 11 by the control signal S2.
- the temperature detector 15 detects the temperature of its own device at regular intervals and outputs temperature information to the control unit 14. Specifically, the temperature of each part constituting the optical receiver 10 is set as the temperature of the own device. For example, APD16 1 of the optical receiver 10, ..., 16 the average value of the temperature of the n, the level converting circuit 13 1, ..., the average value or the temperature of the housing of the air temperature of 13 n, and the temperature of the device itself .
- APDs 16 1 ,..., 16 n are connected to the filter 12 in parallel.
- APDs 16 1 ,..., 16 n are provided corresponding to n channels Ch 1 to Ch n in order to realize wavelength multiplexing.
- the APDs 16 1 ,..., 16 n amplify the light reception signals and receive light.
- the APDs 16 1 ,..., 16 n are given a voltage of about 30 [V] to 50 [V] in order to amplify the received signal.
- a voltage applied to the APDs 16 1 ,..., 16 n in order to amplify the received signal is referred to as a bias voltage.
- n transimpedance amplifiers 17 1 ,..., 17 n and n amplifiers 18 1 ,..., 18 n are provided corresponding to the n APDs 16 1 ,. ing.
- n APDs 16 1 ,..., 16 n are connected in parallel to the control unit 14, the booster circuit 11, and the filter 12.
- a booster circuit 11, a filter 12, a controller 14, and a temperature detector 15 are provided in common for the APDs 16 1 ,..., 16 n .
- n pieces of TIA17 1, ..., 17 n are, APD16 1, ..., are provided after the 16 n.
- n pieces of TIA17 1, ..., 17 n are, APD16 1, ..., converts each current output from 16 n to a voltage.
- n number of amplifiers 18 1, ..., 18 n, the corresponding TIA17 1, ..., amplify each voltage converted by 17 n.
- Each electrical signal amplified by the n amplifiers 18 1 ,..., 18 n becomes an output of the optical receiver 10.
- FIG. 2 is a diagram of a configuration example of the control unit 14 of the optical receiving device according to the first embodiment of the present invention.
- the control unit 14 includes a memory 141 that stores a program 146 and data necessary for processing, a processor 142 that reads and executes the program 146 from the memory 141, an input of temperature information, and a control signal S1 and It has an input / output device 143 that functions as an output interface of S2, and a bus 144 that interconnects the components in the control unit 14.
- the memory 141 stores a look-up table (LUT) 145.
- LUT look-up table
- the control unit 14 functions as a micro control unit (MCU) that controls writing of data into the memory 141 and reading of data from the memory 141.
- the look-up table 145 is a table that associates the temperature information with the first control signal S1 to the level conversion circuits 13 1 ,..., 13 n and the second control signal S2 to the booster circuit 11.
- the control unit 14 may be realized by a general-purpose microprocessor and memory, or the control unit 14 may be realized by a dedicated integrated circuit having an MCU function.
- the control unit 14 stores, in the lookup table 145, the digital value of the control signal S1 to each level conversion circuit 13 1 ,..., 13 n and the digital value of the control signal S2 to the booster circuit 11 corresponding to the temperature. is doing.
- the controller 14 writes and reads data to and from the lookup table 145 by the processor 142.
- the control unit 14 inputs temperature information detected by the temperature detector 15 via the input / output device 143.
- the control unit 14 outputs control signals S1 and S2 having values corresponding to the temperature information via the input / output device 143.
- the control unit 14 controls the level conversion amount of each of the level conversion circuits 13 1 ,..., 13 n by the control signal S 1 output through the input / output device 143 and also outputs the control signal through the input / output device 143.
- the control signal S1 is a control signal based on I 2 C (Inter-Integrated Circuit) communication.
- I 2 C communication is serial communication performed by transmitting and receiving serial data and a serial clock.
- the control unit 14 acquires temperature information from the temperature detector 15 via the input / output device 143 at regular time intervals. When there is a temperature change, the control unit 14 outputs control signals S1 and S2 corresponding to the changed temperature via the input / output device 143. By controlling the reference voltage output from the booster circuit 11 and the level conversion amounts of the level conversion circuits 13 1 ,..., 13 n , the control unit 14 generates a bias voltage suitable for each APD using each temperature. And give to each APD.
- FIG. 3 is a flowchart showing an example of processing of the processor 142 included in the control unit 14 of the optical receiver according to the first embodiment of the present invention.
- the processor 142 determines whether or not the power supply of its own device is turned on. If the processor 142 determines that the power is turned on (Yes in step S11), in step S12, the temperature detector 15 acquires temperature information indicating the temperature of the own device via the input / output device 143 and the bus 144. To do.
- step S ⁇ b> 13 the processor 142 stores temperature information in the memory 141 via the bus 144.
- step S14 the processor 142 reads the temperature information stored in the memory 141 via the bus 144, and compares the temperature information acquired this time with the temperature information acquired last time.
- step S15 the processor 142 determines whether or not the comparison result in step S14 matches. If the temperature information does not match (No in step S15), in step S16, the digital values of the control signals S1 and S2 output from the lookup table 145 to each level conversion circuit and the booster circuit 11 via the bus 144 are obtained. Read. The digital values of the control signals S1 and S2 read from the lookup table 145 are values corresponding to the temperature information acquired last time.
- step S17 the processor 142 outputs the read digital value control signals S1 and S2 to the level conversion circuits 13 1 ,..., 13 n and the booster circuit 11 via the bus 144 and the input / output device 143.
- step S18 it is determined whether or not the processing of the processor 142 is complete.
- the processing is terminated.
- finished is a case where the power supply of an own apparatus is cut
- step S18 when the process of the processor 142 is not completed (No in step S18), the process returns to step S12, and the processor 142 continues the process from step S12 to step S18.
- step S15 if the pieces of temperature information match (Yes in step S15), the temperature does not change, so the processor 142 returns to step S12 without reading the digital values of the control signals S1 and S2, and from step S12 to step S12. The process of S18 is continued.
- step S11 If it is determined in step S11 that the power of the apparatus is not turned on, the process returns to step S11 (No in step S11), and the processor 142 continues the process.
- FIG. 4 is a diagram showing an example of a level conversion circuit 13 1 of the configuration of the optical receiving apparatus according to a first embodiment of the present invention.
- the level converting circuit 13 1 includes a variable resistor 21 for the reference voltage V1 is applied to one end, one end connected to the other end of the variable resistor 21, is connected the other end to the ground It has a fixed resistor 22, a fixed resistor 23 that acts as a collector resistor, and a transistor 24 that is a semiconductor element constituting an emitter follower circuit.
- the transistor 24 is an npn-type transistor.
- the resistance value of the variable resistance unit 21 is set by the first control signal S1 output from the control unit 14.
- a digital potentiometer is used as the variable resistance unit 21, but the type of the variable resistance unit 21 is not limited.
- Level conversion circuit 13 the variable resistor portion 21 and the fixed resistor 22 and a dividing resistor circuit and converts the voltage level of the reference voltage V1 by the resistance division circuit. That is, in the first embodiment, the divided resistor circuit includes the variable resistor portion 21 whose resistance value changes according to the control signal S1 and the fixed resistor 22 connected to the variable resistor portion 21.
- the level conversion circuit 13 the level of the voltage divided by the divided resistor circuit, i.e. the level of the voltage at the node between the variable resistor 21 and fixed resistor 22 and converted by the variable resistor 21, as the bias voltage Vapd1 , give to the corresponding APD16 1.
- the voltage at the connection point between the variable resistor unit 21 and the fixed resistor 22, whose voltage level is converted, is applied to the base of the npn transistor 24. Therefore, the base voltage of the transistor 24, the base of the transistor 24 - only emitter voltage Vbe partial voltage drop voltage is output from the level converting circuit 13 1.
- the base-emitter voltage Vbe of the transistor 24 is about 0.8V.
- the emitter of the transistor 24 is connected to a corresponding APD16 1, the emitter follower circuit is formed.
- Level conversion circuit 13 1 a bias voltage Vapd1 as APD voltage, gives the corresponding APD16 1.
- APD16 photocurrent i.e. APD current flows when a 1 is received the light signal, the collector of the transistor 24 from the booster circuit 11 - flows through the emitter.
- Level conversion circuit 13 by changing the resistance value of the variable resistor 21, it is possible to adjust the bias voltage Vapd1 give the APD16 1. Adjustable range of the bias voltage Vapd1 by the level converting circuit 13 1, the reference voltage V1 [V] - a range of voltage Vbe [V] or less.
- npn-type transistor 24 instead of the npn-type transistor 24, a pnp-type transistor or a field effect transistor may be used.
- FIG. 5 is a diagram illustrating a configuration example of the variable resistance unit 21 according to the first embodiment.
- the variable resistance unit 21 includes a serial input register 211 that converts the first control signal S1 output from the control unit 14 into a parallel signal, and a control signal S3 having a resistance value corresponding to the parallel signal. It has an RDAC (Resistor Digital to Analog Converter) register 212 to be generated, and a variable resistor 213 whose resistance value is set by the control signal S3.
- RDAC Resistor Digital to Analog Converter
- the first control signal S1 output from the control unit 14 is a control signal by I 2 C communication.
- the first control signal S1 by I 2 C communication includes serial data SDA and a serial clock SCL.
- the serial input register 211 converts the serial data SDA into a parallel signal in synchronization with the serial clock SCL.
- the RDAC register 212 converts a parallel signal into an analog signal and outputs it as a resistance value control signal S3.
- the variable resistor 213 has terminals A1, B1, and W1. Between the terminal A1 and the terminal B1, there is a maximum resistance value that can be set by the variable resistor 213.
- the terminal W1 is a wiper terminal connected to a wiper contact for selecting the resistance value of the variable resistor 213.
- the reference voltage V1 is applied to the terminal A1, and the fixed resistance 22 is connected to the terminal W1.
- the resistance value between the terminal A 1 and the terminal W 1 is set by the control signal S 1 output from the control unit 14, and the voltage determined by the divided resistance circuit of the resistance value and the resistance value of the fixed resistor 22 is the base of the transistor 24. Given to.
- the lookup table 145 includes the temperature information and the digital value of the first control signal S1 to the level conversion circuits 13 1 ,..., 13 n and the digital value of the second control signal S2 to the booster circuit 11. Is a table that associates.
- a table for associating the digital value of the second control signal S2 of the temperature information to the booster circuit 11, temperature information and the level converting circuit 13 1, ..., a first control signal to the 13 n A table that associates the digital value of S1 is created, and the two tables are combined to create a lookup table 145.
- FIG. 6 is a flowchart showing a table generation procedure for associating the temperature information of the optical receiver according to the first embodiment of the present invention with the digital value of the control signal S2 to the booster circuit 11.
- FIG. 7 is a diagram illustrating the temperature dependence of the bias voltage of the optical receiver according to the first embodiment of the present invention.
- step S21 the optimum bias voltage Vapd of the APD connected to each channel is obtained at a plurality of points, that is, at a plurality of types of temperatures.
- step S22 the bias voltage Vapd measured at a plurality of types of temperatures is plotted on a graph.
- step S23 bias voltages Vapd of a plurality of types of temperatures are approximated by a polynomial, and bias voltages at temperatures not measured are calculated by interpolation.
- Graph as shown in FIG. 7 is created when determining the temperature dependency of the bias voltage for Ch n from each channel Ch 1.
- the measured temperature is indicated by a black circle. Curved parts without black circles are interpolated parts. Referring to the graph shown in FIG. 7, it can be seen which channel requires the highest bias voltage at each temperature. The largest bias voltage is defined as the maximum bias voltage Vapd_max.
- step S24 a voltage 1 volt higher than the maximum bias voltage Vapd_max, that is, the maximum bias voltage Vapd_max + 1 [V] is set as the reference voltage V1 (t).
- (T) indicates a value depending on the temperature t, and the same applies to the following description.
- the basis for 1 [V] is that the base-emitter voltage Vbe of the npn transistor 24 is about 0.8 [V], and the variation of the base-emitter voltage Vbe due to the temperature and the semiconductor element is 1 [V]. V].
- a voltage value determined based on a voltage between a base terminal which is a control terminal of a transistor used in the level conversion circuit and an emitter terminal which is an output terminal is added to the maximum bias voltage Vapd_max which is the largest voltage and the reference voltage V1 is generated.
- step S25 a table of the relationship between the temperature t and the digital value of the second control signal S2 for causing the booster circuit 11 to output the reference voltage V1 (t) is created.
- the control unit 14 outputs a second control signal S2 corresponding to the temperature t when the temperature t is given.
- the second control signal S2 is a signal for causing the booster circuit 11 to output a voltage corresponding to the temperature t on the maximum bias voltage Vapd_max + 1 indicated by a solid line in FIG. 7 as the reference voltage V1.
- the created table is stored in the memory 141 or a register in the processor 142.
- FIG. 8 is a diagram illustrating an example of the temperature characteristic of the base-emitter voltage Vbe (t) of the transistor 24 used in the optical receiver according to the first embodiment of the present invention. As shown in FIG. 8, the base-emitter voltage Vbe (t) of the transistor 24 decreases as the temperature t [° C.] increases. Further, the base-emitter voltage Vbe (t) of the transistor 24 increases as the temperature t [° C.] decreases. FIG.
- FIG. 9 is a diagram illustrating an example of a temperature dependence table of the base-emitter voltage Vbe (t) of the transistor 24 used in the optical receiver according to the first embodiment of the present invention.
- the temperature dependence table shows that the voltage Vbe (t) between the base and emitter of the transistor 24 is high when the temperature t [° C.] of the device is low, and the temperature t [° C.] of the device itself. Is high, the base-emitter voltage Vbe (t) of the transistor 24 has a low voltage value. That is, the temperature dependence table shown in FIG. 9 shows that the base-emitter voltage Vbe (t) decreases with increasing temperature and the base-emitter voltage Vbe (t) increases with decreasing temperature. .
- FIG. 10 is a flowchart showing a table generation procedure for associating the temperature information of the optical receiver according to the first embodiment of the present invention with the digital values of the control signal S1 to the level conversion circuits 13 1 ,..., 13 n . .
- step S31 a channel to be processed is determined.
- step S32 the temperature t is determined.
- step S33 the temperature dependence table of Vbe (t) of the transistor 24 is referred to.
- the bias voltage Vapd (t) is obtained.
- the bias voltage Vapd (t) is calculated from the resistance value R1 of the fixed resistor 22, the reference voltage V1 (t), the base-emitter voltage Vbe (t), and the resistance value Rv1 (t) of the variable resistor unit 21 by the equation (1). ).
- step S35 the resistance of the variable resistor 21 Rv1 (t) is determined necessary to produce the APD16 1 bias voltage Vapd (t).
- the resistance value Rv1 (t) is obtained as shown in Equation (2). Since the reference voltage V1 (t), the bias voltage Vapd (t), and the base voltage Vbe (t) are already known, the variable resistance value Rv1 (t) at each temperature is obtained using these values.
- step S36 it is determined whether or not the bias voltage Vapd (t) and the resistance value Rv1 (t) have been obtained for each temperature.
- Step S37 the bias voltage Vapd (t) and the resistance value Rv1 (t) are obtained for each channel. Judgment is made whether or not it is requested.
- step S38 the bias voltage Vapd (t) and the resistance value Rv1 (t) are stored in the memory 141 or the processor. 142 is stored in a register.
- step S36 when the bias voltage Vapd (t) and the resistance value Rv1 (t) are not obtained for each temperature (No in step S36), the process returns to step S32, and for other temperatures, the bias voltage Vapd (t) and The process for obtaining the resistance value Rv1 (t) is continued.
- step S37 when the bias voltage Vapd (t) and the resistance value Rv1 (t) are not obtained for each channel (No in step S37), the process returns to step S31, and for the other channels, the bias voltage Vapd (t) and The process for obtaining the resistance value Rv1 (t) is continued.
- control unit 14 can create a table in which the digital value of the control signal S1 that becomes the resistance value Rv1 (t) is stored for each temperature.
- the controller 14 creates this for n channels, and for each temperature, the digital value of the second control signal S2 of the reference voltage V1 (t) and the resistance value Rv1 (t) in the level conversion circuit of each channel.
- the digital value of the control signal S1 of 1 is stored in the memory 141 as a lookup table 145.
- the processing in FIG. 6 and the processing in FIG. 10 may be performed by the control unit 14 or may be performed by a device different from the control unit 14 to store the lookup table 145 in the memory 141. Also good.
- the control unit 14 performs the processing in FIG. 6 and the processing in FIG. 10 to store the lookup table 145 in the memory 141.
- Table example 11 the level conversion circuit 13 1 and the temperature t [° C.] of the optical receiving apparatus according to a first embodiment of the present invention, ..., a table showing the correspondence between the digital value of the first control signal S1 13 n It is a figure which shows an example.
- the control unit 14 can create the table 145A shown in FIG. 11 by the processing shown in FIG.
- FIG. 12 is a diagram illustrating an example of a table indicating the correspondence between the temperature t [° C.] of the optical receiver according to the first embodiment of the present invention and the digital value of the second control signal S2 of the booster circuit 11. is there.
- the control unit 14 can create the table 145B shown in FIG. 12 by the processing of FIG.
- FIG. 13 is a diagram illustrating an example of a lookup table of the optical receiver according to the first embodiment of the present invention.
- the control unit 14 can create the lookup table 145 shown in FIG. 13 by combining the table 145A shown in FIG. 11 and the table 145B shown in FIG.
- the lookup table 145 is created and stored in the memory 141 of the control unit 14, and the first control signal S1 and the second control signal S2 corresponding to the detected temperature are read from the memory 141 and input.
- the optical receiving device 10 can give an optimum bias voltage to the APDs 16 1 ,..., 16 n of each channel.
- the booster circuit 11 is one, a plurality of level conversion circuit 13 1 configured with a simple circuit, ..., APD16 1 multichannel by 13 n, ..., and generates a bias voltage of 16 n Therefore, an increase in size can be suppressed.
- the optical receiver 10 can also suppress an increase in power consumption. Furthermore, the optical receiver 10 can always drive the APDs 16 1 ,..., 16 n of each channel with an optimum bias voltage.
- the optical receiving device 10 includes the control unit 14 in common with a plurality of APDs. For this reason, compared with the case where a control part is provided separately for each APD, the optical receiving device 10 can suppress an increase in the size of the own device. Also, the optical receiving device 10 can suppress an increase in the number of parts compared to a case where a control unit is provided separately for each APD. For this reason, the optical receiver 10 can reduce power consumption, and can suppress the increase in the cost of an apparatus.
- FIG. 14 is a diagram illustrating an example of the configuration of the level conversion circuit 13 1 a according to the second embodiment. As shown in FIG. 14, the level conversion circuit 13 1 a is applied with a reference voltage V1, and a variable resistance unit 25 whose resistance value is changed by the first control signal S1, a fixed resistance 23 that acts as a collector resistance, And an npn-type transistor 24 constituting an emitter follower circuit.
- the divided resistor circuit includes a variable resistor unit 25 whose resistance value is changed by the first control signal S1.
- the level conversion circuit 13 1 a converts the level of the voltage of the wiper terminal of the variable resistor 25, as APD voltage to generate a bias voltage Vapd1 a bias signal, applied to the corresponding APD16 1.
- variable resistance unit 25 has the same configuration as the variable resistance unit 21 described with reference to FIG. However, the reference voltage V1 is applied to the terminal A1 shown in FIG. 5, the base of the transistor 24 is connected to the terminal W1, and the ground is connected to the terminal B1. Thereby, since the variable resistor 25 functions as a three-terminal variable resistor, it is not necessary to provide the fixed resistor 22 in FIG.
- the variable resistance unit 25 uses the first control signal S1 output from the control unit 14, so that the resistance value R1 between the terminal A1 and the terminal B1, the resistance value Rhigh between the terminal A1 and the terminal W1, and the terminal W1. And a resistance value Rv1 between the terminal B1 and the terminal B1 are set. Then, a voltage determined by the divided resistor circuit based on the resistance value set in the variable resistor unit 25 by the first control signal S ⁇ b> 1 is applied to the base of the transistor 24.
- the control method and the lookup table creation procedure are the same as those in the first embodiment.
- the relational expression between the bias voltage Vapd (t) of the APD and the reference voltage V1 (t) is different.
- the relational expression is represented by Expression (3). Therefore, the resistance value Rv1 (t) can be obtained by Expression (4).
- All level conversion circuits other than the level conversion circuit 13 1 a have the same configuration as described above and operate in the same manner as described above.
- a voltage variable range of 0 [V] or more and (V1 ⁇ Vbe) [V] or less can be obtained.
- the variable range of the bias voltage that is the bias signal can be made wider than the variable range of the bias voltage in the first embodiment.
- a bias voltage more suitable than that of the first embodiment can be applied to each APD.
- a divided resistor circuit can be realized by using only the variable resistor 25.
- Embodiment 2 can reduce the number of parts compared with Embodiment 1, and can suppress the increase in the cost of an apparatus.
- FIG. 15 is a diagram illustrating an example of the configuration of the level conversion circuit 13 1 b in the third embodiment.
- the level conversion circuit 13 1 b includes a thermistor 26 to which the reference voltage V1 is applied, a variable resistance section 27 whose resistance value changes according to the control signal S1, and a fixed resistance 23 that acts as a collector resistance. And an npn transistor 24 constituting an emitter follower circuit.
- the divided resistor circuit includes a variable resistance unit 27 whose resistance value changes according to the first control signal S1, and a thermistor 26 that is connected to the variable resistance unit 27 and whose resistance value changes according to temperature.
- the level conversion circuit 13 1 b converts the voltage at the node between the variable resistor 27 and the thermistor 26, as APD voltage to generate a bias voltage Vapd1 a bias signal, applied to the corresponding APD16 1.
- the variable resistance unit 27 has the same configuration as the variable resistance unit 21 described with reference to FIG. However, the thermistor 26 is connected to the terminal A1, and the ground is connected to the terminal W1.
- the thermistor 26 has an NTC (Negative Temperature Coefficient) characteristic in which the resistance value Rth decreases as the temperature increases. For this reason, in the third embodiment, if the temperature characteristic of the resistance value Rth of the thermistor 26 has linearity, the bias voltage can be obtained without changing the control signal S1 output from the control unit 14 due to a temperature change. Vapd temperature compensation can be performed. That is, when the temperature of the device increases, the resistance value Rth of the thermistor 26 changes and the bias voltage Vapd1 increases, and when the temperature of the device decreases, the bias voltage Vapd1 decreases.
- NTC Negative Temperature Coefficient
- the lookup table 145 stores the temperature and the digital value of the second control signal S2 to the booster circuit 11, and the first control signal to each level conversion circuit.
- the digital value of S1 is not stored.
- the variable resistance unit 27 may be changed to a fixed resistor.
- temperature compensation of the bias voltage Vapd1 can be performed with a simpler configuration and control than in the first and second embodiments.
- the third embodiment also has an advantage that the storage capacity of the memory 141 can be reduced.
- the digital value of the first control signal S1 that sets the resistance value of the variable resistance unit 27 to a constant value regardless of the temperature may be stored in the lookup table 145.
- the look-up table 145 is created as a content considering the temperature characteristic of the resistance value Rth of the thermistor 26 and By setting the resistance value of the variable resistance unit 27 in accordance with the change in the APD, an optimum bias voltage can be applied to each APD at each temperature.
- the control method and the lookup table creation procedure are the same as those in the first embodiment.
- All level conversion circuits other than the level conversion circuit 13 1 b have the same configuration as described above and operate in the same manner as described above.
- the configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.
Abstract
Description
図1は、本発明の実施の形態1にかかる光受信装置を示すブロック図である。図1に示す光受信装置10は、昇圧回路11と、フィルタ12と、レベル変換回路131,…,13nと、n個のAPD161,…,16nと、制御部14と、温度検出器15と、n個のTIA(Trans Impedance Amplifire:トランスインピーダンスアンプ)171,…,17nと、n個の増幅器181,…,18nと、を備えている。nは2以上の整数であり、以下同様である。昇圧回路11は、自装置の電源電圧を昇圧する昇圧部である。フィルタ12は、昇圧回路11で発生させた電圧のノイズを除去する。n個のレベル変換回路131,…,13nは、フィルタ12を通過した直流電圧の電圧レベルを変換してバイアス信号であるバイアス電圧を生成するn個のレベル変換部である。n個のAPD161,…,16nは、与えられたバイアス電圧によって受信感度が設定される。制御部14は、温度情報に基づく第1の制御信号S1をレベル変換回路131,…,13nに与えるとともに、温度情報に基づく第2の制御信号S2を昇圧回路11に与える。温度検出器15は、自装置の温度を検出し、温度情報を制御部14へ出力する。n個のTIA171,…,17nは、APD161,…,16nから出力される電流を電圧に変換する。n個の増幅器181,…,18nは、TIA171,…,17nによって変換された電圧を増幅する。なお、自装置とは、光受信装置10である。
図2は、本発明の実施の形態1にかかる光受信装置の制御部14の構成例を示す図である。図2に示すように、制御部14は、処理に必要なプログラム146及びデータを記憶するメモリ141と、メモリ141からプログラム146を読出して実行するプロセッサ142と、温度情報の入力及び制御信号S1及びS2の出力のインタフェースとして機能する入出力装置143と、制御部14内の各部を相互に接続するバス144とを有する。メモリ141は、ルックアップテーブル(Look Up Table:LUT)145を記憶する。制御部14は、メモリ141へのデータの書込み及びメモリ141からの読出しを制御する、マイクロコントロールユニット(Micro Control Unit:MCU)として機能する。ルックアップテーブル145は、温度情報と、レベル変換回路131,…,13nへの第1の制御信号S1及び昇圧回路11への第2の制御信号S2とを対応付けるテーブルである。なお、汎用のマイクロプロセッサ及びメモリによって制御部14を実現してもよいし、MCUの機能を有する専用の集積回路によって制御部14を実現してもよい。
次に、プロセッサ142の動作について説明する。
図4は、本発明の実施の形態1にかかる光受信装置のレベル変換回路131の構成の一例を示す図である。図4に示すように、レベル変換回路131は、一端に基準電圧V1が印加される可変抵抗部21と、一端が可変抵抗部21の他端に接続され、他端がグランドに接続される固定抵抗22と、コレクタ抵抗として作用する固定抵抗23と、エミッタフォロア回路を構成する半導体素子であるトランジスタ24と、を有する。本実施の形態1では、トランジスタ24は、npn型のトランジスタである。
図5は、本実施の形態1における可変抵抗部21の構成例を示す図である。図5に示すように、可変抵抗部21は、制御部14から出力される第1の制御信号S1をパラレル信号に変換するシリアル入力レジスタ211と、パラレル信号に応じた抵抗値の制御信号S3を生成するRDAC(Resistor Digital to Analog Converter)レジスタ212と、制御信号S3によって抵抗値が設定される可変抵抗213と、を有する。
次に、制御部14による、APDのバイアス電圧のルックアップテーブルの作成方法について説明する。先述したように、ルックアップテーブル145は、温度情報とレベル変換回路131,…,13nへの第1の制御信号S1のデジタル値及び昇圧回路11への第2の制御信号S2のデジタル値とを対応付けるテーブルである。本実施の形態1では、温度情報と昇圧回路11への第2の制御信号S2のデジタル値とを対応付けるテーブルと、温度情報とレベル変換回路131,…,13nへの第1の制御信号S1のデジタル値とを対応付けるテーブルとが作成され、2つのテーブルが組合されることによって、ルックアップテーブル145が作成される。
図11は、本発明の実施の形態1にかかる光受信装置の温度t[℃]とレベル変換回路131,…,13nの第1の制御信号S1のデジタル値との対応を示すテーブルの例を示す図である。制御部14は、図10に示す処理によって、図11に示すテーブル145Aを作成することができる。
上記の実施の形態1において用いたレベル変換回路131を別の構成にすることができる。図14は、実施の形態2におけるレベル変換回路131aの構成の一例を示す図である。図14に示すように、レベル変換回路131aは、基準電圧V1が印加され、第1の制御信号S1によって抵抗値が変化する可変抵抗部25と、コレクタ抵抗として作用する固定抵抗23と、エミッタフォロア回路を構成するnpn型のトランジスタ24と、を有する。
上記の実施の形態1において用いたレベル変換回路131を別の構成にすることができる。図15は、実施の形態3におけるレベル変換回路131bの構成の一例を示す図である。図15に示すように、レベル変換回路131bは、基準電圧V1が印加されるサーミスタ26と、制御信号S1によって抵抗値が変化する可変抵抗部27と、コレクタ抵抗として作用する固定抵抗23と、エミッタフォロア回路を構成するnpn型のトランジスタ24と、を有する。
Claims (8)
- 光信号を受信する光受信装置であって、
与えられたバイアス信号によって受信感度が設定される複数のアバランシェフォトダイオードと、
前記複数のアバランシェフォトダイオードに対応して設けられて、前記バイアス信号を得るための基準電圧のレベルを変換して前記バイアス信号を生成し、対応するアバランシェフォトダイオードへ与える複数のレベル変換部と、
前記光受信装置の温度に対応した第1の制御信号を生成し、前記第1の制御信号によって前記複数のレベル変換部のレベル変換量を制御する制御部と、
を含むことを特徴とする、光受信装置。 - 電源電圧を昇圧して前記基準電圧を生成し、前記複数のレベル変換部に与える昇圧部をさらに有し、
前記複数のレベル変換部は、前記基準電圧のレベルを、前記第1の制御信号に基づいて変換して、前記バイアス信号を生成することを特徴とする、
請求項1に記載の光受信装置。 - 前記昇圧部は、
前記複数のアバランシェフォトダイオードのバイアス信号のうち最も大きな電圧に、前記レベル変換部に用いるトランジスタの制御端子と出力端子との間の電圧に基づいて定めた電圧値を加えて前記基準電圧を生成し、
前記制御部は、
前記光受信装置の温度に対応した第2の制御信号を生成し、前記第2の制御信号によって前記昇圧部が生成した前記基準電圧を制御することを特徴とする、
請求項2に記載の光受信装置。 - 前記制御部は、
前記光受信装置の温度と前記第1の制御信号及び前記第2の制御信号とを対応付けるテーブルを含み、前記光受信装置の温度に対応した前記第1の制御信号を前記テーブルから読出し、読出した前記第1の制御信号を前記複数のレベル変換部へ出力し、前記光受信装置の温度に応じて前記テーブルから読出した前記第2の制御信号を前記昇圧部へ出力することを特徴とする、
請求項3に記載の光受信装置。 - 前記複数のレベル変換部は、
前記基準電圧とグランドとの間の電圧を前記第1の制御信号によって分割する分割抵抗回路を有し、
前記分割抵抗回路によって分割された電圧を用いて前記バイアス信号を生成して、対応するアバランシェフォトダイオードに与えることを特徴とする、
請求項1から4のいずれか1つに記載の光受信装置。 - 前記分割抵抗回路は、
前記第1の制御信号によって抵抗値が変化する可変抵抗部と、前記可変抵抗部と接続された抵抗とを含み、
前記複数のレベル変換部は、
前記可変抵抗部と前記抵抗との接続点の電圧のレベルを変換して前記バイアス信号を生成して、対応するアバランシェフォトダイオードに与えることを特徴とする、
請求項5に記載の光受信装置。 - 前記分割抵抗回路は、
前記第1の制御信号によって抵抗値が変化する可変抵抗部を含み、
前記複数のレベル変換部は、
前記可変抵抗部のワイパー端子の電圧のレベルを変換して前記バイアス信号を生成して、対応するアバランシェフォトダイオードに与えることを特徴とする、
請求項5に記載の光受信装置。 - 前記分割抵抗回路は、
前記第1の制御信号によって抵抗値が変化する可変抵抗部と、前記可変抵抗部と接続され、温度に応じて抵抗値が変化するサーミスタとを含み、
前記複数のレベル変換部は、
前記可変抵抗部と前記サーミスタとの接続点の電圧のレベルを変換して前記バイアス信号を生成して、対応するアバランシェフォトダイオードに与えることを特徴とする、
請求項5に記載の光受信装置。
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