WO2016114293A1 - バンプ形成用フィルム、半導体装置及びその製造方法、並びに接続構造体 - Google Patents

バンプ形成用フィルム、半導体装置及びその製造方法、並びに接続構造体 Download PDF

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Publication number
WO2016114293A1
WO2016114293A1 PCT/JP2016/050805 JP2016050805W WO2016114293A1 WO 2016114293 A1 WO2016114293 A1 WO 2016114293A1 JP 2016050805 W JP2016050805 W JP 2016050805W WO 2016114293 A1 WO2016114293 A1 WO 2016114293A1
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Prior art keywords
bump
bumps
base electrode
conductive filler
film
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PCT/JP2016/050805
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English (en)
French (fr)
Inventor
恭志 阿久津
朋之 石松
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デクセリアルズ株式会社
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Publication date
Application filed by デクセリアルズ株式会社 filed Critical デクセリアルズ株式会社
Priority to US15/542,343 priority Critical patent/US10943879B2/en
Priority to CN201680004710.9A priority patent/CN107112253B/zh
Priority to KR1020197024093A priority patent/KR102398451B1/ko
Priority to KR1020177017937A priority patent/KR102182945B1/ko
Publication of WO2016114293A1 publication Critical patent/WO2016114293A1/ja

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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector

Definitions

  • the present invention relates to a bump forming film for forming bumps on electrode pads such as IC chips.
  • Patent Document 1 When flip-chip mounting a bumpless IC chip on a wiring board, in order to realize low conduction resistance and stable conduction reliability, an electrode pad of a bumpless IC chip that is not covered with a passivation film is previously applied with a stud bump method. It has been proposed that metal bump-coated resin particles that are expected to function as bumps are provided with metal bumps by ultrasonic heating (Patent Document 1).
  • An object of the present invention is to solve the above-described problems of the conventional technology, so that bumps capable of realizing low-cost and stable conduction reliability can be formed on a semiconductor device such as a bumpless IC chip. It is to be.
  • bump conductive fillers are regularly arranged in a unit of periodic repeat in the longitudinal direction of the film in plan view, and a straight line connecting one end of the bump conductive filler in the film thickness direction is formed on the film. It has been found that the object of the present application can be achieved by making the surface substantially parallel to the surface of the substrate, and the present invention has been completed.
  • the present invention is a film for bump formation in which conductive fillers for bumps are regularly arranged in a plan view in an insulating adhesive resin layer, and the regular arrangement has periodic repeating units in the longitudinal direction of the film. And the straight line which ties one edge part of the conductive filler for bumps in the thickness direction of a film provides the bump formation film "which is substantially parallel to the surface of a film".
  • the present invention also relates to a method for producing the above-described bump forming film of the present invention, which comprises the following steps (a) to (c): ⁇ Process (I)> Preparing a transfer body having regularly arranged recesses formed on the surface; ⁇ Process (b)> A step of filling the concave portion of the transfer member with a conductive filler for bumps; and ⁇ step (c)> Provided is a manufacturing method including a step of transferring a conductive filler for bumps to an insulating adhesive resin layer by pressing an insulating adhesive resin layer on the surface of the transfer body that is filled with the conductive filler for bumps. To do.
  • This manufacturing method further includes the following steps (d) ⁇ Process (d)> It is preferable to have a step of laminating an insulating adhesive cover layer from the bump conductive filler transfer surface side to the insulating adhesive resin layer to which the bump conductive filler is transferred.
  • the present invention is “an electronic component in which bumps are arranged on a base electrode for bumps on the surface, and the bump conductive filler for the bump forming film is a bump for the base electrode.
  • An electronic component in which a forming film is disposed on a base electrode forming surface of the electronic component is provided.
  • a semiconductor device is provided in which a film is disposed on a base electrode forming surface of the semiconductor device.
  • the present invention is “a method of manufacturing an electronic component in which bumps are arranged on a base electrode for bumps on the surface, With respect to the base electrode of the bumpless electronic component having the bump base electrode on the surface, the bump forming film of the bump forming film of the present invention is placed on the bump forming film so that the bump conductive film faces the base electrode.
  • a method for manufacturing a semiconductor device in which bumps are arranged on a base electrode for bumps on the surface With respect to the base electrode of the bumpless semiconductor device having a bump base electrode on the surface, the bump forming film is placed on the bump forming film so that the bump conductive filler of the bump forming film of the present invention faces the base electrode.
  • a “manufacturing method for fixing a conductive filler for bumps to a base electrode” by curing an insulating adhesive resin layer constituting a bump-forming film after being disposed on a base electrode forming surface of a semiconductor device.
  • the present invention is “a method of manufacturing a semiconductor device in which bumps are arranged on a base electrode for bumps on the surface, With respect to the base electrode of the bumpless semiconductor device having a bump base electrode on the surface, the bump forming film is placed on the bump forming film so that the bump conductive filler of the bump forming film of the present invention faces the base electrode.
  • the bump conductive filler disposed on the base electrode on the surface of the electronic component and the corresponding terminal of the other electronic component are curable or non-curable conductive adhesive or insulating property.
  • a connection structure that is connected via an adhesive or connected by forming a metal bond between the two is provided.
  • the conductive filler for bumps arranged on the base electrode on the surface of the semiconductor device described above and the corresponding terminal of another electrical component are a curable or non-curable conductive adhesive or insulating adhesive. Or a connection structure connected by forming a metal bond between the two.
  • the bump-forming film of the present invention has conductive fillers for bumps regularly arranged so as to have periodic repeating units in the longitudinal direction of the film in a plan view in the insulating adhesive resin layer. For this reason, it becomes possible to arrange
  • FIG. 1 is a cross-sectional view of the bump forming film of the present invention.
  • FIG. 2 is a process explanatory diagram of the method for producing a bump forming film of the present invention.
  • FIG. 3 is a process explanatory diagram of the method for producing a bump forming film of the present invention.
  • FIG. 4 is a process explanatory diagram of the method for producing a bump forming film of the present invention.
  • FIG. 5 is a process explanatory diagram of the method for producing a bump forming film of the present invention.
  • FIG. 6 is a cross-sectional view of the semiconductor device of the present invention.
  • FIG. 7 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 3 in which the conductive particles are arranged 1: 5.
  • FIG. 7 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 3 in which the conductive particles are arranged 1: 5.
  • FIG. 8 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 10 in which the conductive particles are arranged 1: 4.
  • FIG. 9 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 11 in which the conductive particles are arranged 1:16.
  • FIG. 10 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 12 in which the conductive particles are arranged 1: 3.
  • FIG. 11 is a view showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 13 in which the conductive particles are arranged 1: 9.
  • FIG. 12 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 14 in which the conductive particles are arranged 1: 6.
  • FIG. 13 is a diagram showing the relationship between conductive particles and electrode pads in the bump forming film of Example 15 in which conductive particles are arranged 1:20.
  • FIG. 14 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 16 in which the conductive particles are arranged 1: 2.
  • FIG. 15 is a diagram showing the relationship between the conductive particles and the electrode pads in the bump forming film of Example 17 in which the conductive particles are arranged 1: 8.
  • the bump forming film 10 of the present invention is a bump forming film in which conductive fillers 2 for bumps are regularly arranged in an insulating adhesive resin layer 1 in plan view.
  • This regular arrangement of the conductive fillers 2 for bumps has periodic repeating units in the longitudinal direction of the film. This periodic repeating unit can be appropriately selected according to the electrode pattern of the semiconductor device on which the bump is to be formed.
  • the number of bump conductive fillers 2 disposed on one electrode of the semiconductor device on which the bump is to be formed may be one or two or more.
  • the bump conductive fillers 2 may be arranged close to each other or may be connected to each other as long as the effects of the invention are not impaired. When the bump conductive fillers 2 are arranged close to each other or connected to each other, the influence of the displacement can be reduced, and the alignment operation becomes easy.
  • a straight line connecting one end of the bump conductive filler 2 in the thickness direction of the film is substantially parallel to the surface of the film.
  • FIG. 1 is an example in which the straight lines on the film surface side and the back surface side are parallel on the front surface side and the back surface side of the bump forming film 10, respectively.
  • the substantially parallel degree is that an angle formed by a straight line connecting one end portion of the bump conductive filler 2 in the thickness direction of the film and the surface of the film is within ⁇ 5 °.
  • Examples of the conductive filler 2 for bumps include solder particles, nickel particles, and metal-coated resin particles.
  • solder particles and solder plated resin particles that can form a metal bond with a terminal material such as copper at a relatively low temperature can be preferably exemplified.
  • solder particles are preferable.
  • metal-coated resin particles can be preferably used from the viewpoint of easily obtaining the conduction reliability of the connection between the bump electrodes and the terminals of other electronic components corresponding thereto.
  • the metal coating of the metal-coated resin particles can be formed using a known metal film forming method such as an electroless plating method or a sputtering method.
  • the core resin particles constituting the metal-coated resin particles can contain conductive fine particles in order to improve conduction reliability.
  • the average particle size of the conductive filler 2 for bumps measured by an image type particle size distribution measuring device is preferably 3 to 60 ⁇ m, more preferably 8 to 50 ⁇ m. Within this range, it becomes easy to match the terminal size of a general semiconductor device. Moreover, it is preferable that the magnitude
  • substantially the same means that the CV value, which is the ratio of the standard deviation of the particle diameter to the average particle diameter, is 20% or less, preferably 10% or less.
  • the shape of the conductive filler 2 for bumps is preferably a true spherical shape, it may be a substantially spherical shape, an elliptical spherical shape, or the like. There may also be fine irregularities on the surface. If there are fine irregularities, an effect of increasing the surface area and an anchor effect at the time of pressing can be expected, and a reduction in resistance and stabilization at the time of conduction can be expected.
  • the thickness of the insulating adhesive resin layer 1 is preferably 0.5 to 20 times, more preferably 0.8 to 15 times the average particle diameter of the conductive filler 2 for bumps. Within this range, stable fixation with respect to the bump position can be realized. In this range, it is preferable that the thickness of the insulating adhesive resin layer 1 is such that a part of the conductive filler for bump 2 is exposed from the insulating adhesive resin layer 1. This is because operability such as removal of an insulating adhesive resin layer 1 described later and lamination with another insulating adhesive resin layer is enhanced.
  • Such an insulating adhesive resin layer 1 preferably has adhesiveness to fix the conductive filler 2 for bumps to the electrode of the semiconductor device.
  • the insulating adhesive resin layer 1 is photocurable or heat-resistant. It may be curable. By curing the insulating adhesive resin layer 1, if the bump conductive filler 2 forms a metal bond with the electrode of the semiconductor device, the insulating adhesive resin layer 1 is left leaving the metal bonded bump conductive filler 2. It can be removed.
  • the conductive filler for bump 2 when the conductive filler for bump 2 is fixed by the insulating adhesive resin layer 1 without metal bonding, other electronic components may be joined together with another insulating adhesive resin layer.
  • another insulating adhesive resin layer may be provided in advance in another electronic component, or may be previously laminated on the insulating adhesive resin layer having the bump conductive filler 2.
  • the bump conductive filler 2 is a metal plating coated resin particle, the particle diameter may be larger than the total thickness of the insulating adhesive resin layers. This is because the conductive connection is easily retained by the repulsion of the resin particles after being deformed (flattened) following the joining.
  • the bump conductive filler 2 is a material that is easily flattened, it is preferable that the bump conductive fillers 2 are slightly separated from each other in order not to obstruct flattening. This is because the bump conductive filler 2 may be displaced due to flattening.
  • the size (average particle diameter) of the conductive filler 2 for bumps is preferably 20% or more, more preferably 30% or more. On the other hand, if it is separated by 50% or more, there is a concern that the capture efficiency is lowered. If it does in this way, the conductive filler for bumps can exist densely in a required place, and it is preferable for maintaining the quality at the time of manufacture (also preferable for stabilizing the conduction resistance value).
  • a unit may be constituted by a plurality of bump conductive fillers 2. By configuring the unit, it is possible to stabilize the conduction resistance value, which is preferable.
  • the external shape of such a unit is preferably rectangular or circular. This is because the bump shape itself is generally such a shape.
  • the size (average particle diameter) of the bump conductive filler 2 corresponds to the height required for the bump, depending on the height and width (that is, the aspect ratio) required for the bump.
  • the width may be unitized by forming bump conductive fillers 2 in a row in that direction. Also in this case, it is preferable to maintain the above-mentioned distance interval.
  • column may shift
  • the unit when it is circular, it may have a shape in which one bump conductive filler 2 is arranged at the center and another bump conductive filler 2 is arranged around the bump conductive filler 2 according to a circle. Also in this case, it is preferable to maintain the above-mentioned distance interval.
  • This shape may be a shape in which conductive particles are arranged at each corner and center of a regular polygon such as a regular triangle or a square. Note that the shape of the regular polygon may be distorted. For example, when there are a plurality of bump forming portions in the same plane, the pressing by the tool is made uniform.
  • the insulating adhesive resin layer 1 photocurable or thermosetting
  • light or heat is added to the resin composition constituting the insulating adhesive resin layer 1.
  • blend a polymerization initiator As such an insulating adhesive resin layer, a thermoplastic acrylic or epoxy resin film, a thermosetting or photocuring acrylic or epoxy resin film, or the like can be applied.
  • the thickness of such an insulating adhesive resin layer 1 is usually 10 to 40 ⁇ m.
  • the bump-forming film of the present invention can be produced by a production method having the following steps (a) to (c), preferably (d). The process will be described in detail with reference to the drawings.
  • a transfer body 100 is prepared in which regularly arranged concave portions 50 (for example, columnar concave portions corresponding to lattice points of a planar lattice pattern) are formed on the surface.
  • the depth of the recess 50 is determined based on the electrode pitch, electrode width, inter-electrode space width, and average particle size of the conductive filler for bumps of an electrode (electrode pad, through hole, via hole, etc.) of a semiconductor device such as an IC chip on which a bump is to be formed. It can be determined according to the diameter or the like.
  • the transfer body to be prepared in this step (a) can be prepared by using a known method.
  • a metal plate is processed to prepare a master, and a curable resin is applied to it. It can be applied and cured.
  • a transfer metal master having a convex portion corresponding to the concave portion is formed by cutting a flat metal plate, and a resin composition constituting the transfer body is applied to the convex surface of the master. After being cured, the transfer body is obtained by pulling away from the master.
  • the bump conductive filler 2 is filled in the recess 50 of the transfer body 100.
  • the conductive filler 2 for bumps may be sprayed from above the concave portion 50 of the transfer body 100, and the unfilled filler may be removed with a brush, blade, or air blow.
  • the insulating adhesive resin layer 1 is overlapped and pressed on the surface of the transfer body 100 on the side filled with the conductive filler 2 for bumps, so that one surface of the insulating adhesive resin layer 1 is pressed. Bump conductive filler 2 is transferred. In this case, the bump conductive filler 2 can be buried in the insulating adhesive resin layer 1. Thereby, the film 10 for bump formation as shown in FIG. 1 is obtained.
  • step (d) may be further performed.
  • the insulating adhesive cover layer 6 can be laminated from the bump conductive filler transfer surface side to the insulating adhesive resin layer 1 to which the bump conductive filler 2 is transferred. Thereby, the film 20 for bump formation which has the insulating adhesive resin layer of 2 layer structure is obtained.
  • the insulating adhesive cover layer 6 may be made of the same material as the insulating adhesive resin layer 1 and generally uses an adhesive resin film, a thermosetting resin film, and a photocurable resin film. You can also.
  • the bump forming film of the present invention can be applied when bumps are formed on electrodes of electronic components. That is, the electronic component has a structure in which bumps are arranged on the base electrode for bumps on the surface, and the bump forming film is formed so that the bump conductive filler of the bump forming film becomes the bump of the base electrode. It is arrange
  • the bump forming film of the present invention can be preferably applied when bumps are formed on electrodes (pads, through holes, via holes, etc.) of semiconductor devices such as IC chips and semiconductor wafers. When applied to a through hole or a via hole, the bump may be inserted into the hole.
  • the semiconductor device 200 When applied to an electrode pad, for example, as shown in FIG. 6, the semiconductor device 200 has a structure in which bumps are arranged on a base electrode 60 for bumps surrounded by a passivation film 30 on the surface.
  • the bump forming film 10 is arranged on the base electrode forming surface of the semiconductor device 200 so that the bump forming filler 2 of the bump forming film 10 of the invention becomes a bump of the base electrode 60.
  • This semiconductor device is also one embodiment of the present invention.
  • the conductive filler for bumps is fixed to the base electrode with a curable or non-curable insulating adhesive resin constituting the bump forming film.
  • the conductive filler 2 for bumps is fixed to the base electrode 60 by curing the adhesive resin layer 1.
  • the bump-forming filler 2 may be fixed to the base electrode 60 by heating the bump-forming filler 2 to the base electrode 60 by resistance heating or ultrasonic heating to cause metal bonding.
  • the insulating adhesive resin layer 1 constituting the bump forming film 10 may be cured and then peeled off.
  • the conductive filler for bump of the bump forming film of the present invention is compared with the base electrode of the bumpless electronic component having the base electrode for bump on the surface.
  • the bump forming film is disposed on the surface of the base electrode forming surface of the electronic component so as to face the base electrode, and then the bump conductive filler is used as the base electrode with an insulating adhesive resin constituting the bump forming film. It can manufacture by the manufacturing method to fix.
  • the semiconductor device of the present invention in which bumps are arranged on the base electrode for bumps on the surface is formed by the bump formation of the present invention on the base electrode of the bumpless semiconductor device having the base electrodes for bumps on the surface.
  • An insulating adhesive resin layer constituting the bump forming film is disposed after the bump forming film is disposed on the base electrode forming surface of the semiconductor device so that the bump forming filler of the film for use faces the base electrode. It can be manufactured by a manufacturing method in which the conductive filler for bumps is fixed to the base electrode by curing by heating or light irradiation.
  • the bump forming film of the present invention is applied to the base electrode of the bumpless semiconductor device having the base electrode for bumps on the surface.
  • the bump forming filler is heated to be metal-bonded to the base electrode. It can also be manufactured by a fixing manufacturing method. These manufacturing methods are also one embodiment of the present invention.
  • connection structure The conductive filler for bumps arranged on the base electrode on the surface of the electronic component of the present invention and the corresponding terminal of the other electronic component are connected via a curable or non-curable conductive adhesive or insulating adhesive.
  • a connection structure can be obtained by connecting them by forming a metal bond between them.
  • the conductive filler for bumps arranged on the base electrode on the surface of the semiconductor device of the present invention and the corresponding terminal of another electronic component are bonded to a curable or non-curable conductive adhesive or insulating adhesive.
  • a connection structure can be obtained by connecting via an agent or by forming a metal bond between the two.
  • Example 1 A nickel plate having a thickness of 2 mm was prepared, and cylindrical convex portions (an outer diameter of 35 ⁇ m and a height of 30 ⁇ m) were formed to obtain a transfer body master.
  • the arrangement of the protrusions was 280 peripheral arrangements inside 200 ⁇ m of 7 mm square, and the density of the protrusions was 5.7 pieces / mm 2 .
  • phenoxy resin YP-50, Nippon Steel & Sumikin Chemical Co., Ltd.
  • 29 parts by mass of acrylate resin M208, Toagosei Co., Ltd.
  • photopolymerization initiator IRGACURE 184, BASF Japan Co., Ltd.
  • a photopolymerizable resin composition containing 2 parts by mass was applied to a dry thickness of 30 ⁇ m, dried at 80 ° C. for 5 minutes, and then transferred by irradiation with 1000 mJ light with a high-pressure mercury lamp. Created the body.
  • solder particles fine solder powder, Mitsui Mining Co., Ltd.
  • the solder particles are blown into the recesses by air blowing. Filled.
  • An insulating adhesive resin film having a thickness of 20 ⁇ m formed on a PET film is placed on the surface of the transfer body on which the solder particles are filled, and pressed at a temperature of 50 ° C. and a pressure of 0.5 MPa to form an insulating adhesive resin film. Transfer was performed while embedding the solder particles.
  • the arrangement pattern of the conductive particles was a 1: 1 arrangement (a mode in which one conductive particle is arranged on one electrode pad).
  • a bump forming film having a total thickness of 30 ⁇ m was obtained. In this bump forming film, one end of the conductive particles and the film interface were substantially coincident.
  • the insulating adhesive resin film used in Example 1 is 60 parts by mass of phenoxy resin (YP-50, Nippon Steel & Sumikin Chemical Co., Ltd.), 40 parts by mass of epoxy resin (jER828, Mitsubishi Chemical Co., Ltd.), and cation.
  • a mixed solution containing 2 parts by mass of a system curing agent (SI-60L, Sanshin Chemical Industry Co., Ltd.) is applied to a PET film having a film thickness of 50 ⁇ m and dried in an oven at 80 ° C. for 5 minutes. It is the film obtained by making it.
  • Example 2 A transfer body was prepared by repeating the same operation as in Example 1 except that a transfer body master having an outer diameter of 25 ⁇ m and a height changed to 20 ⁇ m was used. An average particle diameter of 20 ⁇ m was prepared for this transfer body. After spraying the solder particles (fine solder powder, Mitsui Mining & Smelting Co., Ltd.), the recesses were filled with solder particles by air blowing.
  • solder particles fine solder powder, Mitsui Mining & Smelting Co., Ltd.
  • Example 1 By applying an insulating adhesive resin film to both surfaces of the transfer body filled with solder particles in the same manner as in Example 1, a film for bump formation having a total thickness of 30 ⁇ m was obtained. In this bump forming film as well, one end portion of the conductive particles and the film interface substantially coincided with each other as in Example 1.
  • Example 3 The same operation as in Example 2 except that the average density of the convex portions of the transfer master was 28.5 / mm 2 and the conductive particles were arranged in a 1: 5 array as shown in FIG.
  • the film for bump formation was obtained by repeating. In the present example, when the film was viewed in plan, a total of five conductive particles 2 were arranged in close proximity to the electrode pad P to be transferred.
  • Comparative Example 1 A bump-forming film was obtained by repeating the same operation as in Example 1 except that a transfer material master having projections randomly arranged (the density of the projections was 60 / mm 2 ) was used.
  • Examples 4 to 6 and Comparative Example 2 By placing an insulating adhesive resin film having a thickness of 30 ⁇ m formed on a PET film as an insulating adhesive resin film to be applied to the solder particle-filled surface of the transfer body and pressing it at a temperature of 50 ° C. and a pressure of 0.5 MPa.
  • a bump forming film having a total thickness of 30 ⁇ m was obtained by repeating the same operations as in Examples 1 to 3 and Comparative Example 1 except that the transfer was performed while embedding the solder particles in the insulating adhesive resin film. In these bump forming films as well as in Example 1, one end of the conductive particles and the film interface substantially coincided.
  • the insulating adhesive resin films used in Examples 4 to 6 and Comparative Example 2 were 30 parts by mass of phenoxy resin (YP-50, Nippon Steel & Sumikin Chemical Co., Ltd.), acrylic monomer (Light Acrylate 3EGA, Kyoeisha Chemical Co., Ltd.). )) A mixed solution containing 60 parts by mass and 3 parts by mass of a radical photopolymerization initiator (IRGACURE 184, BASF Japan Ltd.) was prepared, and applied to a PET film having a film thickness of 50 ⁇ m. A film obtained by drying in an oven for 5 minutes.
  • Examples 7 to 9 and Comparative Example 3 By placing an insulating adhesive resin film having a thickness of 30 ⁇ m formed on a PET film as an insulating adhesive resin film to be applied to the solder particle-filled surface of the transfer body and pressing it at a temperature of 50 ° C. and a pressure of 0.5 MPa.
  • a bump forming film having a total thickness of 30 ⁇ m was obtained by repeating the same operations as in Examples 1 to 3 and Comparative Example 1 except that the transfer was performed while embedding the solder particles in the insulating adhesive resin film. In these bump forming films as well as in Example 1, one end of the conductive particles and the film interface substantially coincided.
  • the insulating adhesive resin films used in Examples 7 to 9 and Comparative Example 3 were 30 parts by mass of phenoxy resin (YP-50, Nippon Steel & Sumikin Chemical Co., Ltd.), acrylic monomer (Light Acrylate 3EGA, Kyoeisha Chemical Co., Ltd.). )) A mixed solution containing 60 parts by weight, 3 parts by weight of a release agent (BYK3500, Big Chemie Japan) and 3 parts by weight of a radical photopolymerization initiator (IRGACURE 184, BASF Japan) was prepared. Is a film obtained by coating the film on a PET film having a film thickness of 50 ⁇ m and drying it in an oven at 80 ° C. for 5 minutes.
  • connection structures were prepared as described below, and a conduction resistance value (initial conduction resistance value) at the time of bump formation and a temperature of 85
  • the conduction resistance value resistance value after high-temperature and high-humidity bias test
  • the conductive resistance value was measured using a digital multimeter (34401A, Agilent Technology Co., Ltd.) under a current condition of 1 mA by the 4-terminal method.
  • the initial conduction resistance value 5 ⁇ or less was determined as good (G), and the value exceeding the initial resistance was determined as defective (NG). Moreover, about the conduction resistance value after a high temperature, high humidity bias test, 20 ohms or less were made favorable (G), and the case where it exceeded it was made into defect (NG). The obtained results are shown in Table 1.
  • a bump forming film is placed on the electrode pad of a bumpless IC chip (size: 7 mm length ⁇ 7 mm width ⁇ 200 ⁇ m thickness) having an aluminum electrode pad (30 ⁇ m diameter, 85 ⁇ m pitch, 280 pins) in a peripheral arrangement, and a temperature of 50 ° C.
  • the film was stuck and fixed by pressing at a pressure of 0.5 MPa.
  • one bump conductive filler (solder particle) corresponds to one electrode pad.
  • the IC chip having the bump forming film attached thereto was connected to an IC mounting glass epoxy substrate (material: FR4) under the conditions of a temperature of 180 ° C., a pressure of 40 MPa, and a heating and pressing time of 10 seconds. As a result, a connection structure was obtained.
  • the IC chip to which the film for bump formation was attached was bonded to 60 parts by mass of a cationic polymerizable insulating adhesive resin film (phenoxy resin (YP-50, Nippon Steel & Sumikin Chemical Co., Ltd.), epoxy resin (jER828, Mitsubishi Chemical Corporation). )) 40 parts by mass and a cationic curing agent (SI-60L, Sanshin Chemical Industry Co., Ltd., 2 parts by mass) on a glass epoxy substrate for IC mounting (material: FR4) at a temperature of 180 The connection was made under the conditions of ° C., pressure 40 MPa, and heating and pressing time 20 seconds. As a result, a connection structure was obtained.
  • a cationic polymerizable insulating adhesive resin film phenoxy resin (YP-50, Nippon Steel & Sumikin Chemical Co., Ltd.), epoxy resin (jER828, Mitsubishi Chemical Corporation).
  • a cationic curing agent SI-60L, Sanshin Chemical Industry Co., Ltd., 2 parts by mass
  • connection structures using bump forming films of Examples 7 to 9 and Comparative Example 3 After the bump forming film was attached to the IC chip in the same manner as in Example 1, the film was fixed by irradiating with ultraviolet rays having a wavelength of 365 nm (irradiation intensity: 100 mW, irradiation amount: 2000 mW / cm 2 ) and photoradical polymerization.
  • ultraviolet rays having a wavelength of 365 nm (irradiation intensity: 100 mW, irradiation amount: 2000 mW / cm 2 ) and photoradical polymerization.
  • one conductive filler for bump corresponds to one electrode pad.
  • the conductive filler for bump formation was bonded to the electrode pad of the IC chip.
  • the IC chip in this state was connected to a glass epoxy substrate for IC mounting (material: FR4) under the conditions of a temperature of 180 ° C., a pressure of 40 MPa, and a heating and pressing time of 20 seconds. As a result, a connection structure was obtained.
  • Example 10 From Example 1, the convex portion of the master of the transfer body was changed to an outer diameter of 12 ⁇ m and a height of 10 ⁇ m, the arrangement of the conductive particles was changed to a 1: 4 arrangement as shown in FIG.
  • gold / nickel coated resin particles having a diameter of 10 ⁇ m (Micropearl, Sekisui Chemical Co., Ltd.) and repeating the same operation as in Example 1 except that the thickness of the insulating adhesive resin film is 8 ⁇ m
  • a film for bump formation having a total thickness of 10 ⁇ m was obtained.
  • the density of the projections in the transcript master was 22.9 pieces / mm 2.
  • the closest distance of the convex portion was 4.9 ⁇ m.
  • Example 11 From Example 1, the convex portion of the transfer master was changed to an outer diameter of 12 ⁇ m and a height of 10 ⁇ m, the arrangement of conductive particles was changed to a 1:16 arrangement as shown in FIG. A bump-forming film having a total thickness of 10 ⁇ m was obtained by repeating the same operation as in Example 1 except that the diameter was changed to gold / nickel-coated resin particles (Micropearl, Sekisui Chemical Co., Ltd.). . Thus, by allowing the bump conductive filler to also exist in the outer peripheral portion of the bump, it is possible to widen the allowable range of deviation in the film bonding process.
  • the density of the convex portions on the transfer master was 91.4 pieces / mm 2 . The closest distance of the convex portion was 4.9 ⁇ m.
  • Example 12 From Example 1, the convex part of the transfer master was changed to an outer diameter of 12 ⁇ m and a height of 10 ⁇ m, the arrangement of the conductive particles was changed to a 1: 3 arrangement as shown in FIG. A bump-forming film having a total thickness of 10 ⁇ m was obtained by repeating the same operation as in Example 1 except that the diameter was changed to gold / nickel-coated resin particles (Micropearl, Sekisui Chemical Co., Ltd.). . The density of the convex portions on the transfer master was 17.1 pieces / mm 2 . The closest distance of the convex portion was 4.9 ⁇ m.
  • Example 13 From Example 1, the convex portion of the transfer master was changed to an outer diameter of 12 ⁇ m and a height of 10 ⁇ m, the arrangement of the conductive particles was changed to a 1: 9 arrangement as shown in FIG. A bump-forming film having a total thickness of 10 ⁇ m was obtained by repeating the same operation as in Example 1 except that the diameter was changed to gold / nickel-coated resin particles (Micropearl, Sekisui Chemical Co., Ltd.). .
  • the bump conductive filler to also exist in the outer peripheral portion of the bump, it is possible to widen the allowable range of deviation in the film bonding process.
  • the density of the convex part in the transfer body master was 51.4 pieces / mm 2 .
  • the closest distance of the convex portion was 4.9 ⁇ m.
  • Example 14 From Example 1, the convex portion of the transfer master was changed to an outer diameter of 12 ⁇ m and a height of 10 ⁇ m, the arrangement of conductive particles was changed to a 1: 6 arrangement as shown in FIG. A bump-forming film having a total thickness of 30 ⁇ m was obtained by repeating the same operation as in Example 1 except that the particle size was changed to gold / nickel-coated resin particles (Micropearl, Sekisui Chemical Co., Ltd.) having a diameter of 10 ⁇ m. .
  • the density of the convex part in the transfer body master was 34.3 pieces / mm 2 .
  • the closest distance of the convex portion was 4.9 ⁇ m.
  • Example 15 From Example 1, the convex portion of the transfer master was changed to an outer diameter of 12 ⁇ m and a height of 10 ⁇ m, the arrangement of conductive particles was changed to a 1:20 arrangement as shown in FIG. A bump-forming film having a total thickness of 10 ⁇ m was obtained by repeating the same operation as in Example 1 except that the diameter was changed to gold / nickel-coated resin particles (Micropearl, Sekisui Chemical Co., Ltd.). .
  • the bump conductive filler to also exist in the outer peripheral portion of the bump, it is possible to widen the allowable range of deviation in the film bonding process.
  • the density of the convex part in the transfer body master was 114.3 pieces / mm 2 . The closest distance of the convex portion was 4.9 ⁇ m.
  • Example 16 From Example 1, the convex part of the transfer master was changed to an outer diameter of 24 ⁇ m and a height of 20 ⁇ m, the arrangement of conductive particles was changed to a 1: 2 arrangement as shown in FIG.
  • the convex part of the transfer master was changed to an outer diameter of 24 ⁇ m and a height of 20 ⁇ m, the arrangement of conductive particles was changed to a 1: 2 arrangement as shown in FIG.
  • gold / nickel-coated resin particles having a diameter of 20 ⁇ m Moropearl, Sekisui Chemical Co., Ltd.
  • a film for bump formation having a total thickness of 20 ⁇ m was obtained.
  • the density of the projections in the transcript master was 11.4 pieces / mm 2.
  • the closest distance of the convex portion was 9.9 ⁇ m.
  • Example 17 From Example 1, the convex portion of the transfer master was changed to an outer diameter of 24 ⁇ m and a height of 20 ⁇ m, the arrangement of the conductive particles was changed to a 1: 8 arrangement as shown in FIG. A bump-forming film having a total thickness of 20 ⁇ m was obtained by repeating the same operation as in Example 1 except that the particle size was changed to gold / nickel-coated resin particles (Micropearl, Sekisui Chemical Co., Ltd.) having a diameter of 20 ⁇ m. .
  • the density of the convex parts in the transfer body master was 45.71 pieces / mm 2 .
  • the closest distance of the convex portion was 9.9 ⁇ m.
  • connection structure using bump forming films of Examples 10 to 17 A connection structure was prepared in the same manner as in Example 1 except that the bump forming films of Examples 10 to 15 were used. In the case of bump forming films of Examples 16 and 17, the peripheral electrode aluminum electrode pads to be evaluated were changed to those of 30 ⁇ m length ⁇ 85 ⁇ m width, 85 ⁇ m pitch (55 ⁇ m space between pads) and 280 pins. A connection structure was prepared in the same manner as in Example 1 except that.
  • Example 10 The evaluation of the initial conduction resistance of the connection structures prepared in Examples 10 to 17 was performed in the same manner as in Example 1. As a result, all were 5 ⁇ or less, and it was confirmed that there was no practical problem. Further, conducting a conduction reliability test after 500 hours at 85 ° C./85% environmental test, all the conduction resistance values after the high temperature and high humidity bias test showed a result of 20 ⁇ or less, and it was confirmed that there was no problem in practical use. In all cases, no short circuit occurred.
  • the resin films of Examples 10 to 15 were each changed to a thickness of 20 ⁇ m, and the resin films of Examples 16 and 17 were each changed to a thickness of 25 ⁇ m, and the conductive particles were placed on one side of the film.
  • a bump forming film and a connection structure were prepared by repeating the same operations as in Examples 10 to 17 except that the film was pressed and buried. These were evaluated in the same manner as in Examples 10 to 17, and good results were obtained as in Examples 10 to 17.
  • the bump forming film of the present invention is useful when mounting a bumpless IC chip or the like on a wiring board.

Abstract

　バンプレスＩＣチップ等の半導体装置に、低コストで、しかも安定した導通信頼性を実現できるバンプを形成するためのバンプ形成用フィルムは、絶縁性接着樹脂層内にバンプ用導電フィラーが平面視で規則配列されているものである。該規則配列は、フィルムの長手方向に周期的繰り返し単位を有し、フィルムの厚み方向におけるバンプ用導電フィラーの一方の端部を結ぶ直線は、フィルムの表面に略平行となっている。

Description

バンプ形成用フィルム、半導体装置及びその製造方法、並びに接続構造体
　本発明は、ＩＣチップなどの電極パッドにバンプを形成するためのバンプ形成用フィルムに関する。
　バンプレスＩＣチップを配線基板にフリップチップ実装する場合、低い導通抵抗と安定した導通信頼性とを実現するために、パッシベーション膜で被覆されていないバンプレスＩＣチップの電極パッドに、予めスタッドバンプ法により金バンプを設けたり、バンプとして機能することが期待される金属メッキ被覆樹脂粒子を超音波加熱により金属結合させることが提案されている（特許文献１）。
特開２００５－２８６３４９号公報
　しかしながら、バンプレスＩＣチップの電極パッドにスタッドバンプ法により金バンプを設けることは、ＩＣチップの製造コストを大きく増大させるため、商業的に採用し難いという問題がある。また、バンプレスＩＣチップの電極パッドに金属被覆樹脂粒子の表面金属を超音波加熱により金属接合させた場合には、表面金属の剥離が発生して導通信頼性が大きく低下することが懸念されるばかりでなく、製造工程が煩雑になるという問題もあった。
　本発明の目的は、以上の従来の技術の問題点を解決することであり、バンプレスＩＣチップ等の半導体装置に、低コストで、しかも安定した導通信頼性を実現できるバンプを形成できるようにすることである。
　本発明者らは、半導体装置のバンプとして機能することが期待できる導電フィラーをバンプ形成用フィルムで簡便に半導体装置の電極に供給できるようにすれば、上述の問題が解決できるという仮定の下、絶縁性接着樹脂層内にバンプ用導電フィラーを、平面視でフィルムの長手方向に周期的繰り返し単位で規則配列させ、且つフィルム厚み方向のバンプ用導電フィラーの一方の端部を結ぶ直線を、フィルムの表面に略平行とすることにより、本願の目的を達成できることを見出し、本発明を完成させるに至った。
　即ち、本発明は、「絶縁性接着樹脂層内にバンプ用導電フィラーが平面視で規則配列されているバンプ形成用フィルムであって、該規則配列がフィルムの長手方向に周期的繰り返し単位を有し、フィルムの厚み方向におけるバンプ用導電フィラーの一方の端部を結ぶ直線が、フィルムの表面に略平行となっているバンプ形成用フィルム」を提供する。
また、本発明は、上述の本発明のバンプ形成用フィルムの製造方法であって、以下の工程（イ）～（ハ）：
＜工程（イ）＞
　規則配列された凹部が表面に形成された転写体を用意する工程；
＜工程（ロ）＞
　転写体の凹部にバンプ用導電フィラーを充填する工程；及び
＜工程（ハ）＞
　該転写体のバンプ用導電フィラーが充填された側の表面に絶縁性接着樹脂層を重ねて押圧することにより、絶縁性接着樹脂層にバンプ用導電フィラーを転着させる工程
を有する製造方法を提供する。
　この製造方法は、更に、以下の工程（ニ）
＜工程（ニ）＞
　バンプ用導電フィラーが転着した絶縁性接着樹脂層に対し、バンプ用導電フィラー転着面側から絶縁性接着カバー層を積層する工程
を有することが好ましい。
　また、本発明は、「表面のバンプ用のベース電極にバンプが配置された電子部品であって、上述のバンプ形成用フィルムのバンプ用導電フィラーが該ベース電極のバンプとなるように、該バンプ形成用フィルムが該電子部品のベース電極形成表面に配置されている電子部品」を提供する。具体的には、「表面のバンプ用のベース電極にバンプが配置された半導体装置であって、上述のバンプ形成用フィルムのバンプ用導電フィラーが該ベース電極のバンプとなるように、該バンプ形成用フィルムが該半導体装置のベース電極形成表面に配置されている半導体装置」を提供する。
　更に、本発明は、「表面のバンプ用のベース電極にバンプが配置された電子部品の製造方法であって、
　表面にバンプ用のベース電極を有するバンプレス電子部品の当該ベース電極に対し、本発明のバンプ形成用フィルムのバンプ用導電フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該電子部品のベース電極形成表面に配置した後、バンプ形成用フィルムを構成する絶縁性接着樹脂で、バンプ用導電フィラーをベース電極に固定する製造方法」を提供する。具体的には、「表面のバンプ用のベース電極にバンプが配置された半導体装置の製造方法であって、
　表面にバンプ用のベース電極を有するバンプレス半導体装置の当該ベース電極に対し、本発明のバンプ形成用フィルムのバンプ用導電フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該半導体装置のベース電極形成表面に配置した後、バンプ形成用フィルムを構成する絶縁性接着樹脂層を硬化させることにより、バンプ用導電フィラーをベース電極に固定する製造方法」を提供する。
　同様に、本発明は、「表面のバンプ用のベース電極にバンプが配置された半導体装置の製造方法であって、
　表面にバンプ用のベース電極を有するバンプレス半導体装置の当該ベース電極に対し、本発明のバンプ形成用フィルムのバンプ用導電フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該半導体装置のベース電極形成表面に配置した後、バンプ用導電フィラーを加熱することによりベース電極に金属結合させて固定する製造方法」を提供する。
　加えて、本発明は、「上述の電子部品の表面のベース電極に配置されたバンプ用導電フィラーと他の電子部品の対応する端子とが、硬化性若しくは非硬化性の導電接着剤又は絶縁性接着剤を介して接続されているか、または両者の間に金属結合形成することにより接続されている接続構造体」を提供する。具体的には、「上述の半導体装置の表面のベース電極に配置されたバンプ用導電フィラーと他の電気部品の対応する端子とが、硬化性若しくは非硬化性の導電接着剤又は絶縁性接着剤を介して接続されているか、または両者の間に金属結合形成することにより接続されている接続構造体」を提供する。
　本発明のバンプ形成用フィルムは、絶縁性接着樹脂層内に平面視で、フィルムの長手方向に周期的繰り返し単位を有するように規則配列されているバンプ用導電フィラーを有する。このため、ＩＣチップ等の半導体装置の個々の電極にバンプ用導電フィラーを配置させることが可能となる。しかも本発明のバンプ形成用フィルムにおいては、フィルムの厚み方向のバンプ用導電フィラーの一方の端部を結ぶ直線が、フィルムの表面に略平行となっている。このため、半導体装置のバンプを形成すべき電極に多少の高さムラがあったとしても、それらに安定的にバンプ用導電フィラーを配置することができる。
図１は、本発明のバンプ形成用フィルムの断面図である。 図２は、本発明のバンプ形成用フィルムの製造方法の工程説明図である。 図３は、本発明のバンプ形成用フィルムの製造方法の工程説明図である。 図４は、本発明のバンプ形成用フィルムの製造方法の工程説明図である。 図５は、本発明のバンプ形成用フィルムの製造方法の工程説明図である。 図６は、本発明の半導体装置の断面図である。 図７は、導電粒子が１：５配列された実施例３のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図８は、導電粒子が１：４配列された実施例１０のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図９、導電粒子が１：１６配列された実施例１１のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図１０は、導電粒子が１：３配列された実施例１２のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図１１は、導電粒子が１：９配列された実施例１３のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図１２は、導電粒子が１：６配列された実施例１４のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図１３は、導電粒子が１：２０配列された実施例１５のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図１４は、導電粒子が１：２配列された実施例１６のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。 図１５は、導電粒子が１：８配列された実施例１７のバンプ形成用フィルムにおける導電粒子と電極パッドとの関係図である。
　以下、本発明を、図面を参照しながら説明する。
＜バンプ形成用フィルム＞
　図１に示すように、本発明のバンプ形成用フィルム１０は、絶縁性接着樹脂層１内にバンプ用導電フィラー２が平面視で規則配列されているバンプ形成用フィルムである。このバンプ用導電フィラー２の規則配列は、フィルムの長手方向に周期的繰り返し単位を有している。この周期的繰り返し単位は、バンプを形成すべき半導体装置の電極パターンに対応して適宜選択することができる。また、バンプを形成すべき半導体装置の電極一つに配置されるバンプ用導電フィラー２の個数は一つでもよく、二つ以上であってもよい。なお、発明の効果を損なわない範囲で、バンプ用導電フィラー２同士が近接して配置されてもよく、連結して配置されていてもよい。バンプ用導電フィラー２同士が近接配置もしくは連結配置している場合には、配置ズレの影響を緩和でき、アライメント操作が容易となる。
　本発明のバンプ形成用フィルム１０においては、フィルムの厚み方向におけるバンプ用導電フィラー２の一方の端部を結ぶ直線が、フィルムの表面に略平行となっている。図１は、フィルム表面側と裏面側におけるその直線がバンプ形成用フィルム１０の表面側と裏面側とでそれぞれ平行となっている例である。これにより、バンプを形成すべき半導体装置の電極に、バンプ用導電フィラーを確実に安定して配置させることができる。なお略平行の程度は、フィルムの厚み方向におけるバンプ用導電フィラー２の一方の端部を結ぶ直線と、フィルムの表面とがなす角度が±５°以内であることである。
　バンプ用導電フィラー２としては、半田粒子、ニッケル粒子、金属被覆樹脂粒子などを挙げることができる。中でも、比較的低温で銅などの端子材料と金属結合を形成可能な半田粒子、半田メッキ樹脂粒子を好ましく挙げることができる。特に、半田粒子が好ましい。また、バンプ用電極とそれに対応した他の電子部品の端子との間の接続の導通信頼性を得られ易くするという観点からは、金属被覆樹脂粒子を好ましく使用することができる。ここで、金属被覆樹脂粒子の金属被覆は、無電解メッキ法やスパッタリング法等の公知の金属膜形成方法を利用して形成することができる。また、金属被覆樹脂粒子を構成するコア樹脂粒子には、導通信頼性の向上のために、導電微粒子を含有させておくことができる。
　バンプ用導電フィラー２の画像型粒度分布測定装置で測定した平均粒子径は、好ましくは３～６０μｍ、より好ましくは８～５０μｍである。この範囲であれば、一般的な半導体装置の端子サイズにマッチさせることが容易となる。また、バンプ用導電フィラー２の大きさ（平均粒子径）は、各端子における押圧状態を一致させる点から略同一であることが好ましい。ここで、略同一とは、平均粒子径に対する粒子径の標準偏差の割合であるＣＶ値が２０％以下、好ましくは１０％以下であることを意味する。
　なお、バンプ用導電フィラー２の形状は、真球形状が好ましいが、それに類した略球形状や楕円球形状等であってもよい。また、表面に微細凹凸があってもよい。微細凹凸があれば、表面積の増大効果や押圧時のアンカー効果を期待でき、導通時の低抵抗化や安定化を期待することができる。
　他方、絶縁性接着樹脂層１の厚さは、バンプ用導電フィラー２の平均粒子径の好ましくは０．５～２０倍、より好ましくは０．８～１５倍である。この範囲であれば、バンプ位置に対して安定した固定化を実現することができる。また、この範囲の中で、絶縁性接着樹脂層１の厚さを、バンプ用導電フィラー２の一部が絶縁性接着樹脂層１から露出するようにすることが好ましい。後述する絶縁性接着樹脂層１の除去や、別の絶縁性接着樹脂層との積層化など、操作性が高まるからである。
　このような絶縁性接着樹脂層１は、バンプ用導電フィラー２を半導体装置の電極に固定するために、粘着性を有していることが好ましいが、密着性を高めるために光硬化性もしくは熱硬化性であってもよい。絶縁性接着樹脂層１を硬化させることにより、バンプ用導電フィラー２が半導体装置の電極と金属結合を形成していれば、金属結合したバンプ用導電フィラー２を残して絶縁性接着樹脂層１を取り除くことが可能となる。
　また、バンプ用導電フィラー２を金属結合させずに絶縁性接着樹脂層１で固定化する場合、別の絶縁性接着樹脂層と併せて他の電子部品を接合してもよい。この場合、別の絶縁性接着樹脂層は他の電子部品に予め設けられていてもよく、バンプ用導電フィラー２を有する絶縁性接着樹脂層に予め積層されていてもよい。この場合、バンプ用導電フィラー２が金属メッキ被覆樹脂粒子であれば、その粒子径は絶縁性接着樹脂層の合計した厚みよりも大きくてもよい。接合により追随して変形（扁平）した後に、樹脂粒子の反発により導通接続が保持され易くなるからである。バンプ用導電フィラー２が扁平し易い材質である場合、扁平化を阻害させないために、バンプ用導電フィラー２同士を互いにわずかに離間させることが好ましい。扁平化によってバンプ用導電フィラー２の位置ずれが生じることが懸念されるためである。一例として、バンプ用導電フィラー２の大きさ（平均粒子径）の好ましくは２０％以上、より好ましくは３０％以上離間させる。他方、５０％以上離間すると捕捉効率が低下することが懸念されるため、５０％未満が好ましい。このようにすればバンプ用伝導フィラーは必要な場所で密に存在することができ、製造時の品質を保つ上で好ましい（導通抵抗値を安定化させる上でも好ましい）。
　このようなレベルでバンプ用導電フィラー２同士を離間させた場合、バンプ用導電フィラー２の複数個でユニットを構成させてもよい。ユニットを構成させることにより導通抵抗値を安定化させることが可能となり、好ましい。
　また、このようなユニットの外形は矩形もしくは円形であることが好ましい。バンプ形状そのものがこのような形状であることが一般的だからである。
　ユニットが矩形である場合、バンプに求められる高さと幅（即ちアスペクト比率）によるが、バンプ用導電フィラー２の大きさ（平均粒子径）はバンプに求められる高さに相当する。幅はバンプ用導電フィラー２をその方向に列に形成してユニット化させればよい。この場合も上述の距離間隔を保つことが好ましい。また、この列はバンプ用導電フィラー２の平均粒子径の半分の大きさまでずれていてもよい。
　また、ユニットが円形である場合、一つのバンプ用導電フィラー２を中心に、その周辺に円形に準じて他のバンプ用導電フィラー２を配置させる形状であってもよい。この場合も上述の距離間隔を保つことが好ましい。この形状は正三角形や正方形などの正多角形の各角と中心に導電粒子を配置する形状であってもよい。尚、この正多角形の形状は歪ませてもよい。例えば同一面内にバンプ形成部が複数ある場合に、ツールによる押圧を均一化させるためである。
　絶縁性接着樹脂層１を光硬化性あるいは熱硬化性とするには、絶縁性接着樹脂層１を構成する樹脂組成物に、公知の光又は熱硬化性オリゴマーもしくはモノマーとに加えて光又は熱重合開始剤とを配合すればよい。このような絶縁性接着樹脂層としては、熱可塑性アクリル系あるいはエポキシ系樹脂フィルム、熱硬化あるいは光硬化アクリル系あるいはエポキシ系樹脂フィルムなどを適用することができる。このような絶縁性接着樹脂層１の厚みは、通常１０～４０μｍ厚である。
＜バンプ形成用フィルムの製造方法＞
　本発明のバンプ形成用フィルムは、以下の工程（イ）～（ハ）、好ましくは（ニ）を有する製造方法により製造することができる。図面を参照しながら、工程毎に詳細に説明する。
（工程（イ））
　まず、図２に示すように、規則配列した凹部５０（例えば平面格子パターンの格子点に相当する柱状の凹部）が表面に形成されている転写体１００を用意する。凹部５０の深さは、バンプを形成すべきＩＣチップ等の半導体装置の電極（電極パッド、スルーホール、バイアホールなど）の電極ピッチ、電極巾、電極間スペース巾、バンプ用導電フィラーの平均粒子径等に応じて決定することができる。
＊転写体の具体例
　この工程（イ）で用意すべき転写体は、公知の手法を利用して作成することができ、例えば、金属プレートを加工して原盤を作成し、それに硬化性樹脂を塗布し、硬化させて作成することができる。具体的には、平坦な金属板を切削加工して、凹部に対応した凸部を形成した転写体原盤も作成し、この原盤の凸部形成面に転写体を構成する樹脂組成物を塗布し、硬化させた後、原盤から引き離すことにより転写体が得られる。
（工程（ロ））
　次に、図３に示すように、転写体１００の凹部５０にバンプ用導電フィラー２を充填する。具体的には、転写体１００の凹部５０の上方からバンプ用導電フィラー２を散布し、充填されなかったフィラーをブラシやブレード、あるいはエアブローで取り除けばよい。
（工程（ハ））
　次に、図４に示すように、転写体１００のバンプ用導電フィラー２が充填した側の表面に、絶縁性接着樹脂層１を重ねて押圧することにより、絶縁性接着樹脂層１の片面にバンプ用導電フィラー２を転着する。この場合、バンプ用導電フィラー２を絶縁性接着樹脂層１に埋没するようにすることができる。これにより、図１に示すようなバンプ形成用フィルム１０が得られる。
　なお、以上の工程（イ）～（ハ）により本発明のバンプ形成用フィルムが得られるが、以下の工程（ニ）を更に実施してもよい。
（工程（ニ））
　図５に示すように、バンプ用導電フィラー２が転着した絶縁性接着樹脂層１に対し、バンプ用導電フィラー転着面側から絶縁性接着カバー層６を積層することができる。これにより、２層構造の絶縁性接着樹脂層を有するバンプ形成用フィルム２０が得られる。絶縁性接着カバー層６は、絶縁性接着樹脂層１と同じ素材から形成したものを使用してもよく、一般的に粘着樹脂フィルム、熱硬化性樹脂フィルムおよび光硬化性樹脂フィルムを使用することもできる。
（半導体装置等の電子部品）
　本発明のバンプ形成用フィルムは、電子部品の電極にバンプを形成する場合に適用することができる。即ち、電子部品は、表面のバンプ用のベース電極にバンプが配置された構造を有し、バンプ形成用フィルムのバンプ用導電フィラーが該ベース電極のバンプとなるように、該バンプ形成用フィルムが該電子部品のベース電極形成表面に配置されているものである。具体的には、本発明のバンプ形成用フィルムは、ＩＣチップ、半導体ウエハ等の半導体装置の電極（パッド、スルーホール、バイアホール等）にバンプを形成する場合に好ましく適用することができる。スルーホールやバイアホールに適用した場合、バンプがホール中にはめ込まれてもよい。電極パッドに適用した場合には、例えば、図６に示すように、半導体装置２００は、表面にパッシベーション膜３０で囲まれたバンプ用のベース電極６０にバンプが配置された構造を有し、本発明のバンプ形成用フィルム１０のバンプ形成用フィラー２が該ベース電極６０のバンプとなるように、該バンプ形成用フィルム１０が該半導体装置２００のベース電極形成表面に配置されているものである。この半導体装置も本発明の一態様である。
　一般に、バンプ用導電フィラーがバンプ形成用フィルムを構成する硬化性若しくは非硬化性の絶縁性接着樹脂でベース電極に固定されているが、図６の態様では、バンプ形成用フィルム１０を構成する絶縁性接着樹脂層１を硬化させることにより、バンプ用導電フィラー２がベース電極６０に固定されていることが好ましい。
　なお、バンプ形成用フィラー２をベース電極６０に抵抗加熱や超音波加熱などにより加熱して金属結合させることにより、バンプ用導電フィラー２をベース電極６０に固定してもよい。この場合、金属結合形成後に、バンプ形成用フィルム１０を構成する絶縁性接着樹脂層１を、硬化させた後に剥離してもよい。
（半導体装置等の電子部品の製造方法）
　表面のバンプ用のベース電極にバンプが配置された電子部品は、表面にバンプ用のベース電極を有するバンプレス電子部品の当該ベース電極に対し、本発明のバンプ形成用フィルムのバンプ用導電フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該電子部品のベース電極形成表面に配置した後、バンプ形成用フィルムを構成する絶縁性接着樹脂で、バンプ用導電フィラーをベース電極に固定する製造方法により製造することができる。具体的には、表面のバンプ用のベース電極にバンプが配置された本発明の半導体装置は、表面にバンプ用のベース電極を有するバンプレス半導体装置の当該ベース電極に対し、本発明のバンプ形成用フィルムのバンプ形成用フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該半導体装置のベース電極形成表面に配置した後、バンプ形成用フィルムを構成する絶縁性接着樹脂層を加熱によりあるいは光照射により硬化させ、それによりバンプ用導電フィラーをベース電極に固定する製造方法により製造することができる。
　また、表面のバンプ用のベース電極にバンプが配置された本発明の半導体装置は、表面にバンプ用のベース電極を有するバンプレス半導体装置の当該ベース電極に対し、本発明のバンプ形成用フィルムのバンプ形成用フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該半導体装置のベース電極形成表面に配置した後、バンプ形成用フィラーを加熱することによりベース電極に金属結合させて固定する製造方法によっても製造することができる。これらの製造方法も本発明の一態様である。
（接続構造体）
　本発明の電子部品の表面のベース電極に配置されたバンプ用導電フィラーと他の電子部品の対応する端子とを、硬化性若しくは非硬化性の導電接着剤又は絶縁性接着剤を介して接続するか、または両者の間に金属結合形成することにより接続することにより接続構造体が得られる。具体的には、本発明の半導体装置の表面のベース電極に配置されたバンプ用導電フィラーと、他の電子部品の対応する端子とを、硬化性若しくは非硬化性の導電接着剤又は絶縁性接着剤を介して接続するか、または両者の間に金属結合を形成して接続することにより接続構造体が得られる。これらの接続構造体も本発明の一態様である。
　以下、本発明を実施例により具体的に説明する。
　　実施例１
　厚さ２ｍｍのニッケルプレートを用意し、円柱状の凸部（外径３５μｍ、高さ３０μｍ）を形成し、転写体原盤とした。凸部の配置は、７ｍｍ角の２００μｍ内側に２８０箇所ペリフェラル配置であり、また、凸部の密度は５．７個／ｍｍ２であった。
得られた転写体原盤に、フェノキシ樹脂（ＹＰ－５０、新日鉄住金化学（株））６０質量部、アクリレート樹脂（Ｍ２０８、東亞合成（株））２９質量部、光重合開始剤（ＩＲＧＡＣＵＲＥ　１８４、ＢＡＳＦジャパン（株））２質量部を含有する光重合性樹脂組成物を、乾燥厚みが３０μｍとなるように塗布し、８０℃で５分間乾燥後、高圧水銀ランプにて１０００ｍＪ光照射することにより転写体を作成した。
　転写体原盤から引き剥がした転写体の表面にバンプ用導電フィラーとして平均粒子径３０μｍの半田粒子（微粉半田粉、三井金属鉱業（株））を散布した後、エアブローすることにより凹部に半田粒子を充填した。
　転写体の半田粒子充填面に対し、ＰＥＴフィルム上に成膜された厚さ２０μｍの絶縁性接着樹脂フィルムを載せ、温度５０℃、圧力０．５ＭＰａで押圧することにより、絶縁性接着樹脂フィルムに半田粒子を埋め込みながら転写させた。導電粒子の配列パターンは、１：１配列（一つの電極パッドに一つの導電粒子が配置されている態様）であった。これにより、全厚が３０μｍのバンプ形成用フィルムを得た。なお、このバンプ形成用フィルムにおいては導電粒子の一方の端部とフィルム界面とが略一致していた。
　なお、実施例１で使用した絶縁性接着樹脂フィルムは、フェノキシ樹脂（ＹＰ－５０、新日鉄住金化学（株））６０質量部、エポキシ樹脂（ｊＥＲ８２８、三菱化学（株））４０質量部、及びカチオン系硬化剤（ＳＩ－６０Ｌ、三新化学工業（株））２質量部を含む混合溶液を調製し、それをフィルム厚さ５０μｍのＰＥＴフィルム上に塗布し、８０℃のオーブンにて５分間乾燥させて得たフィルムである。
　　実施例２
　凸部の外径を２５μｍ、高さを２０μｍに変更した転写体原盤を使用する以外、実施例１と同様の操作を繰り返すことにより転写体を用意し、この転写体に対し、平均粒子径２０μｍの半田粒子（微粉半田粉、三井金属鉱業（株））を散布した後、エアブローすることにより凹部に半田粒子を充填した。
　半田粒子が充填された転写体の両面に対し、実施例１と同様に絶縁性接着樹脂フィルムを適用することにより、全厚が３０μｍのバンプ形成用フィルムを得た。なお、このバンプ形成用フィルムにおいても実施例１と同様に導電粒子の一方の端部とフィルム界面とが略一致していた。
　　実施例３
　転写体原盤の凸部の密度を平均して２８．５個／ｍｍ２とし、更に導電粒子の配列パターンを、図７に示すように１：５配列とする以外、実施例２と同様の操作を繰り返すことによりバンプ形成用フィルムを得た。本実施例では、１：５配列として、フィルムを平面視した場合に、転写すべき電極パッドＰとそれに近接して導電粒子２を計５個配置した。
　　比較例１
　凸部をランダムに配した転写体原盤（凸部の密度は６０個／ｍｍ２）を使用すること以外、実施例１と同様の操作を繰り返すことによりバンプ形成用フィルムを得た。
　　実施例４～６及び比較例２
転写体の半田粒子充填面に適用する絶縁性接着樹脂フィルムとして、ＰＥＴフィルム上に成膜された厚さ３０μｍの絶縁性接着樹脂フィルムを載せ、温度５０℃、圧力０．５ＭＰａで押圧することにより、絶縁性接着樹脂フィルムに半田粒子を埋め込みながら転写させたこと以外、実施例１～３及び比較例１と同様の操作を繰り返すことにより、それぞれ全厚が３０μｍのバンプ形成用フィルムを得た。なお、これらのバンプ形成用フィルムにおいても実施例１と同様に導電粒子の一方の端部とフィルム界面とが略一致していた。
　なお、実施例４～６及び比較例２で使用した絶縁性接着樹脂フィルムは、フェノキシ樹脂（ＹＰ－５０、新日鉄住金化学（株））３０質量部、アクリルモノマー（ライトアクリレート３ＥＧＡ、共栄社化学（株））６０質量部、及び光ラジカル重合開始剤（ＩＲＧＡＣＵＲＥ　１８４、ＢＡＳＦジャパン（株））３質量部を含む混合溶液を調製し、それをフィルム厚さ５０μｍのＰＥＴフィルム上に塗布し、８０℃のオーブンにて５分間乾燥させて得たフィルムである。
　　実施例７～９及び比較例３
転写体の半田粒子充填面に適用する絶縁性接着樹脂フィルムとして、ＰＥＴフィルム上に成膜された厚さ３０μｍの絶縁性接着樹脂フィルムを載せ、温度５０℃、圧力０．５ＭＰａで押圧することにより、絶縁性接着樹脂フィルムに半田粒子を埋め込みながら転写させたこと以外、実施例１～３及び比較例１と同様の操作を繰り返すことにより、それぞれ全厚が３０μｍのバンプ形成用フィルムを得た。なお、これらのバンプ形成用フィルムにおいても実施例１と同様に導電粒子の一方の端部とフィルム界面とが略一致していた。
　なお、実施例７～９及び比較例３で使用した絶縁性接着樹脂フィルムは、フェノキシ樹脂（ＹＰ－５０、新日鉄住金化学（株））３０質量部、アクリルモノマー（ライトアクリレート３ＥＧＡ、共栄社化学（株））６０質量部、離型剤（ＢＹＫ３５００、ビックケミー・ジャパン（株））３質量部及び光ラジカル重合開始剤（ＩＲＧＡＣＵＲＥ　１８４、ＢＡＳＦジャパン（株））３質量部を含む混合溶液を調製し、それをフィルム厚さ５０μｍのＰＥＴフィルム上に塗布し、８０℃のオーブンにて５分間乾燥させて得たフィルムである。
（評価）
　実施例１～９及び比較例１～３のバンプ形成用フィルムを使用して以下に説明するように接続構造体を作成し、バンプ形成時の導通抵抗値（初期導通抵抗値）と、温度８５℃、湿度８５％の環境下で電圧５０Ｖ印可時の導通抵抗値（高温高湿バイアス試験後抵抗値）とを測定し評価した。導抵抗値は、デジタルマルチメータ（３４４０１Ａ、アジレント・テクノロジー（株））を用いて４端子法で１ｍＡの通電条件下で測定した。
　初期導通抵抗値については、５Ω以下を良好（Ｇ）とし、それを超える場合を不良（ＮＧ）とした。また、高温高湿バイアス試験後導通抵抗値については、２０Ω以下を良好（Ｇ）とし、それを超える場合を不良（ＮＧ）とした。得られた結果を表１に示す。
（実施例１～３、比較例１のバンプ形成用フィルムを用いた接続構造体の作成）
　ペリフェラル配置のアルミ電極パッド（直径３０μｍ、８５μｍピッチ、２８０ピン）を有するバンプレスＩＣチップ（サイズ：７ｍｍ縦×７ｍｍ横×２００μｍ厚）の当該電極パッドにバンプ形成用フィルムを配置し、温度５０℃、圧力０．５ＭＰａで押圧することにより貼り付け固定した。実施例１～２の場合には一つの電極パッドに一つのバンプ用導電フィラー（半田粒子）が対応するようにした。このバンプ形成用フィルムが貼り付けられたＩＣチップを、ＩＣ実装用ガラスエポキシ基板（材質：ＦＲ４）に、温度１８０℃、圧力４０ＭＰａ、加熱加圧時間１０秒という条件で接続した。これにより接続構造体を得た。
（実施例４～６、比較例２のバンプ形成用フィルムを用いた接続構造体の作成）
　バンプ形成用フィルムを、実施例１と同様にＩＣチップに貼り付けた後、波長３６５ｎｍの紫外線を照射（照射強度１００ｍＷ、照射量２０００ｍＷ／ｃｍ２）し、光ラジカル重合させることにより固定した。実施例３～４の場合には一つの電極パッドに一つのバンプ用導電フィラー（半田粒子）が対応するようにした。このバンプ形成用フィルムが貼り付けられたＩＣチップを、カチオン重合性絶縁性接着樹脂フィルム（フェノキシ樹脂（ＹＰ－５０、新日鉄住金化学（株））６０質量部、エポキシ樹脂（ｊＥＲ８２８、三菱化学（株））４０質量部、及びカチオン系硬化剤（ＳＩ－６０Ｌ、三新化学工業（株））２質量部からなるフィルム）を介して、ＩＣ実装用ガラスエポキシ基板（材質：ＦＲ４）に、温度１８０℃、圧力４０ＭＰａ、加熱加圧時間２０秒という条件で接続した。これにより接続構造体を得た。
（実施例７～９、比較例３のバンプ形成用フィルムを用いた接続構造体の作成）
　バンプ形成用フィルムを、実施例１と同様にＩＣチップに貼り付けた後、波長３６５ｎｍの紫外線を照射（照射強度１００ｍＷ、照射量２０００ｍＷ／ｃｍ２）し、光ラジカル重合させることにより固定した。実施例５～６の場合には一つの電極パッドに一つのバンプ用導電フィラー（半田粒子）が対応するようにした。このバンプ形成用フィルムをＩＣチップから引きはがしたところ、ＩＣチップの電極パッドにバンプ形成用導電フィラーが接合されていた。次に、この状態のＩＣチップを、ＩＣ実装用ガラスエポキシ基板（材質：ＦＲ４）に、温度１８０℃、圧力４０ＭＰａ、加熱加圧時間２０秒という条件で接続した。これにより接続構造体を得た。
Figure JPOXMLDOC01-appb-T000001
　表１からわかるように、実施例１～９のバンプ形成用フィルムは、バンプレスＩＣチップの電極パッドに、バンプとして機能する導電フィラーを配置することができ、「初期導通抵抗」及び「高温高湿バイアス試験後導通抵抗」の評価が良好であった。また、ショートの発生もなかった。特に、実施例３、６及び９のバンプ形成フィルムの場合には、バンプレスＩＣチップの一つの電極パッド及びその近傍に存在する導電フィラーの個数が５個となっている。このため、接続構造体の製造時に、バンプ形成フィルムとバンプレスＩＣチップの電極パッドとの間の位置合わせ精度を向上させることができる。それに対し、比較例１～３のバンプ形成用フィルムは、「初期導通抵抗」及び「高温高湿バイアス試験後導通抵抗」の評価がいずれも不良であった。ショートも発生した。
　　実施例１０
　実施例１から、転写体原盤の凸部を外径１２μｍ、高さ１０μｍに変更し、導電粒子の配列を図８に示すように１：４配列に変更し、更にバンプ用導電フィラーを平均粒子径１０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更し、絶縁性接着樹脂フィルムの厚みを８μｍにすること以外は実施例１と同様の操作を繰り返すことにより、全厚が１０μｍのバンプ形成用フィルムを得た。なお、転写体原盤における凸部の密度は２２．９個／ｍｍ２であった。また、凸部の最近接距離は４．９μｍであった。
　　実施例１１
　実施例１から、転写体原盤の凸部を外径１２μｍ、高さ１０μｍに変更し、導電粒子の配列を図９に示すように１：１６配列に変更し、更にバンプ用導電フィラーを平均粒子径１０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更すること以外は実施例１と同様の操作を繰り返すことにより、全厚が１０μｍのバンプ形成用フィルムを得た。このようにバンプの外周部にもバンプ用導電フィラーを存在させることで、フィルムの貼り合せ工程のズレの許容範囲を広くすることができる。なお、転写体原盤における凸部の密度は９１．４個／ｍｍ２であった。また、凸部の最近接距離は４．９μｍであった。
　　実施例１２
　実施例１から、転写体原盤の凸部を外径１２μｍ、高さ１０μｍに変更し、導電粒子の配列を図１０に示すように１：３配列に変更し、更にバンプ用導電フィラーを平均粒子径１０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更すること以外は実施例１と同様の操作を繰り返すことにより、全厚が１０μｍのバンプ形成用フィルムを得た。なお、転写体原盤における凸部の密度は１７．１個／ｍｍ２であった。また、凸部の最近接距離は４．９μｍであった。
　　実施例１３
　実施例１から、転写体原盤の凸部を外径１２μｍ、高さ１０μｍに変更し、導電粒子の配列を図１１に示すように１：９配列に変更し、更にバンプ用導電フィラーを平均粒子径１０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更すること以外は実施例１と同様の操作を繰り返すことにより、全厚が１０μｍのバンプ形成用フィルムを得た。このようにバンプの外周部にもバンプ用導電フィラーを存在させることで、フィルムの貼り合せ工程のズレの許容範囲を広くすることができる。なお、転写体原盤における凸部の密度は５１．４個／ｍｍ２であった。また、凸部の最近接距離は４．９μｍであった。
　　実施例１４
　実施例１から、転写体原盤の凸部を外径１２μｍ、高さ１０μｍに変更し、導電粒子の配列を図１２に示すように１：６配列に変更し、更にバンプ用導電フィラーを平均粒子径１０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更すること以外は実施例１と同様の操作を繰り返すことにより、全厚が３０μｍのバンプ形成用フィルムを得た。なお、転写体原盤における凸部の密度は３４．３個／ｍｍ２であった。また、凸部の最近接距離は４．９μｍであった。
　　実施例１５
　実施例１から、転写体原盤の凸部を外径１２μｍ、高さ１０μｍに変更し、導電粒子の配列を図１３に示すように１：２０配列に変更し、更にバンプ用導電フィラーを平均粒子径１０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更すること以外は実施例１と同様の操作を繰り返すことにより、全厚が１０μｍのバンプ形成用フィルムを得た。このようにバンプの外周部にもバンプ用導電フィラーを存在させることで、フィルムの貼り合せ工程のズレの許容範囲を広くすることができる。なお、転写体原盤における凸部の密度は１１４．３個／ｍｍ２であった。また、凸部の最近接距離は４．９μｍであった。
　　実施例１６
　実施例１から、転写体原盤の凸部を外径２４μｍ、高さ２０μｍに変更し、導電粒子の配列を図１４に示すように１：２配列に変更し、更にバンプ用導電フィラーを平均粒子径２０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更し、絶縁性接着樹脂フィルムの厚みを１６μｍにすること以外は実施例１と同様の操作を繰り返すことにより、全厚が２０μｍのバンプ形成用フィルムを得た。なお、転写体原盤における凸部の密度は１１．４個／ｍｍ２であった。また、凸部の最近接距離は９．９μｍであった。
　　実施例１７
　実施例１から、転写体原盤の凸部を外径２４μｍ、高さ２０μｍに変更し、導電粒子の配列を図１５に示すように１：８配列に変更し、更にバンプ用導電フィラーを平均粒子径２０μｍの金／ニッケル被覆樹脂粒子（ミクロパール、積水化学工業（株））に変更すること以外は実施例１と同様の操作を繰り返すことにより、全厚が２０μｍのバンプ形成用フィルムを得た。このようにバンプの外周部にもバンプ用導電フィラーを存在させることで、フィルムの貼り合せ工程のズレの許容範囲を広くすることができる。なお、転写体原盤における凸部の密度は４５．７１個／ｍｍ２であった。また、凸部の最近接距離は９．９μｍであった。
（実施例１０～１７のバンプ形成用フィルムを用いた接続構造体の作成）
　実施例１０～１５のバンプ形成用フィルムを用いる以外、実施例１の場合と同様に接続構造体を作成した。また、実施例１６及び１７のバンプ形成用フィルムの場合には、評価対象となるペリフェラル配置のアルミ電極パッドを、縦３０μｍ×横８５μｍ、８５μｍピッチ（パッド間スペース５５μｍ）、２８０ピンのものに変更する以外は実施例１の場合と同様に接続構造体を作成した。
　実施例１０～１７で作成した接続構造体の初期導通抵抗の評価を、実施例１の場合と同様に行ったところ、すべて５Ω以下であり、実用上問題ないことが確認できた。また、８５℃/８５％環境試験５００時間後の導通信頼性試験を行ったところ、高温高湿バイアス試験後導通抵抗値は全て２０Ω以下の結果を示し、実用性に問題ないことを確認した。また、全てにおいてショートは発生しなかった。
　また、実施例１０～１５の樹脂フィルムについては、それぞれ厚みを２０μｍに変更し、及び実施例１６および１７の樹脂フィルムについては、それぞれ厚みを２５μｍに変更し、且つ導電粒子をフィルムの一方の面に押し込み埋没させた以外は、それぞれ実施例１０～１７と同様の操作を繰り返すことにより、バンプ形成用フィルムと接続構造体とを作成した。これらについてそれぞれ実施例１０～１７と同様に評価したところ、実施例１０～１７の場合と同様に良好な結果が得られた。
　本発明のバンプ形成用フィルムは、バンプレスＩＣチップ等を配線基板に実装する際に有用である。
１　絶縁性接着樹脂層
２　バンプ用導電フィラー
６　絶縁性接着カバー層
１０、２０　バンプ形成用フィルム
３０　パッシベーション膜
５０　転写体の凹部
６０　ベース電極
１００　転写体　
２００　半導体装置
Ｐ　電極パッド

 

Claims (20)

  1. 　絶縁性接着樹脂層内にバンプ用導電フィラーが平面視で規則配列されているバンプ形成用フィルムであって、該規則配列がフィルムの長手方向に周期的繰り返し単位を有し、フィルムの厚み方向におけるバンプ用導電フィラーの一方の端部を結ぶ直線が、フィルムの表面に略平行となっているバンプ形成用フィルム。
  2. 　バンプ用導電フィラーの複数個がユニットを構成し、ユニット内の該バンプ用導電フィラー間の最短距離は、該バンプ用導電フィラーの平均粒子径の５０％未満である請求項１記載のバンプ形成用フィルム。
  3. 　バンプ用導電フィラーの平均粒子径が、略同一である請求項１又は２記載のバンプ形成用フィルム。
  4. 　バンプ導電フィラーが、金属被覆樹脂粒子である請求項１～３のいずれかに記載のバンプ形成用フィルム。
  5. 　バンプ用導電フィラーが、半田粒子である請求項１～３のいずれかに記載のバンプ形成用フィルム。
  6. 　バンプ用導電フィラーの平均粒子径が３～６０μｍであり、絶縁性接着樹脂層の厚さが、その平均粒子径の０．５～２０倍である請求項１～５のいずれかに記載のバンプ形成用フィルム。
  7. 　バンプ用導電フィラーの一部が、絶縁性接着樹脂層から露出している請求項１～６のいずれかに記載のバンプ形成用フィルム
  8. 　絶縁性接着樹脂層が、光硬化性もしくは熱硬化性である請求項１～７のいずれかに記載のバンプ形成用フィルム。
  9. 　請求項１記載のバンプ形成用フィルムの製造方法であって、以下の工程（イ）～（ハ）：
    ＜工程（イ）＞
    　規則配列された凹部が表面に形成された転写体を用意する工程；
    ＜工程（ロ）＞
    　転写体の凹部にバンプ用導電フィラーを充填する工程；及び
    ＜工程（ハ）＞
    　該転写体のバンプ用導電フィラーが充填された側の表面に絶縁性接着樹脂層を重ねて押圧することにより、絶縁性接着樹脂層にバンプ用導電フィラーを転着させる工程
    を有する製造方法。
  10. 　更に、以下の工程（ニ）
    ＜工程（ニ）＞
    　バンプ用導電フィラーが転着した絶縁性接着樹脂層に対し、バンプ用導電フィラー転着面側から絶縁性接着カバー層を積層する工程
    を有する請求項９記載の製造方法。
  11. 　表面のバンプ用のベース電極にバンプが配置された電子部品であって、上述のバンプ形成用フィルムのバンプ用導電フィラーが該ベース電極のバンプとなるように、該バンプ形成用フィルムが該電子部品のベース電極形成表面に配置されている電子部品。
  12. 　表面のバンプ用のベース電極にバンプが配置された半導体装置であって、請求項１～８のいずれかに記載のバンプ形成用フィルムのバンプ用導電フィラーが該ベース電極のバンプとなるように、該バンプ形成用フィルムが該半導体装置のベース電極形成表面に配置されている半導体装置。
  13. 　バンプ形成用フィルムを構成する絶縁性接着樹脂層を硬化させることにより、バンプ用導電フィラーがベース電極に固定されている請求項１２記載の半導体装置。
  14. 　バンプ形成用フィラーをベース電極に加熱により金属結合させることにより、バンプ用導電フィラーがベース電極に固定されている請求項１２記載の半導体装置。
  15. 　金属結合形成後に、バンプ形成用フィルムを構成する絶縁性接着樹脂層が、硬化した後に剥離されている請求項１４記載の半導体装置。
  16. 　表面のバンプ用のベース電極にバンプが配置された電子部品の製造方法であって、
    　表面にバンプ用のベース電極を有するバンプレス電子部品の当該ベース電極に対し、本発明のバンプ形成用フィルムのバンプ用導電フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該電子部品のベース電極形成表面に配置した後、バンプ形成用フィルムを構成する絶縁性接着樹脂で、バンプ用導電フィラーをベース電極に固定する製造方法。
  17. 　表面のバンプ用のベース電極にバンプが配置された半導体装置の製造方法であって、
    　表面にバンプ用のベース電極を有するバンプレス半導体装置の当該ベース電極に対し、請求項１～８のいずれかに記載のバンプ形成用フィルムのバンプ用導電フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該半導体装置のベース電極形成表面に配置した後、バンプ形成用フィルムを構成する絶縁性接着樹脂層を硬化させることにより、バンプ用導電フィラーをベース電極に固定する製造方法。
  18. 　表面のバンプ用のベース電極にバンプが配置された半導体装置の製造方法であって、
    　表面にバンプ用のベース電極を有するバンプレス半導体装置の当該ベース電極に対し、請求項１～８のいずれかに記載のバンプ形成用フィルムのバンプ用導電フィラーが、該ベース電極に対向するように、該バンプ形成用フィルムを該半導体装置のベース電極形成表面に配置した後、バンプ用導電フィラーを加熱することによりベース電極に金属結合させて固定する製造方法。
  19. 　請求項１１記載の電子部品の表面のベース電極に配置されたバンプ用導電フィラーと他の電子部品の対応する端子とが、硬化性若しくは非硬化性の導電接着剤又は絶縁性接着剤を介して接続されているか、または両者の間に金属結合形成することにより接続されている接続構造体。
  20. 　請求項１２～１５のいずれかに記載の半導体装置の表面のベース電極に配置されたバンプ用導電フィラーと他の電気部品の対応する端子とが、硬化性若しくは非硬化性の導電接着剤又は絶縁性接着剤を介して接続されているか、または両者の間に金属結合形成することにより接続されている接続構造体。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019235596A1 (ja) * 2018-06-06 2019-12-12 デクセリアルズ株式会社 接続体、接続体の製造方法、接続方法
JP2019216098A (ja) * 2018-06-06 2019-12-19 デクセリアルズ株式会社 接続体、接続体の製造方法、接続方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7000685B2 (ja) * 2017-02-07 2022-01-20 昭和電工マテリアルズ株式会社 接続構造体の製造方法、及び、端子付き電極の製造方法並びにこれに用いられる導電粒子
CN112313031A (zh) * 2018-06-26 2021-02-02 昭和电工材料株式会社 焊料粒子及焊料粒子的制造方法
WO2020004510A1 (ja) * 2018-06-26 2020-01-02 日立化成株式会社 異方性導電フィルム及びその製造方法並びに接続構造体の製造方法
US20230042727A1 (en) * 2019-12-27 2023-02-09 Showa Denko Materials Co., Ltd. Solder bump forming member, method for manufacturing solder bump forming member, and method for manufacturing electrode substrate provided with solder bump

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11330160A (ja) * 1998-05-14 1999-11-30 Sumitomo Bakelite Co Ltd 導電性ボール配列シートおよび導電性ボール配列シート製造装置
JP2004080024A (ja) * 2002-08-02 2004-03-11 Senju Metal Ind Co Ltd はんだボール配置シート、その製造方法およびはんだバンプ形成方法
JP2012190871A (ja) * 2011-03-09 2012-10-04 Teramikros Inc 半導体装置およびその製造方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62229714A (ja) * 1986-03-31 1987-10-08 日東電工株式会社 異方導電性シ−ト
JPH0574512A (ja) 1991-09-12 1993-03-26 Japan Aviation Electron Ind Ltd 電気接続用コネクタ
JP3812682B2 (ja) * 1994-05-10 2006-08-23 日立化成工業株式会社 異方導電性樹脂フィルム状成形物の製造法
JP4032439B2 (ja) 1996-05-23 2008-01-16 日立化成工業株式会社 接続部材および該接続部材を用いた電極の接続構造並びに接続方法
JPH09320345A (ja) 1996-05-31 1997-12-12 Whitaker Corp:The 異方導電性フィルム
JPH10135224A (ja) 1996-11-01 1998-05-22 Citizen Watch Co Ltd 半導体素子のバンプ形成方法
US7842599B2 (en) * 1997-05-27 2010-11-30 Wstp, Llc Bumping electronic components using transfer substrates
JP3995942B2 (ja) * 2002-01-29 2007-10-24 旭化成株式会社 異方性を有する導電性接着シートの製造方法
CN1477703A (zh) * 2002-08-02 2004-02-25 千住金属工业株式会社 焊球组件及其生产方法，形成焊块的方法
JP3582654B2 (ja) 2002-10-04 2004-10-27 日立化成工業株式会社 接続部材
JP2004256788A (ja) * 2002-11-29 2004-09-16 Sekisui Chem Co Ltd 加熱消滅性材料
JP2005286349A (ja) 2005-05-23 2005-10-13 Sony Chem Corp バンプレス半導体装置
WO2007023834A1 (ja) * 2005-08-23 2007-03-01 Bridgestone Corporation 接着剤組成物
US20070063344A1 (en) * 2005-09-22 2007-03-22 Chun-Hung Lin Chip package structure and bumping process
KR100772454B1 (ko) 2006-04-24 2007-11-01 엘지전자 주식회사 이방성 도전 필름 및 그 제조방법
JP5388572B2 (ja) * 2006-04-27 2014-01-15 デクセリアルズ株式会社 導電粒子配置シート及び異方導電性フィルム
CN101997059B (zh) 2006-10-10 2012-09-26 日立化成工业株式会社 连接结构及其制造方法
TWI416673B (zh) * 2007-03-30 2013-11-21 Sumitomo Bakelite Co 覆晶半導體封裝用之接續構造、增層材料、密封樹脂組成物及電路基板
JP2008031483A (ja) 2007-09-03 2008-02-14 Hitachi Chem Co Ltd 接続部材および該接続部材を用いた電極の接続構造並びに接続方法
JP5291917B2 (ja) * 2007-11-09 2013-09-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
TWI518810B (zh) * 2009-06-02 2016-01-21 史達晶片有限公司 半導體元件以及基於半導體晶粒的調準而形成與互連結構相對固定之凸塊下金層化之方法
JP6061443B2 (ja) 2010-12-24 2017-01-18 デクセリアルズ株式会社 異方性導電接着フィルム、接続構造体及びその製造方法
TWI728136B (zh) 2012-08-24 2021-05-21 日商迪睿合股份有限公司 中間產物膜、異向性導電膜、連接構造體、及連接構造體之製造方法
KR20210082571A (ko) 2012-08-29 2021-07-05 데쿠세리아루즈 가부시키가이샤 이방성 도전 필름 및 그 제조 방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11330160A (ja) * 1998-05-14 1999-11-30 Sumitomo Bakelite Co Ltd 導電性ボール配列シートおよび導電性ボール配列シート製造装置
JP2004080024A (ja) * 2002-08-02 2004-03-11 Senju Metal Ind Co Ltd はんだボール配置シート、その製造方法およびはんだバンプ形成方法
JP2012190871A (ja) * 2011-03-09 2012-10-04 Teramikros Inc 半導体装置およびその製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019235596A1 (ja) * 2018-06-06 2019-12-12 デクセリアルズ株式会社 接続体、接続体の製造方法、接続方法
JP2019216098A (ja) * 2018-06-06 2019-12-19 デクセリアルズ株式会社 接続体、接続体の製造方法、接続方法
JP7313913B2 (ja) 2018-06-06 2023-07-25 デクセリアルズ株式会社 接続体、接続体の製造方法、接続方法

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