WO2016110022A1 - 一种阵列基板、显示面板和显示装置 - Google Patents

一种阵列基板、显示面板和显示装置 Download PDF

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Publication number
WO2016110022A1
WO2016110022A1 PCT/CN2015/076963 CN2015076963W WO2016110022A1 WO 2016110022 A1 WO2016110022 A1 WO 2016110022A1 CN 2015076963 W CN2015076963 W CN 2015076963W WO 2016110022 A1 WO2016110022 A1 WO 2016110022A1
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pixel electrode
pixel
electrode
sub
disposed
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PCT/CN2015/076963
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English (en)
French (fr)
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李盼
李文波
乔勇
程鸿飞
先建波
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京东方科技集团股份有限公司
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Priority to US14/905,738 priority Critical patent/US9759961B2/en
Publication of WO2016110022A1 publication Critical patent/WO2016110022A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133707—Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
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    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136218—Shield electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/124—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode interdigital
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to an array substrate, a display panel, and a display device.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the pixel electrode of the sub-pixel unit in order to realize multi-domain display, it is necessary to design the pixel electrode of the sub-pixel unit as a comb structure or at least a comb structure at the edge.
  • the pixel electrode having the comb-tooth structure generates tip discharges on adjacent sub-pixel electrodes, gate lines, and data lines, thereby causing large interference to adjacent sub-pixel units and affecting the display effect of the display panel.
  • the invention can solve the problem that the tip discharge of the comb electrode included in the sub-pixel unit interferes with the surrounding data lines, the gate lines and the adjacent sub-pixel units in the prior art.
  • An embodiment of the present invention provides an array substrate including a substrate, wherein the substrate is further provided with a plurality of sub-pixel units, each of the sub-pixel units includes a pixel electrode having a comb structure, and the substrate A shield electrode electrically connected to the pixel electrode is also provided.
  • the pixel electrode since the pixel electrode is electrically connected to the shield electrode, the tip discharge of the pixel electrode in the comb-tooth structure can be effectively eliminated or suppressed, thereby eliminating the tip discharge of the pixel electrode to the periphery. The interference caused by the data lines, the gate lines, and adjacent sub-pixel units.
  • the pixel electrode has a comb structure at the edge or a comb-tooth structure as a whole.
  • the pixel electrode is electrically connected to the shield electrode, regardless of the image Whether the element electrode has a comb structure at the edge or a comb structure as a whole can be effectively eliminated or suppressed by the tip discharge of the pixel electrode.
  • the shield electrode is electrically connected to a tip end of a comb structure of the pixel electrode.
  • the tip end of the comb-tooth structure of the pixel electrode is electrically connected to the shield electrode, the tip discharge of the comb-tooth structure of the pixel electrode can be better eliminated, and is easy to implement in the fabrication process.
  • each of the two rows of the sub-pixel units is a sub-pixel unit group, and two rows of the sub-pixel units of each of the sub-pixel unit groups are disposed with two gate lines; and the sub-pixel unit group
  • the pixel electrode of the sub-pixel unit of the upper row is disposed at least at an upper edge
  • the pixel electrode of the sub-pixel unit of the next row of the sub-pixel unit group is disposed at least at a lower edge Shield electrode.
  • the at least two sides of the sub-pixel unit group are disposed on the upper and lower sides. The electrodes are shielded such that interference between adjacent sub-pixel unit groups is shielded.
  • the pixel electrode includes a first pixel electrode and a second pixel electrode arranged in a column direction from top to bottom, and the first pixel electrode and the second pixel of the sub-pixel unit belonging to the same column A gate line is disposed between the electrodes, and the shield electrode is disposed at an upper edge of the first pixel electrode, and the shield electrode is disposed at a lower edge of the second pixel electrode.
  • interference between adjacent sub-pixel units in two rows in the column direction is shielded.
  • the pixel electrode includes a first pixel electrode and a second pixel electrode arranged in a column direction from top to bottom, and the first pixel electrode and the second pixel of the sub-pixel unit belonging to the same column
  • a gate line is disposed between the electrodes, and the shield electrode is disposed at at least one side edge of the first pixel electrode, and the shield electrode is disposed at at least one side edge of the second pixel electrode.
  • interference between adjacent sub-pixel units in two rows in the column direction and the row direction is shielded.
  • the pixel electrode includes a first pixel electrode and a second pixel electrode arranged in a column direction from top to bottom, and the first pixel electrode and the second pixel of the sub-pixel unit belonging to the same column A gate line is disposed between the electrodes, and the shield electrodes are disposed at all edges of the first pixel electrode and the second pixel electrode. In this embodiment, interference between each of the sub-pixel units and between the first pixel electrode and the second pixel electrode is shielded.
  • the shielding electrode is in the same layer as the first pixel electrode and the second pixel electrode Settings.
  • the shield electrode, the first pixel electrode, and the second pixel electrode are disposed in the same layer, thereby saving the process.
  • the material of the shielding electrode is ITO or IZO.
  • the shielding electrode is disposed at at least one edge of the pixel electrode, thereby eliminating the data line, the gate line, and the adjacent portion of the pixel electrode
  • the interference caused by the sub-pixel unit is improved, thereby improving the display effect of the display panel.
  • Embodiments of the present invention provide a display panel including the array substrate provided in the above embodiments.
  • the shielding electrode is disposed at at least one edge of the pixel electrode, thereby eliminating the data line, the gate line, and the adjacent portion of the pixel electrode
  • the interference caused by the sub-pixel unit is improved, thereby improving the display effect of the display panel.
  • Embodiments of the present invention provide a display device including the display panel provided by the above embodiments.
  • the shielding electrode is disposed at at least one edge of the pixel electrode, thereby eliminating the data line, the gate line, and the adjacent portion of the pixel electrode
  • the interference caused by the sub-pixel unit is improved, thereby improving the display effect of the display panel.
  • FIG. 1 is a schematic structural view of a sub-pixel unit provided by the present invention.
  • FIG. 2 is a schematic structural view of a preferred array substrate provided by the present invention.
  • FIG. 3 is a schematic structural view of another preferred array substrate provided by the present invention.
  • FIG. 4 is a schematic structural view of a first specific array substrate provided based on FIG. 3;
  • FIG. 5 is a schematic structural view of a second specific array substrate provided based on FIG. 3;
  • FIG. 6 is a schematic structural view of a third specific array substrate provided based on FIG. 3.
  • FIG. 6 is a schematic structural view of a third specific array substrate provided based on FIG. 3.
  • An embodiment of the present invention provides an array substrate including a substrate substrate on which a sub-pixel unit array is formed, as shown in FIG. 1 , and the sub-pixel unit 1 includes a pixel electrode 2 and a shield.
  • the electrode 3, the pixel electrode 2 is a comb-tooth structure at least at the edge, the shield electrode 3 is provided at at least one edge of the pixel electrode 2, and the shield electrode 3 is electrically connected to the tip end of the comb-tooth structure of the pixel electrode 2.
  • the pixel electrode 2 is represented using a rectangular frame portion surrounded by a hatched portion, wherein the rectangular frame portion represents the body of the pixel electrode, and the hatched portion represents the edge portion of the pixel electrode.
  • the pixel electrode 2 may be a comb-tooth structure only at the edge, or may have a comb-tooth structure as a whole.
  • the shield electrode 3 may be disposed at one edge of the pixel electrode 2, or at both edges of the pixel electrode 2 or More edges. In the embodiment of the present invention, the shield electrode 3 is disposed at at least one edge of the pixel electrode 2, thereby eliminating interference caused by the tip discharge of the pixel electrode 2 to the surrounding data lines, the gate lines, and the adjacent sub-pixel units 1.
  • Each two rows of sub-pixel units 1 is a sub-pixel unit group 4, and two rows of sub-pixel units 1 of each sub-pixel unit group 4 are disposed between two.
  • the shielding electrodes 3 are disposed at least on the upper and lower sides of the sub-pixel unit group 4, thereby The interference between adjacent sub-pixel unit groups 4 is shielded.
  • the pixel electrode 2 including a comb-shaped first pixel electrode 21 and a second pixel electrode 22 arranged in the column direction from top to bottom, belonging to the same column.
  • a gate line 5 is disposed between the first pixel electrode 21 and the second pixel electrode 22 of the sub-pixel unit 1; the first pixel electrode 21 is provided with a shield electrode 3 at least at the upper edge, and the second pixel electrode 22 is at least at the lower edge The shield electrode 3 is provided.
  • the shield electrode 3 is disposed, so that between adjacent two rows of sub-pixel units The interference is blocked.
  • a shield electrode is disposed at an upper edge of the first pixel electrode 21, and a shield electrode is disposed at a lower edge of the second pixel electrode 22.
  • interference between adjacent two rows of sub-pixel units in the column direction is shielded.
  • a shield electrode is disposed at an upper edge and at least one side edge of the first pixel electrode 21, and a shield electrode is disposed at a lower edge of the second pixel electrode 22 and at least one side edge.
  • interference between adjacent two rows of sub-pixel units in the column direction and the row direction Hidden.
  • shield electrodes are provided at all edges of the first pixel electrode 21 and the second pixel electrode 22. In this embodiment, interference between each of the sub-pixel units and between the first pixel electrode 21 and the second pixel electrode 22 is shielded.
  • a first specific array substrate is provided based on FIG. 3, including a base substrate 10, a sub-pixel unit array formed on the base substrate 10, each sub-pixel unit 1 including a TFT 6, arranged in a column direction.
  • a gate line 5 is disposed between the first pixel electrode 21 and the second pixel electrode 22 of the sub-pixel unit 1 belonging to the same column, and two adjacent ones
  • a data line 7 is disposed between the column sub-pixel units 1;
  • the shield electrode 3 is disposed at an upper edge of the first pixel electrode 21, and the shield electrode 3 is disposed at a lower edge of the second pixel electrode 22.
  • the shielding electrode 3 can also be disposed on the plurality of edges of the first pixel electrode 21 and the second pixel electrode 22.
  • the second specific array substrate provided based on FIG. 3 is different from that of FIG.
  • the shielding electrode 3 is disposed at an upper edge and a side edge of the first pixel electrode 21, and the shielding electrode 3 is disposed at a lower edge and a side edge of the second pixel electrode 22.
  • the third specific array substrate provided based on FIG. 3 is different from FIG. 4 in that the shielding electrode is disposed at the upper edge and the two side edges of the first pixel electrode 21 . 3.
  • the shield electrode 3 is disposed at a lower edge and two side edges of the second pixel electrode 22.
  • the array substrate provided in FIG. 5 and FIG. 6 above, the shield electrode 3 is disposed at at least two edges of the first pixel electrode 21 and the second pixel electrode 22, and the comb-shaped first pixel of the sub-pixel unit 1 can be better eliminated.
  • the tip of the electrode 21 and the second pixel electrode 22 discharges interference with the surrounding data line 7, the gate line 5, and the adjacent sub-pixel unit 1.
  • the shield electrode 3 is disposed in the same layer as the pixel electrode 2.
  • the provision of the shield electrode 3 and the pixel electrode 2 in the same layer can save the process.
  • the material of the shield electrode 3 is ITO or IZO.
  • a shielding electrode is disposed at at least one edge of the pixel electrode, thereby eliminating interference caused by the tip discharge of the pixel electrode to surrounding data lines, gate lines, and adjacent sub-pixel units, thereby improving the display panel The display effect.
  • Embodiments of the present invention provide a display panel including the array substrate provided in the above embodiments.
  • a shielding electrode is disposed at at least one edge of the pixel electrode, thereby eliminating interference caused by the tip discharge of the pixel electrode to surrounding data lines, gate lines, and adjacent sub-pixel units, thereby improving display The display effect of the panel.
  • Embodiments of the present invention provide a display device including the display panel provided in the above embodiments.
  • a shielding electrode is disposed at at least one edge of the pixel electrode, thereby eliminating interference caused by the tip discharge of the pixel electrode to surrounding data lines, gate lines, and adjacent sub-pixel units, thereby improving the display panel The display effect.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种阵列基板、显示面板和显示装置，以解决现有技术中，亚像素单元所包括的梳状像素电极的尖端放电对周围的数据线、栅线及相邻像素电极放电，从而对相邻的所述亚像素单元造成干扰，影响显示效果的问题。所述阵列基板，包括衬底基板，所述衬底基板上形成有亚像素单元(1)阵列，所述亚像素单元(1)包括至少在边缘处为梳齿结构的像素电极(2)，所述像素电极(2)的至少一个边缘处设置有屏蔽电极(3)，所述屏蔽电极(3)与所述像素电极(2)的梳齿结构的尖端电连接。

Description

一种阵列基板、显示面板和显示装置 技术领域
本发明涉及液晶显示技术领域，尤其涉及一种阵列基板、显示面板和显示装置。
背景技术
薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display，TFT-LCD)具有厚度薄、功耗低、无辐射等特点，近年来得到了迅速地发展，在当前的平板显示器市场中占据了主导地位。目前，TFT-LCD在各种大中小尺寸的产品上得到了广泛的应用，几乎涵盖了当今信息社会的主要电子产品，在较大尺寸的产品上的应用如液晶电视和高清晰度数字电视。
现有技术中，为了实现多畴显示，需要把亚像素单元的像素电极设计成梳齿结构或者至少于边缘处为梳齿结构。但是，具有该梳齿结构的像素电极会对相邻的亚像素电极、栅线和数据线产生尖端放电，从而对相邻的亚像素单元形成较大的干扰，影响显示面板的显示效果。
发明内容
本发明的目的是提供一种阵列基板、显示面板和显示装置，从而避免或至少减轻上文所提及的一个或多个问题。本发明可以解决现有技术中，亚像素单元所包括的梳状电极的尖端放电对周围的数据线、栅线及相邻的所述亚像素单元造成干扰的问题。
本发明的目的是通过以下技术方案实现的：
本发明实施例提供一种阵列基板，包括衬底基板，所述衬底基板上还设置有多个亚像素单元，每个亚像素单元包括呈梳齿结构的像素电极，并且所述衬底基板还设置有与所述像素电极电连接的屏蔽电极。在本实施例中，由于所述像素电极电连接到所述屏蔽电极，因此能够有效地消除或抑制呈梳齿结构的所述像素电极的尖端放电，从而消除所述像素电极的尖端放电对周围的数据线、栅线及相邻亚像素单元造成的干扰。
优选的，所述像素电极在边缘处呈梳齿结构或者整体呈梳齿结构。在本实施例中，由于所述像素电极电连接到所述屏蔽电极，因此无论所述像 素电极是在边缘处呈梳齿结构还是整体呈梳齿结构，由所述像素电极的尖端放电都能被有效地消除或抑制。
优选的，所述屏蔽电极电连接到所述像素电极的梳齿结构的尖端。在本实施例中，由于所述像素电极的梳齿结构的尖端电连接到所述屏蔽电极，可以更好地消除所述像素电极的梳齿结构的尖端放电，并且在制作工艺上易于实现。
优选的，每两行所述亚像素单元为一个亚像素单元组，每一个所述亚像素单元组的两行所述亚像素单元之间设置有两条栅线；以及所述亚像素单元组的上一行所述亚像素单元的所述像素电极至少于上边缘处设置所述屏蔽电极，所述亚像素单元组的下一行所述亚像素单元的所述像素电极至少于下边缘处设置所述屏蔽电极。在本实施例中，对于双栅驱动的亚像素单元阵列，由于相邻所述亚像素单元组之间所述像素电极距离较近，因此至少在所述亚像素单元组的上下两边设置所述屏蔽电极，从而使相邻所述亚像素单元组之间的干扰被屏蔽。
优选的，所述像素电极包括沿列方向由上至下排布的第一像素电极和第二像素电极，属于同一列的所述亚像素单元的所述第一像素电极和所述第二像素电极之间设置有一条栅线，以及所述第一像素电极的上边缘处设置所述屏蔽电极，所述第二像素电极的下边缘处设置所述屏蔽电极。在本实施例中，对于单栅驱动的亚像素单元阵列，列方向上相邻两行所述亚像素单元之间的干扰被屏蔽。
优选的，所述像素电极包括沿列方向由上至下排布的第一像素电极和第二像素电极，属于同一列的所述亚像素单元的所述第一像素电极和所述第二像素电极之间设置有一条栅线，以及所述第一像素电极的至少一个侧边缘处设置所述屏蔽电极，所述第二像素电极的至少一个侧边缘处设置所述屏蔽电极。本实施例中，列方向和行方向上相邻两行所述亚像素单元之间的干扰被屏蔽。
优选的，所述像素电极包括沿列方向由上至下排布的第一像素电极和第二像素电极，属于同一列的所述亚像素单元的所述第一像素电极和所述第二像素电极之间设置有一条栅线，以及所述第一像素电极和所述第二像素电极的全部边缘处设置所述屏蔽电极。本实施例中，各所述亚像素单元之间、及所述第一像素电极和所述第二像素电极之间的干扰被屏蔽。
优选的，所述屏蔽电极与所述第一像素电极和所述第二像素电极同层 设置。本实施例中，在同一层设置所述屏蔽电极、所述第一像素电极和所述第二像素电极，节省工序。
优选的，所述屏蔽电极的材料为ITO或IZO。
本发明实施例有益效果如下：在所述像素电极的至少一个边缘处设置所述屏蔽电极，从而消除所述像素电极的尖端放电对周围的所述数据线、所述栅线及相邻的所述亚像素单元造成的干扰，从而提高显示面板的显示效果。
本发明实施列提供一种显示面板，包括如上实施例提供的所述阵列基板。
本发明实施例有益效果如下：在所述像素电极的至少一个边缘处设置所述屏蔽电极，从而消除所述像素电极的尖端放电对周围的所述数据线、所述栅线及相邻的所述亚像素单元造成的干扰，从而提高显示面板的显示效果。
本发明实施列提供一种显示装置，包括如上实施例提供的所述显示面板。
本发明实施例有益效果如下：在所述像素电极的至少一个边缘处设置所述屏蔽电极，从而消除所述像素电极的尖端放电对周围的所述数据线、所述栅线及相邻的所述亚像素单元造成的干扰，从而提高显示面板的显示效果。
附图说明
图1为本发明提供的亚像素单元的结构示意图；
图2为本发明提供的优选的一种阵列基板的结构示意图；
图3为本发明提供的优选的另一种阵列基板的结构示意图；
图4为基于图3提供的第一种具体的阵列基板的结构示意图；
图5为基于图3提供的第二种具体的阵列基板的结构示意图；以及
图6为基于图3提供的第三种具体的阵列基板的结构示意图。
具体实施方式
下面结合说明书附图对本发明实施例的实现过程进行详细说明。需要注意的是，自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施例是示例性的，仅用于 解释本发明，而不能理解为对本发明的限制。
本发明实施例提供一种阵列基板，包括衬底基板，衬底基板上形成有亚像素单元阵列，如图1所示的亚像素单元1的结构示意图，亚像素单元1包括像素电极2和屏蔽电极3，像素电极2至少在边缘处为梳齿结构，像素电极2的至少一个边缘处设置屏蔽电极3，且屏蔽电极3与像素电极2的梳齿结构的尖端电连接。在各附图中，使用由斜线部分围绕的矩形框部分表示像素电极2，其中矩形框部分表示像素电极的本体，并且斜线部分表示像素电极的边缘部分。需要说明的是，像素电极2可以仅在边缘处为梳齿结构，也可以整体为梳齿结构，屏蔽电极3可以设置于像素电极2的一个边缘，也设置于像素电极2的两个边缘或更多边缘。本发明实施例中，在像素电极2的至少一个边缘处设置屏蔽电极3，从而消除像素电极2的尖端放电对周围的数据线、栅线及相邻的亚像素单元1造成的干扰。
参见图2，示出了优选的一种阵列基板的示意图，每两行亚像素单元1为一个亚像素单元组4，每一个亚像素单元组4的两行亚像素单元1之间设置有两条栅线5；亚像素单元组4的上一行亚像素单元1的像素电极2至少于上边缘处设置屏蔽电极3，亚像素单元组4的下一行亚像素单元1的像素电极2至少于下边缘处设置屏蔽电极3。本实施例中，对于双栅驱动的亚像素单元阵列，由于相邻亚像素单元组4之间的像素电极2距离较近，因此至少在亚像素单元组4的上下两边设置屏蔽电极3，从而使相邻亚像素单元组4之间的干扰被屏蔽。
参见图3，示出了优选的另一种阵列基板的示意图，像素电极2包括沿列方向由上至下排布的梳状的第一像素电极21和第二像素电极22，属于同一列的亚像素单元1的第一像素电极21和第二像素电极22之间设置有一条栅线5；第一像素电极21至少于上边缘处设置屏蔽电极3，第二像素电极22至少于下边缘处设置屏蔽电极3。本实施例中，至少在像素电极2的上下两边(例如，第一像素电极21的上边缘和第二像素电极22下边缘)设置屏蔽电极3，从而使相邻两行亚像素单元之间的干扰被屏蔽。例如，第一像素电极21的上边缘处设置屏蔽电极，第二像素电极22的下边缘处设置屏蔽电极。本实施例中，列方向上相邻两行亚像素单元之间的干扰被屏蔽。又例如，第一像素电极21的上边缘处及至少一个侧边缘处设置屏蔽电极，第二像素电极22的下边缘处及至少一个侧边缘处设置屏蔽电极。本实施例中，列方向和行方向上相邻两行亚像素单元之间的干扰 被屏蔽。又例如，第一像素电极21和第二像素电极22的全部边缘处设置屏蔽电极。本实施例中，各亚像素单元之间、及第一像素电极21和第二像素电极22之间的干扰被屏蔽。
参见图4，基于图3提供第一种较具体的阵列基板，包括衬底基板10，形成于衬底基板10上的亚像素单元阵列，每一个亚像素单元1包括TFT 6、沿列方向排布的梳状的第一像素电极21和第二像素电极22；属于同一列的亚像素单元1的第一像素电极21和第二像素电极22之间设置有一条栅线5，相邻的两列亚像素单元1之间设置有一条数据线7；所述第一像素电极21的上边缘处设置所述屏蔽电极3，所述第二像素电极22的下边缘处设置所述屏蔽电极3。当然，屏蔽电极3也可以设置于第一像素电极21和第二像素电极22的多个边缘，例如图5所示，基于图3提供的第二种较具体的阵列基板，与图4不同之处在于，所述第一像素电极21的上边缘及一个侧边缘处设置所述屏蔽电极3，所述第二像素电极22的下边缘及一个侧边缘处设置所述屏蔽电极3。又例如图6所示，基于图3提供的第三种较具体的阵列基板，与图4不同之处在于，所述第一像素电极21的上边缘及两个侧边缘处设置所述屏蔽电极3，所述第二像素电极22的下边缘及两个侧边缘处设置所述屏蔽电极3。上述图5和图6提供的阵列基板，屏蔽电极3设置于第一像素电极21和第二像素电极22的至少两个边缘处，能够更好的消除亚像素单元1的梳状的第一像素电极21和第二像素电极22的尖端放电对周围的数据线7、栅线5及相邻的亚像素单元1造成的干扰。
优选的，屏蔽电极3与像素电极2同层设置。本实施例中，在同一层设置屏蔽电极3、像素电极2能够节省工序。
优选的，屏蔽电极3的材料为ITO或IZO。
本发明实施例有益效果如下：在像素电极的至少一个边缘处设置屏蔽电极，从而消除像素电极的尖端放电对周围的数据线、栅线及相邻的亚像素单元造成的干扰，从而提高显示面板的显示效果。
本发明实施列提供一种显示面板，包括如上实施例提供的阵列基板。
本发明实施例有益效果如下：至在像素电极的至少一个边缘处设置屏蔽电极，从而消除像素电极的尖端放电对周围的数据线、栅线及相邻的亚像素单元造成的干扰，从而提高显示面板的显示效果。
本发明实施列提供一种显示装置，包括如上实施例提供的显示面板。
本发明实施例有益效果如下：在像素电极的至少一个边缘处设置屏蔽电极，从而消除像素电极的尖端放电对周围的数据线、栅线及相邻的亚像素单元造成的干扰，从而提高显示面板的显示效果。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (11)

  1. 一种阵列基板，包括衬底基板，所述衬底基板上还设置有多个亚像素单元，每个亚像素单元包括呈梳齿结构的像素电极，其特征在于，所述衬底基板还设置有与所述像素电极电连接的屏蔽电极。
  2. 如权利要求1所述的阵列基板，其特征在于，所述像素电极在边缘处呈梳齿结构或者整体呈梳齿结构。
  3. 如权利要求1所述的阵列基板，其特征在于，所述屏蔽电极电连接到所述像素电极的梳齿结构的尖端。
  4. 如权利要求1所述的阵列基板，其特征在于，每两行所述亚像素单元为一个亚像素单元组，每一个所述亚像素单元组的两行所述亚像素单元之间设置有两条栅线；以及
    所述亚像素单元组的上一行所述亚像素单元的所述像素电极至少于上边缘处设置所述屏蔽电极，所述亚像素单元组的下一行所述亚像素单元的所述像素电极至少于下边缘处设置所述屏蔽电极。
  5. 如权利要求1所述的阵列基板，其特征在于，所述像素电极包括沿列方向由上至下排布的第一像素电极和第二像素电极，属于同一列的所述亚像素单元的所述第一像素电极和所述第二像素电极之间设置有一条栅线；以及
    所述第一像素电极的上边缘处设置所述屏蔽电极，并且所述第二像素电极的下边缘处设置所述屏蔽电极。
  6. 如权利要求1所述的阵列基板，其特征在于，所述像素电极包括沿列方向由上至下排布的第一像素电极和第二像素电极，属于同一列的所述亚像素单元的所述第一像素电极和所述第二像素电极之间设置有一条栅线；以及
    所述第一像素电极的至少一个侧边缘处设置所述屏蔽电极，所述第二像素电极的至少一个侧边缘处设置所述屏蔽电极。
  7. 如权利要求1所述的阵列基板，其特征在于，所述像素电极包括沿列方向由上至下排布的第一像素电极和第二像素电极，属于同一列的所述亚像素单元的所述第一像素电极和所述第二像素电极之间设置有一条栅线；以及
    所述第一像素电极和所述第二像素电极的全部边缘处设置所述屏蔽 电极。
  8. 如权利要求2至7中任意一项所述的阵列基板，其特征在于，所述屏蔽电极与所述像素电极同层设置。
  9. 如权利要求8所述的阵列基板，其特征在于，所述屏蔽电极的材料为ITO或IZO。
  10. 一种显示面板，其特征在于，包括如权利要示1至9中任意一项所述的阵列基板。
  11. 一种显示装置，其特征在于，包括如权利要求11所述的显示面板。
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