WO2016090697A1 - 液晶显示面板的驱动结构、液晶显示面板及其驱动方法 - Google Patents

液晶显示面板的驱动结构、液晶显示面板及其驱动方法 Download PDF

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WO2016090697A1
WO2016090697A1 PCT/CN2014/095581 CN2014095581W WO2016090697A1 WO 2016090697 A1 WO2016090697 A1 WO 2016090697A1 CN 2014095581 W CN2014095581 W CN 2014095581W WO 2016090697 A1 WO2016090697 A1 WO 2016090697A1
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Prior art keywords
scan lines
gate
control circuit
switching transistors
signal line
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PCT/CN2014/095581
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English (en)
French (fr)
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姚晓慧
许哲豪
张天豪
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深圳市华星光电技术有限公司
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Priority to US14/416,859 priority Critical patent/US9489906B2/en
Publication of WO2016090697A1 publication Critical patent/WO2016090697A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
    • G09G3/003—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to produce spatial visual effects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/027—Arrangements or methods related to powering off a display

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a driving structure of a liquid crystal display panel, a liquid crystal display panel, and a driving method thereof.
  • 3D stereoscopic display technology has become one of the important technologies for the development of flat panel displays.
  • the mainstream 3D display technologies on the market include color difference type, polarized type, 3D shutter glass type and naked eye 3D.
  • the 3D shutter glasses technology has been widely recognized by the market for its outstanding stereoscopic effect, high resolution of the screen and low cost of the liquid crystal module.
  • the 3D shutter glasses display technology synchronously controls the lens switches of the shutter glasses by splitting one frame image into two frames corresponding to the images of the left eye and the right eye respectively, and simultaneously displaying the two frames of images on the liquid crystal display screen. Both the left and right eyes can see the corresponding image at the right time. Eventually, the two different images seen by the left and right eyes combine to form the stereoscopic effect of the original image in the brain.
  • BLU Backlight Unit
  • One of the technical problems to be solved by the present invention is to provide a driving structure of a liquid crystal display panel, which does not add a new complicated design, and can reduce the crosstalk phenomenon in the shutter type 3D display technology by inserting black technology. It can reduce the charging effect of high frequency on the LC panel.
  • a liquid crystal display panel including the driving structure and a driving method thereof are also provided.
  • the present invention provides a driving structure of a liquid crystal display panel, comprising: a plurality of scan lines; a first control circuit configured to control all odd scan lines of the plurality of scan lines Transmission of a scan signal; a second control circuit configured to control transmission of scan signals of all even scan lines of the plurality of scan lines; a third control circuit configured to implement the said in different display modes Different ways of connecting between the odd and even scan lines in the plurality of scan lines, the display modes including a two-dimensional display mode and a three-dimensional display mode.
  • the first control circuit comprises:
  • each of the switching transistors being connected to each of the plurality of scan lines;
  • a first control signal line configured to control turn-on and turn-off of respective switching transistors, the first control signal line being coupled to a gate of each of the first set number of switching transistors;
  • the second control circuit includes:
  • each of the switching transistors being connected to each of the plurality of scan lines;
  • a second control signal line configured to control opening and closing of each of the switching transistors, the second control signal line being coupled to a gate of each of the second set number of switching transistors;
  • the third control circuit includes:
  • a third control signal line configured to control turn-on and turn-off of respective switching transistors, the third control signal line being coupled to a gate of each of the third set number of switching transistors.
  • the first control circuit, the second control circuit, and the third control circuit are disposed on a fan of the liquid crystal display panel Between the exit area and the effective display area.
  • liquid crystal display panel comprising the driving structure according to any one of the items 1) to 3 of the present invention.
  • a driving method of a liquid crystal display panel includes a plurality of scan lines, a first control circuit, a second control circuit, and a third control circuit. Methods include:
  • the first control circuit controls transmission of scan signals of all odd scan lines of the plurality of scan lines
  • the second control circuit controls transmission of scan signals of all even scan lines of the plurality of scan lines
  • the third control circuit implements different connections between all pairs of odd and even scan lines in the plurality of scan lines.
  • the third control circuit implements disconnection of all pairs of parity scan lines among the plurality of scan lines.
  • the third control circuit controls that a connection manner between all pairs of parity scan lines in the plurality of scan lines is shorted.
  • the first control signal line of the first control circuit is supplied to each of the first set number of switching transistors And a voltage is controlled to control transmission of scan signals of each of the plurality of scan lines, wherein a gate of each of the first set number of switch transistors is connected to the first control signal line;
  • the second control signal line of the second control circuit is supplied to the turn-on voltage of each of the second set number of switching transistors, thereby controlling the transmission of the scan signals of the even scan lines of the plurality of scan lines, wherein a gate of each of the second set number of switching transistors is connected to the second control signal line;
  • the third control signal line of the third control circuit is supplied to a turn-off voltage of each of the third set number of switching transistors, thereby implementing disconnection between all pairs of odd-numbered scan lines in the plurality of scan lines, wherein A gate of each of the third set number of switching transistors is connected to the third control signal line.
  • the first control signal line is supplied to an on voltage of each of the first set number of switching transistors, thereby controlling scanning of each odd scan line Signal transmission;
  • the second control signal line is supplied to an on voltage of each of the second set number of switching transistors, thereby controlling scanning of each even scan line Signal transmission;
  • the third control signal line is supplied to an opening voltage of each of the third set number of switching transistors during the entire scanning period, thereby implementing shorting between all pairs of odd and even scanning lines in the plurality of scanning lines .
  • One or more embodiments of the present invention may have the following advantages over the prior art.
  • the invention adds three control circuits to the driving circuit of the liquid crystal display panel, and uses the three control circuits to realize the normal display in the two-dimensional display mode, and can realize the black insertion technology adopted for eliminating the crosstalk phenomenon in the three-dimensional display. That is, the dual gate which reduces the influence of high frequency on the charging of the LC panel is simultaneously turned on.
  • the addition of three control circuits can be achieved only by using several empty pins of the driver IC, and no additional design is required.
  • FIG. 1 is an equivalent circuit diagram of a driving structure of a liquid crystal display panel according to an embodiment of the present invention
  • FIG. 2 is a timing chart when the display panel to which the driving circuit shown in FIG. 1 is applied performs 2D display and 3D display.
  • FIG. 1 is an equivalent circuit diagram of a driving circuit of a liquid crystal display panel according to an embodiment of the present invention.
  • the driving circuit includes a plurality of scanning lines, such as Gate_1, Gate_2, Gate_3, Gate_4, and the like as shown in the figure.
  • a first control circuit 100, a second control circuit 200, and a third control circuit 300 disposed between the fan-out area (Fanout area) and the effective display area (AA area) are also included.
  • the first control circuit 100 is configured to control the transmission of scan signals of all odd scan lines (eg, Gate_1 and Gate_3 shown in the plurality of scan lines).
  • a second control circuit 200 is configured to control the transmission of scan signals for all even scan lines (eg, Gate_2 and Gate_4 illustrated) of the plurality of scan lines.
  • the third control circuit 300 is configured to implement different connection manners of all pairs of parity scan lines (for example, Gate_1 and Gate_2, Gate_3, and Gate_4) in the plurality of scan lines in different display modes, and the display mode includes two Dimensional display mode and 3D display mode.
  • the first control circuit 100 includes a plurality of (first set number) switching transistors (eg, TFT_1 and TFT_3) and a first control signal line SW1, each of which is in a plurality of scan lines.
  • the odd-numbered scan lines are connected one by one, and the number of switching transistors is the same as the number of odd-numbered scan lines in the scan line.
  • the first control signal line SW1 is configured to control the turning on and off of the respective switching transistors, and the first control signal line SW1 is connected to the gates of the respective switching transistors in the first control circuit 100.
  • the second control circuit 200 includes a plurality of (second set number) switching transistors (for example, TFT_2 and TFT_4 shown) and a second control signal line SW2.
  • the switching transistors are connected to the even scan lines of the plurality of scan lines one by one, and the number of the switch transistors is the same as the number of even scan lines in the scan lines.
  • the second control signal line SW2 is configured to control the turning on and off of the respective switching transistors, and the second control signal line SW2 is connected to the gates of the respective switching transistors in the second control circuit.
  • the third control circuit 300 includes a plurality of (third set number) switching transistors (for example, TFT_S1 and TFT_S2 shown) and a third control signal line SW3, each of which is connected between each pair of parity scan lines, for example. If TFT_S1 is bridged between the first pair of parity scan lines Gate_1 and Gate_2, TFT_S2 is bridged between the second pair of parity scan lines Gate_3 and Gate_4.
  • the third control signal line SW3 is configured to control the turning on and off of the respective switching transistors, and the third control signal line SW3 is connected to the gates of the respective switching transistors in the third control circuit.
  • FIG. 2 is a timing chart when the display panel of the driving circuit shown in FIG. 1 is used for 2D display and 3D display.
  • the first control circuit 100 controls the transmission of the scan signals of all the odd scan lines in the plurality of scan lines; the second control circuit 200 controls the transfer of the scan signals of all the even scan lines in the plurality of scan lines.
  • the third control circuit 300 controls to disconnect all of the parity scan lines among the plurality of scan lines by control.
  • the first control signal line SW1 is supplied to each of the switching transistor turn-on voltages connected thereto (high level as shown). In turn, the transmission of the scan signals of the odd scan lines is controlled.
  • the second control signal line SW2 is supplied to the respective switching transistor turn-on voltages connected thereto (high level as shown), thereby controlling the transmission of the scan signals of the even-numbered scan lines.
  • the third control signal line SW3 is supplied to the turn-off voltage of each of the switching transistors connected thereto (low level as shown), thereby realizing the break between all the odd-numbered scan lines among the plurality of scan lines. open.
  • each of the plurality of scanning lines can be turned on step by step to realize normal two-dimensional display.
  • the first control circuit 100 controls the transmission of the scan signals of all the odd scan lines of the plurality of scan lines; the second control circuit 200 controls the transmission of the scan signals of all the even scan lines of the plurality of scan lines;
  • the third control circuit 300 short-circuits between all pairs of parity scan lines among the plurality of scan lines by control.
  • the first control signal line SW1 is supplied to the turn-on voltage of each of the switching transistors connected thereto when the odd-numbered scan lines are turned on.
  • the transmission of the scan signals of the odd scan lines is controlled.
  • the second control signal line SW2 is supplied to the turn-on voltage of each of the switching transistors connected thereto when the even-numbered scanning lines are turned on, thereby controlling the transmission of the scanning signals of the even-numbered scanning lines.
  • the double gates which are set to reduce the influence of the high frequency on the charging of the LC panel can be simultaneously turned on, that is, the parity scan lines are simultaneously turned on, thus reducing the scanning direction. Resolution, increase charging time, and achieve better 3D display.
  • three control circuits are added in the Fanout area and the AA area of the liquid crystal display panel, two of which are added TFT control switches on the parity scan lines, and the third is to add TFT control switches between the parity scan lines.
  • the three control circuits are used to realize the normal display of 2D, and the dual-gate required for the 3D black insertion technology is simultaneously turned on.
  • these three control circuits can be realized by using only a few empty pins of the driver IC, and no additional design is required, which improves the display effect and reduces the cost.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)
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Abstract

一种液晶显示面板的驱动结构，包括：多条扫描线（Gate_1，Gate_2，Gate_3，Gate_4）；一第一控制电路（100），其配置以控制多条扫描线（Gate_1，Gate_2，Gate_3，Gate_4）中所有奇数扫描线（Gate_1， Gate_3）的扫描信号的传输；一第二控制电路（200），其配置以控制多条扫描线（Gate_1，Gate_2，Gate_3，Gate_4）中所有偶数扫描线（Gate_2， Gate_4）的扫描信号的传输；一第三控制电路（300），其配置以在不同显示模式下，实现多条扫描线（Gate_1，Gate_2，Gate_3，Gate_4）中所有对奇偶扫描线（Gate_1和Gate_2，Gate_3和Gate_4）之间的不同连接方式。通过在液晶显示面板的驱动结构中增加三条控制电路（100，200，300），实现二维显示模式下的正常显示，同时不需要增加额外的成本，就能采用插黑技术，消除三维显示中的串扰现象，实现双栅同时开启，降低高频对LC面板充电的影响。还提供一种液晶显示面板及其驱动方法。

Description

液晶显示面板的驱动结构、液晶显示面板及其驱动方法
相关申请的交叉引用
本申请要求享有2014年12月10日提交的名称为“液晶显示面板的驱动结构、液晶显示面板及其驱动方法”的中国专利申请CN201410759206.2的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及液晶显示技术领域，尤其涉及一种液晶显示面板的驱动结构、液晶显示面板及其驱动方法。
背景技术
随着3D显示技术的飞速发展和产品线的逐步成熟，3D立体显示技术成为平面显示器发展的重要技术之一。目前，市场上主流的3D显示技术有色差式、偏光式、3D快门眼镜(3D shutter glass)式及裸眼3D。其中，3D快门眼镜式技术以其立体效果突出、画面分辨率高、液晶模组成本较低等优势得到了市场的广泛认可。
3D快门眼镜式显示技术通过把一帧图像拆为两帧分别对应左眼和右眼的图像，将这两帧图像在液晶显示屏上连续交替的显示，同步地控制快门眼镜的镜片开关，使左右双眼均可以在恰当的时间看到相应的图像。最终，左右双眼看到的两幅不同图像在大脑中综合形成原始图像的立体效果。
然而，由于受液晶响应速度的影响，因此会出现串扰(cross-talk)现象，例如左眼在观看左眼图像时，会同时看到上一场残留的部分右眼图像，导致左右眼图像重叠，形成重影，任何基于液晶显示的快门式3D电视都存在这种现象。为了降低3D显示时出现的串扰现象，背光(Back Light Unit，简称BLU)常采用扫描开关(Scanning)或动态区域开关(Local Dimming)技术。
由于扫描开关技术和动态区域开关技术所需的控制电路较复杂，成本较高。因此提出了在左右眼信号间采用插黑技术降低串扰的解决方案。但是由于快门式3D技术是左右眼 交替接受信号，所以帧频(Frame rate)要求较高，一般在120Hz，而采用插黑技术后，帧频又要加倍，如此的高频要求对液晶面板充电影响较重，因此又提出了在3D显示时采用双栅(dual-gate)同时开启，来降低扫描方向上的分辨率，提高充电时间的解决方案，但这种方式又需要在PCB和栅极电路(Gate IC)上增加新的复杂设计，来实现上述功能。
因此，如何解决上述问题，在不增加新的复杂设计的情况下，既能通过插黑技术来减少快门式3D显示技术中的串扰现象，又能降低高频对LC面板的充电影响，乃业界所致力的课题之一。
发明内容
本发明所要解决的技术问题之一是需要提供一种液晶显示面板的驱动结构，该驱动结构没有增加新的复杂设计，既能通过插黑技术来减少快门式3D显示技术中的串扰现象，又能降低高频对LC面板的充电影响。另外，还提供了包括该驱动结构的液晶显示面板及其驱动方法。
1)为了解决上述技术问题，本发明提供了一种液晶显示面板的驱动结构，包括：多条扫描线；一第一控制电路，其配置以控制所述多条扫描线中所有奇数扫描线的扫描信号的传输；一第二控制电路，其配置以控制所述多条扫描线中所有偶数扫描线的扫描信号的传输；一第三控制电路，其配置以在不同显示模式下，实现所述多条扫描线中所有对奇偶扫描线之间的不同连接方式，所述显示模式包括二维显示模式和三维显示模式。
2)在本发明的第1)项的一个优选实施方式中，所述第一控制电路包括：
第一设定数量的开关晶体管，各个开关晶体管与所述多条扫描线中的各奇数扫描线连接；
一第一控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第一控制信号线与所述第一设定数量的开关晶体管中的每个的栅极连接；
所述第二控制电路包括：
第二设定数量的开关晶体管，各个开关晶体管与所述多条扫描线中的各偶数扫描线连接；
一第二控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第二控制信号线与所述第二设定数量的开关晶体管中的每个的栅极连接；
所述第三控制电路包括：
第三设定数量的开关晶体管，各个开关晶体管分别连接在所述多条扫描线中的各对奇偶扫描线之间；
一第三控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第三控制信号线与所述第三设定数量的开关晶体管中的每个的栅极连接。
3)在本发明的第1)项或第2)项中的一个优选实施方式中，所述第一控制电路、所述第二控制电路和所述第三控制电路设置在液晶显示面板的扇出区和有效显示区之间。
4)根据本发明另一方面，还提供了一种液晶显示面板，包括如在本发明的第1)项-第3)项中的任一项的驱动结构。
5)根据本发明另一方面，还提供了一种液晶显示面板的驱动方法，该液晶显示面板包括多条扫描线、一第一控制电路、一第二控制电路和一第三控制电路，该方法包括：
在不同显示模式的显示阶段，
所述第一控制电路控制所述多条扫描线中所有奇数扫描线的扫描信号的传输；
所述第二控制电路控制所述多条扫描线中所有偶数扫描线的扫描信号的传输；
所述第三控制电路实现所述多条扫描线中所有对奇偶扫描线之间的不同连接方式。
6)在本发明的第5)项的一个优选实施方式中，进一步包括：
在二维显示模式的显示阶段，
所述第三控制电路实现所述多条扫描线中所有对奇偶扫描线之间的连接方式是断开的。
7)在本发明的第5)项或第6)项中的一个优选实施方式中，进一步包括：
在三维显示模式的显示阶段，
所述第三控制电路控制所述多条扫描线中所有对奇偶扫描线之间的连接方式是短接的。
8)在本发明的第5)项-第7)项中任一项的一个优选实施方式中，进一步包括：
在二维显示模式的显示阶段，
所述第一控制电路的第一控制信号线提供给第一设定数量的开关晶体管中每个的开 启电压，进而控制多条扫描线中的各奇数扫描线的扫描信号的传输，其中，所述第一设定数量的开关晶体管中的每个的栅极与所述第一控制信号线连接；
所述第二控制电路的第二控制信号线提供给第二设定数量的开关晶体管中每个的开启电压，进而控制多条扫描线中的各偶数扫描线的扫描信号的传输，其中，所述第二设定数量的开关晶体管中的每个的栅极与所述第二控制信号线连接；
所述第三控制电路的第三控制信号线提供给第三设定数量的开关晶体管中每个的关闭电压，进而实现多条扫描线中的所有对奇偶扫描线之间断开，其中，所述第三设定数量的开关晶体管中的每个的栅极与所述第三控制信号线连接。
9)在本发明的第5)项-第8)项中任一项的一个优选实施方式中，
在三维显示模式的显示阶段，
在所述多条扫描线中的各奇数扫描线是开启状态时，所述第一控制信号线提供给第一设定数量的开关晶体管中每个的开启电压，进而控制各奇数扫描线的扫描信号的传输；
在所述多条扫描线中的各偶数扫描线是开启状态时，所述第二控制信号线提供给第二设定数量的开关晶体管中每个的开启电压，进而控制各偶数扫描线的扫描信号的传输；
在整个扫描周期中，所述第三控制信号线提供给第三设定数量的开关晶体管中每个的开启电压，进而实现所述多条扫描线中的所有对奇偶扫描线之间的短接。
与现有技术相比，本发明的一个或多个实施例可以具有如下优点。
本发明通过在液晶显示面板的驱动电路中增加三条控制电路，利用这三条控制电路来实现二维显示模式下的正常显示，并能够实现为消除三维显示中的串扰现象而采用的插黑技术，即实现降低高频对LC面板充电影响的双栅同时开启。另外，增加的三条控制电路只需要利用驱动IC的几个空管脚即可实现，不需要新增额外的设计。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例 共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1是根据本发明一实施例的液晶显示面板的驱动结构的等效电路图；
图2是应用图1所示驱动电路的显示面板在进行2D显示和3D显示时的时序图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，以下结合附图对本发明作进一步地详细说明。
请参考图1，图1是根据本发明一实施例的液晶显示面板的驱动电路的等效电路图。该驱动电路包括多条扫描线，如图中所示的Gate_1、Gate_2、Gate_3、Gate_4等。还包括设置在扇出区(Fanout区)和有效显示区(AA区)之间的一第一控制电路100、一第二控制电路200和一第三控制电路300。其中，第一控制电路100，其配置以控制多条扫描线中所有奇数扫描线(例如，图示Gate_1和Gate_3)的扫描信号的传输。第二控制电路200，其配置以控制多条扫描线中所有偶数扫描线(例如，图示Gate_2和Gate_4)的扫描信号的传输。第三控制电路300，其配置以在不同显示模式下，实现多条扫描线中所有对奇偶扫描线(例如，图示Gate_1和Gate_2、Gate_3和Gate_4)之间的不同连接方式，显示模式包括二维显示模式和三维显示模式。
请进一步参考图1，第一控制电路100包括多个(第一设定数量)开关晶体管(例如，图示TFT_1和TFT_3)和一第一控制信号线SW1，各个开关晶体管与多条扫描线中的各奇数扫描线一一连接，开关晶体管的个数与扫描线中奇数扫描线的个数相同。第一控制信号线SW1，其配置以控制各个开关晶体管的开启和关闭，第一控制信号线SW1与该第一控制电路100中的各个开关晶体管的栅极连接。
第二控制电路200包括多个(第二设定数量)开关晶体管(例如，图示TFT_2和TFT_4)和一第二控制信号线SW2。其中，各个开关晶体管与多条扫描线中的各偶数扫描线一一连接，开关晶体管的个数与扫描线中偶数扫描线的个数相同。第二控制信号线SW2，其配置以控制各个开关晶体管的开启和关闭，第二控制信号线SW2与该第二控制电路中的各个开关晶体管的栅极连接。
第三控制电路300包括多个(第三设定数量)开关晶体管(例如，图示的TFT_S1和TFT_S2)和第三控制信号线SW3，各个开关晶体管分别连接在各对奇偶扫描线之间，例 如TFT_S1跨接在第一对奇偶扫描线Gate_1和Gate_2之间，TFT_S2跨接在第二对奇偶扫描线Gate_3和Gate_4之间。第三控制信号线SW3，其配置以控制各个开关晶体管的开启和关闭，第三控制信号线SW3与该第三控制电路中的各个开关晶体管的栅极连接。
下面来详细说明本驱动结构在进行二维显示和三维显示时的驱动过程。
请同时参考图2，图2是应用图1所示驱动电路的显示面板在进行2D显示和3D显示时的时序图。
在二维显示模式的显示阶段，第一控制电路100控制多条扫描线中所有奇数扫描线的扫描信号的传输；第二控制电路200控制多条扫描线中所有偶数扫描线的扫描信号的传输；第三控制电路300通过控制使多条扫描线中所有对奇偶扫描线之间断开。
具体地，如图2的上图(2D时序图)所示，在扫描时间周期内，第一控制信号线SW1提供给与之连接的各个开关晶体管开启电压(如图所示的高电平)，进而控制各奇数扫描线的扫描信号的传输。同时，第二控制信号线SW2提供给与之连接的各个开关晶体管开启电压(如图所示的高电平)，进而控制各偶数扫描线的扫描信号的传输。在这个阶段，第三控制信号线SW3提供给与之连接的各个开关晶体管的关闭电压(如图所示的低电平)，进而实现多条扫描线中的所有对奇偶扫描线之间的断开。
那么，通过上述驱动，使得多条扫描线中的各个扫描线可以逐级打开，实现正常的二维显示。
在三维显示模式的显示阶段，第一控制电路100控制多条扫描线中所有奇数扫描线的扫描信号的传输；第二控制电路200控制多条扫描线中所有偶数扫描线的扫描信号的传输；第三控制电路300通过控制使多条扫描线中所有对奇偶扫描线之间短接。
具体地，如图2的下图(3D时序图)所示，在扫描时间周期内，第一控制信号线SW1在奇数扫描线是开启状态时，提供给与之连接的各个开关晶体管的开启电压，进而控制各奇数扫描线的扫描信号的传输。第二控制信号线SW2在偶数扫描线是开启时，提供给与之连接的各开关晶体管的开启电压，进而控制各偶数扫描线的扫描信号的传输。由于第一控制信号线SW1和第二控制信号线SW2的信号为互为反向电位，即第一控制信号线SW1的信号是开启电压时，第二控制信号线SW2的信号是关闭电压，那么，在第三控制信号线SW3提供给与之连接的各个开关晶体管开启电压时，能够实现多条扫描线中的所有对奇偶扫描线之间的短接。
那么，通过上述驱动，在三维显示阶段进行插黑过程中，能够实现为了降低高频对LC面板充电的影响而设置的双栅同时开启，即奇偶扫描线同时开关，这样降低了扫描方向上的分辨率，提高充电时间，实现较佳的3D显示。
综上，通过在液晶显示板的Fanout区和AA区增加三条控制电路，其中两条分别是在奇偶扫描线上增加了TFT控制开关，第三条是在奇偶扫描线之间增加了TFT控制开关，利用这三条控制电路来实现2D正常显示，并实现3D插黑技术所需的双栅(dual-gate)同时开启。另外，这三条控制电路只需利用驱动IC的几个空管脚即可实现，不需新增额外设计，在提高了显示效果的同时，还降低了成本。
以上所述，仅为本发明较佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉该技术的人员在本发明所揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以权利要求的保护范围为准。

Claims (11)

  1. 一种液晶显示面板的驱动结构，包括：
    多条扫描线；
    一第一控制电路，其配置以控制所述多条扫描线中所有奇数扫描线的扫描信号的传输；
    一第二控制电路，其配置以控制所述多条扫描线中所有偶数扫描线的扫描信号的传输；
    一第三控制电路，其配置以在不同显示模式下，实现所述多条扫描线中所有对奇偶扫描线之间的不同连接方式，所述显示模式包括二维显示模式和三维显示模式。
  2. 根据权利要求1所述的驱动结构，其中，
    所述第一控制电路包括：
    第一设定数量的开关晶体管，各个开关晶体管与所述多条扫描线中的各奇数扫描线连接；
    一第一控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第一控制信号线与所述第一设定数量的开关晶体管中的每个的栅极连接；
    所述第二控制电路包括：
    第二设定数量的开关晶体管，各个开关晶体管与所述多条扫描线中的各偶数扫描线连接；
    一第二控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第二控制信号线与所述第二设定数量的开关晶体管中的每个的栅极连接；
    所述第三控制电路包括：
    第三设定数量的开关晶体管，各个开关晶体管分别连接在所述多条扫描线中的各对奇偶扫描线之间；
    一第三控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第三控制信号线与所述第三设定数量的开关晶体管中的每个的栅极连接。
  3. 根据权利要求2所述的驱动结构，其中，
    所述第一控制电路、所述第二控制电路和所述第三控制电路设置在液晶显示面板的扇出区和有效显示区之间。
  4. 一种液晶显示面板，包括驱动结构，
    所述驱动结构包括：
    多条扫描线；
    一第一控制电路，其配置以控制所述多条扫描线中所有奇数扫描线的扫描信号的传输；
    一第二控制电路，其配置以控制所述多条扫描线中所有偶数扫描线的扫描信号的传输；
    一第三控制电路，其配置以在不同显示模式下，实现所述多条扫描线中所有对奇偶扫描线之间的不同连接方式，所述显示模式包括二维显示模式和三维显示模式。
  5. 根据权利要求4所述的液晶显示面板，其中，
    所述第一控制电路包括：
    第一设定数量的开关晶体管，各个开关晶体管与所述多条扫描线中的各奇数扫描线连接；
    一第一控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第一控制信号线与所述第一设定数量的开关晶体管中的每个的栅极连接；
    所述第二控制电路包括：
    第二设定数量的开关晶体管，各个开关晶体管与所述多条扫描线中的各偶数扫描线连接；
    一第二控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第二控制信号线与所述第二设定数量的开关晶体管中的每个的栅极连接；
    所述第三控制电路包括：
    第三设定数量的开关晶体管，各个开关晶体管分别连接在所述多条扫描线中的各对奇偶扫描线之间；
    一第三控制信号线，其配置以控制各个开关晶体管的开启和关闭，所述第三控制信号 线与所述第三设定数量的开关晶体管中的每个的栅极连接。
  6. 根据权利要求5所述的液晶显示面板，其中，
    所述第一控制电路、所述第二控制电路和所述第三控制电路设置在液晶显示面板的扇出区和有效显示区之间。
  7. 一种液晶显示面板的驱动方法，该液晶显示面板包括多条扫描线、一第一控制电路、一第二控制电路和一第三控制电路，该方法包括：
    在不同显示模式的显示阶段，
    所述第一控制电路控制所述多条扫描线中所有奇数扫描线的扫描信号的传输；
    所述第二控制电路控制所述多条扫描线中所有偶数扫描线的扫描信号的传输；
    所述第三控制电路实现所述多条扫描线中所有对奇偶扫描线之间的不同连接方式。
  8. 根据权利要求7所述的驱动方法，其中，进一步包括：
    在二维显示模式的显示阶段，
    所述第三控制电路实现所述多条扫描线中所有对奇偶扫描线之间的连接方式是断开的。
  9. 根据权利要求7所述的驱动方法，其中，进一步包括：
    在三维显示模式的显示阶段，
    所述第三控制电路控制所述多条扫描线中所有对奇偶扫描线之间的连接方式是短接的。
  10. 根据权利要求7所述的驱动方法，其中，进一步包括：
    在二维显示模式的显示阶段，
    所述第一控制电路的第一控制信号线提供给第一设定数量的开关晶体管中每个的开启电压，进而控制多条扫描线中的各奇数扫描线的扫描信号的传输，其中，所述第一设定数量的开关晶体管中的每个的栅极与所述第一控制信号线连接；
    所述第二控制电路的第二控制信号线提供给第二设定数量的开关晶体管中每个的开启电压，进而控制多条扫描线中的各偶数扫描线的扫描信号的传输，其中，所述第二设定数量的开关晶体管中的每个的栅极与所述第二控制信号线连接；
    所述第三控制电路的第三控制信号线提供给第三设定数量的开关晶体管中每个的关闭电压，进而实现多条扫描线中的所有对奇偶扫描线之间断开，其中，所述第三设定数量的开关晶体管中的每个的栅极与所述第三控制信号线连接。
  11. 根据权利要求10所述的驱动方法，其中，
    在三维显示模式的显示阶段，
    在所述多条扫描线中的各奇数扫描线是开启状态时，所述第一控制信号线提供给第一设定数量的开关晶体管中每个的开启电压，进而控制各奇数扫描线的扫描信号的传输；
    在所述多条扫描线中的各偶数扫描线是开启状态时，所述第二控制信号线提供给第二设定数量的开关晶体管中每个的开启电压，进而控制各偶数扫描线的扫描信号的传输；
    在整个扫描周期中，所述第三控制信号线提供给第三设定数量的开关晶体管中每个的开启电压，进而实现所述多条扫描线中的所有对奇偶扫描线之间的短接。
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