WO2016074241A1 - 一种基于oled的tft阵列基板结构 - Google Patents

一种基于oled的tft阵列基板结构 Download PDF

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WO2016074241A1
WO2016074241A1 PCT/CN2014/091176 CN2014091176W WO2016074241A1 WO 2016074241 A1 WO2016074241 A1 WO 2016074241A1 CN 2014091176 W CN2014091176 W CN 2014091176W WO 2016074241 A1 WO2016074241 A1 WO 2016074241A1
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Prior art keywords
tft
drain
electrode
frame
gate
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PCT/CN2014/091176
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English (en)
French (fr)
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赵继刚
魏鹏
余晓军
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深圳市柔宇科技有限公司
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Priority to KR1020177014976A priority Critical patent/KR101968431B1/ko
Priority to US15/524,071 priority patent/US10163998B2/en
Priority to CN201480003352.0A priority patent/CN105765724A/zh
Priority to EP14905996.6A priority patent/EP3220422A4/en
Priority to JP2017525814A priority patent/JP6503066B2/ja
Priority to PCT/CN2014/091176 priority patent/WO2016074241A1/zh
Publication of WO2016074241A1 publication Critical patent/WO2016074241A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/814—Anodes combined with auxiliary electrodes, e.g. ITO layer combined with metal lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes

Definitions

  • the present invention belongs to the field of display technologies, and in particular, to an OLED-based TFT array substrate structure.
  • the material of the transparent pixel electrode is generally a metal oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • the transparent electrode allows light to pass through the pixel electrode and the substrate to achieve display illumination.
  • the metal oxide film has a high resistivity and a large amount of heat generation, in order to obtain a lower resistance, the ITO film is generally deposited to a relatively high thickness, such as 200 ⁇ 300 Nm. Thicker ITO films increase manufacturing costs and, more importantly, lead to potential pitfalls in reliability.
  • a pixel electrode having a relatively high thickness may cause breakage, peeling, and the like when the flexible display device is repeatedly bent, particularly for an ITO film having poor ductility. Therefore, it is necessary to provide a novel electrode structure to solve this problem.
  • An object of the present invention is to provide an OLED-based TFT array substrate structure, which reduces the thickness of the transparent pixel electrode by the TFT array substrate structure design, thereby reducing the manufacturing cost and the possibility of occurrence of potential defects.
  • an OLED-based TFT array substrate structure including a plurality of TFT devices, a capacitor, and a common electrode and a data signal line formed on a substrate, the TFT device including a driving TFT, the driving TFT a gate, a source and a drain, the drain extending a drain frame surrounding the pixel block of the TFT array substrate, and a region enclosed by the drain frame is provided with a transparent contact with the frame Conductive film.
  • the invention extends the drain of the driving TFT out of a metal drain frame, the transparent conductive film is connected to the frame, and the frame and the transparent conductive film constitute the pixel electrode, and the resistance is obvious compared with the pixel electrode of the transparent conductive film of the same thickness.
  • the thickness of the transparent conductive film to which the metal frame is connected is inevitably smaller than the thickness of the transparent conductive film only when the resistance is constant, so that the thickness of the transparent conductive film can be reduced by providing a metal frame. Further, the manufacturing cost and the possibility of occurrence of potential defects are reduced.
  • it is possible to avoid defects such as breakage and peeling of the electrode structure during repeated bending, and to improve the reliability thereof.
  • 1-1 is a top view of a OLED-based TFT array substrate structure according to an embodiment of the present invention.
  • Figure 1-2 is a cross-sectional view of the electrode structure shown in Figure 1-1 taken along the line of the line;
  • 2-1 is a top plan view of an OLED-based TFT array substrate structure according to an embodiment of the present invention.
  • Figure 2-2 is a cross-sectional view of the electrode structure shown in Figure 2-1 taken along the line of the line;
  • 3-1 is a top view of a OLED-based TFT array substrate structure according to an embodiment of the present invention.
  • Figure 3-2 is a cross-sectional view of the electrode structure shown in Figure 3-1 taken along the line of the line;
  • 4-1 is a top plan view of an OLED-based TFT array substrate structure according to an embodiment of the present invention.
  • Figure 4-2 is a cross-sectional view of the electrode structure shown in Figure 4-1 taken along the line of the line;
  • 5-1 is a top view of a OLED-based TFT array substrate structure according to an embodiment of the present invention.
  • Figure 5-2 is a cross-sectional view of the electrode structure shown in Figure 5-1 taken along the line of the line.
  • the OLED-based TFT array substrate structure is understood.
  • the electrode structure shown in the figure is an array structure of basic units. For the sake of clarity, the present embodiment is described for a basic unit.
  • the TFT array substrate structure includes a plurality of sets of TFT devices, capacitors and data signal lines 3 and a common electrode 4 formed on a substrate, wherein the capacitors are connected to the common electrode 4, each of the TFT devices includes a driving TFT, and the driving TFT includes The gate, the source and the drain, the drain of the driving TFT extends a drain frame which can surround the pixel block of the TFT array substrate, and a transparent conductive film which is in contact with the frame is provided in a region enclosed by the drain frame.
  • each group of TFT devices includes a driver.
  • a TFT and a switching TFT the switching TFT includes a gate 11, a source 12 and a drain 13.
  • the gate, the source and the drain of the switching TFT are respectively named as a first gate, a first source, and First drain
  • drive The TFT includes a gate 21, a source 22, and a drain 23.
  • the gate, source, and drain of the driving TFT are named as a second gate, a second source, and a second drain, respectively.
  • a first semiconductor layer 14 is disposed between the first source 12 and the first drain 13, and a second semiconductor layer is disposed between the second source 22 and the second drain 23. twenty four.
  • the first source 12 and the first drain 13 and the second source 22 and the second drain 23 are both made of metal, and may be, but not limited to, Al, Mo, Cu, Ti or other metals and alloys and the like.
  • the first source 12 is connected to the data signal line 3
  • the first drain 13 of the first TFT is connected to the second gate 21 of the second TFT
  • the second drain 23 extends out of the frame 231 which can surround the pixel block.
  • the border enclosed by the frame 231 is provided with a border 231 is in contact with the transparent conductive film 232, which corresponds to the pixel block, is connected to the anode or cathode of the OLED, or directly serves as the anode or cathode of the OLED, and applies a driving voltage to the pixel block.
  • the drain of the driving TFT device is set to the above structure, and has a metal frame 231 and a frame. 231 is internally connected with a transparent conductive film 232, and the frame 231 and the transparent conductive film 232 constitute a pixel electrode. Compared with the pixel electrode of the transparent conductive film 232 having the same thickness, the resistance of the pixel electrode using the metal frame 231 is significantly reduced. Thus, in the case where the resistance is constant, the transparent conductive film to which the metal frame 231 is attached The thickness of 232 is inevitably much smaller than that of the transparent conductive film only. Therefore, in actual manufacturing, the thickness of the transparent conductive film can be reduced by providing a metal frame, thereby reducing the manufacturing cost and the possibility of potential defects. Especially for the flexible display device, it is possible to avoid defects such as breakage and peeling of the electrode structure during repeated bending, and to improve the reliability thereof.
  • the transparent conductive film 232 is inscribed by the metal frame 231, the transparent conductive film is made.
  • the thickness of 232 is reduced, usually can be reduced to 10 nm, usually between 10 and 300 nm, while the thickness of the transparent conductive film of the conventional electrode structure is at least about 70. It is obvious that the thickness of the transparent conductive film 232 is greatly reduced and has a remarkable effect.
  • the metal frame 231 may have a width of 1 to 30 ⁇ m, and further 1 to 10 ⁇ m, the resistance can be greatly reduced without the need for an excessively wide frame, so that the aperture ratio of the display device is not lowered.
  • the detailed structure of the electrode structure is as shown in FIG. 1-2, and the first gate 11, the second gate 21, and the common electrode 4 are disposed on the same layer and directly disposed on the surface of the substrate 5, and are disposed on the layer.
  • An insulating layer 6 is disposed on the insulating layer 6 with the first source 12, the second source 22, the first drain 13, the second drain 23 and the data signal line 3, and the capacitors are opposite and parallel.
  • the first sheet electrode 71 and the second sheet electrode 72 are disposed, wherein the first sheet electrode 71 is integrally formed with the common electrode 4, and the second sheet electrode 72 is integrally formed with the first drain electrode 13.
  • the data signal line 3 can be formed at one time with the first source 12.
  • the one-piece molding method is advantageous for the implementation of the process and simplifies the electrode structure, and is advantageous for the transmission and storage of electric energy and the transmission of driving signals.
  • a passivation layer 8 is disposed on the first source 12, the second source 22, the first drain 13, the second drain 23, and the data signal line 3, and is disposed at the first drain 13
  • the first guiding hole 91 has a second guiding hole 92 at the second gate 21, a third guiding hole 93 at the second electrode 72, and a fourth guiding hole 94 at the second source 22.
  • a large via hole 95 (not shown in the figure) is opened above the frame 231 of the second drain 23 to expose the frame 231.
  • connection of the first drain electrode 13 and the second gate electrode 21 is connected to the passivation layer 8 through the conductive material 10 injected into the first via hole 91 and the second via hole 92, and the second plate electrode 72 and the second electrode
  • connection of the source 22 is connected to the passivation layer 8 through the conductive substance 10 implanted into the third via hole 93 and the fourth via hole 94.
  • the manufacturing process of the TFT array substrate structure is described by taking a dual TFT structure as an example, and specifically includes the following steps:
  • the first gate 11, the second gate 21 and the common electrode 4 are fabricated on the substrate 5: as shown in Figures 2-1 and 2-2;
  • the substrate 5 may be made of glass, PET, PI, etc., and the first gate 11 and the second gate 21 are used. Made of Mo, Al, Cu, Cr, Ti, etc.
  • the common electrode 4 extends out of the first sheet electrode 71.
  • the insulating layer 6 is prepared by a thin film deposition process, and the material may be The process of SiNx, SiO2, Al2O3, Resin, etc. may be PECVD, sputtering, evaporation, spin coating or the like.
  • the first semiconductor layer 14 and the second semiconductor layer 24 are then formed on the insulating layer 6.
  • the first semiconductor layer 14 is aligned with the first gate electrode 11, the second semiconductor layer 24 is aligned with the second gate layer 21, and the material of the first semiconductor layer 14 and the second semiconductor layer 24 may be a-Si, p-Si. , metal oxides, organic materials, etc.
  • the material can be Al, Mo, Cu, Mo/AlNd, Ti, etc.
  • the second drain 23 is formed as shown in FIG. 4-1, and a frame 231 is extended.
  • the width of the frame 231 is about 1-30 ⁇ m, and further 1 to 10 ⁇ m.
  • the data signal line 3 and the first source 12 are molded at one time, the first drain 13 extends out of the second sheet electrode 72, and the second sheet electrode 72 is opposed to and parallel to the first sheet electrode 71 to form a capacitor.
  • a passivation layer 8 is deposited, and the material may be SiNx, SiO2, Resin or the like. Opening holes at the frame 231 of the first drain 13, the second gate 21, the second source 22, the second sheet electrode 72, and the second drain 23, and the frame A large via hole is opened at 231 to expose the frame, and the exposed portion corresponds to the OLED pixel block.
  • a transparent conductive material 10 is deposited on the passivation layer 8, specifically ITO, IZO, etc., the transparent conductive material 10 fills the via hole, and the transparent conductive film 232 is formed in the frame 231, and then the transparent conductive material 10 is etched to form FIG.
  • the structure shown in FIG. 1 is that the first drain electrode 13 and the second gate electrode 21 are connected, the second source electrode 22 and the second chip electrode 72 are connected, and the transparent conductive film 232 in the frame 231 is a pixel electrode for use as an OLED. Providing voltage, this structure is more suitable for the bottom emission mode.
  • the TFT array substrate structure provided by the embodiment of the invention is suitable for an OLED display device, and the thickness of the transparent conductive film is reduced due to the presence of the metal drain frame, thereby reducing the manufacturing cost of the OLED display device and avoiding the flexible OLED display. Adverse phenomena such as electrode peeling occur during bending, and improve The reliability of the OLED display.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Optics & Photonics (AREA)
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Abstract

提供一种基于OLED的TFT阵列基板结构，包括于一基板（5）上形成的多组TFT器件、电容器及公共电极（4）和数据信号线（3），所述TFT器件包括驱动TFT，所述驱动TFT包括栅极（21）、源极（22）和漏极（23），所述漏极（23）延伸出可将TFT阵列基板的像素块包围的漏极边框（231），所述漏极边框（231）围合的区域内设有与所述漏极边框（231）相接触的透明导电膜（232）。驱动TFT漏极延伸出一金属漏极边框内接透明导电膜，使电阻明显减小，进而可以减小透明导电膜的厚度，降低制造成本及潜在不良的发生可能性，对于柔性显示器件，可以避免电极结构在反复弯折时发生断裂、剥离等不良，提高其可靠性。

Description

一种基于OLED的TFT阵列基板结构 技术领域
本发明属于显示技术领域，尤其涉及一种基于OLED的TFT阵列基板结构。
 背景技术
对于典型的底发射型有机电致发光显示（OLED），透明像素电极的材料一般为氧化铟锡（ITO）、氧化铟锌（IZO）等金属氧化物。透明电极可以使光线通过像素电极和基底，实现显示发光。但是由于金属氧化物薄膜电阻率较高，发热量大，所以为了获得较低的电阻，一般要将ITO薄膜沉积比较高的厚度，如 200~300 nm。较厚的ITO薄膜会提高制造成本，更重要的是会带来信赖性的潜在不良。尤其对于柔性显示器件，厚度较高的像素电极会在柔性显示器件反复弯折时发生断裂、剥离等不良，特别是对于延展性较差的ITO薄膜。因此需要提供一种新型的电极结构以解决该问题。
 技术问题
本发明的目的在于提供一种基于OLED的TFT阵列基板结构，通过TFT阵列基板结构设计，降低透明像素电极的厚度，进而降低制造成本及潜在不良的发生可能性。
 技术解决方案
本发明是这样实现的，一种基于OLED的TFT阵列基板结构，包括于一基板上形成的多组TFT器件、电容器及公共电极和数据信号线，所述TFT器件包括驱动TFT，所述驱动TFT包括栅极、源极和漏极，所述漏极延伸出可将TFT阵列基板的像素块包围的漏极边框，所述漏极边框围合的区域内设有与所述边框相接触的透明导电膜。
 有益效果
本发明使驱动TFT的漏极延伸出一金属漏极边框，边框内接透明导电膜，边框与透明导电膜构成像素电极，与只采用相同厚度的透明导电膜的像素电极相比，其电阻明显减小，因此在电阻一定的情况下，连接了金属边框的透明导电膜的厚度必然较仅采用透明导电膜的厚度小得多，因此可以通过设置金属边框的方式来减小透明导电膜的厚度，进而降低制造成本及潜在不良的发生可能性，尤其对于柔性显示器件，可以避免电极结构在反复弯折时发生断裂、剥离等不良，提高其可靠性。
 附图说明
图1-1是本发明实施例提供的基于OLED的TFT阵列基板结构的俯视图；
图1-2是图1-1所示电极结构沿其剖切线方向的剖视图；
图2-1是本发明实施例提供的基于OLED的TFT阵列基板结构的俯视图；
图2-2是图2-1所示电极结构沿其剖切线方向的剖视图；
图3-1是本发明实施例提供的基于OLED的TFT阵列基板结构的俯视图；
图3-2是图3-1所示电极结构沿其剖切线方向的剖视图；
图4-1是本发明实施例提供的基于OLED的TFT阵列基板结构的俯视图；
图4-2是图4-1所示电极结构沿其剖切线方向的剖视图；
图5-1是本发明实施例提供的基于OLED的TFT阵列基板结构的俯视图；
图5-2是图5-1所示电极结构沿其剖切线方向的剖视图。
 本发明的实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
以下结合具体实施例对本发明的具体实现进行详细描述：
请参考图1-1和图1-2，本发明提供一种基于OLED的TFT阵列基板结构，可以理解，图中仅示出对应一个像素的电极结构，而整个TFT阵列基板结构则是以附图所示电极结构为基本单元的阵列式结构，为了便于清楚说明，本实施例针对一个基本单元进行说明。该TFT阵列基板结构包括于一基板上形成的多组TFT器件、电容器及数据信号线3和公共电极4，其中，电容器与公共电极4相连接，每组TFT器件都包括驱动TFT，驱动TFT包括栅极、源极和漏极，驱动TFT的漏极延伸出可将TFT阵列基板的像素块包围的漏极边框，漏极边框围合的区域内设有与边框相接触的透明导电膜。
请进一步参考图1-1和图1-2，作为一种实施方式，每组TFT器件均包括一驱动 TFT和一开关TFT，开关TFT包括栅极11、源极12和漏极13，为了便于描述，将开关TFT的栅极、源极和漏极分别命名为第一栅极、第一源极和第一漏极，驱动 TFT包括栅极21、源极22和漏极23，为了便于描述，将驱动TFT的栅极、源极和漏极分别命名为第二栅极、第二源极和第二漏极。在第一源极12和第一漏极13之间设有第一半导体层14，在第二源极22和第二漏极23之间设有第二半导体层 24。该第一源极12和第一漏极13以及第二源极22和第二漏极23均采用金属制作，可以但不限于是Al，Mo，Cu，Ti或其他金属及合金等等。第一源极12和数据信号线3相连接，第一TFT的第一漏极13和第二TFT的第二栅极21相连接，第二漏极23延伸出可将像素块包围的边框231，该边框231围合的区域内设有与边框 231相接触的透明导电膜232，该透明导电膜232则对应于像素块，与OLED的阳极或阴极相连接，或者直接作为OLED的阳极或阴极，对像素块施加驱动电压。
本实施例将驱动TFT器件的漏极设置为上述结构，具有一金属边框231，边框 231内接透明导电膜232，边框231与透明导电膜232构成像素电极，与只采用相同厚度的透明导电膜232的像素电极相比，采用了金属边框231的像素电极的电阻会明显减小，这样，在电阻一定的情况下，连接了金属边框231的透明导电膜 232的厚度必然较仅采用透明导电膜的厚度小得多，因此，在实际制造中，可以通过设置金属边框的方式来减小透明导电膜的厚度，进而降低制造成本及潜在不良的发生可能性，尤其对于柔性显示器件，可以避免电极结构在反复弯折时发生断裂、剥离等不良，提高其可靠性。
在本实施例中，由于采用金属边框231内接透明导电膜232，使得透明导电膜 232的厚度得以减小，通常可以减小至10 nm，通常为10~300 nm之间可调，而传统电极结构的透明导电膜的厚度最小约70 nm，显而易见，该透明导电膜232的厚度得到大幅度减小，具有十分显著的效果。可选的，该金属边框231的宽度可以为1~30μm，进一步为1~10 μm，不需要过宽的边框就可以大幅度减小电阻，从而不会降低显示器件的开口率。
进一步地，该电极结构的详细结构如图1-2所示，第一栅极11、第二栅极21、公共电极4设于同层且直接设置于基板5表面，在该层面之上设有绝缘层6，在绝缘层6之上同层设置了第一源极12、第二源极22、第一漏极13、第二漏极23及数据信号线3，电容器则由相对且平行设置的第一片电极71和第二片电极72组成，其中，第一片电极71与公共电极4一体成型，而第二片电极72则与第一漏极13一体成型。另外，数据信号线3可以和第一源极12一次成型。一体成型的方式有利于工艺上的实施及简化电极结构，且有利于电能的传输和储存以及驱动信号的传输。
进一步地，在第一源极12、第二源极22、第一漏极13、第二漏极23及数据信号线3之上设有钝化层8，在第一漏极13处开设有第一导孔91，在第二栅极21处开设有第二导孔92，在第二片电极72处开设有第三导孔93，在第二源极22处开设有第四导孔94，在第二漏极23的边框231之上开较大的导孔95（95未在图示上标出），使边框231露出。第一漏极13和第二栅极21的连接通过注入第一导孔91和第二导孔92中的导电物质10于该钝化层8之上相连接，第二片电极72和第二源极22的连接通过注入第三导孔93和第四导孔94的导电物质10于钝化层8之上相连接。
进一步的，本实施例以双TFT结构为例说明该TFT阵列基板结构的制造流程，具体包括下述步骤：
a、在基板5上制作第一栅极11、第二栅极21和公共电极4：如图2-1和图2-2；
基板5可以是glass、PET、PI等材质，第一栅极11、第二栅极21采用 Mo、Al、Cu、Cr、Ti等材料制作。公共电极4延伸出第一片电极71。
b、制作绝缘层6和第一半导体层14及第二半导体层24：如图3-1和图3-2；
采用薄膜沉积工艺制备绝缘层6，材料可以为 SiNx、SiO2、Al2O3、Resin等，工艺可以为PECVD，溅射，蒸镀，旋涂等。然后在绝缘层6上制备第一半导体层14及第二半导体层24。第一半导体层14与第一栅极11对位，第二半导体层24与第二栅极21对位，第一半导体层14及第二半导体层24的材料可以为a-Si、p-Si、金属氧化物、有机材料等。
c、在绝缘层6上制作第一源极12、第二源极22、第一漏极13、第二漏极23及数据信号线3：如图4-1和图4-2；
材料可以是 Al、 Mo、Cu、Mo/AlNd、Ti等，第二漏极23制作成如图4-1所示，延伸出一边框231，边框231宽度约为1-30μm，进一步为1~10 μm。
数据信号线3与第一源极12一次成型，第一漏极13延伸出第二片电极72，第二片电极72与第一片电极71相对且平行，形成电容器。
d、在第一源极12、第二源极22、第一漏极13、第二漏极23及数据信号线3之上制作钝化层8：如图5-1和图5-2；
首先沉积钝化层8，材料可以是SiNx、SiO2、Resin等。在第一漏极13、第二栅极21、第二源极22、第二片电极72以及第二漏极23的边框231处开导孔，边框 231处开较大导孔，使边框露出，露出部分对应于OLED像素块。
e、制作透明像素电极并实现必要的电性连接：如图1-1和图1-2；
在钝化层8上沉积透明导电物质10，具体可以是ITO、IZO等，透明导电物质10充满导孔，并边框231内形成透明导电膜232，再对透明导电物质10进行蚀刻后形成图1-1所示结构，将第一漏极13和第二栅极21连接，将第二源极22和第二片电极72连接，边框231内的透明导电膜232为像素电极，用于为OLED提供电压，这种结构比较适合底发射模式。
本发明实施例提供的TFT阵列基板结构适用于OLED显示装置，由于金属漏极边框的存在，使得透明导电膜的厚度得以减小，进而降低了OLED显示装置的制造成本，并且避免柔性OLED显示屏在弯折时发生电极剥落等不良现象，提高 OLED显示屏的可靠性。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (8)

  1. 一种基于OLED的TFT阵列基板结构，包括于一基板上形成的多组TFT器件、电容器及公共电极和数据信号线，所述TFT器件包括驱动TFT，所述驱动TFT包括栅极、源极和漏极，其特征在于，所述漏极延伸出可将TFT阵列基板的像素块包围的漏极边框，所述漏极边框围合的区域内设有与所述边框相接触的透明导电膜。
  2. 如权利要求1所述的TFT阵列基板结构，其特征在于，所述TFT器件还包括开关TFT，所述开关TFT包括栅极、源极和漏极，所述开关TFT的源极和所述数据信号线相连接，所述开关TFT的漏极和所述驱动TFT的栅极相连接。
  3. 如权利要求2所述的电极结构，其特征在于，所述电容器包括相对且平行的第一片电极和第二片电极，所述开关TFT的栅极、驱动 TFT的栅极、公共电极及第一片电极设于同层且直接设置于所述基板表面，所述开关TFT的源极和漏极、驱动TFT的源极和漏极、数据信号线及第二片电极设于同层，且与所述开关TFT的栅极、驱动TFT的栅极、公共电极及第一片电极所在层面之间相隔一绝缘层。
  4. 如权利要求3所述的电极结构，其特征在于，所述数据信号线和所述开关TFT的源极连接为一体。
  5. 如权利要求3所述的电极结构，其特征在于，所述公共电极和所述第一片电极连接为一体，所述开关TFT的漏极和所述第二片电极连接为一体。
  6. 如权利要求1至5任一项所述的电极结构，其特征在于，所述漏极边框的宽度为1~30μm。
  7. 如权利要求6所述的电极结构，其特征在于，所述漏极边框的宽度为1~10μm。
  8. 如权利要求1至5任一项所述的电极结构，其特征在于，所述透明导电膜的厚度为10~300 nm。
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