WO2016045142A1 - 液晶显示面板及其阵列基板 - Google Patents

液晶显示面板及其阵列基板 Download PDF

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WO2016045142A1
WO2016045142A1 PCT/CN2014/087934 CN2014087934W WO2016045142A1 WO 2016045142 A1 WO2016045142 A1 WO 2016045142A1 CN 2014087934 W CN2014087934 W CN 2014087934W WO 2016045142 A1 WO2016045142 A1 WO 2016045142A1
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liquid crystal
crystal display
display panel
pixel units
pixel
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PCT/CN2014/087934
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English (en)
French (fr)
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郑华
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深圳市华星光电技术有限公司
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Priority to US14/406,212 priority Critical patent/US20160266444A1/en
Publication of WO2016045142A1 publication Critical patent/WO2016045142A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a liquid crystal display panel and an array substrate thereof.
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display
  • the principle of the "whitening on both sides” phenomenon is as follows: as shown in FIG. 1, the driving voltage of the scanning Gate line 11 is input by the scanning drive electrodes (Gate COF) 12 located on the left and right sides of the liquid crystal display panel 10, due to scanning.
  • the resistance R and the capacitance C of the line 11 generate a delay RC Delay, so that the voltage of the normal input on both sides is distorted when transmitted to the intermediate area A, that is, the Gate waveform is distorted, and the distorted voltage reduces the charging rate of the intermediate area A, thereby reducing
  • the display brightness of the middle area A at this time, the display brightness of the side areas B1, B2 is higher than the display brightness of the middle area A, that is, the phenomenon of "whitening on both sides” occurs.
  • the phenomenon of "whitening on both sides” during viewing is particularly obvious.
  • the technical problem to be solved by the embodiments of the present invention is to provide a liquid crystal display panel and an array substrate thereof, which can make the display brightness of the liquid crystal display panel uniform, and slow or eliminate the phenomenon of “whitening on both sides”.
  • a technical solution adopted by the present invention is to provide a liquid crystal display panel having a first substrate and a second substrate which are disposed at a relatively spaced interval, and the first substrate includes a plurality of scan lines and a plurality of data lines and a plurality of pixel units defined by the scan line and the data line, wherein the lengths of the pixel electrodes of the plurality of pixel units are sequentially decreased along the direction of the intermediate portion of the liquid crystal display panel toward the both side regions of the liquid crystal display panel, and the plurality of pixel units
  • the pixel electrodes have the same width; each pixel unit is connected to one scan line and one data line, and the width of the scan lines corresponding to the plurality of pixel units is sequentially increased along the direction of the middle area toward the two side areas, and correspondingly
  • the widths of the connected data lines are the same, and the difference in lengths of the pixel electrodes of any two adjacent pixel units is equal.
  • the distance between the pixel electrodes of the plurality of pixel units and the corresponding connected scan lines is the same in the direction of the intermediate regions toward the two side regions.
  • the difference between the widths of the scan lines corresponding to the adjacent two pixel units is equal.
  • another technical solution adopted by the present invention is to provide a liquid crystal display panel having a first substrate and a second substrate which are disposed at a relatively spaced interval, and the first substrate includes a plurality of scan lines and a plurality of data lines and a plurality of pixel units defined by the scan lines and the data lines, wherein the lengths of the pixel electrodes of the plurality of pixel units are sequentially decreased along the direction of the intermediate portion of the liquid crystal display panel toward the both side regions of the liquid crystal display panel, and the plurality of pixels
  • the pixel electrodes of the unit have the same width.
  • each pixel unit is connected to one scan line and one data line, and the width of the scan lines corresponding to the plurality of pixel units is sequentially increased along the direction of the middle area toward the two side areas, and the width of the corresponding connected data lines is the same. .
  • the distance between the pixel electrodes of the plurality of pixel units and the corresponding connected scan lines is the same in the direction of the intermediate regions toward the two side regions.
  • the difference between the widths of the scan lines corresponding to the adjacent two pixel units is equal.
  • the difference in lengths of the pixel electrodes of any two adjacent pixel units is equal.
  • the liquid crystal display panel further includes a gate driver and a source driver.
  • the gate driver is connected to the plurality of scan lines for providing a scan voltage for the plurality of pixel units
  • the source driver is connected to the plurality of data lines for using The pixel unit provides a driving voltage.
  • Each of the pixel units further includes a thin film transistor that drives the pixel electrode, and the thin film transistors of the plurality of pixel units have the same size, and the gate, the source, and the drain of the thin film transistor are electrically connected to the scan line, the data line, and the pixel electrode, respectively. .
  • the second substrate includes a black matrix disposed corresponding to the scan line, and the width of the black matrix is greater than the width of the corresponding scan line.
  • the column substrate is applicable to a liquid crystal display panel, and the array substrate includes a plurality of scan lines and a plurality of data lines and a plurality of pixel units defined by the plurality of scan lines and the plurality of data lines, wherein the middle area of the liquid crystal display panel faces In the direction of the both side regions of the liquid crystal display panel, the lengths of the pixel electrodes of the plurality of pixel units are sequentially decreased and the width is the same.
  • each pixel unit is connected to one scan line and one data line, and the width of the scan lines corresponding to the plurality of pixel units is sequentially increased along the direction of the middle area toward the two side areas, and the width of the corresponding connected data lines is the same. .
  • the distance between the pixel electrodes of the plurality of pixel units and the corresponding connected scan lines is the same in the direction of the intermediate regions toward the two side regions.
  • the difference between the widths of the scan lines corresponding to the adjacent two pixel units is equal.
  • the beneficial effects of the embodiments of the present invention are: in the embodiment of the present invention, the lengths of the pixel electrodes of the plurality of pixel units are sequentially reduced and the width is the same by designing the direction along the intermediate portion of the liquid crystal display panel toward the two side regions.
  • reduce the transmittance of the pixel units on both sides reduce the transmittance of the pixel units on both sides, thereby reducing the display brightness of the two sides, and the display brightness difference between the two sides and the middle area becomes smaller.
  • the display brightness of the entire liquid crystal display panel is uniform, slowing or eliminating the phenomenon of "whitening on both sides".
  • FIG. 1 is a top plan view showing a structure of a liquid crystal display panel in the prior art
  • Figure 2 is a cross-sectional view of a liquid crystal display panel in accordance with a preferred embodiment of the present invention
  • Figure 3 is a plan view of a liquid crystal display panel in accordance with a preferred embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a pixel structure of a liquid crystal display panel according to a preferred embodiment of the present invention.
  • FIG. 5 is a schematic structural view of a pixel unit in a region on both sides of the liquid crystal display panel shown in FIG. 3;
  • FIG. 6 is a schematic structural view of a pixel unit in an intermediate portion of the liquid crystal display panel shown in FIG. 3;
  • FIG. 7 is a schematic diagram showing the correspondence relationship between the aperture ratio of the pixel unit of the liquid crystal display panel shown in FIG. 3 and the length of the pixel electrode.
  • the liquid crystal display panel 20 includes a first substrate 21, a second substrate 22, and a liquid crystal layer 23, wherein the first substrate 21 and the second substrate 22 are relatively spaced apart, and the second substrate 22 is CF ( a color filter substrate, the first substrate 21 is a TFT (Thin Film Transistor) array substrate, and the first substrate 21 includes a transparent substrate and various wirings and pixels disposed on the transparent substrate. Electrodes, etc. specifically,
  • the first substrate 21 includes a plurality of data lines D 1 , D 2 , . . . , D N , a plurality of scanning lines G 1 , G 2 , . . . , G L , and a plurality of lines arranged along a direction perpendicular to the data line. a plurality of pixel units P 1 , P 2 , . . . , P X defined by the scanning lines G 1 , G 2 , . . . , G L and the plurality of data lines D 1 , D 2 , . . . , D N Each pixel unit is connected to one scan line and one data line.
  • the plurality of scan lines G 1 , G 2 , . . . , G L are connected to the gate driver 31 , and the plurality of data lines D 1 , D 2 , . . . , D N are connected to the source driver 32 .
  • the gate driver 31 is for supplying a scan voltage for a plurality of pixel units P 1 , P 2 , . . . , P X
  • the source driver 32 is for a plurality of pixel units P 1 , P 2 , . . . , P X Provide drive voltage.
  • the main purpose of the embodiment of the present invention is to face a plurality of pixel units P 1 along the direction of the two sides of the liquid crystal display panel 20 toward the two side regions C 1 and C 2 of the liquid crystal display panel 20, that is, the direction of the arrow shown in FIG.
  • the lengths of the pixel electrodes of P 2 , . . . , P X are sequentially decreased, and the pixel electrodes of the plurality of pixel units P 1 , P 2 , . . . , P X have the same width.
  • the structures of the plurality of pixel units P 1 , P 2 , . . . , P X are different, and are preferably expressed as the widths of the corresponding connected scan lines G 1 , G 2 , . . . , G L and The length of the pixel electrode is different.
  • FIG. 5 is located intermediate the liquid crystal display panel 20 of the region D of one pixel unit P D, and located on both sides of the liquid crystal display area (C 1) of a pixel unit of the panel 20 shown in FIG. 6 P C, is The example is explained.
  • the length of the pixel electrode 51 of the pixel unit P C of the side area C 1 is L C
  • the width of the pixel electrode 51 of the pixel unit P C is H C
  • the pixel unit of the middle area D The length of the pixel electrode 61 of P D is L D
  • the difference in lengths of the pixel electrodes of any two adjacent pixel units is equal, that is, the plurality of pixel units P 1 , P 2 , ..., the lengths of the pixel electrodes of P X are successively decreased by the same magnitude.
  • adjacent 11 regions a, b, c, d, e, f, g, h, i, j are selected along the direction of the intermediate region D toward the region C 1 of one of the two regions.
  • the length of the pixel electrode corresponding to the area a is 100
  • the length of the pixel electrode corresponding to the area b is 99
  • the length of the pixel electrode corresponding to the area c is 98
  • the length of the pixel electrode corresponding to the area d is 97
  • the area e corresponds to
  • the length of the pixel electrode is 96
  • the length of the pixel electrode corresponding to the area f is 95
  • the length of the pixel electrode corresponding to the area g is 94
  • the length of the pixel electrode corresponding to the area h is 93
  • the length of the pixel electrode corresponding to the area i is 92.
  • the length of the pixel electrode corresponding to the region j is 91
  • region a and region b, region b and region c, region c and region d, region d and region e, region e and region f, region f and region g, region g and region h, region h and region i The difference between the widths of the pixel electrodes of the pixel unit corresponding to the region i, the region j, and the region j and the region k is equal to 1 ⁇ m.
  • the pixel electrode of the pixel unit corresponding to each region and the connected scan line thereof are preferably in the direction of gravity perpendicular to the direction of the two regions C 1 and C 2 along the intermediate region D.
  • the structure is the same as the size.
  • the widths of the pixel electrodes of the plurality of pixel units P 1 , P 2 , . . . , P X are constant, and thus the aperture ratio ⁇ of the pixel unit is linear with the length L of the pixel electrode.
  • the aperture ratio ⁇ of the pixel unit is reduced by 90%, that is, the transmittance of the pixel unit is reduced by 90%, which greatly reduces the phenomenon of "whitening on both sides".
  • the width of the scanning lines corresponding to the pixel electrodes of any two adjacent pixel units is sequentially increased along the intermediate area D toward the directions of the two side areas C 1 and C 2 , and the connected data lines are sequentially increased.
  • the width is the same. in particular:
  • the width of the scan line G C corresponding to the pixel electrode 51 of the pixel unit P C located at the side regions C 1 and C 2 is W C , corresponding to the connected data line D C .
  • the width is W D1 ;
  • the width is 10, the width of the scan line connected to the pixel electrode corresponding to the area b is 11, the width of the scan line connected to the pixel electrode corresponding to the area c is 12, and the width of the scan line connected to the pixel electrode corresponding to the area d is 13, the width of the scan line connected to the pixel electrode corresponding to the area e is 14, the width of the scan line connected to the pixel electrode corresponding to the area f is 15, and the width of the scan line connected to the pixel electrode corresponding to the area g is 16,
  • the width of the scan line connected to the pixel electrode corresponding to the area h is 17, the width of the scan line connected to the pixel electrode corresponding to the area i is 18, and the width of the scan line connected to the pixel electrode corresponding to the area j is 19, the area k
  • the width of the scan line to which the corresponding pixel electrode is connected is 20, and the width of the scan line is in micrometers um.
  • the difference between the widths of the scan lines connected to any two adjacent pixel units is equal, that is, the area a and the area b, the area b and the area c, the area c and the area d, the area d and the area e, the area e and the area f, the difference between the widths of the scan lines connected to the pixel electrodes connected to the region f, the region g, the region g and the region h, the region h and the region i, the region i and the region j, and the region j and the region k are equal, 1 micron.
  • the pixel electrodes of the plurality of pixel units P 1 , P 2 , . . . , P X have the same distance ⁇ s from the correspondingly connected scanning lines.
  • the embodiment of the present invention gradually reduces the aperture area of the pixel electrode on both sides of the liquid crystal display panel, thereby reducing the transmittance of the pixel unit on both sides of the liquid crystal display panel to compensate for charging with the intermediate region.
  • the surplus space is used to increase the width of the scanning line compared to the aperture area of the pixel unit of the prior art.
  • the area of a pixel unit is defined as 45 um x 135 um.
  • the opening area of the pixel electrode i.e., the pixel electrode
  • the width of the scanning line is 10 ⁇ m
  • the interval between the opening area of the pixel electrode and the scanning line is 15 ⁇ m.
  • the two sides of the liquid crystal display panel are divided into 10 regions, the length of the pixel electrode in each region is sequentially reduced by 1 um, and the width of the scanning line is sequentially increased by 1 um, so the length of the pixel electrode in the outermost region is 90 um, the width of the scanning line. That is 20um.
  • the above-mentioned partition design is preferably performed during the mask design, and the design of the embodiment of the present invention can be embodied in the layer where the scan line of the liquid crystal display panel and the pixel electrode are located by a conventional photolithography process.
  • the resistance R of the scan line can be reduced, thereby reducing the delay RC Delay of the scan line, and the voltage input to the two sides C 1 and C 2 can be transmitted to the intermediate region.
  • D reduces or avoids distortion, that is, the Gate waveform is not distorted, further reducing the "whitening on both sides" phenomenon.
  • each pixel unit of the embodiment further includes a thin film transistor that drives the pixel electrode, and the structure of the thin film transistor of the plurality of pixel units P 1 , P 2 , . . . , P X
  • the dimensions are exactly the same.
  • Each of the thin film transistors includes a gate g 1 , a source s 1 , and a drain b 1 , wherein the gate g 1 is electrically connected to a corresponding scan line, the source s 1 is electrically connected to the corresponding data line, and the drain b 1 Electrically connected to the corresponding pixel electrode.
  • the width of the scan line is sequentially increased along the direction of the intermediate portion D toward the two side regions C 1 and C 2 , and the black matrix corresponding to the scan line is disposed on the second substrate 22 shown in FIG. 2 .
  • the width of a black matrix is greater than the width of its corresponding scan line.
  • the lengths of the pixel electrodes of the plurality of pixel units are sequentially decreased and the widths of the pixel electrodes are the same, thereby reducing both sides.
  • the aperture ratio of the pixel unit in the area reduces the transmittance of the pixel unit on both sides, thereby reducing the display brightness of the two sides, and the display brightness difference between the two sides and the middle area becomes smaller or eliminated, and the entire liquid crystal display panel
  • the display brightness is uniform, slowing or eliminating the "whitening on both sides" phenomenon.

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Abstract

一种液晶显示面板及其阵列基板。该液晶显示面板（20）具有相对间隔设置的第一基板（21）和第二基板（22），第一基板（21）包括多条扫描线（G 1,G 2,…，G L）和多条数据线（D 1,D 2,…，D N）以及由扫描线和数据线定义的多个像素单元（P 1,P 2,…，P X），其中，沿液晶显示面板（20）的中间区域朝向液晶显示面板的两侧区域的方向，多个像素单元（P 1,P 2,…，P X）的像素电极的长度依次减小，且多个像素单元（P 1,P 2,…，P X）的像素电极的宽度相同。通过上述方式，能够使得液晶显示面板的显示亮度均匀，减缓或消除"两侧发白"现象。

Description

液晶显示面板及其阵列基板 【技术领域】
本发明涉及液晶显示技术领域，特别是涉及一种液晶显示面板及其阵列基板。
【背景技术】
TFT-LCD(Thin Film Transistor-Liquid Crystal Display，薄膜场效应液晶显示)面板在低灰阶显示时，极易出现两侧区域亮度高、中间区域亮度低的显示不良现象，通常称为“两侧发白”现象。
产生“两侧发白”现象的原理在于：如图1所示，扫描Gate线11的驱动电压是由位于液晶显示面板10的左右两侧的扫描驱动电极(Gate COF)12输入的，由于扫描线11的电阻R和电容C会产生延迟RC Delay，使得两侧正常输入的电压在传递至中间区域A时发生失真，即Gate波形失真，失真的电压会降低中间区域A的充电率，从而降低中间区域A的显示亮度，此时两侧区域B1、B2的显示亮度高于中间区域A的显示亮度，即产生“两侧发白”现象。在低灰阶显示时，由于人眼敏感，观看时“两侧发白”现象尤为明显。
【发明内容】
有鉴于此，本发明实施例所要解决的技术问题是提供一种液晶显示面板及其阵列基板，能够使得液晶显示面板的显示亮度均匀，减缓或消除“两侧发白”现象。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种液晶显示面板，具有相对间隔设置的第一基板和第二基板，第一基板包括多条扫描线和多条数据线以及由扫描线和数据线定义的多个像素单元，其中，沿液晶显示面板的中间区域朝向液晶显示面板的两侧区域的方向，多个像素单元的像素电极的长度依次减小，且多个像素单元的像素电极的宽度相同；每一像素单元对应连接一条扫描线和一条数据线，沿中间区域朝向两侧区域的方向，多个像素单元对应连接的扫描线的宽度依次增大，且对应 连接的数据线的宽度相同，任意相邻两个像素单元的像素电极的长度之差相等。
其中，沿中间区域朝向两侧区域的方向，多个像素单元的像素电极与对应连接的扫描线之间的距离相同。
其中，沿中间区域朝向两侧区域的方向，任意相邻两个像素单元对应连接的扫描线的宽度之差相等。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示面板，具有相对间隔设置的第一基板和第二基板，第一基板包括多条扫描线和多条数据线以及由扫描线和数据线定义的多个像素单元，其中，沿液晶显示面板的中间区域朝向液晶显示面板的两侧区域的方向，多个像素单元的像素电极的长度依次减小，且多个像素单元的像素电极的宽度相同。
其中，每一像素单元对应连接一条扫描线和一条数据线，沿中间区域朝向两侧区域的方向，多个像素单元对应连接的扫描线的宽度依次增大，且对应连接的数据线的宽度相同。
其中，沿中间区域朝向两侧区域的方向，多个像素单元的像素电极与对应连接的扫描线之间的距离相同。
其中，沿中间区域朝向两侧区域的方向，任意相邻两个像素单元对应连接的扫描线的宽度之差相等。
其中，沿中间区域朝向两侧区域的方向，任意相邻两个像素单元的像素电极的长度之差相等。
其中，液晶显示面板还包括栅极驱动器和源极驱动器，栅极驱动器与多条扫描线连接，用于为多个像素单元提供扫描电压，源极驱动器与多条数据线连接，用于为多个像素单元提供驱动电压。
其中，每一像素单元还包括驱动像素电极的薄膜晶体管，且多个像素单元的薄膜晶体管的尺寸相同，薄膜晶体管的栅极、源极和漏极分别与扫描线、数据线和像素电极电连接。
其中，第二基板包括与扫描线对应设置的黑矩阵，且黑矩阵的宽度大于对应的扫描线的宽度。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种阵 列基板，适用于液晶显示面板，该阵列基板包括多条扫描线和多条数据线以及由多条扫描线和多条数据线定义的多个像素单元，其中，沿液晶显示面板的中间区域朝向液晶显示面板的两侧区域的方向，多个像素单元的像素电极的长度依次减小且宽度相同。
其中，每一像素单元对应连接一条扫描线和一条数据线，沿中间区域朝向两侧区域的方向，多个像素单元对应连接的扫描线的宽度依次增大，且对应连接的数据线的宽度相同。
其中，沿中间区域朝向两侧区域的方向，多个像素单元的像素电极与对应连接的扫描线之间的距离相同。
其中，沿中间区域朝向两侧区域的方向，任意相邻两个像素单元对应连接的扫描线的宽度之差相等。
通过上述技术方案，本发明实施例产生的有益效果是：本发明实施例通过设计沿液晶显示面板的中间区域朝向两侧区域的方向，多个像素单元的像素电极的长度依次减小且宽度相同，以此减小两侧区域的像素单元的开口率，降低两侧区域的像素单元的穿透率，从而降低两侧区域的显示亮度，此时两侧区域与中间区域的显示亮度差距变小或消除，整个液晶显示面板的显示亮度均匀，减缓或消除“两侧发白”现象。
【附图说明】
图1是现有技术中液晶显示面板的结构俯视图；
图2是本发明优选实施例的液晶显示面板的剖视图；
图3是本发明优选实施例的液晶显示面板的俯视图；
图4是本发明优选实施例的液晶显示面板的像素结构示意图；
图5是图3所示液晶显示面板两侧区域的像素单元的结构示意图；
图6是图3所示液晶显示面板中间区域的像素单元的结构示意图；
图7是图3所示液晶显示面板的像素单元的开口率与像素电极的长度的对应关系示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进 行清楚、完整地描述，显然，本发明以下所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
图2和图3分别是本发明优选实施例的液晶显示面板的剖视图和俯视图，图4是该液晶显示面板的像素结构示意图。请结合图2～图4所示，液晶显示面板20包括第一基板21、第二基板22和液晶层23，其中第一基板21和第二基板22相对间隔设置，第二基板22为CF(Color Filter，彩色滤光片)彩膜基板，第一基板21为TFT(Thin Film Transistor，薄膜晶体管)阵列基板，第一基板21包括透明基体以及设置于该透明基体上的各种配线和像素电极等。具体地，
第一基板21包括多条数据线D1，D2，...，DN、沿垂直于数据线方向设置的多条扫描线G1，G2，...，GL，以及由多条扫描线G1，G2，...，GL和多条数据线D1，D2，...，DN定义的多个像素单元P1，P2，...，PX，每一个像素单元对应连接一条扫描线和一条数据线。
其中，多条扫描线G1，G2，...，GL连接于栅极驱动器31，多条数据线D1，D2，...，DN连接于源极驱动器32。栅极驱动器31用于为多个像素单元P1，P2，...，PX提供扫描电压，源极驱动器32用于为多个像素单元P1，P2，...，PX提供驱动电压。
本发明实施例的主要目的是，沿液晶显示面板20的中间区域D朝向液晶显示面板20的两侧区域C1、C2的方向，即图4所示的箭头方向，多个像素单元P1，P2，...，PX的像素电极的长度依次减小，且多个像素单元P1，P2，...，PX的像素电极的宽度相同。
根据像素单元的穿透率＝开口率*液晶效率(即单位开口面积的穿透率)，这一液晶显示领域的公知常识，可知减小像素电极的长度能够降低像素单元的开口面积，并降低像素单元的液晶效率，从而降低两侧区域C1、C2的显示亮度，此时两侧区域C1、C2与中间区域D的显示亮度差距变小甚至可以消除，整个液晶显示面板20的显示亮度趋向均匀，即可减缓或消除“两侧发白”现象。
基于上述发明目的，多个像素单元P1，P2，...，PX的结构不相同，优 选表现为对应连接的扫描线G1，G2，...，GL的宽度以及其像素电极的长度不相同。下文以图5所示的位于液晶显示面板20的中间区域D的一个像素单元PD，以及图6所示的位于液晶显示面板20的两侧区域(C1)的一个像素单元PC，为例进行说明。
请参阅图5和图6所示，两侧区域C1的像素单元PC的像素电极51的长度为LC，像素单元PC的像素电极51的宽度为HC，中间区域D的像素单元PD的像素电极61的长度为LD，像素单元PD的像素电极61的宽度为HD，其中LC＜LD且HC＝HD。
此外，沿中间区域D朝向两侧区域C1、C2的方向，本实施例优选任意相邻两个像素单元的像素电极的长度之差相等，也就是说，多个像素单元P1，P2，...，PX的像素电极的长度以相同的幅值依次递减。请参阅下面具体的举例而言：
结合图3所示，沿中间区域D朝向两侧区域之一的区域C1的方向，选取相邻的11个区域a，b，c，d，e，f，g，h，i，j，k，区域a对应的像素电极的长度为100，区域b对应的像素电极的长度为99，区域c对应的像素电极的长度为98，区域d对应的像素电极的长度为97，区域e对应的像素电极的长度为96，区域f对应的像素电极的长度为95，区域g对应的像素电极的长度为94，区域h对应的像素电极的长度为93，区域i对应的像素电极的长度为92，区域j对应的像素电极的长度为91，区域k对应的像素电极的长度为90，像素电极的长度单位为微米um。
并且，区域a与区域b、区域b与区域c、区域c与区域d、区域d与区域e、区域e与区域f、区域f与区域g、区域g与区域h、区域h与区域i、区域i与区域j、区域j与区域k，分别对应的像素单元的像素电极的宽度之差相等，均为1微米。
需要说明的是，在与沿中间区域D朝向两侧区域C1、C2的方向相垂直的重力方向上，本发明实施例优选每一区域对应的像素单元的像素电极及其连接的扫描线的结构与尺寸相同。
请结合图7所示，多个像素单元P1，P2，...，PX的像素电极的宽度不变，因此像素单元的开口率θ与像素电极的长度L呈线性关系。当L值由100um降低到90um，像素单元的开口率θ会下降90％，即像素单元的穿透 率下降90％，可极大地减轻“两侧发白”现象。
进一步地，本实施例优选沿中间区域D朝向两侧区域C1、C2的方向，任意相邻两个像素单元的像素电极对应连接的扫描线的宽度依次增大，且对应连接的数据线的宽度相同。具体而言：
请再次参阅图5和图6所示，位于两侧区域C1、C2的像素单元PC的像素电极51对应连接的扫描线GC的宽度为WC，对应连接的数据线DC的宽度为WD1；位于中间区域D的像素单元PD的像素电极61对应连接的扫描线GD的宽度为WD，对应连接的数据线DD的宽度为WD2，其中WC＞WD且WD1＝WD2。
同理，对于图3所示的依次相邻的11个区域a，b，c，d，e，f，g，h，i，j，k，区域a对应的像素电极所连接的扫描线的宽度为10，区域b对应的像素电极所连接的扫描线的宽度为11，区域c对应的像素电极所连接的扫描线的宽度为12，区域d对应的像素电极所连接的扫描线的宽度为13，区域e对应的像素电极所连接的扫描线的宽度为14，区域f对应的像素电极所连接的扫描线的宽度为15，区域g对应的像素电极所连接的扫描线的宽度为16，区域h对应的像素电极所连接的扫描线的宽度为17，区域i对应的像素电极所连接的扫描线的宽度为18，区域j对应的像素电极所连接的扫描线的宽度为19，区域k对应的像素电极所连接的扫描线的宽度为20，扫描线的宽度单位为微米um。
其中，任意相邻两个像素单元对应连接的扫描线的宽度之差相等，即：区域a与区域b、区域b与区域c、区域c与区域d、区域d与区域e、区域e与区域f、区域f与区域g、区域g与区域h、区域h与区域i、区域i与区域j、区域j与区域k，分别对应的像素电极所连接的扫描线的宽度之差相等，均为1微米。
此外，本实施例优选多个像素单元P1，P2，...，PX的像素电极与对应连接的扫描线之间的距离Δs相同。
承前所述，本发明实施例分区式地逐步减小液晶显示面板两侧区域的像素电极的开口面积，从而降低液晶显示面板两侧区域的像素单元的穿透率，以补偿与中间区域的充电率的差异。同时，相比较于现有技术的像素单元的开口面积，富余的空间用于增加扫描线的宽度。
例如，定义一个像素单元的面积为45um×135um。在中间区域，像素电极的开口区(即像素电极)的长度为100um，扫描线的宽度为10um，像素电极的开口区与扫描线之间的间距为15um。将液晶显示面板两侧各均分成10个区域，每个区域的像素电极的长度依次减少1um，扫描线的宽度依次增加1um，因此最外侧区域的像素电极的长度即为90um，扫描线的宽度即为20um。本实施例优选在光罩设计时进行上述分区设计，并且通过传统的光刻制程，即可在将本发明实施例的设计体现在液晶显示面板的扫描线所在层和像素电极所在层上。
另外，本发明实施例中，增加扫描线的宽度，可以减小扫描线的电阻R，从而降低扫描线的延迟RC Delay，能够使得两侧区域C1、C2输入的电压在传递至中间区域D时减小或避免发生失真，即Gate波形不失真，进一步减轻“两侧发白”现象。
需要说明的是，虽然增加扫描线的宽度的同时电容C也增大了，但电容C的增加效果远远不及电阻R的减小效果，RC常数仍为减小，即延迟RC Delay仍然减小。
请结合图3～图6所示，本实施例的每一像素单元还包括驱动像素电极的薄膜晶体管，且多个像素单元P1，P2，...，PX的薄膜晶体管的结构与尺寸完全相同。每一个薄膜晶体管均包括栅极g1、源极s1、漏极b1，其中栅极g1与对应的扫描线电连接，源极s1与对应的数据线电连接，漏极b1与对应的像素电极电连接。
鉴于本发明实施例中，沿中间区域D朝向两侧区域C1、C2的方向，扫描线的宽度依次增大，则图2所示第二基板22设置的与扫描线对应黑矩阵，每一黑矩阵的宽度大于其对应的扫描线的宽度。
综上所述，本发明实施例通过设计沿液晶显示面板的中间区域朝向两侧区域的方向，多个像素单元的像素电极的长度依次减小且像素电极的宽度相同，以此减小两侧区域的像素单元的开口率，降低两侧区域的像素单元的穿透率，从而降低两侧区域的显示亮度，此时两侧区域与中间区域的显示亮度差距变小或消除，整个液晶显示面板的显示亮度均匀，减缓或消除“两侧发白”现象。
再次说明，以上所述仅为本发明的实施例，并非因此限制本发明的专 利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (15)

  1. 一种液晶显示面板，其中，具有相对间隔设置的第一基板和第二基板，所述第一基板包括多条扫描线和多条数据线以及由所述扫描线和所述数据线定义的多个像素单元，
    其中，沿所述液晶显示面板的中间区域朝向所述液晶显示面板的两侧区域的方向，所述多个像素单元的像素电极的长度依次减小，且所述多个像素单元的像素电极的宽度相同；
    每一所述像素单元对应连接一条所述扫描线和一条所述数据线，沿所述中间区域朝向所述两侧区域的方向，所述多个像素单元对应连接的所述扫描线的宽度依次增大，且对应连接的所述数据线的宽度相同，任意相邻两个所述像素单元的所述像素电极的长度之差相等。
  2. 根据权利要求1所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，所述多个像素单元的所述像素电极与对应连接的所述扫描线之间的距离相同。
  3. 根据权利要求1所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，任意相邻两个所述像素单元对应连接的所述扫描线的宽度之差相等。
  4. 一种液晶显示面板，其中，具有相对间隔设置的第一基板和第二基板，所述第一基板包括多条扫描线和多条数据线以及由所述扫描线和所述数据线定义的多个像素单元，
    其中，沿所述液晶显示面板的中间区域朝向所述液晶显示面板的两侧区域的方向，所述多个像素单元的像素电极的长度依次减小，且所述多个像素单元的像素电极的宽度相同。
  5. 根据权利要求4所述的液晶显示面板，其中，每一所述像素单元对应连接一条所述扫描线和一条所述数据线，沿所述中间区域朝向所述两侧区域的方向，所述多个像素单元对应连接的所述扫描线的宽度依次增大，且对应连接的所述数据线的宽度相同。
  6. 根据权利要求5所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，所述多个像素单元的所述像素电极与对应连接的所 述扫描线之间的距离相同。
  7. 根据权利要求5所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，任意相邻两个所述像素单元对应连接的所述扫描线的宽度之差相等。
  8. 根据权利要求4所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，任意相邻两个所述像素单元的所述像素电极的长度之差相等。
  9. 根据权利要求4所述的液晶显示面板，其中，所述液晶显示面板还包括栅极驱动器和源极驱动器，所述栅极驱动器与所述多条扫描线连接，用于为所述多个像素单元提供扫描电压，所述源极驱动器与所述多条数据线连接，用于为所述多个像素单元提供驱动电压。
  10. 根据权利要求4所述的液晶显示面板，其中，每一所述像素单元还包括驱动所述像素电极的薄膜晶体管，且所述多个所述像素单元的所述薄膜晶体管的尺寸相同，所述薄膜晶体管的栅极、源极和漏极分别与所述扫描线、所述数据线和所述像素电极电连接。
  11. 根据权利要求4所述的液晶显示面板，其中，所述第二基板包括与所述扫描线对应设置的黑矩阵，且所述黑矩阵的宽度大于对应的所述扫描线的宽度。
  12. 一种阵列基板，适用于液晶显示面板，其中，所述阵列基板包括多条扫描线和多条数据线以及由所述多条扫描线和所述多条数据线定义的多个像素单元，
    其中，沿所述液晶显示面板的中间区域朝向所述液晶显示面板的两侧区域的方向，所述多个像素单元的像素电极的长度依次减小，且所述多个像素单元的像素电极的宽度相同。
  13. 根据权利要求12所述的阵列基板，其中，每一所述像素单元对应连接一条所述扫描线和一条所述数据线，沿所述中间区域朝向所述两侧区域的方向，所述多个像素单元对应连接的所述扫描线的宽度依次增大，且对应的所述数据线的宽度相同。
  14. 根据权利要求13所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，所述多个像素单元的所述像素电极与对应连接的 所述扫描线之间的距离相同。
  15. 根据权利要求13所述的液晶显示面板，其中，沿所述中间区域朝向所述两侧区域的方向，任意相邻两个所述像素单元对应连接的所述扫描线的宽度之差相等。
PCT/CN2014/087934 2014-09-24 2014-09-30 液晶显示面板及其阵列基板 WO2016045142A1 (zh)

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