WO2016037526A1 - 一种信号检测方法及装置 - Google Patents

一种信号检测方法及装置 Download PDF

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Publication number
WO2016037526A1
WO2016037526A1 PCT/CN2015/088061 CN2015088061W WO2016037526A1 WO 2016037526 A1 WO2016037526 A1 WO 2016037526A1 CN 2015088061 W CN2015088061 W CN 2015088061W WO 2016037526 A1 WO2016037526 A1 WO 2016037526A1
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signal
port
logical ports
data signal
probability
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PCT/CN2015/088061
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English (en)
French (fr)
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汪浩
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华为技术有限公司
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas

Definitions

  • the present invention relates to the field of communications technologies, and in particular, to a signal detection method and apparatus.
  • LTE Long Term Evolution
  • UMTS Universal Mobile Telecommunications System
  • MIMO Multiple-Input Multiple-Output
  • OFDM Orthogonal Frequency Division Multiplex
  • the Physical Downlink Control Channel plays a very important role in the LTE system.
  • the PDCCH is used to store the location of the downlink and uplink air interface resources and the set of important parameters of the location, and also to send some common commands (such as power control messages). All User Equipments (UEs) must decompose the PDCCH to know whether they have their own related resources.
  • the PDCCH is a "road sign.” In a LTE system, one subframe contains 14 OFDM symbols, and the PDCCH usually only occupies the first 3 symbols, and the resources are very limited.
  • LTE introduces the concept of enhanced PDCCH (ePDCCH), which transmits control information by using resources that partially transmit UE services (ie, 4-14th OFDM symbols).
  • ePDCCH enhanced PDCCH
  • the coding and resource mapping manner of the ePDCCH is basically the same as the PDCCH, and the difference is that the ePDCCH uses demodulation dedicated pilot.
  • DMRS Demodulation Reference Signal
  • the transmitted data is precoded, similar to the Physical Downlink Shared Channel (PDSCH) Transmission Mode (TM) 8 and 9.
  • DMRS Demodulation Reference Signal
  • TM Physical Downlink Shared Channel
  • the ePDCCH also has the concept of a port (similar to TM8, TM9), and there are four types of ports that can be used, namely, 107, 108, 109, and 110.
  • the UE detects the ePDCCH signal and usually performs Interference Rejection Combining (IRC) first, and then performs Maximum Ratio Combining (MRC).
  • IRC Interference Rejection Combining
  • MRC Maximum Ratio Combining
  • the received signal of the DMRS is used as a channel estimation corresponding to the port;
  • Ruu interference covariance statistical matrix
  • the IRC is suppressed according to Ruu to suppress inter-cell interference (required according to the candidate ePDCCH resource unit indication RE indication given by the rate matching module);
  • demodulation is performed according to the received signal after the IRC and the equivalent channel estimation (the prior art uses MRC demodulation);
  • LLR Log Likelihood Ratio
  • the received signal of the ePDCCH after the IRC can be expressed as
  • h 0 is the equivalent channel matrix corresponding to Port
  • is the sum of interference and noise
  • x 0 is the ePDCCH symbol to be estimated.
  • This estimator is used to calculate the LLR.
  • ECCE Enhanced Control Channel Element
  • Port 107 is a port to be estimated for ePDCCH (corresponding to UE0), and port 108 is used by UE1, and ECCE0 and ECCE1 of the two UEs collide with each other (that is, use the same time-frequency resource). Up to 4 UEs can use the same time-frequency resources, occupying ports 107, 108, 109, and 110, respectively.
  • equation (1) can be rewritten as:
  • h i and x i are equivalent channel matrices and ePDCCH symbols of other UEs, and there are at most three items in the summation number, indicating a maximum of three interferences. Since ports 107, 108, 109, and 110 are mutually orthogonal, Ruu calculated in the IRC algorithm does not include h i x i , that is, IRC cannot suppress interference between UEs. It can be seen from the calculation formula (2) of the MRC that the MRC does not consider the existence of inter-user interference (only the energy of the ePDCCH signal to be estimated is the largest, and does not suppress the interference), resulting in a high error rate during demodulation, and the ePDCCH signal cannot be guaranteed. Quality of testing.
  • the invention provides a signal detecting method and device, which can suppress or eliminate the influence of an interference signal during demodulation, improve signal demodulation performance and improve signal detection quality.
  • an embodiment of the present invention provides a signal detection method, including:
  • a first signal from a first port of the control channel, the first port being one of a plurality of logical ports of the control channel, the first signal comprising a first pilot signal and a first data signal;
  • the first data signal Using the first equivalent channel matrix of each of the plurality of logical ports, the first data signal And performing interference suppression combining calculation on the first equivalent channel matrix of each of the plurality of logical ports to obtain a second data signal and a second equivalent channel matrix of each of the plurality of logical ports;
  • the second data signal is demodulated by using an interference suppression algorithm according to the second equivalent channel matrix of the first port and the second equivalent channel matrix of the logical port used by the interference signal, Obtaining a third data signal;
  • the third data signal is descrambled and blindly detected to obtain a detection signal.
  • the second equivalent channel matrix of each of the plurality of logical ports is used to determine whether there is an interference signal in the second data signal obtained by the interference suppression combining, and when it is determined that the interference signal exists,
  • the interference suppression algorithm demodulates the second data signal, thereby suppressing or eliminating the influence of the interference signal during signal demodulation, improving signal demodulation performance and improving signal detection quality.
  • the method further includes:
  • the second data signal is demodulated by using a maximum ratio combining MRC algorithm according to the second equivalent channel matrix of the first port to obtain a third data signal.
  • the determining, by using a preset probability estimation algorithm, a second equivalent channel matrix of each of the multiple logical ports Whether there is an interference signal in the second data signal, and a logical port used by the interference signal including:
  • the first port is only included in a combination with the highest probability of existence, determining that there is no interference signal in the second data signal;
  • the preset probability estimation algorithm includes: a generalized maximum likelihood algorithm, a covariance metric algorithm, and a clustering algorithm.
  • the interference suppression algorithm includes: a minimum mean square error algorithm, a symbol level interference cancellation algorithm, and a maximum likelihood algorithm.
  • an embodiment of the present invention provides a signal detection method, including:
  • a first signal from a first port of the control channel, the first port being one of a plurality of logical ports of the control channel, the first signal comprising a first pilot signal and a first data signal;
  • the third data signal is descrambled and blindly detected to obtain a detection signal.
  • the minimum mean square error MMSE the symbol level is adopted according to the second equivalent channel matrix of each of the plurality of logical ports and the probability of existence of the respective signals.
  • the second data signal obtained by combining the interference cancellation SLIC and the maximum likelihood ML is suppressed, so that the influence of the interference signal can be suppressed or eliminated during demodulation, the demodulation performance is improved, and the signal detection quality is improved.
  • a minimum mean square error is adopted according to a second equivalent channel matrix of each of the plurality of logical ports and a probability that each of the plurality of logical ports has a signal existence
  • the MMSE demodulates the second data signal to obtain a third data signal, including:
  • h 0 represents a second equivalent channel matrix of the first port
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports
  • V represents the plurality of Each of the logical ports has a diagonal matrix composed of a probability that a signal exists
  • I represents an identity matrix
  • ⁇ 2 represents white noise power
  • y 0 represents the second data signal.
  • symbol level interference cancellation is adopted according to a second equivalent channel matrix of each of the plurality of logical ports and a probability that each of the plurality of logical ports has a signal existence
  • the SLIC demodulates the second data signal to obtain a third data signal, including:
  • the last point of MMSE demodulation is used to obtain an estimated amount of the signal of the UE to be estimated as the third data signal.
  • the second equivalent channel matrix of each of the multiple logical ports and the probability of existence of a signal of each of the multiple logical ports are adopted.
  • Demodulating the second data signal with maximum likelihood ML to obtain a third data signal including:
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports; x represents a transmission symbol of the first port and a transmission symbol of a logical port other than the first port Vector; Pr(x k ) represents the probability of x k in vector x. If x k is the signal of the UE to be estimated, then x k takes a value in the quadrature phase shift keying QPSK set. If x k is the interference signal, Then x k takes a value within the extended QPSK set; ⁇ 2 represents the white noise power; y 0 represents the second data signal.
  • the second equivalent channel of each of the multiple logical ports is utilized according to a preset probability estimation algorithm
  • the matrix separately calculates a probability that each of the plurality of logical ports has a signal, including:
  • the preset probability estimation algorithm includes: a generalized maximum likelihood algorithm, a covariance metric algorithm, and a clustering algorithm.
  • an embodiment of the present invention provides a signal detecting apparatus, including:
  • a receiving module configured to receive a first signal from a first port of the control channel, where the first port is One of the plurality of logical ports of the control channel, the first signal comprising a first pilot signal and a first data signal;
  • a channel estimation module configured to use the first pilot signal in the first signal and the demodulation dedicated pilot in each of the multiple logical ports received by the receiving module, respectively, to the multiple logical ports Performing channel estimation to obtain a first equivalent channel matrix of each of the plurality of logical ports;
  • An interference suppression combining module configured to utilize a first equivalent channel matrix of each of the plurality of logical ports obtained by the channel estimation module, and a first equivalent of each of the first data signal and the plurality of logical ports Performing interference suppression combining calculation on the channel matrix to obtain a second data signal and a second equivalent channel matrix of each of the plurality of logical ports;
  • a demodulation module configured to determine, according to a preset probability estimation algorithm, whether an interference signal exists in the second data signal by using a second equivalent channel matrix of each of the plurality of logical ports obtained by the interference suppression combining module, And a logical port used by the interference signal, if there is an interference signal, using interference according to the second equivalent channel matrix of the first port and the second equivalent channel matrix of the logical port used by the interference signal
  • the suppression algorithm demodulates the second data signal to obtain a third data signal
  • a descrambling module configured to descramble the third data signal obtained by the demodulation module
  • the blind detection module is configured to perform blind detection on the signal obtained by descrambling the descrambling module to obtain a detection signal.
  • the demodulation module is further configured to:
  • the second data signal is demodulated by using a maximum ratio combining MRC algorithm according to the second equivalent channel matrix of the first port to obtain a third data signal.
  • the demodulation module is specifically configured to:
  • the first port is only included in a combination with the highest probability of existence, determining that there is no interference signal in the second data signal;
  • the preset probability estimation algorithm includes: a generalized maximum likelihood algorithm, a covariance metric algorithm, and a clustering algorithm.
  • the interference suppression algorithm includes: a minimum mean square error algorithm, a symbol level interference cancellation algorithm, and a maximum likelihood algorithm.
  • an embodiment of the present invention provides a signal detecting apparatus, including:
  • a receiving module configured to receive a first signal from a first port of the control channel, where the first port is one of multiple logical ports of the control channel, the first signal includes a first pilot signal and a first Data signal
  • a channel estimation module configured to use the first pilot signal in the first signal and the demodulation dedicated pilot in each of the multiple logical ports received by the receiving module, respectively, to the multiple logical ports Performing channel estimation to obtain a first equivalent channel matrix of each of the plurality of logical ports;
  • An interference suppression combining module configured to utilize a first equivalent channel matrix of each of the plurality of logical ports obtained by the channel estimation module, and a first equivalent of each of the first data signal and the plurality of logical ports Performing interference suppression combining calculation on the channel matrix to obtain a second data signal and a second equivalent channel matrix of each of the plurality of logical ports;
  • a demodulation module configured to calculate the plurality of logical ends by using a second probability matrix of each of the plurality of logical ports obtained by the interference suppression combining module according to a preset probability estimation algorithm The probability that each port has a signal exists, according to the second equivalent channel matrix of each of the plurality of logical ports and the probability that each of the plurality of logical ports has a signal, using a minimum mean square error MMSE, symbol level interference cancellation Demodulating the second data signal by any one of a SLIC and a maximum likelihood ML to obtain a third data signal;
  • a descrambling module configured to descramble the third data signal obtained by the demodulation module
  • the blind detection module is configured to perform blind detection on the signal obtained by descrambling the descrambling module to obtain a detection signal.
  • the demodulation module is specifically configured to:
  • h 0 represents a second equivalent channel matrix of the first port
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports
  • V represents the plurality of Each of the logical ports has a diagonal matrix composed of a probability that a signal exists
  • I represents an identity matrix
  • ⁇ 2 represents white noise power
  • y 0 represents the second data signal.
  • the demodulation module is specifically configured to:
  • the last point of MMSE demodulation is used to obtain an estimated amount of the signal of the UE to be estimated as the third data signal.
  • the demodulation module is specifically configured to:
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports; x represents a transmission symbol of the first port and a transmission symbol of a logical port other than the first port Vector; Pr(x k ) represents the probability of x k in vector x. If x k is the signal of the UE to be estimated, then x k takes a value in the quadrature phase shift keying QPSK set. If x k is the interference signal, Then x k takes a value within the extended QPSK set; ⁇ 2 represents the white noise power; y 0 represents the second data signal.
  • the demodulation module is specifically configured to:
  • the preset probability estimation algorithm includes: a generalized maximum likelihood algorithm, a covariance metric algorithm, and a clustering algorithm.
  • FIG. 1 is a schematic diagram of a conventional ePDCCH signal detection process
  • FIG. 2 is a schematic diagram of an existing UE using an ECCE
  • FIG. 3 is a schematic flowchart of a signal detecting method according to an embodiment of the present invention.
  • FIG. 4 is a schematic block diagram of performing ePDCCH demodulation in an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a signal detecting apparatus according to an embodiment of the present invention.
  • FIG. 6 is a schematic flow chart of another signal detecting method according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of an extended QPSK set according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a tree search process according to an embodiment of the present invention.
  • FIG. 9 is a schematic structural diagram of another signal detecting apparatus according to an embodiment of the present invention.
  • the signal detection method provided by the embodiment of the present invention is described by using only the EPDCCH as an example. In the actual application, the method provided by the embodiment of the present invention may also be used for signal detection of other channels, and the present invention does not limit.
  • the core idea of the first solution is to determine whether there is an interference signal in the second data signal obtained by performing interference suppression combining on the first data signal in the received first signal, and when it is determined that the interference signal exists, the adoption can suppress or The interference suppression algorithm for canceling the interference signal demodulates the second data signal to detect the obtained detection signal.
  • the detailed method flow for performing signal detection is as follows:
  • Step 301 Receive a first signal from a first port of a control channel, the first port being one of a plurality of logical ports of a control channel, the first signal comprising a first pilot signal and a first data signal.
  • the ePDCCH of the UE to be estimated includes multiple ECCEs, and each ECCE corresponds to multiple logical ports.
  • the first port is a logical port to be detected, and the first signal received through the first port is a signal to be detected.
  • Step 302 Using the first pilot signal and respective demodulation dedicated pilots of the multiple logical ports, Channel estimation is performed on the plurality of logical ports respectively, and a first equivalent channel matrix of each of the plurality of logical ports is obtained.
  • the demodulation dedicated pilots of the multiple logical ports are preset by the UE, and the pre-set demodulation dedicated pilots of the plurality of logical ports can be acquired from the UE, and the first signal is utilized. And calculating a first equivalent channel matrix of the logical port by using a first pilot signal and a demodulation dedicated pilot of the logical port.
  • Step 303 Perform interference suppression combining calculation on the first data channel and the first equivalent channel matrix of each of the multiple logical ports by using a first equivalent channel matrix of each of the multiple logical ports, to obtain a second data signal, and A second equivalent channel matrix of each of the plurality of logical ports.
  • the interference suppression combining is to eliminate interference caused by signals of other cells to the first data signal.
  • the first signal, the first equivalent channel matrix of each of the multiple logical ports, and the interference covariance matrix may be utilized.
  • Ruu performs interference suppression combining calculation, where Ruu is a physical resource block (PRB) position indicated by a rate matching rule, and a statistical characteristic of inter-cell interference is calculated by using a first equivalent channel matrix of each of the plurality of logical ports.
  • PRB physical resource block
  • the interference suppression combining calculation is performed on the first equivalent channel matrix of each of the plurality of logical ports by using Ruu, and the second equivalent channel matrix of the plurality of logical ports is obtained.
  • Step 304 Determine, according to a preset probability estimation algorithm, whether an interference signal exists in the second data signal by using a second equivalent channel matrix of each of the plurality of logical ports, and a logical port used by the interference signal.
  • the specific process of determining whether there is an interference signal in the second data signal and determining the logical port used by the interference signal is as follows:
  • the first port is only included in a combination with the greatest probability of existence, it is determined that there is no interference signal in the second data signal;
  • the combination with the greatest probability of existence includes at least one logical port other than the first port, determining that an interference signal exists in the second data signal, and the at least one logical port is a logical port used by the interference signal.
  • the probability of existence of the combination is that each logical port in the combination has a signal and the logical port not included in the combination has no probability of signal existence.
  • the preset probability estimation algorithm includes, but is not limited to, any one of a generalized maximum likelihood estimation algorithm, a covariance measurement algorithm, and a clustering algorithm.
  • the estimation algorithm capable of calculating the existence probability of the combination is not limited thereto, and the present invention also includes other methods for calculating the existence probability of the combination.
  • Step 305a If there is an interference signal, demodulate the second data signal by using an interference suppression algorithm according to the second equivalent channel matrix of the first port and the second equivalent channel matrix of the logical port used by the interference signal. The third data signal.
  • the interference suppression algorithm includes, but is not limited to, a minimum mean square error algorithm, a symbol level interference cancellation algorithm, and a maximum likelihood algorithm. It is merely an enumeration here, as long as an algorithm capable of suppressing or eliminating interference signals can be used as the interference suppression algorithm of the present invention, and the scope of protection of the present invention is not limited thereto.
  • Step 305b If step 304 determines that there is no interference signal, according to the second equivalent channel matrix of the first port, the second data signal is demodulated by using a maximum ratio combining algorithm to obtain a third data signal.
  • Step 306 Perform descrambling and blind detection on the third data signal to obtain a detection signal.
  • the second data signal is regarded as an interference signal, and the interference suppression algorithm is used for demodulation.
  • the second data signal is regarded as an interference-free signal, and the MRC algorithm is used for demodulation, compared with the prior art. Due to the signal interference between multiple users, The signal detection method of this embodiment can reduce the bit error rate and ensure the detection quality of the signal.
  • the probability that the logical port presence signal in each combination and the logical port not included in the combination does not have a signal may be calculated by using any one of a generalized maximum likelihood estimation algorithm, a covariance measurement algorithm, and a clustering algorithm, that is, the combination The probability of existence.
  • the scope of protection of the present invention is not limited thereto.
  • the calculation method of the existence probability of the eight combinations is similar.
  • the calculation process of the existence probability of the combination is described below by taking only the interference signal in the port 109 and the absence of the interference signal in the port 108 and the port 110 as an example.
  • the likelihood probability that the port 109 has an interference signal (ie, the probability of existence of the combination) can be expressed as:
  • a similar method is used to calculate the likelihood ratios of the eight combinations, and the maximum probability is selected.
  • the combination of the maximum probability is assumed to be the signal of the interfering UE in the port 109, and the interference signal is not present in the port 108 and the port 110.
  • the decision result is: User scenario, and there is an interference UE, the stem The victim UE uses port109.
  • the MRC when it is determined that there is no interference signal, the MRC is used to demodulate the second data signal, and when it is determined that the interference signal exists, the interference suppression algorithm is used to demodulate the second data signal, so that the interference signal can be suppressed or eliminated during demodulation.
  • a signal detecting device is provided. As shown in FIG. 5, the specific implementation of the device can be referred to the description of the method section above, and the repeated description is omitted.
  • the device mainly includes:
  • the receiving module 501 is configured to receive a first signal from a first port of the control channel, where the first port is one of multiple logical ports of the control channel, where the first signal includes a first pilot signal and a first a data signal;
  • the channel estimation module 502 is configured to use the first pilot signal in the first signal and the demodulation dedicated pilot in each of the multiple logical ports received by the receiving module 501, respectively, to the multiple The logical port performs channel estimation to obtain a first equivalent channel matrix of each of the plurality of logical ports;
  • the interference suppression combining module 503 is configured to use the equivalent channel matrix of each of the multiple logical ports obtained by the channel estimation module 502, and the first equivalent of the first data signal and each of the multiple logical ports Performing interference suppression combining calculation on the channel matrix to obtain a second data signal and a second equivalent channel matrix of each of the plurality of logical ports;
  • the demodulation module 504 is configured to determine, according to a preset probability estimation algorithm, a second equivalent channel matrix of each of the plurality of logical ports obtained by the interference suppression combining module 503, whether interference exists in the second data signal a signal, and a logical port used by the interference signal, if there is an interference signal, according to the second equivalent channel matrix of the first port and the interference signal a second equivalent channel matrix of the logical port, using an interference suppression algorithm to demodulate the second data signal to obtain a third data signal;
  • the descrambling module 505 is configured to perform descrambling on the third data signal obtained by the demodulation module 504.
  • the blind detection module 506 is configured to perform blind detection on the signal obtained by descrambling the descrambling module 505 to obtain a detection signal.
  • the apparatus further includes an interference covariance matrix calculation module and a rate matching module, wherein
  • An interference covariance matrix calculation module configured to calculate an interference covariance matrix Ruu by using a first equivalent channel matrix of each of the plurality of logical ports obtained by the channel estimation module, which is a physical resource block indicated by a rate matching rule (Physical Resource Block) , PRB) location, using the first equivalent channel matrix of each of the plurality of logical ports to calculate the statistical characteristics of the inter-cell interference, which may be referred to the prior art, and will not be described in detail herein;
  • the rate matching module is configured to indicate, according to a preset rate matching rule, a location of a physical resource block of the control channel by the interference covariance matrix calculation module and the interference suppression combining module.
  • the interference suppression combining calculation is performed on the first equivalent channel matrix of each of the plurality of logical ports by using Ruu, and the second equivalent channel matrix of the plurality of logical ports is obtained.
  • the demodulation module 504 is further configured to:
  • the second data signal is demodulated by using a maximum ratio combining MRC algorithm according to the second equivalent channel matrix of the first port to obtain a third data signal.
  • the demodulation module 504 is specifically configured to:
  • the first port is only included in a combination with the highest probability of existence, determining that there is no interference signal in the second data signal;
  • the preset probability estimation algorithms include, but are not limited to, a generalized maximum likelihood algorithm, a covariance metric algorithm, and a clustering algorithm.
  • the interference suppression algorithm includes, but is not limited to, a minimum mean square error algorithm, a symbol level interference cancellation algorithm, and a maximum likelihood algorithm.
  • a device which mainly includes:
  • a receiver configured to receive a first signal from a first port of the control channel, the first port being one of a plurality of logical ports of the control channel, the first signal comprising a first pilot signal and a first Data signal
  • a processor configured to perform, by using the first pilot signal in the first signal received by the receiver and a demodulation dedicated pilot of each of the multiple logical ports, respectively, to the multiple logical ports Channel estimation, obtaining a first equivalent channel matrix of each of the plurality of logical ports, and using the first equivalent channel matrix of each of the plurality of logical ports, respectively, the first data signal and the multiple logical ports
  • the first equivalent channel matrix performs interference suppression combining calculation, and obtains a second data signal and a second equivalent channel matrix of each of the plurality of logical ports, and uses the plurality of logical ports according to a preset probability estimation algorithm a second equivalent channel matrix determining whether an interference signal exists in the second data signal, and a logical port used by the interference signal, if there is an interference signal, according to a second equivalent channel matrix of the first port And a second equivalent channel matrix of the logical port used by the interference signal, using an interference suppression algorithm to demodulate the second data signal to obtain a third data signal
  • the second data signal is demodulated by using a maximum ratio combining MRC algorithm according to the second equivalent channel matrix of the first port to obtain the third data. signal.
  • the interference suppression combining is to eliminate interference caused by signals of other cells to the first data signal.
  • the first signal, the first equivalent channel matrix of each of the multiple logical ports, and the interference covariance matrix may be utilized.
  • Ruu performs interference suppression combining calculation, where Ruu is a physical resource block (PRB) position indicated by a rate matching rule, and a statistical characteristic of inter-cell interference is calculated by using a first equivalent channel matrix of each of the plurality of logical ports.
  • PRB physical resource block
  • the interference suppression combining calculation is performed on the first equivalent channel matrix of each of the plurality of logical ports by using Ruu, and the second equivalent channel matrix of the plurality of logical ports is obtained.
  • the processor acquires all combinations of the first port and logical ports other than the first port, and each combination includes at least the first port;
  • the first port is only included in a combination with the highest probability of existence, determining that there is no interference signal in the second data signal;
  • the preset probability estimation algorithm includes, but is not limited to, any one of a generalized maximum likelihood estimation algorithm, a covariance measurement algorithm, and a clustering algorithm.
  • the method of calculating the existence probability of the combination is not limited thereto, and the present invention also includes other methods for calculating the existence probability of the combination.
  • the core idea of the second solution is: by calculating the probability that each of the plurality of logical ports of the control channel has a signal, according to the probability that each of the plurality of logical ports has a signal and the probability
  • the second equivalent channel matrix of each of the plurality of logical ports is demodulated by the second data signal obtained by performing interference suppression combining on the first data signal of the received first signal by using a set algorithm, and then detecting the obtained detection signal.
  • Step 601 Receive a first signal from a first port of the control channel, where the first port is one of a plurality of logical ports of the control channel, where the first signal includes a first pilot signal and a first data signal .
  • the ePDCCH of the UE to be estimated includes multiple ECCEs, and each ECCE corresponds to multiple logical ports.
  • the first port is a logical port to be detected, and the first signal received through the first port is a signal to be detected.
  • Step 602 Perform channel estimation on the multiple logical ports by using the first pilot signal and the demodulation dedicated pilots of the multiple logical ports respectively, and obtain a first first of each of the multiple logical ports. Effective channel matrix.
  • the demodulation dedicated pilots of the plurality of logical ports are preset by the UE, and the preset demodulation dedicated pilots of the plurality of logical ports are obtained from the UE, and the first signal is used.
  • the first pilot signal and the demodulation dedicated pilot of the logical port calculate a first equivalent channel matrix of the logical port.
  • Step 603 Perform interference suppression combining on the first data channel and the first equivalent channel matrix of each of the multiple logical ports by using a first equivalent channel matrix of each of the multiple logical ports to obtain second data. And a second equivalent channel matrix of each of the plurality of logical ports.
  • the interference suppression combining is to eliminate interference caused by signals of other cells to the first data signal.
  • the first signal, the first equivalent channel matrix of each of the multiple logical ports, and the interference covariance matrix may be utilized.
  • Ruu performs interference suppression combining calculation, where Ruu is a physical resource block (PRB) position indicated by a rate matching rule, and a statistical characteristic of inter-cell interference is calculated by using a first equivalent channel matrix of each of the plurality of logical ports.
  • PRB physical resource block
  • the first equivalent channel matrix of each of the multiple logical ports is dried by Ruu
  • the interference suppression merges to obtain a second equivalent channel matrix of each of the plurality of logical ports.
  • Step 604 Calculate, according to a preset probability estimation algorithm, a probability that each of the plurality of logical ports has a signal existence by using a second equivalent channel matrix of each of the plurality of logical ports.
  • the specific process is:
  • the preset probability estimation algorithm includes, but is not limited to, any one of a generalized maximum likelihood algorithm, an improved covariance metric algorithm, and an improved clustering algorithm.
  • the present invention also includes other algorithms that are capable of calculating the probability of a signal presence of a logical port.
  • calculating a sum of existence probabilities of the respective combinations as a first sum value selecting, from all the combinations, a combination of a certain logical port, and calculating a probability of existence of each selected combination
  • the ratio of the second sum value to the first sum value is taken as the probability that the logical port has a signal.
  • the probability of the signal presence of the first port is set to 1; if the logical port is not the first port, the probability that the logical port has a signal may be expressed as: Where P sum represents the sum of the probabilities of the existence of each combination of the first port and all the other logical ports except the first port, and P i is the i-th of all combinations including the current calculation logic The probability of existence of a combination of ports.
  • the logical ports that may have interference signals are por108, port109, and port110, respectively.
  • the three logical ports have eight combinations according to whether or not the interference signal exists.
  • the eight combinations include three ports.
  • P sum is the sum of the existence probabilities of the eight combinations.
  • P i is the i-th combination of port 109 in all possible combinations. Probability of existence. The calculation process of the probability that the signal presence of other logical ports is similar to this process, and will not be described here.
  • Step 605 Use a minimum mean square error MMSE, a symbol level interference cancellation SLIC, and a maximum likelihood ML according to a second equivalent channel matrix of each of the plurality of logical ports and a probability that each of the plurality of logical ports has a signal existence Any one of the signals demodulates the second data signal to obtain a third data signal.
  • Step 606 Perform descrambling and blind detection on the third data signal to obtain a detection signal.
  • the specific process of demodulating the second data signal using the improved MMSE algorithm is:
  • h 0 represents a second equivalent channel matrix of the first port
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports
  • V represents the plurality of logical ports
  • I represents an identity matrix
  • ⁇ 2 represents white noise power
  • y 0 represents the second data signal.
  • the logical port used by the UE to be estimated is port 107
  • the third data signal obtained by the demodulation may be expressed as:
  • H [h 107 h 108 h 109 h 110 ], consisting of the second equivalent channel matrix of port 107 , port 108, port 109 and port 110 , h 107 represents the second equivalent channel matrix of port 107 , and h 108 represents the port 108 a second equivalent channel matrix, h 109 represents a second equivalent channel matrix of port 109 , and h 110 represents a second equivalent channel matrix of port 110 ;
  • V is a diagonal matrix composed of the probability that each logical port has a signal, which is expressed as:
  • V diag ⁇ P 107 ,P 108 ,P 109 ,P 110 ⁇
  • the specific process of demodulating the first signal by using the SLIC is as follows:
  • the last point of MMSE demodulation is used to obtain an estimated amount of the signal of the UE to be estimated as the third data signal.
  • the specific process of the MMSE demodulation is similar to the process of using the improved MMSE to demodulate the received signal described in the first embodiment, and details are not described herein again.
  • the specific process of demodulating the first signal by using ML is as follows:
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports; x represents a transmission symbol of the first port and a transmission symbol of a logical port other than the first port Vector; Pr(x k ) represents the probability of x k in vector x. If x k is the signal of the UE to be estimated, then x k takes the value in the quadrature phase shift keyed QPSK set, if x k is the interference signal Then x k takes a value within the extended QPSK set; ⁇ 2 represents the white noise power; y 0 represents the second data signal.
  • x [x 0 , x 1 , x 2 , x 3 ] T
  • x 1 , x 2 , x 3 are interfering UE ePDCCH symbols, corresponding to ports 108, 109 and 110, respectively.
  • Pr(x k ) is the prior probability of a certain value of the symbol x k .
  • x 0 takes values in the QPSK set
  • x 1 , x 2 , and x 3 take values in the extended QPSK set
  • the extended QPSK set is as shown in FIG. 7 , that is, the constellation points in which the I road Q path is 0 are added.
  • the prior probabilities of x 2 , x 3 can be calculated similarly.
  • L(b i ) can be obtained using the "tree search” method.
  • the specific process is shown in Figure 8:
  • the ePDCCH symbol is selected for the surviving path
  • the LLR is calculated based on the survivor path.
  • the difference between the classic ML algorithm and the classic ML algorithm is that it needs to be based on the offset.
  • the selection of the interfering UE ePDCCH symbol surviving path is selected within the extended QPSK set and the prior probability needs to be considered.
  • the improved minimum mean is adopted. Any one of the square error MMSE, the improved symbol level interference cancellation SLIC, and the improved maximum likelihood ML demodulates the second data signal, thereby suppressing or eliminating the influence of the interference signal during demodulation, and improving the demodulation performance And improve the quality of signal detection.
  • a signal detecting device is provided.
  • the device mainly includes:
  • the receiving module 901 is configured to receive a first signal from a first port of the control channel, where the first port is one of multiple logical ports of the control channel, and the first signal includes a first pilot signal and a first a data signal;
  • the channel estimation module 902 is configured to use the first pilot signal in the first signal and the demodulation dedicated pilot in each of the multiple logical ports received by the receiving module 901, respectively, to the multiple The logical port performs channel estimation to obtain a first equivalent channel matrix of each of the plurality of logical ports;
  • An interference suppression combining module 903 configured to use the first equivalent channel matrix of each of the plurality of logical ports obtained by the channel estimation module 902, to the first data signal and the multiple logics Performing interference suppression combining calculation on each of the first equivalent channel matrices of the ports to obtain a second data signal and a second equivalent channel matrix of each of the plurality of logical ports;
  • a demodulation module 904 configured to calculate, according to a preset probability estimation algorithm, a signal corresponding to each of the plurality of logical ports by using a second equivalent channel matrix of each of the plurality of logical ports obtained by the interference suppression combining module a probability of existence, using a minimum mean square error MMSE, a symbol level interference cancellation SLIC, and a maximum likelihood according to a second equivalent channel matrix of each of the plurality of logical ports and a probability of existence of a signal of each of the plurality of logical ports Demodulating the second data signal by any one of the ML to obtain a third data signal;
  • the descrambling module 905 is configured to perform descrambling on the third data signal obtained by the demodulation module 904.
  • the blind detection module 906 is configured to perform blind detection on the signal obtained by descrambling the descrambling module 905 to obtain a detection signal.
  • the apparatus further includes an interference covariance matrix calculation module and a rate matching module, wherein
  • An interference covariance matrix calculation module configured to calculate an interference covariance matrix Ruu by using a first equivalent channel matrix of each of the plurality of logical ports obtained by the channel estimation module, which is a physical resource block indicated by a rate matching rule (Physical Resource Block) , PRB) location, using the first equivalent channel matrix of each of the plurality of logical ports to calculate the statistical characteristics of the inter-cell interference, which may be referred to the prior art, and will not be described in detail herein;
  • the rate matching module is configured to indicate, according to a preset rate matching rule, a location of a physical resource block of the control channel by the interference covariance matrix calculation module and the interference suppression combining module.
  • the interference suppression combining calculation is performed on the first equivalent channel matrix of each of the plurality of logical ports by using Ruu, and the second equivalent channel matrix of the plurality of logical ports is obtained.
  • the preset probability estimation algorithm comprises: any one of a generalized maximum likelihood algorithm, a covariance metric algorithm and a clustering algorithm.
  • the present invention also includes other algorithms that are capable of calculating the probability of a signal presence of a logical port.
  • the demodulation module is specifically configured to:
  • each At least the first port is included in the combination
  • the demodulation module demodulates the second data signal by using any one of a minimum mean square error MMSE, a symbol level interference cancellation SLIC and a maximum likelihood ML to obtain a third data signal, as follows:
  • the demodulation module demodulates the second data signal by using an improved minimum mean square error, specifically:
  • h 0 represents a second equivalent channel matrix of the first port
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports
  • V represents the plurality of Each of the logical ports has a diagonal matrix composed of a probability that a signal exists
  • I represents an identity matrix
  • ⁇ 2 represents white noise power
  • y 0 represents the second data signal.
  • the demodulation module uses the improved symbol level interference to cancel and demodulate the second data signal, specifically:
  • the last point of MMSE demodulation is used to obtain an estimated amount of the signal of the UE to be estimated as the third data signal.
  • the demodulation module uses the improved maximum likelihood demodulation second data signal, specifically:
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports; x represents a transmission symbol of the first port and a transmission symbol of a logical port other than the first port Vector; Pr(x k ) represents the probability of x k in vector x. If x k is the signal of the UE to be estimated, then x k takes a value in the quadrature phase shift keying QPSK set. If x k is the interference signal, Then x k takes a value within the extended QPSK set; ⁇ 2 represents the white noise power; y 0 represents the second data signal.
  • a device which mainly includes:
  • a receiver configured to receive a first signal from a first port of the control channel, the first port being one of a plurality of logical ports of the control channel, the first signal comprising a first pilot signal and a first Data signal
  • a processor configured to perform, by using the first pilot signal in the first signal received by the receiver and a demodulation dedicated pilot of each of the multiple logical ports, respectively, to the multiple logical ports Channel estimation, obtaining a first equivalent channel matrix of each of the plurality of logical ports; using the first equivalent channel matrix of each of the plurality of logical ports, respectively, the first data signal and the plurality of logical ports
  • the first equivalent channel matrix performs interference suppression combining to obtain a second data signal and a second equivalent channel matrix of each of the plurality of logical ports, according to a preset probability estimation algorithm, using each of the multiple logical ports
  • the second equivalent channel matrix respectively calculates a probability of existence of a signal of each of the plurality of logical ports; and a signal exists according to a second equivalent channel matrix of each of the plurality of logical ports and a signal of each of the plurality of logical ports Probability, using minimum mean square error MMSE, symbol
  • the second level signal is demodulated by any one of the number level interference cancellation
  • the interference suppression combining is to eliminate interference caused by signals of other cells to the first data signal.
  • the first signal, the first equivalent channel matrix of each of the multiple logical ports, and the interference covariance matrix may be utilized.
  • Ruu performs interference suppression combining calculation, where Ruu is a physical resource block (PRB) position indicated by a rate matching rule, and a statistical characteristic of inter-cell interference is calculated by using a first equivalent channel matrix of each of the plurality of logical ports.
  • PRB physical resource block
  • the interference suppression combining calculation is performed on the first equivalent channel matrix of each of the plurality of logical ports by using Ruu, and the second equivalent channel matrix of the plurality of logical ports is obtained.
  • the preset probability estimation algorithm includes, but is not limited to, any one of a generalized maximum likelihood algorithm, a covariance measurement algorithm, and a clustering algorithm.
  • the specific process of the processor calculating the probability that each of the plurality of logical ports has a signal existence is as follows:
  • the processor demodulates the second data signal by using any one of a minimum mean square error MMSE, a symbol level interference cancellation SLIC and a maximum likelihood ML to obtain a third data signal, as follows:
  • the specific process of the processor using the improved MMSE algorithm to demodulate the second data signal is:
  • h 0 represents a second equivalent channel matrix of the first port
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports
  • V represents the plurality of Each of the logical ports has a diagonal matrix composed of a probability that a signal exists
  • I represents an identity matrix
  • ⁇ 2 represents white noise power
  • y 0 represents the second data signal.
  • the specific process of the processor using the improved SLIC to demodulate the second data signal is as follows:
  • the last point of MMSE demodulation is used to obtain an estimated amount of the signal of the UE to be estimated as the third data signal.
  • the specific process of the MMSE demodulation is similar to the process of using the improved MMSE to demodulate the received signal described in the first embodiment, and details are not described herein again.
  • the specific process of the processor using the ML to demodulate the first signal is as follows:
  • H represents a matrix composed of a second equivalent channel matrix of each of the plurality of logical ports; x represents a transmission symbol of the first port and a transmission symbol of a logical port other than the first port Vector; Pr(x k ) represents the probability of x k in vector x. If x k is the signal of the UE to be estimated, then x k takes a value in the quadrature phase shift keyed QPSK set. If x k is the interference signal, Then x k takes a value within the extended QPSK set; ⁇ 2 represents the white noise power; y 0 represents the second data signal.
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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Abstract

本发明公开了一种信号检测方法及装置,用以在解调时能够抑制或消除干扰信号的影响,提高信号解调性能以及提高信号检测质量。第一种方法为:判断对接收的第一信号中的第一数据信号进行干扰抑制合并得到的第二数据信号中是否存在干扰信号,在确定存在干扰信号时,采用干扰抑制算法解调第二数据信号后检测获得检测信号;第二方法为:通过计算控制信道的多个逻辑端口各自的有信号存在的概率,根据该多个逻辑端口各自的有信号存在的概率以及该多个逻辑端口各自的第二等效信道矩阵,采用设定的算法对接收的第一信号中的第一数据信号进行干扰抑制合并得到的第二数据信号进行解调后,检测获得检测信号。

Description

一种信号检测方法及装置
本申请要求在2014年09月10日提交中国专利局、申请号为201410457520.5、发明名称为“一种信号检测方法及装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及通信技术领域,尤其涉及一种信号检测方法及装置。
背景技术
随着无线宽带通信技术的发展,用户对通信系统性能的要求不断提高。2004年底,第3代合作伙伴计划(3rd Generation Partnership Project,3GPP)启动了通用移动通信系统(Universal Mobile Telecommunications System,UMTS)的长期演进(Long Term Evolution,LTE)项目,其中,多输入多输出(Multiple-Input Multiple-Output,MIMO)和正交频分复用(Orthogonal Frequency Division Multiplex,OFDM)是LTE最关键的两个技术。
物理下行控制信道(Physical Downlink Control Channel,PDCCH)在LTE系统中扮演了非常重要的角色。PDCCH用来存放下行以及上行空口资源具体摆放位置以及该位置的重要参数的集合,同时还可以进行一些公共命令(例如功率控制消息)的发送。所有的用户设备(User Equipment,UE)都必须解PDCCH以获知是否有自身相关的资源。通俗的来讲,PDCCH是“指路牌”。LTE系统中一个子帧包含14个OFDM符号,PDCCH通常只能占用前3个符号,资源是十分有限的。随着LTE系统对多用户的输入输出(Multi-User MIMO,MU-MIMO)和多点协同(Coordinated Multiple Point,CoMP)等特性的支持,PDCCH有限的资源已经不能满足多个UE同时接入的需求。针对此问题,LTE引入了增强的PDCCH(enhanced PDCCH,ePDCCH)的概念,利用部分传输UE业务的资源(即第4-14个OFDM符号)传输控制信息。ePDCCH的编码和资源映射方式和PDCCH基本相同,差别在于,ePDCCH使用解调专用导频 (Demodulation Reference Signal,DMRS),所传数据要经过预编码,和物理下行共享信道(Physical Downlink Shared Channel,PDSCH)传输模式(Transmission Mode,TM)8和9类似。ePDCCH中也有端口(Port)的概念(类似TM8、TM9),可以使用的Port有4种,即107、108、109和110。
UE检测ePDCCH信号通常先做干扰抑制合并(Interference Rejection Combining,IRC),再做最大比合并(Maximum Ratio Combining,MRC)。对于ePDCCH多用户场景(即多个UE的ePDCCH信号在相同时频资源,不同的Port上传输),由于不同Port是相互正交的,IRC无法抑制其他UE的ePDCCH信号的干扰,这会增加MRC解调的误码率。
如图1所示,ePDCCH信号检测的具体过程如下:
第一,利用DMRS的接收信号做对应Port的信道估计;
第二,根据速率匹配规则指示的ePDCCH物理资源块(Physical Resource Block,PRB)位置计算小区间干扰的统计特性,即干扰协方差统计矩阵(Ruu);
第三,根据Ruu做IRC抑制小区间干扰(需要根据速率匹配模块给出的候选ePDCCH资源单元指示RE指示);
第四,根据IRC后的接收信号和等效信道估计做解调(现有技术使用MRC解调);
第五,对解调输出的对数似然比(Log Likelihood Ratio,LLR)解扰后做盲检测(即对所有可能的情况做维特比译码)。
IRC后的ePDCCH的接收信号可以表示为
y0=h0x0+ξ   (1)
其中h0是Port对应的等效信道矩阵,ξ是干扰和噪声的总和,x0是待估计的ePDCCH符号。做MRC解调,即计算x0的估计量
Figure PCTCN2015088061-appb-000001
此估计量用来计算LLR。
对于ePDCCH多用户场景,即多个UE的ePDCCH信号在相同时间和频率资源上传输,但是使用不同port,ePDCCH中最小的资源利用的逻辑单元被叫做增强控制信道单元(Enhanced Control Channel Element,ECCE),它由若干个RE组成。如图2所示,Port107是待估计ePDCCH使用的port(对应UE0),port108被UE1使用,两个UE的ePDCCH中ECCE0和ECCE1相互碰撞(即使用相同的时频资源)。最多可以有4个UE使用相同的时频资源,分别占用port107、108、109和110。对于多用户场景,式(1)可以重新写为:
Figure PCTCN2015088061-appb-000002
其中hi和xi是其它UE的等效信道矩阵和ePDCCH符号,求和号里最多有3项,表示最多3个干扰。因为port107、108、109和110是相互正交的,IRC算法中计算的Ruu不包括hixi,即IRC无法抑制UE间的干扰。从MRC的计算公式(2)可以看出,MRC没有考虑用户间干扰的存在(仅使得待估计ePDCCH信号能量最大,没有抑制干扰),导致解调时的误码率很高,不能保证ePDCCH信号的检测质量。
发明内容
本发明提供一种信号检测方法及装置,用以在解调时能够抑制或消除干扰信号的影响,提高信号解调性能以及提高信号检测质量。
本发明实施例提供的具体技术方案如下:
第一方面,本发明实施例提供了一种信号检测方法,包括:
从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
利用所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
利用所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号 以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口;
若存在干扰信号,则根据所述第一端口的第二等效信道矩阵以及所述干扰信号所使用的逻辑端口的第二等效信道矩阵,采用干扰抑制算法解调所述第二数据信号,得到第三数据信号;
对所述第三数据信号进行解扰以及盲检测,得到检测信号。
该实施例中,按照预设的概率估计算法,利用多个逻辑端口各自的第二等效信道矩阵判断干扰抑制合并得到的第二数据信号中是否存在干扰信号,在确定存在干扰信号时,采用干扰抑制算法解调第二数据信号,从而能够在信号解调时抑制或消除干扰信号的影响,提高信号解调性能以及提高信号检测质量。
结合第一方面,在第一种可能的实现方式中,所述方法还包括:
若不存在干扰信号,根据所述第一端口的第二等效信道矩阵,采用最大比合并MRC算法解调所述第二数据信号,得到第三数据信号。
结合第一方面或第一种可能的实现方式,在第二种可能的实现方式中,所述按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口,包括:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合的存在概率;
根据所有组合中存在概率最大的一个组合,确定所述第二数据信号中是 否存在干扰信号;
若所述存在概率最大的一个组合中只包含第一端口,则确定所述第二数据信号中不存在干扰信号;
若所述存在概率最大的一个组合中包含除所述第一端口外的至少一个逻辑端口,则确定所述第二数据信号中存在干扰信号,且所述至少一个逻辑端口为所述干扰信号所使用的逻辑端口。
结合第一方面的第二种可能的实现方式,在第三种可能的实现方式中,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
结合第一方面至第三种可能的实现方式中的任意一种,在第四种可能的实现方式中,所述干扰抑制算法包括:最小均方误差算法、符号级别干扰消除算法和最大似然算法。
第二方面,本发明实施例提供了一种信号检测方法,包括:
从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
利用所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
利用所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率;
根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号;
对所述第三数据信号进行解扰以及盲检测,得到检测信号。
该实施例中,通过计算多个逻辑端口各自的有信号存在的概率,根据多个逻辑端口各自的第二等效信道矩阵以及各自的有信号存在的概率,采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调干扰抑制合并得到的第二数据信号,从而能够在解调时抑制或消除干扰信号的影响,提高解调性能以及提高信号检测质量。
结合第二方面,在第一种可能的实现方式中,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE解调所述第二数据信号,得到第三数据信号,包括:
按照公式
Figure PCTCN2015088061-appb-000003
解调所述第二数据信号获得所述第三数据信号,其中,
Figure PCTCN2015088061-appb-000004
表示所述第三数据信号,h0表示所述第一端口的第二等效信道矩阵,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵,V表示所述多个逻辑端口各自的有信号存在的概率组成的对角矩阵,I表示单位矩阵,σ2表示白噪声功率,y0表示所述第二数据信号。
结合第二方面,在第二种可能的实现方式中,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用符号级别干扰消除SLIC解调所述第二数据信号,得到第三数据信号,包括:
根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用MMSE解调所述第二数据信号获得待估计UE的信号的估计量;
后续进行至少一次MMSE解调,并在后续的每次MMSE解调之前,计算所述第二数据信号与之前一次解调获得的待估计UE的信号的估计量的均值的差,将获得的差值作为本次MMSE解调的信号;
将最后一点MMSE解调获得待估计UE的信号的估计量作为所述第三数据信号。
结合第二方面,在第三种可能的实现方式中,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采 用最大似然ML解调所述第二数据信号,得到第三数据信号,包括:
按照公式
Figure PCTCN2015088061-appb-000005
解调所述第二数据信号获得所述第三数据信号中第i个比特bi对应的对数似然比L(bi);
其中,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵;x表示所述第一端口的发射符号和除所述第一端口之外的其它逻辑端口的发射符号组成的向量;Pr(xk)表示向量x中的xk的概率,若xk为待估计UE的信号,则xk在四相相移键控QPSK集合内取值,若xk为干扰信号,则xk在扩展QPSK集合内取值;σ2表示白噪声功率;y0表示所述第二数据信号。
结合第二方面至第三种可能的实现方式中的任意一种,在第四种可能的实现方式中,按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率,包括:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合存在的概率;
根据所述每个组合存在的概率以及所述多个逻辑端口各自所属的组合存在的概率,分别计算所述多个逻辑端口各自的有信号存在的概率。
结合第二方面的第四种可能的实现方式,在第五种可能的实现方式中,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
第三方面,本发明实施例提供了一种信号检测装置,包括:
接收模块,用于从控制信道的第一端口接收第一信号,所述第一端口为 所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
信道估计模块,用于利用所述接收模块接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
干扰抑制合并模块,用于利用所述信道估计模块获得的所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
解调模块,用于按照预设的概率估计算法,利用所述干扰抑制合并模块获得的所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口,若存在干扰信号,则根据所述第一端口的第二等效信道矩阵以及所述干扰信号所使用的逻辑端口的第二等效信道矩阵,采用干扰抑制算法解调所述第二数据信号,得到第三数据信号;
解扰模块,用于对所述解调模块得到的所述第三数据信号进行解扰;
盲检测模块,用于对所述解扰模块解扰后得到的信号进行盲检测,得到检测信号。
结合第三方面,在第一种可能的实现方式中,所述解调模块还用于:
若不存在干扰信号,根据所述第一端口的第二等效信道矩阵,采用最大比合并MRC算法解调所述第二数据信号,得到第三数据信号。
结合第三方面或第一种可能的实现方式,在第二种可能的实现方式中,所述解调模块具体用于:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合的存 在概率;
根据所有组合中存在概率最大的一个组合,确定所述第二数据信号中是否存在干扰信号;
若所述存在概率最大的一个组合中只包含第一端口,则确定所述第二数据信号中不存在干扰信号;
若所述存在概率最大的一个组合中包含除所述第一端口外的至少一个逻辑端口,则确定所述第二数据信号中存在干扰信号,且所述至少一个逻辑端口为所述干扰信号所使用的逻辑端口。
结合第三方面的第二种可能的实现方式,在第三种可能的实现方式中,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
结合第三方面至第三种可能的实现方式中的任意一种,在第四种可能的实现方式中,所述干扰抑制算法包括:最小均方误差算法、符号级别干扰消除算法和最大似然算法。
第四方面,本发明实施例提供了一种信号检测装置,包括:
接收模块,用于从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
信道估计模块,用于利用所述接收模块接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
干扰抑制合并模块,用于利用所述信道估计模块获得的所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
解调模块,用于按照预设的概率估计算法,利用所述干扰抑制合并模块获得的所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端 口各自的有信号存在的概率,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号;
解扰模块,用于对所述解调模块得到的所述第三数据信号进行解扰;
盲检测模块,用于对所述解扰模块解扰后得到的信号进行盲检测,得到检测信号。
结合第四方面,在第一种可能的实现方式中,所述解调模块具体用于:
按照公式
Figure PCTCN2015088061-appb-000006
解调所述第二数据信号获得所述第三数据信号,其中,
Figure PCTCN2015088061-appb-000007
表示所述第三数据信号,h0表示所述第一端口的第二等效信道矩阵,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵,V表示所述多个逻辑端口各自的有信号存在的概率组成的对角矩阵,I表示单位矩阵,σ2表示白噪声功率,y0表示所述第二数据信号。
结合第四方面,在第二种可能的实现方式中,所述解调模块具体用于:
根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用MMSE解调所述第二数据信号获得待估计UE的信号的估计量;
后续进行至少一次MMSE解调,并在后续的每次MMSE解调之前,计算所述第二数据信号与之前一次解调获得的待估计UE的信号的估计量的均值的差,将获得的差值作为本次MMSE解调的信号;
将最后一点MMSE解调获得待估计UE的信号的估计量作为所述第三数据信号。
结合第四方面,在第三种可能的实现方式中,所述解调模块具体用于:
按照公式
Figure PCTCN2015088061-appb-000008
解调所述第二数据信号获得所述第三数据信号中第i个比特bi对应的对数似然比L(bi);
其中,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵;x表示所述第一端口的发射符号和除所述第一端口之外的其它逻辑端口的发射符号组成的向量;Pr(xk)表示向量x中的xk的概率,若xk为待估计UE的信号,则xk在四相相移键控QPSK集合内取值,若xk为干扰信号,则xk在扩展QPSK集合内取值;σ2表示白噪声功率;y0表示所述第二数据信号。
结合第四方面至第三种可能的实现方式中的任意一种,在第四种可能的实现方式中,所述解调模块具体用于:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合存在的概率;
根据所述每个组合存在的概率以及所述多个逻辑端口各自所属的组合存在的概率,分别计算所述多个逻辑端口各自的有信号存在的概率。
结合第四方面的第四种可能的实现方式,在第五种可能的实现方式中,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
附图说明
图1为现有的ePDCCH信号检测过程示意图;
图2为现有的UE使用ECCE的示意图;
图3为本发明实施例中信号检测方法流程示意图;
图4为本发明实施例中进行ePDCCH解调的方框示意图;
图5为本发明实施例中信号检测装置结构示意图;
图6为本发明实施例中另一信号检测方法流程示意图;
图7为本发明实施例中扩展QPSK集合示意图;
图8为本发明实施例中树搜索过程示意图;
图9为本发明实施例中另一信号检测装置结构示意图。
具体实施方式
为了使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明作进一步地详细描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
以下实施例中,仅以EPDCCH为例对本发明实施例提供的信号检测方法进行说明,实际应用中,对于其它信道的信号检测也可以采用本发明实施例提供的方法,本发明并不以此为限。
针对现有EPDCCH信号检测过程中,在进行MRC解调时,多用户场景下无法抑制UE间的干扰所导致的ePDCCH解调性能差、误码率的高的问题,提出了以下解决方案。该解决方案也适用于其它控制信道的信号检测,并不限于ePDCCH。
第一种解决方案的核心思想为:判断对接收的第一信号中的第一数据信号进行干扰抑制合并得到的第二数据信号中是否存在干扰信号,在确定存在干扰信号时,采用能够抑制或消除干扰信号的干扰抑制算法对该第二数据信号进行解调后检测获得检测信号。
第一实施例中,如图3所示,进行信号检测的详细方法流程如下:
步骤301:从控制信道的第一端口接收第一信号,该第一端口为控制信道的多个逻辑端口中的一个,该第一信号包括第一导频信号和第一数据信号。
以控制信道为ePDCCH为例,待估计UE的ePDCCH包含多个ECCE,每个ECCE对应多个逻辑端口。其中,假设第一端口为待检测的逻辑端口,通过该第一端口接收的第一信号为待检测信号。
步骤302:利用该第一导频信号和该多个逻辑端口各自的解调专用导频, 分别对该多个逻辑端口进行信道估计,获得该多个逻辑端口各自的第一等效信道矩阵。
其中,本领域技术人员应当知道,多个逻辑端口各自的解调专用导频为UE预先设置的,从UE中可以获取多个逻辑端口各自的预先设置的解调专用导频,利用第一信号中的第一导频信号和该逻辑端口的解调专用导频,计算得到该逻辑端口的第一等效信道矩阵。
步骤303:利用该多个逻辑端口各自的第一等效信道矩阵,对第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及该多个逻辑端口各自的第二等效信道矩阵。
应当知道,干扰抑制合并是为了消除其他小区的信号对第一数据信号造成的干扰,具体实现中,可以利用第一信号,多个逻辑端口各自的第一等效信道矩阵,以及干扰协方差矩阵Ruu进行干扰抑制合并计算,其中,Ruu是根据速率匹配规则指示的物理资源块(Physical Resource Block,PRB)位置,利用多个逻辑端口各自的第一等效信道矩阵计算得到小区间干扰的统计特性,具体可以参考在先技术,这里不再详述。
具体地,利用Ruu对该多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到该多个逻辑端口的第二等效信道矩阵。
步骤304:按照预设的概率估计算法,利用该多个逻辑端口各自的第二等效信道矩阵确定第二数据信号中是否存在干扰信号,以及该干扰信号所使用的逻辑端口。
优选地,判断第二数据信号中是否存在干扰信号,以及确定干扰信号所使用的逻辑端口的具体过程如下:
获取第一端口与除第一端口之外的逻辑端口的所有组合,每个组合中至少包含第一端口;
分别针对每个组合,根据该每个组合中包含的各个逻辑端口的第二等效信道矩阵,按照预设的概率估计算法,计算该每个组合的存在概率;
根据所有组合中存在概率最大的一个组合,确定第二数据信号中是否存 在干扰信号;
若该存在概率最大的一个组合中只包含第一端口,则确定第二数据信号中不存在干扰信号;
若该存在概率最大的一个组合中包含除第一端口外的至少一个逻辑端口,则确定该第二数据信号中存在干扰信号,且该至少一个逻辑端口为干扰信号所使用的逻辑端口。
其中,组合的存在概率为该组合中的每个逻辑端口有信号存在且该组合中不包含的逻辑端口无信号存在的概率。
优选地,预设的概率估计算法包括但不限于:广义最大似然估计算法、协方差度量算法和聚类算法中的任意一种。实际应用中,能够计算组合的存在概率的估计算法并不仅限于此,对于其它能够计算得到组合的存在概率的方法,本发明也将其包括在内。
步骤305a:若存在干扰信号,则根据第一端口的第二等效信道矩阵以及干扰信号所使用的逻辑端口的第二等效信道矩阵,采用干扰抑制算法解调所述第二数据信号,得到第三数据信号。
优选地,干扰抑制算法包括但不限于:最小均方误差算法、符号级别干扰消除算法和最大似然算法。此处仅为列举,只要能够达到抑制或消除干扰信号的算法均可以作为本发明的干扰抑制算法,本发明的保护范围并不以此为限制。
步骤305b:若步骤304确定不存在干扰信号,根据第一端口的第二等效信道矩阵,采用最大比合并算法解调第二数据信号,得到第三数据信号。
步骤306:对第三数据信号进行解扰以及盲检测,得到检测信号。
需要说明的是,本实施例中,如果在步骤304中确定第二数据信号中存在多用户之间的信号干扰,则将第二数据信号视作一个干扰信号,采用干扰抑制算法进行解调,以抑制其中的干扰;如果在步骤304中确定第二数据信号中不存在其他用户的信号干扰,则将第二数据信号视作一个无干扰信号,利用MRC算法进行解调,相比现有技术,由于考虑了多用户之间的信号干扰, 本实施例的信号检测方法可以降低误码率,保证信号的检测质量。
在一个具体实施例中,如图4所示,以ePDCCH为例,假设待检测的逻辑端口为port107,需要判断在por108、port109和port110上是否存在干扰信号。具体过程如下:
针对某个ECCE,按照除了待检测的逻辑端口之外的其它三个逻辑端口是否存在干扰信号的可能性,得到8种组合,这8种组合中包括3个端口均不存在干扰信号的情况,可以采用广义最大似然估计算法、协方差度量算法和聚类算法中的任意一种计算每个组合中的逻辑端口存在信号且该组合中不包含的逻辑端口不存在信号的概率,即该组合的存在概率。此处仅为举例,本发明的保护范围并不依次为限。
8种组合的存在概率的计算方法类似,以下仅以port109中存在干扰信号,port108和port110中不存在干扰信号为例对组合的存在概率的计算过程进行说明。
在port109中存在干扰信号,port108和port110中不存在干扰信号时,第二数据信号可表示为:y0=h107x0+h109x1+n,其中,y0表示第二数据信号,h107表示port107的第二等效信道矩阵,h109表示port109的第二等效信道矩阵,n为白噪声,x0表示待检测逻辑端口的发射符号,x1表示存在干扰信号的逻辑端口的发射符号;
该第二数据信号可等价为均值为零,方差为A的高斯分布,其中,A=h107h107 *+h109h109 *2I;
Port109存在干扰信号的似然概率(即组合的存在概率)可表示为:
Figure PCTCN2015088061-appb-000009
采用类似的方法分别计算得到8种组合的似然概率,选择概率最大值,假设概率最大值对应的组合为port109存在干扰UE的信号,port108和port110中不存在干扰信号,则判决结果为:多用户场景,且存在一个干扰UE,该干 扰UE使用port109。
在确定为多用户场景且使用MMSE解调第一信号时,假设确定port108和port110存在干扰信号,待检测的逻辑端口为port107,则解调第二数据信号得到的第三数据信号可表示为:
Figure PCTCN2015088061-appb-000010
其中,H由port107、port108和port110的第二等效信道矩阵组成,表示为H=[h107 h108 h110],σ2表示白噪声功率,I表示单位矩阵,y0表示第二数据信号。
该实施例中,确定不存在干扰信号时,采用MRC解调第二数据信号,在确定存在干扰信号时,采用干扰抑制算法解调第二数据信号,从而能够在解调时抑制或消除干扰信号的影响,提高解调性能以及提高信号检测质量。
第二实施例中,基于与第一实施例相同的原理,提供了一种信号检测装置,如图5所示,该装置的具体实施可参见上述方法部分的描述,重复之处不再赘述,该装置主要包括:
接收模块501,用于从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
信道估计模块502,用于利用所述接收模块501接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
干扰抑制合并模块503,用于利用所述信道估计模块502获得的所述多个逻辑端口各自的等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
解调模块504,用于按照预设的概率估计算法,利用所述干扰抑制合并模块503获得的所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口,若存在干扰信号,则根据所述第一端口的第二等效信道矩阵以及所述干扰信号所使用 的逻辑端口的第二等效信道矩阵,采用干扰抑制算法解调所述第二数据信号,得到第三数据信号;
解扰模块505,用于对所述解调模块504得到的所述第三数据信号进行解扰;
盲检测模块506,用于对所述解扰模块505解扰后得到的信号进行盲检测,得到检测信号。
优选地,该装置还包括干扰协方差矩阵计算模块和速率匹配模块,其中,
干扰协方差矩阵计算模块,用于利用信道估计模块得到的所述多个逻辑端口各自的第一等效信道矩阵计算干扰协方差矩阵Ruu,是根据速率匹配规则指示的物理资源块(Physical Resource Block,PRB)位置,利用多个逻辑端口各自的第一等效信道矩阵计算得到小区间干扰的统计特性,具体可以参考在先技术,这里不再详述;
速率匹配模块,用于根据预设的速率匹配规则为干扰协方差矩阵计算模块和干扰抑制合并模块指示控制信道的物理资源块位置。
具体地,利用Ruu对该多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到该多个逻辑端口的第二等效信道矩阵。
其中,解调模块504还用于:
若不存在干扰信号,根据所述第一端口的第二等效信道矩阵,采用最大比合并MRC算法解调所述第二数据信号,获得第三数据信号。
优选地,解调模块504具体用于:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合的存在概率;
根据所有组合中存在概率最大的一个组合,确定所述第二数据信号中是否存在干扰信号;
若所述存在概率最大的一个组合中只包含第一端口,则确定所述第二数据信号中不存在干扰信号;
若所述存在概率最大的一个组合中包含除所述第一端口外的至少一个逻辑端口,则确定所述第二数据信号中存在干扰信号,且所述至少一个逻辑端口为所述干扰信号所使用的逻辑端口。
优选地,预设的概率估计算法包括但不限于:广义最大似然算法、协方差度量算法和聚类算法。
优选地,干扰抑制算法包括但不限于:最小均方误差算法、符号级别干扰消除算法和最大似然算法。
基于与第一、第二实施例相同的原理,第三实施例中,提供了一种设备,该设备主要包括:
接收器,用于从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
处理器,用于利用所述接收器接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵,利用所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵,按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口,若存在干扰信号,则根据所述第一端口的第二等效信道矩阵以及所述干扰信号所使用的逻辑端口的第二等效信道矩阵,采用干扰抑制算法解调所述第二数据信号,得到第三数据信号,对所述第三数据信息进行解扰以及盲检测,得到检测信号。
具体地,处理器若确定不存在干扰信号,根据所述第一端口的第二等效信道矩阵,采用最大比合并MRC算法解调所述第二数据信号,得到第三数据 信号。
应当知道,干扰抑制合并是为了消除其他小区的信号对第一数据信号造成的干扰,具体实现中,可以利用第一信号,多个逻辑端口各自的第一等效信道矩阵,以及干扰协方差矩阵Ruu进行干扰抑制合并计算,其中,Ruu是根据速率匹配规则指示的物理资源块(Physical Resource Block,PRB)位置,利用多个逻辑端口各自的第一等效信道矩阵计算得到小区间干扰的统计特性,具体可以参考在先技术,这里不再详述。
具体地,利用Ruu对该多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到该多个逻辑端口的第二等效信道矩阵。
优选地,处理器获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合的存在概率;
根据所有组合中存在概率最大的一个组合,确定所述第二数据信号中是否存在干扰信号;
若所述存在概率最大的一个组合中只包含第一端口,则确定所述第二数据信号中不存在干扰信号;
若所述存在概率最大的一个组合中包含除所述第一端口外的至少一个逻辑端口,则确定所述第二数据信号中存在干扰信号,且所述至少一个逻辑端口为所述干扰信号所使用的逻辑端口。
优选地,预设的概率估计算法包括但不限于:广义最大似然估计算法、协方差度量算法和聚类算法中的任意一种。实际应用中,计算组合的存在概率的方法并不仅限于此,对于其它能够计算得到组合的存在概率的方法,本发明也将其包括在内。
第二种解决方案的核心思想为:通过计算控制信道的多个逻辑端口各自的有信号存在的概率,根据该多个逻辑端口各自的有信号存在的概率以及该 多个逻辑端口各自的第二等效信道矩阵,采用设定的算法对接收的第一信号中的第一数据信号进行干扰抑制合并得到的第二数据信号进行解调后,检测获得检测信号。
第四实施例中,如图6所示,进行信号检测的详细方法流程如下:
步骤601:从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号。
以控制信道为ePDCCH为例,待估计UE的ePDCCH包含多个ECCE,每个ECCE对应多个逻辑端口。其中,假设第一端口为待检测的逻辑端口,通过该第一端口接收的第一信号为待检测信号。
步骤602:利用所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵。
其中,本领域技术人员应当知道,多个逻辑端口各自的解调专用导频为UE预先设置的,从UE中获取多个逻辑端口各自的预先设置的解调专用导频,利用第一信号中的第一导频信号和该逻辑端口的解调专用导频,计算得到该逻辑端口的第一等效信道矩阵。
步骤603:利用所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵。
应当知道,干扰抑制合并是为了消除其他小区的信号对第一数据信号造成的干扰,具体实现中,可以利用第一信号,多个逻辑端口各自的第一等效信道矩阵,以及干扰协方差矩阵Ruu进行干扰抑制合并计算,其中,Ruu是根据速率匹配规则指示的物理资源块(Physical Resource Block,PRB)位置,利用多个逻辑端口各自的第一等效信道矩阵计算得到小区间干扰的统计特性,具体可以参考在先技术,这里不再详述。
具体地,利用Ruu对所述多个逻辑端口各自的第一等效信道矩阵进行干 扰抑制合并,得到所述多个逻辑端口各自的第二等效信道矩阵。
步骤604:按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率。
优选地,计算所述多个逻辑端口各自的有信号存在的概率,具体过程为:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合存在的概率;
根据所述每个组合存在的概率以及所述多个逻辑端口各自所属的组合存在的概率,分别计算所述多个逻辑端口各自的有信号存在的概率。
优选地,预设的概率估计算法包括但不限于:广义最大似然算法、改进的协方差度量算法和改进的聚类算法中的任意一种。此处仅为举例,对于其它能够计算逻辑端口的有信号存在的概率的算法,本发明也将其包括在内。
一个具体实施中,计算所述所有组合各自的存在概率的和,作为第一和值;从所述所有组合中选择包含某一逻辑端口各组合,计算选择得到的各组合各自的存在的概率的和,作为第二和值,将第二和值与第一和值的比值作为该逻辑端口的有信号存在的概率。
假设采用改进的广义最大似然方法计算各逻辑端口的有信号存在的概率。其中,第一端口的有信号存在的概率设为1;若逻辑端口不是第一端口,该逻辑端口的有信号存在的概率可表示为:
Figure PCTCN2015088061-appb-000011
其中,Psum表示第一端口与除第一端口之外的其它各逻辑端口的所有组合中、每个组合的存在的概率的和,Pi是该所有组合中第i个包含当前计算的逻辑端口的组合的存在概率。
假设第一端口为port107,可能存在干扰信号的逻辑端口分别为por108、 port109和port110,该三个逻辑端口按照干扰信号是否存在的所有可能性有8种组合,这8种组合中包括3个端口均不存在干扰信号的情况,Psum为这8种组合各自的存在概率的和,假设计算port109的有信号存在的概率,则Pi为该所有可能的组合中包含port109的第i个组合的存在概率。其它逻辑端口的有信号存在的概率的计算过程与此过程类似,此处不再赘述。
步骤605:根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号。
步骤606:对所述第三数据信号进行解扰以及盲检测,得到检测信号。
第一具体实施方式中,采用改进的MMSE算法解调第二数据信号的具体过程为:
按照公式
Figure PCTCN2015088061-appb-000012
解调第二数据信号获得第三数据信号,其中,
Figure PCTCN2015088061-appb-000013
表示第三数据信号,h0表示所述第一端口的第二等效信道矩阵,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵,V表示所述多个逻辑端口各自的有信号存在的概率组成的对角矩阵,I表示单位矩阵,σ2表示白噪声功率,y0表示所述第二数据信号。
例如,假设待估计UE使用的逻辑端口为port107,port108、port109和port110中可能存在干扰信号,该解调得到的第三数据信号可表示为:
Figure PCTCN2015088061-appb-000014
其中,H=[h107 h108 h109 h110],由port107、port108、port109和port110的第二等效信道矩阵组成,h107表示port107的第二等效信道矩阵,h108表示port108的第二等效信道矩阵,h109表示port109的第二等效信道矩阵,h110表示port110的第二等效信道矩阵;
其中,V为由各逻辑端口各自的有信号存在的概率组成的对角矩阵,表示为:
V=diag{P107,P108,P109,P110}
=diag{1,P108,P109,P110}。
第二具体实施方式中,采用SLIC解调第一信号的具体过程如下:
根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用MMSE解调所述第二数据信号获得待估计UE的信号的估计量;
后续进行至少一次MMSE解调,并在后续的每次MMSE解调之前,计算第二数据信号与之前一次解调获得的待估计UE的信号的估计量的均值的差,将获得的差值作为本次MMSE解调的信号;
将最后一点MMSE解调获得待估计UE的信号的估计量作为所述第三数据信号。
其中,每次MMSE解调的具体过程与第一具体实施例中描述的采用改进的MMSE解调接收信号的过程相似,此处不再赘述。
第三具体实施方式中,采用ML解调第一信号的具体过程如下:
按照公式
Figure PCTCN2015088061-appb-000015
解调第二数据信号获得第三数据信号中第i个比特bi对应的对数似然比L(bi);
其中,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵;x表示所述待第一端口的发射符号和除所述第一端口之外的其它逻辑端口的发射符号组成的向量;Pr(xk)表示向量x中的xk的概率,若xk为待估计UE的信号,则xk在四相相移键控QPSK集合内取值,若xk为干扰信号,则xk在扩展QPSK集合内取值;σ2表示白噪声功率;y0表示所述第二数据信号。
以ePDCCH为例,假设待估计ePDCCH符号x0第i个比特(ePDCCH信 号使用四相相移键控(Quadrature Phase Shift Keying,QPSK)调制,因此i可以取1和2)bi对应的LLR可以表示为:
Figure PCTCN2015088061-appb-000016
类似于经典ML算法,做max-log简化,得到
Figure PCTCN2015088061-appb-000017
其中x=[x0,x1,x2,x3]T,x1,x2,x3是干扰UE ePDCCH符号,分别对应port108、109和110。Pr(xk)是符号xk某个取值的先验概率。x0在QPSK集合内取值,x1,x2,x3在扩展QPSK集合内取值,扩展QPSK集合如图7所示,即增加了I路Q路都为0的星座点。
图7中的中心星座点(I路Q路都为0的点)的先验概率为(不失一般性,以x1为例):
Pr(x1)=1-P108
其它四个星座点的先验概率相等,可以表示为:
Figure PCTCN2015088061-appb-000018
x2,x3的先验概率可以类似计算。
从简化后的L(bi)表达式可以看出,基于ML的统一解调和经典ML解调的差别仅在于求取LLR的时候需要考虑干扰UE PDCCH符号取值的先验概率,具体而言,需要增加偏移量
Figure PCTCN2015088061-appb-000019
为了简化计算复杂度,和经典ML解调类似,可以用“树搜索”的方法求取L(bi)。具体流程如图8所示:
首先,对第二数据信号和第二等效信道矩阵进行预处理,例如QR分解;
其次,对待估计ePDCCH符号选择幸存路径;
然后,根据先验概率,分别对干扰ePDCCH符号选择幸存路径;
最后,根据幸存路径计算LLR。
与经典ML算法的差别主要在于:需要根据偏移量
Figure PCTCN2015088061-appb-000020
在扩展QPSK集合内选择选择干扰UE ePDCCH符号幸存路径,并且需要考虑先验概率。
该实施例中,通过计算多个逻辑端口各自的有信号存在的概率,根据多个逻辑端口各自的第二等效信道矩阵以及多个逻辑端口各自的有信号存在的概率,采用改进的最小均方误差MMSE、改进的符号级别干扰消除SLIC和改进的最大似然ML中的任意一种解调所述第二数据信号,从而能够在解调时抑制或消除干扰信号的影响,提高解调性能以及提高信号检测质量。
基于与第四实施相同的原理,第五实施例中,提供了一种信号检测装置,该装置的具体实施可参见第四实施例中方法描述,重复之处不再赘述,如图9所示,该装置主要包括:
接收模块901,用于从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
信道估计模块902,用于利用所述接收模块901接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
干扰抑制合并模块903,用于利用所述信道估计模块902获得的所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑 端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
解调模块904,用于按照预设的概率估计算法,利用所述干扰抑制合并模块获得的所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号;
解扰模块905,用于对所述解调模块904得到的所述第三数据信号进行解扰;
盲检测模块906,用于对所述解扰模块905解扰后得到的信号进行盲检测,得到检测信号。
优选地,该装置还包括干扰协方差矩阵计算模块和速率匹配模块,其中,
干扰协方差矩阵计算模块,用于利用信道估计模块得到的所述多个逻辑端口各自的第一等效信道矩阵计算干扰协方差矩阵Ruu,是根据速率匹配规则指示的物理资源块(Physical Resource Block,PRB)位置,利用多个逻辑端口各自的第一等效信道矩阵计算得到小区间干扰的统计特性,具体可以参考在先技术,这里不再详述;
速率匹配模块,用于根据预设的速率匹配规则为干扰协方差矩阵计算模块和干扰抑制合并模块指示控制信道的物理资源块位置。
具体地,利用Ruu对该多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到该多个逻辑端口的第二等效信道矩阵。
优选地,预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法中的任意一种。此处仅为举例,对于其它能够计算逻辑端口的有信号存在的概率的算法,本发明也将其包括在内。
优选地,所述解调模块具体用于:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个 组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合存在的概率;
根据所述每个组合存在的概率以及所述多个逻辑端口各自所属的组合存在的概率,分别计算所述多个逻辑端口各自的有信号存在的概率。
优选地,解调模块采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号,具体如下:
第一具体实施方式中,解调模块采用改进的最小均方误差解调第二数据信号,具体为:
按照公式
Figure PCTCN2015088061-appb-000021
解调所述第二数据信号获得所述第三数据信号,其中,
Figure PCTCN2015088061-appb-000022
表示所述第三数据信号,h0表示所述第一端口的第二等效信道矩阵,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵,V表示所述多个逻辑端口各自的有信号存在的概率组成的对角矩阵,I表示单位矩阵,σ2表示白噪声功率,y0表示所述第二数据信号。
第二具体实施方式中,解调模块采用改进的符号级别干扰消除解调第二数据信号,具体为:
根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用MMSE解调所述第二数据信号获得待估计UE的信号的估计量;
后续进行至少一次MMSE解调,并在后续的每次MMSE解调之前,计算所述第二数据信号与之前一次解调获得的待估计UE的信号的估计量的均值的差,将获得的差值作为本次MMSE解调的信号;
将最后一点MMSE解调获得待估计UE的信号的估计量作为所述第三数据信号。
第三具体实施方式中,解调模块采用改进的最大似然解调第二数据信号,具体为:
按照公式
Figure PCTCN2015088061-appb-000023
解调所述第二数据信号获得所述第三数据信号中第i个比特bi对应的对数似然比L(bi);
其中,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵;x表示所述第一端口的发射符号和除所述第一端口之外的其它逻辑端口的发射符号组成的向量;Pr(xk)表示向量x中的xk的概率,若xk为待估计UE的信号,则xk在四相相移键控QPSK集合内取值,若xk为干扰信号,则xk在扩展QPSK集合内取值;σ2表示白噪声功率;y0表示所述第二数据信号。
基于与第四、第五实施例相同的原理,第六实施例中,提供了一种设备,该设备主要包括:
接收器,用于从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
处理器,用于利用所述接收器接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;利用所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵,按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率;根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE、符 号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号;对所述第三数据信号进行解扰以及盲检测,得到检测信号。
应当知道,干扰抑制合并是为了消除其他小区的信号对第一数据信号造成的干扰,具体实现中,可以利用第一信号,多个逻辑端口各自的第一等效信道矩阵,以及干扰协方差矩阵Ruu进行干扰抑制合并计算,其中,Ruu是根据速率匹配规则指示的物理资源块(Physical Resource Block,PRB)位置,利用多个逻辑端口各自的第一等效信道矩阵计算得到小区间干扰的统计特性,具体可以参考在先技术,这里不再详述。
具体地,利用Ruu对该多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到该多个逻辑端口的第二等效信道矩阵。
优选地,预设的概率估计算法包括但不限于:广义最大似然算法、协方差度量算法和聚类算法中的任意一种。
优选地,处理器计算所述多个逻辑端口各自的有信号存在的概率的具体过程如下:
获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合存在的概率;
根据所述每个组合存在的概率以及所述多个逻辑端口各自所属的组合存在的概率,分别计算所述多个逻辑端口各自的有信号存在的概率。
优选地,处理器采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号,具体如下:
第一具体实施方式中,处理器采用改进的MMSE算法解调第二数据信号的具体过程为:
按照公式
Figure PCTCN2015088061-appb-000024
解调所述第二数据信号获得所述第三数据信号,其中,
Figure PCTCN2015088061-appb-000025
表示所述第三数据信号,h0表示所述第一端口的第二等效信道矩阵,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵,V表示所述多个逻辑端口各自的有信号存在的概率组成的对角矩阵,I表示单位矩阵,σ2表示白噪声功率,y0表示所述第二数据信号。
第二具体实施方式中,处理器采用改进的SLIC解调第二数据信号的具体过程如下:
根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用MMSE解调所述第二数据信号获得待估计UE的信号的估计量;
后续进行至少一次MMSE解调,并在后续的每次MMSE解调之前,计算所述第二数据信号与之前一次解调获得的待估计UE的信号的估计量的均值的差,将获得的差值作为本次MMSE解调的信号;
将最后一点MMSE解调获得待估计UE的信号的估计量作为所述第三数据信号。
其中,每次MMSE解调的具体过程与第一具体实施例中描述的采用改进的MMSE解调接收信号的过程相似,此处不再赘述。
第三具体实施方式中,处理器采用ML解调第一信号的具体过程如下:
按照公式
Figure PCTCN2015088061-appb-000026
解调所述第二数据信号获得所述第三数据信号中第i个比特bi对应的对数似然比L(bi);
其中,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵;x表示所述第一端口的发射符号和除所述第一端口之外的其它逻辑端口的发射符号组成的向量;Pr(xk)表示向量x中的xk的概率,若xk为待估计UE的信 号,则xk在四相相移键控QPSK集合内取值,若xk为干扰信号,则xk在扩展QPSK集合内取值;σ2表示白噪声功率;y0表示所述第二数据信号。
本领域内的技术人员应明白,本发明的实施例可提供为方法、系统、或计算机程序产品。因此,本发明可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器和光学存储器等)上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要 求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。

Claims (22)

  1. 一种信号检测方法,其特征在于,包括:
    从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
    利用所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
    利用所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
    按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口;
    若存在干扰信号,则根据所述第一端口的第二等效信道矩阵以及所述干扰信号所使用的逻辑端口的第二等效信道矩阵,采用干扰抑制算法解调所述第二数据信号,得到第三数据信号;
    对所述第三数据信号进行解扰以及盲检测,得到检测信号。
  2. 如权利要求1所述的方法,其特征在于,所述方法还包括:
    若不存在干扰信号,根据所述第一端口的第二等效信道矩阵,采用最大比合并MRC算法解调所述第二数据信号,得到第三数据信号。
  3. 如权利要求1或2所述的方法,其特征在于,所述按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口,包括:
    获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
    分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的 第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合的存在概率;
    根据所有组合中存在概率最大的一个组合,确定所述第二数据信号中是否存在干扰信号;
    若所述存在概率最大的一个组合中只包含第一端口,则确定所述第二数据信号中不存在干扰信号;
    若所述存在概率最大的一个组合中包含除所述第一端口外的至少一个逻辑端口,则确定所述第二数据信号中存在干扰信号,且所述至少一个逻辑端口为所述干扰信号所使用的逻辑端口。
  4. 如权利要求3所述的方法,其特征在于,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
  5. 如权利要求1至4任一所述的方法,其特征在于,所述干扰抑制算法包括:最小均方误差算法、符号级别干扰消除算法和最大似然算法。
  6. 一种信号检测方法,其特征在于,包括:
    从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
    利用所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
    利用所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
    按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率;
    根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号;
    对所述第三数据信号进行解扰以及盲检测,得到检测信号。
  7. 如权利要求6所述的方法,其特征在于,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE解调所述第二数据信号,得到第三数据信号,包括:
    按照公式
    Figure PCTCN2015088061-appb-100001
    解调所述第二数据信号获得所述第三数据信号,其中,
    Figure PCTCN2015088061-appb-100002
    表示所述第三数据信号,h0表示所述第一端口的第二等效信道矩阵,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵,V表示所述多个逻辑端口各自的有信号存在的概率组成的对角矩阵,I表示单位矩阵,σ2表示白噪声功率,y0表示所述第二数据信号。
  8. 如权利要求6所述的方法,其特征在于,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用符号级别干扰消除SLIC解调所述第二数据信号,得到第三数据信号,包括:
    根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用MMSE解调所述第二数据信号获得待估计UE的信号的估计量;
    后续进行至少一次MMSE解调,并在后续的每次MMSE解调之前,计算所述第二数据信号与之前一次解调获得的待估计UE的信号的估计量的均值的差,将获得的差值作为本次MMSE解调的信号;
    将最后一点MMSE解调获得待估计UE的信号的估计量作为所述第三数据信号。
  9. 如权利要求6所述的方法,其特征在于,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最大似然ML解调所述第二数据信号,得到第三数据信号,包括:
    按照公式
    Figure PCTCN2015088061-appb-100003
    解调所 述第二数据信号获得所述第三数据信号中第i个比特bi对应的对数似然比L(bi);
    其中,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵;x表示所述第一端口的发射符号和除所述第一端口之外的其它逻辑端口的发射符号组成的向量;Pr(xk)表示向量x中的xk的概率,若xk为待估计UE的信号,则xk在四相相移键控QPSK集合内取值,若xk为干扰信号,则xk在扩展QPSK集合内取值;σ2表示白噪声功率;y0表示所述第二数据信号。
  10. 如权利要求6-9任一项所述的方法,其特征在于,按照预设的概率估计算法,利用所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率,包括:
    获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
    分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合存在的概率;
    根据所述每个组合存在的概率以及所述多个逻辑端口各自所属的组合存在的概率,分别计算所述多个逻辑端口各自的有信号存在的概率。
  11. 如权利要求10所述的方法,其特征在于,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
  12. 一种信号检测装置,其特征在于,包括:
    接收模块,用于从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
    信道估计模块,用于利用所述接收模块接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
    干扰抑制合并模块,用于利用所述信道估计模块获得的所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
    解调模块,用于按照预设的概率估计算法,利用所述干扰抑制合并模块获得的所述多个逻辑端口各自的第二等效信道矩阵确定所述第二数据信号中是否存在干扰信号,以及所述干扰信号所使用的逻辑端口,若存在干扰信号,则根据所述第一端口的第二等效信道矩阵以及所述干扰信号所使用的逻辑端口的第二等效信道矩阵,采用干扰抑制算法解调所述第二数据信号,得到第三数据信号;
    解扰模块,用于对所述解调模块得到的所述第三数据信号进行解扰;
    盲检测模块,用于对所述解扰模块解扰后得到的信号进行盲检测,得到检测信号。
  13. 如权利要求12所述的装置,其特征在于,所述解调模块还用于:
    若不存在干扰信号,根据所述第一端口的第二等效信道矩阵,采用最大比合并MRC算法解调所述第二数据信号,得到第三数据信号。
  14. 如权利要求12或13所述的装置,其特征在于,所述解调模块具体用于:
    获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
    分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合的存在概率;
    根据所有组合中存在概率最大的一个组合,确定所述第二数据信号中是否存在干扰信号;
    若所述存在概率最大的一个组合中只包含第一端口,则确定所述第二数据信号中不存在干扰信号;
    若所述存在概率最大的一个组合中包含除所述第一端口外的至少一个逻辑端口,则确定所述第二数据信号中存在干扰信号,且所述至少一个逻辑端口为所述干扰信号所使用的逻辑端口。
  15. 如权利要求14所述的装置,其特征在于,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
  16. 如权利要求12-15任一项所述的装置,其特征在于,所述干扰抑制算法包括:最小均方误差算法、符号级别干扰消除算法和最大似然算法。
  17. 一种信号检测装置,其特征在于,包括:
    接收模块,用于从控制信道的第一端口接收第一信号,所述第一端口为所述控制信道的多个逻辑端口中的一个,所述第一信号包括第一导频信号和第一数据信号;
    信道估计模块,用于利用所述接收模块接收的所述第一信号中的所述第一导频信号和所述多个逻辑端口各自的解调专用导频,分别对所述多个逻辑端口进行信道估计,获得所述多个逻辑端口各自的第一等效信道矩阵;
    干扰抑制合并模块,用于利用所述信道估计模块获得的所述多个逻辑端口各自的第一等效信道矩阵,对所述第一数据信号以及所述多个逻辑端口各自的第一等效信道矩阵进行干扰抑制合并计算,得到第二数据信号以及所述多个逻辑端口各自的第二等效信道矩阵;
    解调模块,用于按照预设的概率估计算法,利用所述干扰抑制合并模块获得的所述多个逻辑端口各自的第二等效信道矩阵分别计算所述多个逻辑端口各自的有信号存在的概率,根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用最小均方误差MMSE、符号级别干扰消除SLIC和最大似然ML中的任意一种解调所述第二数据信号,得到第三数据信号;
    解扰模块,用于对所述解调模块得到的所述第三数据信号进行解扰;
    盲检测模块,用于对所述解扰模块解扰后得到的信号进行盲检测,得到检测信号。
  18. 如权利要求17所述的装置,其特征在于,所述解调模块具体用于:
    按照公式
    Figure PCTCN2015088061-appb-100004
    解调所述第二数据信号获得所述第三数据信号,其中,
    Figure PCTCN2015088061-appb-100005
    表示所述第三数据信号,h0表示所述第一端口的第二等效信道矩阵,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵,V表示所述多个逻辑端口各自的有信号存在的概率组成的对角矩阵,I表示单位矩阵,σ2表示白噪声功率,y0表示所述第二数据信号。
  19. 如权利要求17所述的装置,其特征在于,所述解调模块具体用于:
    根据所述多个逻辑端口各自的第二等效信道矩阵以及所述多个逻辑端口各自的有信号存在的概率,采用MMSE解调所述第二数据信号获得待估计UE的信号的估计量;
    后续进行至少一次MMSE解调,并在后续的每次MMSE解调之前,计算所述第二数据信号与之前一次解调获得的待估计UE的信号的估计量的均值的差,将获得的差值作为本次MMSE解调的信号;
    将最后一点MMSE解调获得待估计UE的信号的估计量作为所述第三数据信号。
  20. 如权利要求17所述的装置,其特征在于,所述解调模块具体用于:
    按照公式
    Figure PCTCN2015088061-appb-100006
    解调所述第二数据信号获得所述第三数据信号中第i个比特bi对应的对数似然比L(bi);
    其中,H表示所述多个逻辑端口各自的第二等效信道矩阵组成的矩阵;x表示所述第一端口的发射符号和除所述第一端口之外的其它逻辑端口的发射符号组成的向量;Pr(xk)表示向量x中的xk的概率,若xk为待估计UE的信号,则xk在四相相移键控QPSK集合内取值,若xk为干扰信号,则xk在扩展 QPSK集合内取值;σ2表示白噪声功率;y0表示所述第二数据信号。
  21. 如权利要求17-20任一项所述的装置,其特征在于,所述解调模块具体用于:
    获取所述第一端口与除所述第一端口之外的逻辑端口的所有组合,每个组合中至少包含所述第一端口;
    分别针对所述每个组合,根据所述每个组合中所包含的各个逻辑端口的第二等效信道矩阵,按照所述预设的概率估计算法,计算所述每个组合存在的概率;
    根据所述每个组合存在的概率以及所述多个逻辑端口各自所属的组合存在的概率,分别计算所述多个逻辑端口各自的有信号存在的概率。
  22. 如权利要求21所述的装置,其特征在于,所述预设的概率估计算法包括:广义最大似然算法、协方差度量算法和聚类算法。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101136721A (zh) * 2007-09-30 2008-03-05 东南大学 基于次最优排序的混合判决反馈分层检测方法
CN101174863A (zh) * 2006-10-31 2008-05-07 华为技术有限公司 在多天线数字通信系统中检测信号的方法
CN101282195A (zh) * 2008-05-22 2008-10-08 上海交通大学 应用于mimo无线通信系统的检测方法及检测器
WO2013123671A1 (en) * 2012-02-24 2013-08-29 Nec (China) Co., Ltd. Method and apparatus for estimating channel quality information, base station and network central processing device

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* Cited by examiner, † Cited by third party
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US8064531B2 (en) * 2009-11-04 2011-11-22 Telefonaktiebolaget L M Ericsson (Publ) Method and apparatus for interferer parameter estimation using multiple receiver arbitration
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CN103516412B (zh) * 2012-06-28 2017-03-08 联芯科技有限公司 接收数据的多输入多输出检测方法及系统

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101174863A (zh) * 2006-10-31 2008-05-07 华为技术有限公司 在多天线数字通信系统中检测信号的方法
CN101136721A (zh) * 2007-09-30 2008-03-05 东南大学 基于次最优排序的混合判决反馈分层检测方法
CN101282195A (zh) * 2008-05-22 2008-10-08 上海交通大学 应用于mimo无线通信系统的检测方法及检测器
WO2013123671A1 (en) * 2012-02-24 2013-08-29 Nec (China) Co., Ltd. Method and apparatus for estimating channel quality information, base station and network central processing device

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