WO2016029499A1 - 立体显示装置及其液晶显示面板和阵列基板 - Google Patents

立体显示装置及其液晶显示面板和阵列基板 Download PDF

Info

Publication number
WO2016029499A1
WO2016029499A1 PCT/CN2014/085849 CN2014085849W WO2016029499A1 WO 2016029499 A1 WO2016029499 A1 WO 2016029499A1 CN 2014085849 W CN2014085849 W CN 2014085849W WO 2016029499 A1 WO2016029499 A1 WO 2016029499A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
electrically connected
gate
inverter
vertical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2014/085849
Other languages
English (en)
French (fr)
Inventor
张天豪
郑华
陈政鸿
黄世帅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US14/387,243 priority Critical patent/US9618780B2/en
Publication of WO2016029499A1 publication Critical patent/WO2016029499A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes

Definitions

  • the present invention relates to the field of stereoscopic display technologies, and in particular, to an array substrate, a liquid crystal display panel using the array substrate, and a stereoscopic display device using the array substrate.
  • FIG. 1 is a partial structural diagram of a prior art array substrate
  • FIG. 2 is an equivalent circuit diagram of the array substrate shown in FIG.
  • Sharing charge sharing pixel design
  • this design divides pixels into main pixels (or main) and sub-pixels (sub Pixel, or sub) two pixel areas, as can be seen from Figure 2, when the gate line (charge Line) When charging, main and sub are charged by Tmain and Tsub respectively, then the charge line is turned off, and then the time sharing line (share) Line) is turned on, at this time Tcs turns on the capacitance of the sub area Cst sub, Clc The charge of the sub and the charge in the Cb capacitor are redistributed, and finally the potentials of main and sub are different to achieve a low color shift effect.
  • the 2-frame inversion display mode is usually adopted, but the drive mode is such as turning on the charge.
  • the low color shift function is abnormal due to the presence of the Cb capacitor, and the brightness of the left-eye picture or the right-eye picture is bright, causing the brightness of the left-eye picture and the right-eye picture to be different. Therefore, it is necessary to display the 3D picture.
  • Share The TFT shared line FET switch, that is, Tcs of FIG. 2
  • Line cable connection design such as the third charge line connected to the first share line, called N+2 charge Sharing design.
  • N+2 charge Sharing design the third charge line connected to the first share line.
  • the embodiments of the present invention provide a stereoscopic display device, a liquid crystal display panel thereof and an array substrate, which can effectively achieve the technical effect of low color shift and can independently control the share.
  • the line switch eliminates the need to increase the amount of IC chip and COF, and solves the defects of IS residual image and left and right eye brightness difference in 3D display.
  • an embodiment of the present invention provides an array substrate of a liquid crystal display panel, the array substrate includes a plurality of gate lines, a plurality of shared lines, and a switching circuit, and the plurality of gate lines and the plurality of shared lines are mutually Interleaved and disposed in parallel with each other, the switching circuit includes a vertical switching circuit, a first switch, a second switch, and an inverter: a gate of the first switch is electrically connected to the vertical switch circuit, and the first switch The first end is electrically connected to the Nth shared line, the second end of the first switch is electrically connected to the N+Xth gate line, and the gate of the second switch is electrically connected to the vertical switch circuit.
  • the first end of the second switch is electrically connected to the Nth shared line, and the second end of the second switch is used to acquire a control signal;
  • the inverter is disposed at a gate of the first switch or the second switch And the vertical switch circuit, when the three-dimensional display is performed, the first switch and the second switch are controlled by the cooperation of the vertical switch circuit and the control signal, so that the Nth shared line is turned off;
  • N and X are natural numbers, the Nth And source lines adjacent to the N-th common line intervals.
  • the second end of the second switch is electrically connected to the negative power input line to obtain the control signal.
  • the second end of the second switch is electrically connected to the Nth gate line to obtain the control signal.
  • the input end of the inverter is electrically connected to the vertical switch circuit, and an output end of the inverter is electrically connected to a gate of the first switch.
  • the input end of the inverter is electrically connected to the vertical switch circuit, and an output end of the inverter is electrically connected to a gate of the second switch.
  • an embodiment of the present invention further provides a liquid crystal display panel, wherein the liquid crystal display panel is configured with any of the above array substrates.
  • an embodiment of the present invention further provides a stereoscopic display device, wherein the stereoscopic display device includes a liquid crystal display panel, and the liquid crystal display panel is configured with any of the array substrates described above.
  • the beneficial effects of the embodiments of the present invention are: the first switch and the second switch of the vertical switch circuit are adopted by the vertical switch circuit, the inverter, the first switch and the second switch of the switching circuit.
  • the switch or the control signal obtained by the second end of the first switch cooperates to realize the share
  • the independent control of the line switch can effectively achieve the technical effect of low color shift.
  • the embodiment of the present invention does not need to additionally increase the usage of the IC chip and the COF, and solves the defects of the IS residual image and the left and right eye luminance difference in 3D display.
  • FIG. 1 is a partial structural schematic view of a prior art array substrate
  • FIG. 2 is an equivalent circuit diagram of the array substrate shown in FIG. 1;
  • FIG. 3 is an equivalent circuit diagram of a first embodiment of the array substrate of the present invention.
  • Figure 5 is an equivalent circuit diagram of a third embodiment of the array substrate of the present invention.
  • Figure 6 is an equivalent circuit diagram of a fourth embodiment of the array substrate of the present invention.
  • FIG. 3 is an equivalent circuit diagram of the first embodiment of the array substrate of the present invention.
  • the array substrate of the present embodiment includes but is not limited to a plurality of gate lines G(N), G(N+1)•••, Multiple shared lines S(N), S(N+1)••• and switching circuits.
  • the plurality of gate lines and the plurality of shared lines are staggered with each other and disposed in parallel with each other, that is, the gate lines and the shared lines may be alternately arranged alternately.
  • the switching circuit of this embodiment includes a vertical switch circuit Vsw, a first switch T1, a second switch T2, and an inverter 31.
  • the gate of the first switch T1 is electrically connected to the vertical switch circuit Vsw, and the first end of the first switch T1 is electrically connected to the Nth shared line, and the second end of the first switch T1 is connected. Electrically connecting with the N+Xth gate line; the first end of the second switch T2 is electrically connected to the Nth shared line, the gate of the second switch T2 is electrically connected to the vertical switch circuit Vsw, and the second switch T2 is The two ends are connected to the negative power input line VGL for obtaining a control signal.
  • the inverter 31 of the present embodiment is disposed between the gate of the second switch T2 and the vertical switch circuit Vsw to control the first switch by the vertical switch circuit Vsw and the control signal when performing three-dimensional display.
  • the switch T1 and the second switch T2 are such that the Nth shared line is turned off; wherein N and X are natural numbers, and the Nth gate line and the Nth shared line are adjacently arranged.
  • the present embodiment is described by taking X as an example, but may be 2, 3, 4, etc., and is not limited herein.
  • the input end of the inverter 31 is electrically connected to the vertical switch circuit Vsw, and the output end of the inverter 31 is electrically connected to the gate of the second switch T2 to realize the vertical switch.
  • the vertical switch circuit Vsw operates at a high potential in the 2D mode, at which time the first switch T1 is turned on so that the N+1th gate line is electrically connected to the Nth shared line, and the second switch T2 is The gate is turned off by the action of the inverter 31 while being kept at a low potential. At this time, the second switch T2 is turned off so that the Nth shared line is disconnected from the negative power input line VGL, so that the normal charge can be maintained. Sharing function.
  • the vertical switch circuit Vsw operates at a low potential, at which time the first switch T1 is turned off to disconnect the N+1th gate line from the Nth shared line, and the second switch T2 The gate is turned on by the inverter 31 while being maintained at a high potential. At this time, the second switch T2 is turned on so that the Nth shared line is connected to the negative power input pin VGL, and the signal of the Nth shared line is maintained at the negative power input line VGL. Potential, which in turn makes the share in the pixel area The TFT can be turned off and the charge sharing function is turned off.
  • control signals generated by the vertical switch circuit Vsw, the first switch T1, and the second end of the second switch T2 are used together to realize the share.
  • the independent control of the line switch can effectively achieve the technical effect of low color shift.
  • the embodiment of the present invention does not need to additionally increase the usage of the IC chip and the COF, and solves the defects of the IS residual image and the left and right eye luminance difference in 3D display.
  • FIG. 4 is an equivalent circuit diagram of a second embodiment of the array substrate of the present invention.
  • the array substrate of the present embodiment includes but is not limited to a plurality of gate lines G(N), G(N+1)••• , multiple shared lines S (N), S (N + 1) ••• and switching circuits.
  • the plurality of gate lines and the plurality of shared lines are staggered with each other and disposed in parallel with each other, that is, the gate lines and the shared lines may be alternately arranged alternately.
  • the switching circuit of this embodiment includes a vertical switch circuit Vsw, a first switch T1, a second switch T2, and an inverter 41.
  • the gate of the first switch T1 is electrically connected to the vertical switch circuit Vsw, and the first end of the first switch T1 is electrically connected to the Nth shared line, and the second end of the first switch T1 is connected. Electrically connecting with the N+Xth gate line; the first end of the second switch T2 is electrically connected to the Nth shared line, the gate of the second switch T2 is electrically connected to the vertical switch circuit Vsw, and the second switch T2 is The two ends are connected to the negative power input line VGL for obtaining a control signal.
  • the inverter 41 of the present embodiment is disposed between the gate of the first switch T1 and the vertical switch circuit Vsw to pass the vertical switch circuit Vsw and the control signal when performing three-dimensional display.
  • the cooperation of the first switch T1 and the second switch T2 is such that the Nth shared line is turned off; wherein N and X are natural numbers, and the Nth gate line and the Nth shared line are adjacently arranged.
  • This embodiment is described by taking X as an example, but may be 2, 3, 4, etc., and is not limited herein.
  • the input end of the inverter 41 is electrically connected to the vertical switch circuit Vsw, and the output end of the inverter 41 is electrically connected to the gate of the first switch T1 to achieve a pair.
  • the vertical switch circuit Vsw operates at a low potential in the 2D mode, at which time the second switch T2 is turned off so that the Nth shared line is disconnected from the negative power input line VGL, and the gate of the first switch T1 passes through the opposite
  • the action of the phase switch 41 is maintained at a high potential, and the first switch T1 is turned on to electrically connect the N+1th gate line with the Nth shared line to maintain a normal charge. Sharing function.
  • the vertical switch circuit Vsw operates at a high potential, and at this time, the second switch T2 is turned on to connect the Nth shared line with the negative power input line VGL, so that the signal of the Nth shared line is maintained at the negative power input line.
  • the shared TFT in the pixel can be turned off.
  • Make charge The sharing function is disabled, that is, the share TFT in the pixel area can be turned off to disable the charge sharing function.
  • control signals generated by the vertical switch circuit Vsw, the first switch T1, and the second end of the second switch T2 are used together to realize the share.
  • the independent control of the line switch can effectively achieve the technical effect of low color shift.
  • the embodiment of the present invention does not need to additionally increase the usage of the IC chip and the COF, and solves the defects of the IS residual image and the left and right eye luminance difference in 3D display.
  • FIG. 5 is an equivalent circuit diagram of a third embodiment of the array substrate of the present invention.
  • the array substrate of the present embodiment includes but is not limited to a plurality of gate lines G(N) and G(N+1). •••, multiple shared lines S(N), S(N+1)•••, and switching circuits.
  • the plurality of gate lines and the plurality of shared lines are staggered with each other and disposed in parallel with each other, that is, the gate lines and the shared lines may be alternately arranged alternately.
  • the switching circuit of this embodiment includes a vertical switch circuit Vsw, a first switch T1, a second switch T2, and an inverter 51.
  • the gate of the first switch T1 is electrically connected to the vertical switch circuit Vsw, and the first end of the first switch T1 is electrically connected to the Nth shared line, and the second end of the first switch T1 is connected.
  • the first switch of the second switch T2 is electrically connected to the Nth shared line, and the gate of the second switch T2 is electrically connected to the vertical switch circuit Vsw.
  • This embodiment and the first The difference in the embodiment is that the second end of the second switch T2 is electrically connected to the Nth gate line to acquire a control signal.
  • the inverter 51 of the embodiment is disposed between the gate of the second switch T2 and the vertical switch circuit Vsw to control the first switch T1 and the second by the cooperation of the vertical switch circuit Vsw and the control signal when performing three-dimensional display.
  • the switch T2 is such that the Nth shared line is turned off; wherein N and X are natural numbers, and the Nth gate line and the Nth shared line are adjacently arranged.
  • the present embodiment is described by taking X as an example, but may be 2, 3, 4, etc., and is not limited herein.
  • the input end of the inverter 51 is electrically connected to the vertical switch circuit Vsw, and the output end of the inverter 51 is electrically connected to the gate of the second switch T2 to realize the vertical switch.
  • the vertical switch circuit Vsw operates at a high potential in the 2D mode, at which time the first switch T1 is turned on so that the N+1th gate line is electrically connected to the Nth shared line, and the second switch T2 is The gate is turned off by the action of the inverter 51 while being kept at a low potential. At this time, the second switch T2 is turned off to disconnect the Nth shared line from the Nth gate line, thereby maintaining a normal charge. Sharing function.
  • the vertical switch circuit Vsw operates at a low potential, at which time the first switch T1 is turned off to disconnect the N+1th gate line from the Nth shared line, and the second switch T2 The gate is turned on by the inverter 51 while being maintained at a high potential. At this time, the second switch T2 is turned on so that the Nth shared line is connected to the Nth gate line, so that the Nth shared line and the Nth gate line are connected.
  • the signal potential is the same, which in turn makes charge
  • the sharing function is disabled and disabled.
  • control signals generated by the vertical switch circuit Vsw, the first switch T1, and the second end of the second switch T2 are used together to realize the share.
  • the independent control of the line switch can effectively achieve the technical effect of low color shift.
  • the embodiment of the present invention does not need to additionally increase the usage of the IC chip and the COF, and solves the defects of the IS residual image and the left and right eye luminance difference in 3D display.
  • FIG. 6 is an equivalent circuit diagram of a fourth embodiment of the array substrate of the present invention.
  • the array substrate of the present embodiment includes but is not limited to a plurality of gate lines G(N) and G(N+1). ••, multiple shared lines S(N), S(N+1)•••, and switching circuits.
  • the plurality of gate lines and the plurality of shared lines are staggered with each other and disposed in parallel with each other, that is, the gate lines and the shared lines may be alternately arranged alternately.
  • the switching circuit of this embodiment includes a vertical switch circuit Vsw, a first switch T1, a second switch T2, and an inverter 61.
  • the gate of the first switch T1 is electrically connected to the vertical switch circuit Vsw, and the first end of the first switch T1 is electrically connected to the Nth shared line, and the second end of the first switch T1 is connected. Electrically connected to the N+Xth gate line; the first end of the second switch T2 is electrically connected to the Nth shared line, and the gate of the second switch T2 is electrically connected to the vertical switch circuit Vsw, which is different from the second embodiment The second end of the second switch T2 of the embodiment is electrically connected to the Nth gate line to obtain a control signal.
  • the inverter 61 of the present embodiment is disposed between the gate of the first switch T1 and the vertical switch circuit Vsw to pass the vertical switch circuit Vsw and the control signal when performing three-dimensional display.
  • the cooperation of the first switch T1 and the second switch T2 is such that the Nth shared line is turned off; wherein N and X are natural numbers, and the Nth gate line and the Nth shared line are adjacently arranged.
  • This embodiment is described by taking X as an example, but may be 2, 3, 4, etc., and is not limited herein.
  • the input end of the inverter 61 is electrically connected to the vertical switch circuit Vsw, and the output end of the inverter 61 is electrically connected to the gate of the first switch T1 to achieve a pair.
  • the vertical switch circuit Vsw operates at a low potential in the 2D mode, at which time the second switch T2 is turned off so that the Nth shared line is disconnected from the Nth gate line, and the gate of the first switch T1 passes.
  • the action of the inverter 61 is maintained at a high potential, and the first switch T1 is turned on to electrically connect the N+1th gate line with the Nth shared line to maintain a normal charge. Sharing function.
  • the vertical switching circuit Vsw operates at a high potential
  • the second switch T2 is turned on to connect the Nth shared line to the Nth gate line, so that the Nth shared line and the Nth gate line
  • the signal is at the same potential
  • the first switch T1 The gate is turned off by the action of the inverter 61 while being kept low, and the first switch T1 is turned off to disconnect the N+1th gate line from the Nth shared line, and finally the charge sharing function is turned off.
  • control signals generated by the vertical switch circuit Vsw, the first switch T1, and the second end of the second switch T2 are used together to realize the share.
  • the independent control of the line switch can effectively achieve the technical effect of low color shift.
  • the embodiment of the present invention does not need to additionally increase the usage of the IC chip and the COF, and solves the defects of the IS residual image and the left and right eye luminance difference in 3D display.
  • the embodiment of the invention further provides a liquid crystal display panel.
  • the liquid crystal display panel is provided with any of the above array substrates.
  • X of the embodiment is 1 to save production cost.
  • the embodiment of the present invention further provides a stereoscopic display device.
  • the stereoscopic display device includes a liquid crystal display panel.
  • the liquid crystal display panel is configured with any of the above array substrates.
  • X of the embodiment is 1 to save production cost.
  • the array substrate provided by the embodiment of the invention and the liquid crystal display panel and the stereoscopic display device using the array substrate utilize the control of the second switch of the vertical switch circuit Vsw, the first switch T1 and the second switch T2.
  • the joint effect of signals to achieve share The independent control of the line switch can effectively achieve the technical effect of low color shift.
  • the embodiment of the present invention does not need to additionally increase the usage of the IC chip and the COF, and solves the defects of the IS residual image and the left and right eye luminance difference in 3D display.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Abstract

一种立体显示装置及其液晶显示面板和阵列基板，所述阵列基板包括栅极线、共享线和切换电路，栅极线和共享线彼此交错平行设置，切换电路包括垂直开关电路、第一开关、第二开关和反相器（31），第一开关的栅极与垂直开关电路电连接，第一开关的第一端与第N条共享线电连接，第一开关的第二端与第N+X条栅极线电连接；第二开关的栅极与垂直开关电路电连接，第二开关的第一端与第N条共享线电连接，第二开关的第二端用于获取控制信号；反相器（31）设于第一开关或第二开关的栅极与垂直开关电路之间。利用切换电路作用，实现对共享线开关的独立控制，达到低色偏的技术效果，无需额外增加IC芯片和COF的使用量，解决残影和左右眼亮度差的缺陷。

Description

立体显示装置及其液晶显示面板和阵列基板
【技术领域】
本发明属于立体显示技术领域，具体涉及一种阵列基板、采用所述阵列基板的液晶显示面板，还涉及一种采用所述阵列基板的立体显示装置。
【背景技术】
请参阅图1和图2，图1是现有技术阵列基板的部分结构示意图，图2是图1所示阵列基板的等效电路图。
现有技术中，立体显示装置为了达到低色偏(Low color shift)的效果，其中一种方式是采取charge sharing（电荷共享）像素设计方式，此种设计方式将像素分为主像素（main pixel，或main）与亚像素（sub pixel，或sub）两个像素区，从图2不难看出，当栅极线（charge line）开启时，通过Tmain以及Tsub分别对main与sub充电，之后charge line关闭，接着之后的时间点共享线（share line）开启，此时Tcs打开将sub区的电容Cst sub、Clc sub的电荷与Cb电容中的电荷做重新分布，最后使main与sub的电位不一样以达到低色偏的效果。
在显示3D模式时，通常会采取2帧反转的显示方式，但此驱动方式如开启charge sharing功能时由于Cb电容的存在导致低色偏功能异常，使左眼画面或右眼画面sub亮度偏亮，造成左眼画面与右眼画面的亮度不一至，因此必须在显示3D画面时必须将share TFT(共享线场效应管开关，即图2的Tcs)设定为关闭或失效状态。
为了将share TFT设定为关闭或失效状态，一般设计会将charge line与share line的信号走线独立控制，如需关闭charge sharing功能时可将share line关闭(VGL)进而使share TFT关闭，但此方式会增加一倍gate IC芯片（门电路芯片）和覆晶薄膜（COF）的使用量。
另一种设计为了减少IC和COF使用数量而在设计时会将charge line与share line走线连接设计，如将第三条charge line与第一条share line相连接，称作N+2的charge sharing设计。此种方式当第N条charge line开启时pixel N被充电，而后当第N+2条charge line开启时, 因第N+2条charge line与第N条share line是相连接的, 所以此时Pixel N的sub产生charge sharing现象，达到低色偏的效果。但是这种设计无法独立控制share line的开关，无法通过关闭share line来关闭低色偏，在3D显示时会出现IS（in sight，即视野范围内）残影及左右眼亮度差等问题。
【发明内容】
有鉴于此，本发明实施例提供一种立体显示装置及其液晶显示面板和阵列基板，能够有效地达到低色偏的技术效果，且能够独立控制share line的开关，无需额外增加IC芯片和COF的使用量，解决3D显示时的IS残影和左右眼亮度差的缺陷。
为解决上述技术问题，本发明实施例提供一种液晶显示面板的阵列基板，所述阵列基板包括多条栅极线、多条共享线和切换电路，多条栅极线和多条共享线彼此交错并相互平行设置，所述切换电路包括垂直开关电路、第一开关、第二开关和反相器：所述第一开关的栅极与所述垂直开关电路电连接，所述第一开关的第一端与第N条共享线电连接，所述第一开关的第二端与第N+X条栅极线电连接；所述第二开关的栅极与所述垂直开关电路电连接，所述第二开关的第一端与第N条共享线电连接，所述第二开关的第二端用于获取控制信号；所述反相器设于第一开关或第二开关的栅极与所述垂直开关电路之间，以在进行三维显示时，通过所述垂直开关电路和所述控制信号的配合控制所述第一开关和所述第二开关，使得第N条共享线关闭；其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。
其中，所述第二开关的第二端与负电源输入线电连接以获取所述控制信号。
其中，所述第二开关的第二端与第N条栅极线电连接以获取所述控制信号。
其中，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第一开关的栅极电连接。
其中，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第二开关的栅极电连接。
为解决上述技术问题，本发明实施例还提供一种液晶显示面板，所述液晶显示面板配置有任一上述的阵列基板。
其中，所述X为1。
为解决上述技术问题，本发明实施例还提供一种立体显示装置，所述立体显示装置包括液晶显示面板，所述液晶显示面板配置有任一上述的阵列基板。
其中，所述X为1。
通过上述技术方案，本发明实施例的有益效果是：本发明实施例通过一切换电路的垂直开关电路、反相器和第一开关、第二开关，利用垂直开关电路第一开关、和第二开关或第一开关的第二端获取的控制信号的共同作用，实现对share line开关的独立控制，能够有效地达到低色偏的技术效果，此外，本发明实施例无需额外增加IC芯片和COF的使用量，解决3D显示时的IS残影和左右眼亮度差的缺陷。
【附图说明】
图1是现有技术阵列基板的部分结构示意图；
图2是图1所示阵列基板的等效电路图；
图3是本发明阵列基板第一实施例的等效电路图；
图4是本发明阵列基板第二实施例的等效电路图；
图5是本发明阵列基板第三实施例的等效电路图；
图6是本发明阵列基板第四实施例的等效电路图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，本发明以下所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有付出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
请参阅图3，图3是本发明阵列基板第一实施例的等效电路图，本实施例阵列基板包括但不限于多条栅极线G（N）、G（N+1）•••，多条共享线S（N）、S（N+1）•••以及切换电路。
在本实施例中，多条栅极线和多条共享线彼此交错并相互平行设置、即栅极线和共享线之间可以逐条、交替地排列布线。
需要说明的是，本实施例的切换电路包括垂直开关电路Vsw、第一开关T1、第二开关T2和反相器31。
具体而言，如图3所示，第一开关T1的栅极与垂直开关电路Vsw电连接，第一开关T1的第一端与第N条共享线电连接，第一开关T1的第二端与第N+X条栅极线电连接；第二开关T2的第一端与第N条共享线电连接，第二开关T2的栅极与垂直开关电路Vsw电连接，第二开关T2的第二端连接负电源输入线VGL以用于获取控制信号。
需要说明的是，本实施例的反相器31设于第二开关T2的栅极与垂直开关电路Vsw之间，以在进行三维显示时，通过垂直开关电路Vsw和控制信号的配合控制第一开关T1和第二开关T2，使得第N条共享线关闭；其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。具体而言，本实施例以X为1为例进行阐述，但可以为2、3、4等，在此不作限定。此外，本技术领域人员不难理解的是，反相器31的输入端与垂直开关电路Vsw电连接，反相器31的输出端与第二开关T2的栅极电连接，以实现对垂直开关电路Vsw的反相作用。
在工作的过程中，在2D模式下垂直开关电路Vsw操作在高电位，此时第一开关T1开启使得第N+1条栅极线与第N条共享线电连接，而第二开关T2的栅极经过反相器31的作用维持在低电位而关闭，此时第二开关T2关闭使得第N条共享线与负电源输入线VGL断开，因此可维持正常的charge sharing功能。接着，在3D模式下垂直开关电路Vsw操作在低电位，此时第一开关T1关闭使得第N+1条栅极线与第N条共享线断开，第二开关T2 的栅极经过反相器31维持在高电位而开启，此时第二开关T2开启使得第N条共享线与负电源输入脚VGL连接造成第N条共享线的信号维持在负电源输入线VGL的电位，进而使得像素区内的share TFT可以关闭病使charge sharing功能关闭。
本实施例利用垂直开关电路Vsw、第一开关T1和第二开关T2的第二端获取的控制信号的共同作用，实现对share line开关的独立控制，能够有效地达到低色偏的技术效果，此外，本发明实施例无需额外增加IC芯片和COF的使用量，解决3D显示时的IS残影和左右眼亮度差的缺陷。
接着请参阅图4，图4是本发明阵列基板第二实施例的等效电路图，本实施例阵列基板包括但不限于多条栅极线G（N）、G（N+1）•••，多条共享线S（N）、S（N+1）•••以及切换电路。
在本实施例中，多条栅极线和多条共享线彼此交错并相互平行设置、即栅极线和共享线之间可以逐条、交替地排列布线。
需要说明的是，本实施例的切换电路包括垂直开关电路Vsw、第一开关T1、第二开关T2和反相器41。
具体而言，如图4所示，第一开关T1的栅极与垂直开关电路Vsw电连接，第一开关T1的第一端与第N条共享线电连接，第一开关T1的第二端与第N+X条栅极线电连接；第二开关T2的第一端与第N条共享线电连接，第二开关T2的栅极与垂直开关电路Vsw电连接，第二开关T2的第二端连接负电源输入线VGL以用于获取控制信号。
与第一实施例不同之处在于，本实施例的反相器41设于第一开关T1的栅极与垂直开关电路Vsw之间，以在进行三维显示时，通过垂直开关电路Vsw和控制信号的配合控制第一开关T1和第二开关T2，使得第N条共享线关闭；其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。本实施例以X为1为例进行阐述，但可以为2、3、4等，在此不作限定。具体而言，本技术领域人员不难理解的是，反相器41的输入端与垂直开关电路Vsw电连接，反相器41的输出端与第一开关T1的栅极电连接，以实现对垂直开关电路Vsw的反相作用。
在工作的过程中，在2D模式下垂直开关电路Vsw操作在低电位，此时第二开关T2关闭使得第N条共享线与负电源输入线VGL断开，第一开关T1的栅极经过反相器41的作用维持在高电位而开启，第一开关T1开启使得第N+1条栅极线与第N条共享线电连接，维持正常的charge sharing功能。接着，在3D模式下垂直开关电路Vsw操作在高电位，此时第二开关T2开启使得第N条共享线与负电源输入线VGL连接，使得第N条共享线的信号维持在负电源输入线VGL的电位，而第一开关T1 的栅极经过反相器41的作用维持在低电位而关闭，第一开关T1关闭使得第N+1条栅极线与第N条共享线断开，此时可以操作关闭像素内share TFT而使charge sharing功能关闭，即通过像素区内的share TFT可以关闭以使得charge sharing功能关闭。
本实施例利用垂直开关电路Vsw、第一开关T1和第二开关T2的第二端获取的控制信号的共同作用，实现对share line开关的独立控制，能够有效地达到低色偏的技术效果，此外，本发明实施例无需额外增加IC芯片和COF的使用量，解决3D显示时的IS残影和左右眼亮度差的缺陷。
接着请结合图3参阅图5，图5是本发明阵列基板第三实施例的等效电路图，本实施例阵列基板包括但不限于多条栅极线G（N）、G（N+1）•••，多条共享线S（N）、S（N+1）•••以及切换电路。
在本实施例中，多条栅极线和多条共享线彼此交错并相互平行设置、即栅极线和共享线之间可以逐条、交替地排列布线。
需要说明的是，本实施例的切换电路包括垂直开关电路Vsw、第一开关T1、第二开关T2和反相器51。
具体而言，如图5所示，第一开关T1的栅极与垂直开关电路Vsw电连接，第一开关T1的第一端与第N条共享线电连接，第一开关T1的第二端与第N+X条栅极线电连接；第二开关T2的第一端与第N条共享线电连接，第二开关T2的栅极与垂直开关电路Vsw电连接，本实施例与第一实施例的区别在于，第二开关T2的第二端与第N条栅极线电连接以获取控制信号。
本实施例的反相器51设于第二开关T2的栅极与垂直开关电路Vsw之间，以在进行三维显示时，通过垂直开关电路Vsw和控制信号的配合控制第一开关T1和第二开关T2，使得第N条共享线关闭；其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。具体而言，本实施例以X为1为例进行阐述，但可以为2、3、4等，在此不作限定。此外，本技术领域人员不难理解的是，反相器51的输入端与垂直开关电路Vsw电连接，反相器51的输出端与第二开关T2的栅极电连接，以实现对垂直开关电路Vsw的反相作用。
在工作的过程中，在2D模式下垂直开关电路Vsw操作在高电位，此时第一开关T1开启使得第N+1条栅极线与第N条共享线电连接，而第二开关T2的栅极经过反相器51的作用维持在低电位而关闭，此时第二开关T2关闭使得第N条共享线与第N条栅极线断开，因此可维持正常的charge sharing功能。接着，在3D模式下垂直开关电路Vsw操作在低电位，此时第一开关T1关闭使得第N+1条栅极线与第N条共享线断开，第二开关T2 的栅极经过反相器51维持在高电位而开启，此时第二开关T2开启使得第N条共享线与第N条栅极线连接，使得第N条共享线与第N条栅极线的信号电位相同，进而使得charge sharing功能关闭、失效。
本实施例利用垂直开关电路Vsw、第一开关T1和第二开关T2的第二端获取的控制信号的共同作用，实现对share line开关的独立控制，能够有效地达到低色偏的技术效果，此外，本发明实施例无需额外增加IC芯片和COF的使用量，解决3D显示时的IS残影和左右眼亮度差的缺陷。
请结合图4参阅图6，图6是本发明阵列基板第四实施例的等效电路图，本实施例阵列基板包括但不限于多条栅极线G（N）、G（N+1）•••，多条共享线S（N）、S（N+1）•••以及切换电路。
在本实施例中，多条栅极线和多条共享线彼此交错并相互平行设置、即栅极线和共享线之间可以逐条、交替地排列布线。
需要说明的是，本实施例的切换电路包括垂直开关电路Vsw、第一开关T1、第二开关T2和反相器61。
具体而言，如图6所示，第一开关T1的栅极与垂直开关电路Vsw电连接，第一开关T1的第一端与第N条共享线电连接，第一开关T1的第二端与第N+X条栅极线电连接；第二开关T2的第一端与第N条共享线电连接，第二开关T2的栅极与垂直开关电路Vsw电连接，与第二实施例不同之处在于，本实施例第二开关T2的第二端与第N条栅极线电连接以获取控制信号。
与第三实施例不同之处在于，本实施例的反相器61设于第一开关T1的栅极与垂直开关电路Vsw之间，以在进行三维显示时，通过垂直开关电路Vsw和控制信号的配合控制第一开关T1和第二开关T2，使得第N条共享线关闭；其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。本实施例以X为1为例进行阐述，但可以为2、3、4等，在此不作限定。具体而言，本技术领域人员不难理解的是，反相器61的输入端与垂直开关电路Vsw电连接，反相器61的输出端与第一开关T1的栅极电连接，以实现对垂直开关电路Vsw的反相作用。
在工作的过程中，在2D模式下垂直开关电路Vsw操作在低电位，此时第二开关T2关闭使得第N条共享线与第N条栅极线断开，第一开关T1的栅极经过反相器61的作用维持在高电位而开启，第一开关T1开启使得第N+1条栅极线与第N条共享线电连接，维持正常的charge sharing功能。接着，在3D模式下垂直开关电路Vsw操作在高电位，此时第二开关T2开启使得第N条共享线与第N条栅极线连接，使得第N条共享线与第N条栅极线的信号相同电位，而第一开关T1 的栅极经过反相器61的作用维持在低电位而关闭，第一开关T1关闭使得第N+1条栅极线与第N条共享线断开，最终使得charge sharing功能关闭。
本实施例利用垂直开关电路Vsw、第一开关T1和第二开关T2的第二端获取的控制信号的共同作用，实现对share line开关的独立控制，能够有效地达到低色偏的技术效果，此外，本发明实施例无需额外增加IC芯片和COF的使用量，解决3D显示时的IS残影和左右眼亮度差的缺陷。
本发明实施例还提供一种液晶显示面板，液晶显示面板配置有任一上述的阵列基板，优选地，本实施例的X为1，以节省生产成本。
本发明实施例还提供一种立体显示装置，立体显示装置包括液晶显示面板，液晶显示面板配置有任一上述的阵列基板，优选地，本实施例的X为1，以节省生产成本。
不难理解的是，本发明实施例提供的阵列基板以及采用该阵列基板的液晶显示面板和立体显示装置，利用垂直开关电路Vsw、第一开关T1和第二开关T2的第二端获取的控制信号的共同作用，实现对share line开关的独立控制，能够有效地达到低色偏的技术效果，此外，本发明实施例无需额外增加IC芯片和COF的使用量，解决3D显示时的IS残影和左右眼亮度差的缺陷。
以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (19)

  1. 一种液晶显示面板的阵列基板，其特征在于，所述阵列基板包括多条栅极线、多条共享线和切换电路，多条栅极线和多条共享线彼此交错并相互平行设置，所述切换电路包括垂直开关电路、第一开关、第二开关和反相器：
    所述第一开关的栅极与所述垂直开关电路电连接，所述第一开关的第一端与第N条共享线电连接，所述第一开关的第二端与第N+X条栅极线电连接；
    所述第二开关的栅极与所述垂直开关电路电连接，所述第二开关的第一端与第N条共享线电连接，所述第二开关的第二端用于获取控制信号；
    所述反相器设于第一开关或第二开关的栅极与所述垂直开关电路之间，以在进行三维显示时，通过所述垂直开关电路和所述控制信号的配合控制所述第一开关和所述第二开关，使得第N条共享线关闭；
    其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。
  2. 根据权利要求1所述的阵列基板，其特征在于，所述第二开关的第二端与负电源输入线电连接以获取所述控制信号。
  3. 根据权利要求1所述的阵列基板，其特征在于，所述第二开关的第二端与第N条栅极线电连接以获取所述控制信号。
  4. 根据权利要求2所述的阵列基板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第一开关的栅极电连接。
  5. 根据权利要求3所述的阵列基板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第一开关的栅极电连接。
  6. 根据权利要求2所述的阵列基板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第二开关的栅极电连接。
  7. 根据权利要求3所述的阵列基板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第二开关的栅极电连接。
  8. 一种液晶显示面板，其特征在于，所述液晶显示面板配置有阵列基板，所述阵列基板包括多条栅极线、多条共享线和切换电路，多条栅极线和多条共享线彼此交错并相互平行设置，所述切换电路包括垂直开关电路、第一开关、第二开关和反相器：
    所述第一开关的栅极与所述垂直开关电路电连接，所述第一开关的第一端与第N条共享线电连接，所述第一开关的第二端与第N+X条栅极线电连接；
    所述第二开关的栅极与所述垂直开关电路电连接，所述第二开关的第一端与第N条共享线电连接，所述第二开关的第二端用于获取控制信号；
    所述反相器设于第一开关或第二开关的栅极与所述垂直开关电路之间，以在进行三维显示时，通过所述垂直开关电路和所述控制信号的配合控制所述第一开关和所述第二开关，使得第N条共享线关闭；
    其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。
  9. 根据权利要求8所述的液晶显示面板，其特征在于，所述第二开关的第二端与负电源输入线电连接以获取所述控制信号。
  10. 根据权利要求8所述的液晶显示面板，其特征在于，所述第二开关的第二端与第N条栅极线电连接以获取所述控制信号。
  11. 根据权利要求9所述的液晶显示面板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第一开关的栅极电连接。
  12. 根据权利要求10所述的液晶显示面板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第一开关的栅极电连接。
  13. 根据权利要求9所述的液晶显示面板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第二开关的栅极电连接。
  14. 根据权利要求10所述的液晶显示面板，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第二开关的栅极电连接。
  15. 根据权利要求8所述的液晶显示面板，其特征在于，所述X为1。
  16. 一种立体显示装置，其特征在于，所述立体显示装置包括液晶显示面板，所述液晶显示面板配置有阵列基板，所述阵列基板包括多条栅极线、多条共享线和切换电路，多条栅极线和多条共享线彼此交错并相互平行设置，所述切换电路包括垂直开关电路、第一开关、第二开关和反相器：
    所述第一开关的栅极与所述垂直开关电路电连接，所述第一开关的第一端与第N条共享线电连接，所述第一开关的第二端与第N+X条栅极线电连接；
    所述第二开关的栅极与所述垂直开关电路电连接，所述第二开关的第一端与第N条共享线电连接，所述第二开关的第二端用于获取控制信号；
    所述反相器设于第一开关或第二开关的栅极与所述垂直开关电路之间，以在进行三维显示时，通过所述垂直开关电路和所述控制信号的配合控制所述第一开关和所述第二开关，使得第N条共享线关闭；
    其中，N、X为自然数，第N条栅极线和第N条共享线相邻间隔设置。
  17. 根据权利要求16所述的立体显示装置，其特征在于，所述第二开关的第二端与负电源输入线电连接以获取所述控制信号。
  18. 根据权利要求17所述的立体显示装置，其特征在于，所述反相器的输入端与所述垂直开关电路电连接，所述反相器的输出端与所述第一开关的栅极电连接。
  19. 根据权利要求18所述的立体显示装置，其特征在于，所述X为1。
PCT/CN2014/085849 2014-08-28 2014-09-03 立体显示装置及其液晶显示面板和阵列基板 Ceased WO2016029499A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/387,243 US9618780B2 (en) 2014-08-28 2014-09-03 Stereoscopic display device, LCD panel, and array substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410432612.8 2014-08-28
CN201410432612.8A CN104166288B (zh) 2014-08-28 2014-08-28 立体显示装置及其液晶显示面板和阵列基板

Publications (1)

Publication Number Publication Date
WO2016029499A1 true WO2016029499A1 (zh) 2016-03-03

Family

ID=51910173

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/085849 Ceased WO2016029499A1 (zh) 2014-08-28 2014-09-03 立体显示装置及其液晶显示面板和阵列基板

Country Status (3)

Country Link
US (1) US9618780B2 (zh)
CN (1) CN104166288B (zh)
WO (1) WO2016029499A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108319049B (zh) * 2018-02-11 2020-11-24 武汉华星光电技术有限公司 液晶显示器及液晶显示器驱动方法
CN111508416B (zh) * 2020-04-30 2021-09-03 武汉华星光电半导体显示技术有限公司 显示器及其驱动方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102436105A (zh) * 2011-10-20 2012-05-02 友达光电股份有限公司 液晶显示装置及其显示驱动方法
US8248343B2 (en) * 2009-06-16 2012-08-21 Au Optronics Corporation Liquid crystal display panel and method for driving pixels thereof
CN103576400A (zh) * 2012-07-18 2014-02-12 群康科技(深圳)有限公司 显示器及其驱动方法
CN103728751A (zh) * 2013-12-27 2014-04-16 深圳市华星光电技术有限公司 切换显示二维和三维影像的液晶显示器
CN103728752A (zh) * 2013-12-30 2014-04-16 深圳市华星光电技术有限公司 改善显示3d影像发生闪烁的液晶显示器

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4754772B2 (ja) * 2003-05-16 2011-08-24 株式会社半導体エネルギー研究所 発光装置及び該発光装置を用いた電子機器
KR100846707B1 (ko) * 2007-02-27 2008-07-16 삼성에스디아이 주식회사 전자 영상 기기
JP2009168841A (ja) * 2008-01-10 2009-07-30 Nec Electronics Corp 演算増幅器及び駆動回路、液晶表示装置の駆動方法
JP5588144B2 (ja) * 2009-10-14 2014-09-10 パナソニック株式会社 映像信号処理装置及び映像信号処理方法
TWI457674B (zh) * 2011-04-13 2014-10-21 Au Optronics Corp 畫素陣列、畫素結構及畫素結構的驅動方法
KR101797763B1 (ko) * 2011-04-21 2017-12-12 엘지디스플레이 주식회사 영상표시장치 및 그의 구동방법
TWI449024B (zh) * 2012-08-03 2014-08-11 Au Optronics Corp 畫素電路、畫素結構、可切換二維／三維顯示裝置及其顯示驅動方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8248343B2 (en) * 2009-06-16 2012-08-21 Au Optronics Corporation Liquid crystal display panel and method for driving pixels thereof
CN102436105A (zh) * 2011-10-20 2012-05-02 友达光电股份有限公司 液晶显示装置及其显示驱动方法
CN103576400A (zh) * 2012-07-18 2014-02-12 群康科技(深圳)有限公司 显示器及其驱动方法
CN103728751A (zh) * 2013-12-27 2014-04-16 深圳市华星光电技术有限公司 切换显示二维和三维影像的液晶显示器
CN103728752A (zh) * 2013-12-30 2014-04-16 深圳市华星光电技术有限公司 改善显示3d影像发生闪烁的液晶显示器

Also Published As

Publication number Publication date
CN104166288B (zh) 2017-03-15
US9618780B2 (en) 2017-04-11
CN104166288A (zh) 2014-11-26
US20160246091A1 (en) 2016-08-25

Similar Documents

Publication Publication Date Title
WO2016183922A1 (zh) 一种液晶显示面板及装置
WO2017024644A1 (zh) 一种液晶显示面板及其驱动电路
WO2018072287A1 (zh) 一种像素结构及液晶显示面板
WO2014059690A1 (zh) 一种阵列基板及液晶显示装置
WO2018170984A1 (zh) 一种显示面板的驱动方法、时序控制器及液晶显示器
WO2015010348A1 (zh) 一种阵列基板及液晶显示面板
WO2015013988A1 (zh) 一种阵列基板及液晶显示面板
WO2016176914A1 (zh) 基板及其液晶显示装置
WO2015006992A1 (zh) 一种阵列基板及液晶显示面板
WO2017004856A1 (zh) 显示面板和用于显示面板的像素电路
WO2014043926A1 (zh) 一种阵列基板及液晶显示面板
WO2017028332A1 (zh) 扫描驱动电路及具有该电路的液晶显示装置
WO2017031790A1 (zh) 阵列基板及其驱动方法
WO2015043033A1 (zh) 一种阵列基板及液晶显示面板
WO2016033827A1 (zh) 像素结构、液晶显示面板及其驱动方法
WO2016101309A1 (zh) 液晶面板的驱动电路及液晶显示装置
WO2018126510A1 (zh) 一种阵列基板及显示装置
WO2017101176A1 (zh) 液晶显示装置
WO2017020333A1 (zh) 一种液晶显示器及其控制方法
WO2016115746A1 (zh) 一种液晶显示面板及装置
WO2018209755A1 (zh) 显示面板及显示装置
WO2019015059A1 (zh) 液晶显示面板的驱动方法
WO2014187010A1 (zh) 一种阵列基板及液晶显示面板
WO2018152936A1 (zh) 一种阵列基板及显示面板
CN107765482A (zh) 阵列基板及其应用的显示面板

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14387243

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14900669

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14900669

Country of ref document: EP

Kind code of ref document: A1