WO2016026133A1 - 一种液晶显示面板及液晶显示装置 - Google Patents

一种液晶显示面板及液晶显示装置 Download PDF

Info

Publication number
WO2016026133A1
WO2016026133A1 PCT/CN2014/084996 CN2014084996W WO2016026133A1 WO 2016026133 A1 WO2016026133 A1 WO 2016026133A1 CN 2014084996 W CN2014084996 W CN 2014084996W WO 2016026133 A1 WO2016026133 A1 WO 2016026133A1
Authority
WO
WIPO (PCT)
Prior art keywords
display area
liquid crystal
driving chip
crystal display
pixel unit
Prior art date
Application number
PCT/CN2014/084996
Other languages
English (en)
French (fr)
Inventor
徐向阳
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US14/390,353 priority Critical patent/US20160178973A1/en
Publication of WO2016026133A1 publication Critical patent/WO2016026133A1/zh

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3644—Control of matrices with row and column drivers using a passive matrix with the matrix divided into sections
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular to a liquid crystal display panel and a liquid crystal display device.
  • the liquid crystal panel in the prior art adopts AC driving, and the manner of AC driving includes: frame inversion, line inversion, column inversion, and dot inversion. Since dot inversion has the best display effect, it is widely used.
  • the invention provides a liquid crystal display panel and a liquid crystal display device, so as to solve the technical problem that the charging time is long in the prior art and the charging demand cannot be satisfied.
  • the present invention constructs a liquid crystal display panel including a data line, a scan line, and a plurality of pixel units alternately formed by the data line and the scan line;
  • the liquid crystal display panel includes a first display area and a second display area, wherein the first display area and the second display area each include a plurality of rows of the pixel unit, the first display area and the first The second display area is driven by a time synchronized drive signal;
  • the liquid crystal display panel includes 2n rows of the pixel unit, the number of rows of the pixel units of the first display area and the second display area is n;
  • the liquid crystal display panel includes 2n+1 rows of the pixel unit, the number of rows of the pixel unit of the first display area is n+1, and the number of rows of the pixel unit of the second display area is n, wherein n is a positive integer.
  • the pixel unit includes a thin film transistor
  • the liquid crystal display panel further includes a source driving chip and a gate driving chip:
  • the gate driving chip includes a first gate driving chip and a second gate driving chip
  • the source driving chip includes a first source driving chip and a second source driving chip
  • the first gate driving chip is configured to input a first scan signal to a control end of the thin film transistor of the pixel unit of the first display area through the scan line;
  • the second gate driving chip is configured to input a second scan signal to a control end of the thin film transistor of the pixel unit of the second display area through the scan line;
  • the first source driving chip is configured to input a data signal to an input end of the thin film transistor of the pixel unit of the first display area through the data line;
  • the second source driving chip is configured to input a data signal to an input end of the thin film transistor of the pixel unit of the second display area through the data line;
  • the first gate driving chip and the second gate driving chip generate the first scan signal and the second scan signal according to the same clock signal.
  • the data lines of the first display area and the data lines of the second display area are independent.
  • the present invention constructs a liquid crystal display panel including a data line, a scan line, and a plurality of pixel units alternately formed by the data line and the scan line;
  • the liquid crystal display panel includes a first display area and a second display area, wherein the first display area and the second display area each include a plurality of rows of the pixel unit, the first display area and the first The two display areas are driven by time synchronized drive signals.
  • the liquid crystal display panel of the present invention when the liquid crystal display panel includes 2n rows of the pixel unit, the number of rows of the pixel units of the first display area and the second display area is n, wherein n is positive Integer.
  • the liquid crystal display panel of the present invention when the liquid crystal display panel includes 2n+1 rows of the pixel unit, the number of rows of the pixel unit of the first display area is n+1, and the second display area The number of rows of pixel cells is n, where n is a positive integer.
  • the liquid crystal display panel of the present invention when the liquid crystal display panel includes 2n+1 rows of the pixel unit, the number of rows of the pixel unit of the first display area is n, and the pixel unit of the second display area The number of rows is n+1, where n is a positive integer.
  • the pixel unit includes a thin film transistor
  • the liquid crystal display panel further includes a source driving chip and a gate driving chip:
  • the gate driving chip includes a first gate driving chip and a second gate driving chip
  • the source driving chip includes a first source driving chip and a second source driving chip
  • the first gate driving chip is configured to input a first scan signal to a control end of the thin film transistor of the pixel unit of the first display area through the scan line;
  • the second gate driving chip is configured to input a second scan signal to a control end of the thin film transistor of the pixel unit of the second display area through the scan line;
  • the first source driving chip is configured to input a data signal to an input end of the thin film transistor of the pixel unit of the first display area through the data line;
  • the second source driving chip is configured to input a data signal to an input end of the thin film transistor of the pixel unit of the second display area through the data line;
  • the first gate driving chip and the second gate driving chip generate the first scan signal and the second scan signal according to the same clock signal.
  • the data lines of the first display area and the data lines of the second display area are independent.
  • the present invention also provides a liquid crystal display device including: a backlight module;
  • the liquid crystal display panel includes a data line, a scan line, and a plurality of pixel units alternately formed by the data line and the scan line;
  • the liquid crystal display panel includes a first display area and a second display area, wherein the first display area and the second display area each include a plurality of rows of the pixel unit, the first display area and the first The two display areas are driven by time synchronized drive signals.
  • the liquid crystal display panel when the liquid crystal display panel includes 2n rows of the pixel unit, the number of rows of the pixel units of the first display area and the second display area is n, wherein n is positive Integer.
  • the liquid crystal display panel when the liquid crystal display panel includes 2n+1 rows of the pixel unit, the number of rows of the pixel unit of the first display area is n+1, and the second display area The number of rows of pixel cells is n, where n is a positive integer.
  • the liquid crystal display panel when the liquid crystal display panel includes 2n+1 rows of the pixel unit, the number of rows of the pixel unit of the first display region is n, and the pixel unit of the second display region The number of rows is n+1, where n is a positive integer.
  • the pixel unit includes a thin film transistor
  • the liquid crystal display panel further includes a source driving chip and a gate driving chip:
  • the gate driving chip includes a first gate driving chip and a second gate driving chip
  • the source driving chip includes a first source driving chip and a second source driving chip
  • the first gate driving chip is configured to input a first scan signal to a control end of the thin film transistor of the pixel unit of the first display area through the scan line;
  • the second gate driving chip is configured to input a second scan signal to a control end of the thin film transistor of the pixel unit of the second display area through the scan line;
  • the first source driving chip is configured to input a data signal to an input end of the thin film transistor of the pixel unit of the first display area through the data line;
  • the second source driving chip is configured to input a data signal to an input end of the thin film transistor of the pixel unit of the second display area through the data line;
  • the first gate driving chip and the second gate driving chip generate the first scan signal and the second scan signal according to the same clock signal.
  • the data lines of the first display area and the data lines of the second display area are independent.
  • the liquid crystal display panel and the liquid crystal display device of the present invention shorten the charging time by dividing the panel into two display areas and simultaneously driving the two display areas, thereby solving the problem that the existing charging time is long and cannot meet the charging requirement. Technical problem.
  • FIG. 1 is a schematic structural view of a liquid crystal display panel including even-numbered rows of pixel units in an embodiment of the present invention
  • FIG. 2 is a schematic structural view of a driving circuit of the liquid crystal display panel of FIG. 1;
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel including odd rows of pixel units in an embodiment of the present invention
  • FIG. 4 is a schematic structural view of a driving circuit of the liquid crystal display panel of FIG. 3;
  • FIG. 5 is a schematic illustration of signals in an embodiment of the invention.
  • FIG. 1 is a schematic structural diagram of a liquid crystal display panel including even-numbered rows of pixel units according to an embodiment of the present invention.
  • a liquid crystal display panel 1 of the present invention includes data lines 12 and 14, scanning lines 11, and a plurality of pixel units 13 which are alternately formed by the data lines 12 and 14 and the scanning lines 11.
  • the liquid crystal display panel 1 includes a first display area 21 and a second display area 22, wherein the first display area 21 and the second display area 22 each include a plurality of rows of the pixel units, and the first display The area 21 and the second display area 22 are driven by time synchronized drive signals.
  • the liquid crystal display panel comprises 2n rows of the pixel unit, wherein n is a positive integer.
  • the number of rows of the pixel units of the first display area and the second display area is n.
  • the liquid crystal display panel 1 includes 6 rows of the pixel unit 13 , and divides 3 rows (101-103) pixel units on the liquid crystal display panel into the first display area 21 , and the remaining The three rows (104-106) of pixel units are divided into the second display area 22.
  • FIG. 2 is a schematic structural diagram of a driving circuit of the liquid crystal display panel of FIG. 1 , the pixel unit 13 includes a thin film transistor; the liquid crystal display panel further includes a source driving chip and Gate driver chip:
  • the gate driving chip includes a first gate driving chip 31 and a second gate driving chip 32;
  • the source driving chip includes a first source driving chip 33 and a second source driving chip 34;
  • the first gate driving chip 31 passes through the scan line 11 to the first display area 21 .
  • the control end of the thin film transistor of the pixel unit 13 inputs a first scan signal;
  • the first source driving chip 33 is configured to pass the data line 12 to the pixel unit 13 of the first display area 21 Inputting a data signal to an input end of the thin film transistor;
  • the second gate driving chip 32 inputs a second scan signal to the control terminal of the thin film transistor of the pixel unit 13 of the second display region 22 through the scan line 11; the second source driving chip is used by Inputting a data signal to an input end of the thin film transistor of the pixel unit 13 of the second display area 22 through the data line 14;
  • the first gate driving chip 31 and the second gate driving chip 32 generate the first scan signal and the second scan signal according to the same clock signal.
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel including odd rows of pixel units according to an embodiment of the present invention.
  • the liquid crystal display panel 2 includes 2n+1 rows of the pixel units 13, the first display.
  • the number of rows of the pixel unit of the area is n+1, the number of rows of the pixel unit of the second display area is n; or the number of rows of the pixel unit of the first display area is n, and the number of rows of the second display area is
  • the number of rows of pixel cells is n+1, where n is a positive integer.
  • the liquid crystal display panels 201 to 204 rows of pixel units are divided into a first display area 41, and the liquid crystal display panels 205 to 207 rows of pixel units are divided into The second display area 42.
  • the liquid crystal display panels 201 to 203 rows of pixel units are divided into first display regions 41, and the liquid crystal display panels 204 to 207 rows of pixel units are divided into second display regions 42.
  • FIG. 4 is a schematic structural diagram of a driving circuit of the liquid crystal display panel of FIG. 3;
  • FIG. 4 is a schematic structural diagram of a driving circuit of the liquid crystal display panel of FIG. 3;
  • the pixel unit 13 includes a thin film transistor; the liquid crystal display panel 2 further includes a source driving chip and a gate driving chip:
  • the gate driving chip includes a first gate driving chip 51 and a second gate driving chip 52;
  • the source driving chip includes a first source driving chip 53 and a second source driving chip 54;
  • the data lines of the first display area 41 and the second display area 42 are independent, and the first gate driving chip 51 passes the pixel to the pixel of the first display area 41 through the scan line 11.
  • a control signal of the thin film transistor of the unit 13 inputs a first scan signal;
  • the first source driving chip 53 is configured to input the thin film transistor of the pixel unit 13 of the first display region 41 through the data line 12 Input data signal;
  • the second gate driving chip 52 inputs a second scan signal to the control terminal of the thin film transistor of the pixel unit 13 of the second display region 42 through the scan line 11;
  • the second source driving chip 54 Inputting a data signal to an input end of the thin film transistor of the pixel unit 13 of the second display area 42 through the data line 14;
  • the first gate driving chip 51 and the second gate driving chip 52 generate the first scan signal and the second scan signal according to the same clock signal.
  • FIG. 5 is a schematic diagram of signals in an embodiment of the present invention.
  • FIG. 5 only shows signals of one frame period, and each of the display areas is driven by a time-synchronized driving signal.
  • the driving signal is generated by referring to the same clock signal, and the scanning signal of the gate driving chip is generated according to the clock signal, that is, the control signals of the gate driving chips of each of the display regions are the same. Since the refresh frequency of the frame is f, the scanning time of the pixel unit in each row is: 1/(f*m), and m is the number of rows of the pixel unit, because the display region is driven by time-synchronized driving signals.
  • the driving ensures that the frequency of each of the display areas does not change.
  • the liquid crystal display panel includes 2n rows of the pixel unit, wherein n is a positive integer, and two of the display regions have pixel units of the same row number, the number of rows of the pixel unit is n, that is, two The number of rows of the pixel unit of the display area is half of the number of rows of the pixel unit of the liquid crystal display panel, so the line scan time is doubled, and the charging efficiency is improved.
  • the liquid crystal display panel includes 2n+1 rows of the pixel unit, wherein n is a positive integer, the number of rows of the pixel unit of one of the display regions is n, and the row of the pixel unit of the other display region
  • the number of rows is n+1, that is, the number of rows of pixel units of the two display regions is approximately half of the number of rows of pixel cells of the liquid crystal display panel, so the line scan time is approximately doubled, and the charging efficiency is improved.
  • the driving signal may refer to one clock signal, preferably the clock signal referenced by the driving signal includes two sub-clock signals, the two sub-clock signals have the same period and opposite polarities, so that the liquid crystal display panel includes two For example, a display area of the same row pixel unit is used, and scan signals of the gate driving chips of the first display area and the second display area are generated according to the two sub clock signals. As shown in FIG. 5, the liquid crystal display panel includes six rows of the pixel unit as an example.
  • the first sub-clock signal clk1 and the second sub-clock signal clk2 have the same period and opposite polarities, and TP_U/D indicates the first An output control signal of the data signal of the display area and the second display area, when the TP_U/D is low level, outputting the data signal; STV_U/D respectively indicating the first display area and the second display
  • the trigger signal of the gate driving chip of the region in combination with FIG. 1, G1_U/D respectively represents the scanning signals of the first row 101 pixel unit of the first display region 21 or the first row 104 pixel unit of the second display region 22, respectively.
  • G2_U/D respectively represent scanning signals representing the second row 102 pixel unit of the first display area 21 or the second row 105 pixel unit of the second display area 22
  • G3_U/D respectively represents the first display a scan signal of a third row 103 pixel unit of the region 21 or a third row 106 pixel unit of the second display region 22, the first subclock signal clk1 and the first row 101 or 104 of the two display regions Pixel unit corresponding to
  • the second sub-clock signal clk2 corresponds to the second row 102 or 105 pixel unit of the two display areas
  • the first sub-clock signal clk1 corresponds to the third row 103 or 106 pixel unit of the two display areas.
  • the scanning signals of the next row of pixel units can be shortened by half the scanning period of the scanning signals of the previous row of pixel units (such as G1_U/D) by two sub-clock signals.
  • the cycle thereby further improving the charging efficiency of the pixel unit row, thereby facilitating the improvement of the response speed of the pixel display and improving the display quality.
  • the liquid crystal display panel of the present invention shortens the charging time by dividing the panel into two display areas and simultaneously driving the two display areas, thereby solving the technical problem that the existing charging time is long and the charging demand cannot be satisfied.
  • the present invention also provides a liquid crystal display device including a backlight module; and a liquid crystal display panel;
  • the liquid crystal display panel includes a data line, a scan line, and a plurality of pixel units alternately formed by the data line and the scan line;
  • the liquid crystal display panel includes a first display area and a second display area, wherein the first display area and the second display area each include a plurality of rows of the pixel unit, the first display area and the first The two display areas are driven by time synchronized drive signals.
  • the liquid crystal display panel includes 2n rows of the pixel unit, the number of rows of the pixel units of the first display area and the second display area is n, where n is a positive integer.
  • the liquid crystal display panel includes 2n+1 rows of the pixel unit, the number of rows of the pixel unit of the first display area is n+1, and the number of rows of the pixel unit of the second display area is n, wherein n is a positive integer.
  • the liquid crystal display panel includes 2n+1 rows of the pixel unit, the number of rows of the pixel unit of the first display area is n, and the number of rows of the pixel unit of the second display area is n+1, wherein n is a positive integer.
  • the driving manner of the liquid crystal display panel is as follows: the pixel unit comprises a thin film transistor; the liquid crystal display panel further comprises a source driving chip and a gate driving chip:
  • the gate driving chip includes a first gate driving chip and a second gate driving chip
  • the source driving chip includes a first source driving chip and a second source driving chip
  • the data lines of the first display area and the second display area are independent, and the first gate driving chip is configured to pass the scan line to the thin film of the pixel unit of the first display area.
  • a control signal inputting a first scan signal of the transistor;
  • the second gate driving chip configured to input a second scan signal to a control end of the thin film transistor of the pixel unit of the second display area through the scan line;
  • the first gate driving chip and the second gate driving chip generate the first scan signal and the second scan signal according to the same clock signal.
  • the first source driving chip is configured to input a data signal to an input end of the thin film transistor of the pixel unit of the first display area through the data line; the second source driving chip is configured to pass the The data line inputs a data signal to an input terminal of the thin film transistor of the pixel unit of the second display area.
  • the liquid crystal display device of the present invention can employ any of the above liquid crystal display panels. Since the liquid crystal display panel has been described in detail above, it will not be described herein.
  • the liquid crystal display device of the present invention shortens the charging time by dividing the panel into two display areas and simultaneously driving the two display areas, thereby solving the technical problem that the existing charging time is long and the charging demand cannot be satisfied.

Abstract

一种液晶显示面板（1）及液晶显示装置，液晶显示面板（1）包括数据线（12，14）、扫描线（22）以及由数据线（12，14）和扫描线（11）交错形成的多个像素单元（13）；其中液晶显示面板（1）包括第一显示区域（21）和第二显示区域（22），其中第一显示区域（21）和第二显示区域（22）均包括多行像素单元（13），第一显示区域（21）和第二显示区域（22）由时间同步的驱动信号进行驱动。液晶显示面板（1）及液晶显示装置，通过将面板划分为两个显示区域（21，22），同时将两个显示区域（21，22）同步驱动，从而缩短了充电时间，解决了现有的充电时间较长，无法满足充电需求的技术问题。

Description

一种液晶显示面板及液晶显示装置 技术领域
本发明涉及液晶显示技术领域，特别是涉及一种液晶显示面板及液晶显示装置。
 背景技术
由于液晶分子内混有杂质离子，杂质离子在直流电场下会被电离形成一个极化残留电场。即使不通入外界电场，液晶分子也能在极化残留电场的作用下发生偏转，形成透光，从而影响液晶面板的显示效果。为了克服上述问题，现有技术中的液晶面板采用交流驱动，交流驱动的方式包括：帧反转、行反转、列反转和点反转。由于点反转的显示效果最好，被广泛使用。
但由于点反转是将信号的极性反转，导致像素电极上需要的充电量增大一倍，使得相应的充电时间也会增加一倍，可见这种驱动方式充电效率低下。为了提高液晶显示面板的充电效率，通常采用预充电方法，具体是通过将栅极扫描的时间增加一倍来实现的。但在充电需求量较大的情况下，这种方法仍然不能满足充电的需求。
 技术问题
本发明提供一种液晶显示面板及液晶显示装置，以解决现有技术中充电时间较长，无法满足充电需求的技术问题。
 技术解决方案
为解决上述技术问题，本发明构造了一种液晶显示面板，所述液晶显示面板包括数据线、扫描线以及由所述数据线和所述扫描线交错形成的多个像素单元；
其中所述液晶显示面板包括第一显示区域和第二显示区域，其中所述第一显示区域和所述第二显示区域均包括多行所述像素单元，所述第一显示区域和所述第二显示区域由时间同步的驱动信号进行驱动；
当所述液晶显示面板包括2n行所述像素单元时，所述第一显示区域和所述第二显示区域的像素单元的行数为n；
当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n，其中n为正整数。
在本发明的液晶显示面板中，所述像素单元包括薄膜晶体管；
所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
所述栅驱动芯片包括第一栅驱动芯片和第二栅驱动芯片；
所述源驱动芯片包括第一源驱动芯片和第二源驱动芯片；
其中，所述第一栅驱动芯片，用于通过所述扫描线向所述第一显示区域的所述像素单元的薄膜晶体管的控制端输入第一扫描信号；
所述第二栅驱动芯片，用于通过所述扫描线向所述第二显示区域的所述像素单元的薄膜晶体管的控制端输入第二扫描信号；
所述第一源驱动芯片，用于通过所述数据线向所述第一显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
所述第二源驱动芯片，用于通过所述数据线向所述第二显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
其中，所述第一栅驱动芯片和所述第二栅驱动芯片根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
在本发明的液晶显示面板中，所述第一显示区域的数据线和所述第二显示区域的数据线是独立的。
本发明构造了一种液晶显示面板，所述液晶显示面板包括数据线、扫描线以及由所述数据线和所述扫描线交错形成的多个像素单元；
其中所述液晶显示面板包括第一显示区域和第二显示区域，其中所述第一显示区域和所述第二显示区域均包括多行所述像素单元，所述第一显示区域和所述第二显示区域由时间同步的驱动信号进行驱动。
在本发明的液晶显示面板中，当所述液晶显示面板包括2n行所述像素单元时，所述第一显示区域和所述第二显示区域的像素单元的行数为n，其中n为正整数。
在本发明的液晶显示面板中，当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n，其中n为正整数。
在本发明的液晶显示面板中，当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n，所述第二显示区域的像素单元的行数为n+1，其中n为正整数。
在本发明的液晶显示面板中，所述像素单元包括薄膜晶体管；
所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
所述栅驱动芯片包括第一栅驱动芯片和第二栅驱动芯片；
所述源驱动芯片包括第一源驱动芯片和第二源驱动芯片；
其中，所述第一栅驱动芯片，用于通过所述扫描线向所述第一显示区域的所述像素单元的薄膜晶体管的控制端输入第一扫描信号；
所述第二栅驱动芯片，用于通过所述扫描线向所述第二显示区域的所述像素单元的薄膜晶体管的控制端输入第二扫描信号；
所述第一源驱动芯片，用于通过所述数据线向所述第一显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
所述第二源驱动芯片，用于通过所述数据线向所述第二显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
其中，所述第一栅驱动芯片和所述第二栅驱动芯片根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
在本发明的液晶显示面板中，所述第一显示区域的数据线和所述第二显示区域的数据线是独立的。
本发明还提供一种液晶显示装置，其包括：背光模块；以及
液晶显示面板；
所述液晶显示面板包括数据线、扫描线以及由所述数据线和所述扫描线交错形成的多个像素单元；
其中所述液晶显示面板包括第一显示区域和第二显示区域，其中所述第一显示区域和所述第二显示区域均包括多行所述像素单元，所述第一显示区域和所述第二显示区域由时间同步的驱动信号进行驱动。
在本发明的液晶显示装置中，当所述液晶显示面板包括2n行所述像素单元时，所述第一显示区域和所述第二显示区域的像素单元的行数为n，其中n为正整数。
在本发明的液晶显示装置中，当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n，其中n为正整数。
在本发明的液晶显示装置中，当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n，所述第二显示区域的像素单元的行数为n+1，其中n为正整数。
在本发明的液晶显示装置中，所述像素单元包括薄膜晶体管；
所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
所述栅驱动芯片包括第一栅驱动芯片和第二栅驱动芯片；
所述源驱动芯片包括第一源驱动芯片和第二源驱动芯片；
其中，所述第一栅驱动芯片，用于通过所述扫描线向所述第一显示区域的所述像素单元的薄膜晶体管的控制端输入第一扫描信号；
所述第二栅驱动芯片，用于通过所述扫描线向所述第二显示区域的所述像素单元的薄膜晶体管的控制端输入第二扫描信号；
所述第一源驱动芯片，用于通过所述数据线向所述第一显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
所述第二源驱动芯片，用于通过所述数据线向所述第二显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
其中，所述第一栅驱动芯片和所述第二栅驱动芯片根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
在本发明的液晶显示装置中，所述第一显示区域的数据线和所述第二显示区域的数据线是独立的。
 有益效果
本发明的液晶显示面板及液晶显示装置，通过将面板划分为两个显示区域，同时将两个显示区域同步驱动，从而缩短了充电时间，解决了现有的充电时间较长，无法满足充电需求的技术问题。
 附图说明
图1是本发明实施例中液晶显示面板包括偶数行像素单元的结构示意图；
图2是图1中液晶显示面板的驱动电路的结构示意图；
图3是本发明实施例中液晶显示面板包括奇数行像素单元的结构示意图；
图4是图3中液晶显示面板的驱动电路的结构示意图；
图5是本发明实施例中的信号的示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是以相同标号表示。
请参照图1，图1为本发明实施例中液晶显示面板包括偶数行像素单元的结构示意图。
如图1所示，本发明的液晶显示面板1，包括数据线12、14、扫描线11以及由所述数据线12、14和所述扫描线11交错形成的多个像素单元13。
其中所述液晶显示面板1包括第一显示区域21和第二显示区域22，其中所述第一显示区域21和所述第二显示区域22均包括多行所述像素单元，所述第一显示区域21和所述第二显示区域22由时间同步的驱动信号进行驱动。
优选地，当所述液晶显示面板包括2n行所述像素单元时，其中n为正整数。所述第一显示区域和所述第二显示区域的像素单元的行数都为n。如图1所示，所述液晶显示面板1包括6行所述像素单元13，将所述液晶显示面板上面的3行（101-103）像素单元划分为所述第一显示区域21，将剩余的3行（104-106）像素单元划分为所述第二显示区域22。
上述液晶显示面板的驱动方式具体如图2所示，图2为图1中液晶显示面板的驱动电路的结构示意图，所述像素单元13包括薄膜晶体管；所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
所述栅驱动芯片包括第一栅驱动芯片31和第二栅驱动芯片32；所述源驱动芯片包括第一源驱动芯片33和第二源驱动芯片34；
结合图1，其中所述第一显示区域21和所述第二显示区域22的数据线是独立的，所述第一栅驱动芯片31，通过所述扫描线11向所述第一显示区域21的所述像素单元13的薄膜晶体管的控制端输入第一扫描信号；所述第一源驱动芯片33，用于通过所述数据线12向所述第一显示区域21的所述像素单元13的薄膜晶体管的输入端输入数据信号；
所述第二栅驱动芯片32，通过所述扫描线11向所述第二显示区域22的所述像素单元13的薄膜晶体管的控制端输入第二扫描信号；所述第二源驱动芯片，用于通过所述数据线14向所述第二显示区域22的所述像素单元13的薄膜晶体管的输入端输入数据信号；
其中，所述第一栅驱动芯片31和所述第二栅驱动芯片32是根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
如图3所示，图3为本发明实施例中液晶显示面板包括奇数行像素单元的结构示意图，当所述液晶显示面板2包括2n+1行所述像素单元13时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n；或者所述第一显示区域的像素单元的行数为n，所述第二显示区域的像素单元的行数为n+1，其中n为正整数。譬如所述液晶显示面板2包括7行所述像素单元时，将所述液晶显示面板201至204行像素单元划分为第一显示区域41，将所述液晶显示面板205至207行像素单元划分为第二显示区域42。或者将所述液晶显示面板201至203行像素单元划分为第一显示区域41，将所述液晶显示面板204至207行像素单元划分为第二显示区域42。
上述液晶显示面板的驱动方式具体如图4所示，图4是图3中液晶显示面板的驱动电路的结构示意图；
结合图3，所述像素单元13包括薄膜晶体管；所述液晶显示面板2还包括源驱动芯片和栅驱动芯片：
所述栅驱动芯片包括第一栅驱动芯片51和第二栅驱动芯片52；所述源驱动芯片包括第一源驱动芯片53和第二源驱动芯片54；
其中所述第一显示区域41和所述第二显示区域42的数据线是独立的，所述第一栅驱动芯片51，通过所述扫描线11向所述第一显示区域41的所述像素单元13的薄膜晶体管的控制端输入第一扫描信号；所述第一源驱动芯片53，用于通过所述数据线12向所述第一显示区域41的所述像素单元13的薄膜晶体管的输入端输入数据信号；
所述第二栅驱动芯片52，通过所述扫描线11向所述第二显示区域42的所述像素单元13的薄膜晶体管的控制端输入第二扫描信号；所述第二源驱动芯片54，用于通过所述数据线14向所述第二显示区域42的所述像素单元13的薄膜晶体管的输入端输入数据信号；
其中，所述第一栅驱动芯片51和所述第二栅驱动芯片52是根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
图5为本发明实施例中的信号的示意图；图5仅给出一帧周期的信号示意，每个所述显示区域由时间同步的驱动信号进行驱动。所述驱动信号参考同一时钟信号产生，所述栅驱动芯片的扫描信号根据所述时钟信号生成，即每个所述显示区域的栅驱动芯片的控制信号相同。由于帧的刷新频率为f，则每一行所述像素单元扫描时间为：1/(f*m)，m为所述像素单元的行数，由于将所述显示区域通过时间同步的驱动信号进行驱动，保证了每个所述显示区域的频率不变。当所述液晶显示面板包括2n行所述像素单元时，其中n为正整数，且两个所述显示区域具有相同行数的像素单元，其像素单元的行数为n，即两个所述显示区域的像素单元的行数为所述液晶显示面板的像素单元行数的一半，因此行扫描时间增大一倍，提高了充电效率。
当所述液晶显示面板包括2n+1行所述像素单元时，其中n为正整数，上述其中一个所述显示区域的像素单元的行数为n，另一个所述显示区域的像素单元的行数为n+1，即两个所述显示区域的像素单元的行数近似于所述液晶显示面板的像素单元行数的一半，因此行扫描时间近似增大一倍，提高了充电效率。
所述驱动信号可以参考一个时钟信号，优选地所述驱动信号参考的时钟信号包括两个子时钟信号，这两个子时钟信号的周期相同、且极性相反，以所述液晶显示面板包括两个具有相同行数像素单元的显示区域为例，所述第一显示区域和所述第二显示区域的栅驱动芯片的扫描信号根据所述两个子时钟信号生成。譬如图5所示，以所述液晶显示面板包括6行所述像素单元为例，第一子时钟信号clk1和第二子时钟信号clk2的周期相同，极性相反，TP_U/D表示所述第一显示区域和所述第二显示区域的数据信号的输出控制信号，当TP_U/D为低电平时，输出所述数据信号；STV_U/D分别表示所述第一显示区域和所述第二显示区域的栅驱动芯片的触发信号，结合图1，G1_U/D分别表示所述第一显示区域21的第一行101像素单元或者所述第二显示区域22的第一行104像素单元的扫描信号，G2_U/D分别表示表示所述第一显示区域21的第二行102像素单元或者所述第二显示区域22的第二行105像素单元的扫描信号，G3_U/D分别表示所述第一显示区域21的第三行103像素单元或者所述第二显示区域22的第三行106像素单元的扫描信号，所述第一子时钟信号clk1与所述两个显示区域的第一行101或104像素单元对应，所述第二子时钟信号clk2与所述两个显示区域的第二行102或105像素单元对应，所述第一子时钟信号clk1与所述两个显示区域的第三行103或106像素单元对应。当子时钟信号为高电平时，其对应行的像素单元的扫描信号为高电平。
相比于一个时钟信号驱动的方式，通过两个子时钟信号能够使得后面一行像素单元（譬如G2_U/D）的扫描信号比前面一行像素单元（譬如G1_U/D）的扫描信号的扫描周期缩短半个周期，从而进一步提高所述像素单元行的充电效率，从而有利于提高像素显示的响应速度，提高显示质量。
本发明的液晶显示面板，通过将面板划分为两个显示区域，同时将两个显示区域同步驱动，从而缩短了充电时间，解决了现有的充电时间较长，无法满足充电需求的技术问题。
本发明还提供一种液晶显示装置，所述液晶显示装置包括背光模块；以及液晶显示面板；
所述液晶显示面板包括数据线、扫描线以及由所述数据线和所述扫描线交错形成的多个像素单元；
其中所述液晶显示面板包括第一显示区域和第二显示区域，其中所述第一显示区域和所述第二显示区域均包括多行所述像素单元，所述第一显示区域和所述第二显示区域由时间同步的驱动信号进行驱动。
当所述液晶显示面板包括2n行所述像素单元时，所述第一显示区域和所述第二显示区域的像素单元的行数为n，其中n为正整数。
当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n，其中n为正整数。
当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n，所述第二显示区域的像素单元的行数为n+1，其中n为正整数。
上述液晶显示面板的驱动方式为：所述像素单元包括薄膜晶体管；所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
所述栅驱动芯片包括第一栅驱动芯片和第二栅驱动芯片；
所述源驱动芯片包括第一源驱动芯片和第二源驱动芯片；
其中所述第一显示区域和所述第二显示区域的数据线是独立的，所述第一栅驱动芯片，用于通过所述扫描线向所述第一显示区域的所述像素单元的薄膜晶体管的控制端输入第一扫描信号；所述第二栅驱动芯片，用于通过所述扫描线向所述第二显示区域的所述像素单元的薄膜晶体管的控制端输入第二扫描信号；且所述第一栅驱动芯片和所述第二栅驱动芯片根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
所述第一源驱动芯片，用于通过所述数据线向所述第一显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；所述第二源驱动芯片，用于通过所述数据线向所述第二显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号。
本发明的液晶显示装置可以采用上述任何一种液晶显示面板，鉴于所述液晶显示面板在上文已有详细的描述，此处不再赘述。
本发明的液晶显示装置，通过将面板划分为两个显示区域，同时将两个显示区域同步驱动，从而缩短了充电时间，解决了现有的充电时间较长，无法满足充电需求的技术问题。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (15)

  1. 一种液晶显示面板，其中
    所述液晶显示面板包括数据线、扫描线以及由所述数据线和所述扫描线交错形成的多个像素单元；
    其中所述液晶显示面板包括第一显示区域和第二显示区域，其中所述第一显示区域和所述第二显示区域均包括多行所述像素单元，所述第一显示区域和所述第二显示区域由时间同步的驱动信号进行驱动；
    当所述液晶显示面板包括2n行所述像素单元时，所述第一显示区域和所述第二显示区域的像素单元的行数为n；
    当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n，其中n为正整数。
  2. 根据权利要求1所述的液晶显示面板，其中
    所述像素单元包括薄膜晶体管；
    所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
    所述栅驱动芯片包括第一栅驱动芯片和第二栅驱动芯片；
    所述源驱动芯片包括第一源驱动芯片和第二源驱动芯片；
    其中，所述第一栅驱动芯片，用于通过所述扫描线向所述第一显示区域的所述像素单元的薄膜晶体管的控制端输入第一扫描信号；
    所述第二栅驱动芯片，用于通过所述扫描线向所述第二显示区域的所述像素单元的薄膜晶体管的控制端输入第二扫描信号；
    所述第一源驱动芯片，用于通过所述数据线向所述第一显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
    所述第二源驱动芯片，用于通过所述数据线向所述第二显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
    其中，所述第一栅驱动芯片和所述第二栅驱动芯片根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
  3. 根据权利要求1所述的液晶显示面板，其中所述第一显示区域的数据线和所述第二显示区域的数据线是独立的。
  4. 一种液晶显示面板，其中
    所述液晶显示面板包括数据线、扫描线以及由所述数据线和所述扫描线交错形成的多个像素单元；
    其中所述液晶显示面板包括第一显示区域和第二显示区域，其中所述第一显示区域和所述第二显示区域均包括多行所述像素单元，所述第一显示区域和所述第二显示区域由时间同步的驱动信号进行驱动。
  5. 根据权利要求4所述的液晶显示面板，其中
    当所述液晶显示面板包括2n行所述像素单元时，所述第一显示区域和所述第二显示区域的像素单元的行数为n，其中n为正整数。
  6. 根据权利要求4所述的液晶显示面板，其中
    当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n，其中n为正整数。
  7. 根据权利要求4所述的液晶显示面板，其中
    当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n，所述第二显示区域的像素单元的行数为n+1，其中n为正整数。
  8. 根据权利要求4所述的液晶显示面板，其中
    所述像素单元包括薄膜晶体管；
    所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
    所述栅驱动芯片包括第一栅驱动芯片和第二栅驱动芯片；
    所述源驱动芯片包括第一源驱动芯片和第二源驱动芯片；
    其中，所述第一栅驱动芯片，用于通过所述扫描线向所述第一显示区域的所述像素单元的薄膜晶体管的控制端输入第一扫描信号；
    所述第二栅驱动芯片，用于通过所述扫描线向所述第二显示区域的所述像素单元的薄膜晶体管的控制端输入第二扫描信号；
    所述第一源驱动芯片，用于通过所述数据线向所述第一显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
    所述第二源驱动芯片，用于通过所述数据线向所述第二显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
    其中，所述第一栅驱动芯片和所述第二栅驱动芯片根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
  9. 根据权利要求4所述的液晶显示面板，其中所述第一显示区域的数据线和所述第二显示区域的数据线是独立的。
  10. 一种液晶显示装置，其包括：
    背光模块；以及
    液晶显示面板；
    所述液晶显示面板包括数据线、扫描线以及由所述数据线和所述扫描线交错形成的多个像素单元；
    其中所述液晶显示面板包括第一显示区域和第二显示区域，其中所述第一显示区域和所述第二显示区域均包括多行所述像素单元，所述第一显示区域和所述第二显示区域由时间同步的驱动信号进行驱动。
  11. 根据权利要求10所述的液晶显示装置，其中
    当所述液晶显示面板包括2n行所述像素单元时，所述第一显示区域和所述第二显示区域的像素单元的行数为n，其中n为正整数。
  12. 根据权利要求10所述的液晶显示装置，其中
    当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n+1，所述第二显示区域的像素单元的行数为n，其中n为正整数。
  13. 根据权利要求10所述的液晶显示装置，其中
    当所述液晶显示面板包括2n+1行所述像素单元时，所述第一显示区域的像素单元的行数为n，所述第二显示区域的像素单元的行数为n+1，其中n为正整数。
  14. 根据权利要求10所述的液晶显示装置，其中
    所述像素单元包括薄膜晶体管；
    所述液晶显示面板还包括源驱动芯片和栅驱动芯片：
    所述栅驱动芯片包括第一栅驱动芯片和第二栅驱动芯片；
    所述源驱动芯片包括第一源驱动芯片和第二源驱动芯片；
    其中，所述第一栅驱动芯片，用于通过所述扫描线向所述第一显示区域的所述像素单元的薄膜晶体管的控制端输入第一扫描信号；
    所述第二栅驱动芯片，用于通过所述扫描线向所述第二显示区域的所述像素单元的薄膜晶体管的控制端输入第二扫描信号；
    所述第一源驱动芯片，用于通过所述数据线向所述第一显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
    所述第二源驱动芯片，用于通过所述数据线向所述第二显示区域的所述像素单元的薄膜晶体管的输入端输入数据信号；
    其中，所述第一栅驱动芯片和所述第二栅驱动芯片根据同一时钟信号生成所述第一扫描信号和所述第二扫描信号。
  15. 根据权利要求10所述的液晶显示装置，其中所述第一显示区域的数据线和所述第二显示区域的数据线是独立的。
PCT/CN2014/084996 2014-08-18 2014-08-22 一种液晶显示面板及液晶显示装置 WO2016026133A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/390,353 US20160178973A1 (en) 2014-08-18 2014-08-22 Liquid Crystal Display Panel and Liquid Crystal Display Device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410409344.8A CN104166262A (zh) 2014-08-18 2014-08-18 一种液晶显示面板及液晶显示装置
CN201410409344.8 2014-08-18

Publications (1)

Publication Number Publication Date
WO2016026133A1 true WO2016026133A1 (zh) 2016-02-25

Family

ID=51910149

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/084996 WO2016026133A1 (zh) 2014-08-18 2014-08-22 一种液晶显示面板及液晶显示装置

Country Status (3)

Country Link
US (1) US20160178973A1 (zh)
CN (1) CN104166262A (zh)
WO (1) WO2016026133A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104166262A (zh) * 2014-08-18 2014-11-26 深圳市华星光电技术有限公司 一种液晶显示面板及液晶显示装置
CN104809998A (zh) * 2015-05-11 2015-07-29 武汉华星光电技术有限公司 一种阵列基板和显示装置
CN106652929B (zh) * 2016-10-18 2019-11-05 武汉华星光电技术有限公司 显示模组及液晶显示屏
CN112562558B (zh) * 2019-09-10 2023-01-13 京东方科技集团股份有限公司 显示装置及其驱动方法、驱动装置
CN110969975B (zh) * 2019-11-26 2022-11-22 厦门天马微电子有限公司 显示面板及其驱动方法和显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09120052A (ja) * 1995-10-25 1997-05-06 Matsushita Electric Ind Co Ltd 液晶表示装置の駆動方法
US6177917B1 (en) * 1997-04-17 2001-01-23 Sharp Kabushiki Kaisha Liquid crystal display device and method for driving the same
CN101251699A (zh) * 2008-04-02 2008-08-27 友达光电股份有限公司 实现点反转的数据多路转换器架构的显示装置及驱动方法
CN101266371A (zh) * 2007-03-13 2008-09-17 上海天马微电子有限公司 场序式液晶显示装置及其驱动方法
CN101751885A (zh) * 2008-12-03 2010-06-23 乐金显示有限公司 液晶显示设备及其驱动方法
CN104166262A (zh) * 2014-08-18 2014-11-26 深圳市华星光电技术有限公司 一种液晶显示面板及液晶显示装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003023750A1 (en) * 2001-09-07 2003-03-20 Matsushita Electric Industrial Co., Ltd. El display panel, its driving method, and el display apparatus
JP2006039457A (ja) * 2004-07-30 2006-02-09 Oki Electric Ind Co Ltd 表示パネルのスキャン方法及び表示装置
US8334960B2 (en) * 2006-01-18 2012-12-18 Samsung Display Co., Ltd. Liquid crystal display having gate driver with multiple regions
TWI340943B (en) * 2006-09-29 2011-04-21 Chimei Innolux Corp Liquid crystal panel and driving circuit of the same
CN101551979A (zh) * 2008-04-03 2009-10-07 上海天马微电子有限公司 户外可读液晶显示装置
CN103843055A (zh) * 2011-08-02 2014-06-04 夏普株式会社 显示装置和扫描信号线的驱动方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09120052A (ja) * 1995-10-25 1997-05-06 Matsushita Electric Ind Co Ltd 液晶表示装置の駆動方法
US6177917B1 (en) * 1997-04-17 2001-01-23 Sharp Kabushiki Kaisha Liquid crystal display device and method for driving the same
CN101266371A (zh) * 2007-03-13 2008-09-17 上海天马微电子有限公司 场序式液晶显示装置及其驱动方法
CN101251699A (zh) * 2008-04-02 2008-08-27 友达光电股份有限公司 实现点反转的数据多路转换器架构的显示装置及驱动方法
CN101751885A (zh) * 2008-12-03 2010-06-23 乐金显示有限公司 液晶显示设备及其驱动方法
CN104166262A (zh) * 2014-08-18 2014-11-26 深圳市华星光电技术有限公司 一种液晶显示面板及液晶显示装置

Also Published As

Publication number Publication date
CN104166262A (zh) 2014-11-26
US20160178973A1 (en) 2016-06-23

Similar Documents

Publication Publication Date Title
WO2017215040A1 (zh) 栅极驱动电路及液晶显示装置
WO2016106802A1 (zh) 用于液晶显示装置的goa电路
WO2018205333A1 (zh) 一种液晶显示面板及装置
WO2016026133A1 (zh) 一种液晶显示面板及液晶显示装置
WO2017054262A1 (zh) 一种goa电路及液晶显示器
WO2017015982A1 (zh) 一种液晶显示面板及装置
WO2016074283A1 (zh) 用于液晶显示的goa电路及液晶显示装置
WO2013155683A1 (zh) 液晶显示装置及其驱动电路
WO2016187893A1 (zh) 一种多相位时钟产生电路及液晶显示面板
WO2014056239A1 (zh) 液晶显示装置及其驱动电路
WO2017045215A1 (zh) 一种液晶显示装置及其栅极驱动电路
WO2019205208A1 (zh) 一种多路复用型驱动电路以及驱动方法、显示设备
WO2017049687A1 (zh) 一种goa电路、显示装置和goa电路的驱动方法
WO2018014412A1 (zh) Goa电路及液晶显示面板
WO2017101176A1 (zh) 液晶显示装置
WO2018018723A1 (zh) 扫描驱动电路及具有该电路的平面显示装置
WO2013013431A1 (zh) 液晶显示面板
WO2018129784A1 (zh) 一种goa电路及液晶显示器
WO2017045220A1 (zh) 一种goa电路及液晶显示器
WO2018176561A1 (zh) 一种液晶面板驱动电路及液晶显示装置
WO2018120308A1 (zh) 一种驱动电路
WO2020093494A1 (zh) 显示面板的驱动电路及其方法，以及显示装置
WO2018045625A1 (zh) 平面显示装置及其扫描驱动电路
WO2017219400A1 (zh) Hsd液晶显示面板及液晶显示装置
WO2016101299A1 (zh) 一种液晶显示面板的源极驱动电路及液晶显示器

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14390353

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14900077

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14900077

Country of ref document: EP

Kind code of ref document: A1