WO2015151918A1 - Module à diodes électroluminescentes - Google Patents

Module à diodes électroluminescentes Download PDF

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Publication number
WO2015151918A1
WO2015151918A1 PCT/JP2015/058843 JP2015058843W WO2015151918A1 WO 2015151918 A1 WO2015151918 A1 WO 2015151918A1 JP 2015058843 W JP2015058843 W JP 2015058843W WO 2015151918 A1 WO2015151918 A1 WO 2015151918A1
Authority
WO
WIPO (PCT)
Prior art keywords
emitting diode
light emitting
light
copper substrate
diode module
Prior art date
Application number
PCT/JP2015/058843
Other languages
English (en)
Japanese (ja)
Inventor
津田裕樹
Original Assignee
株式会社ソディック
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社ソディック filed Critical 株式会社ソディック
Publication of WO2015151918A1 publication Critical patent/WO2015151918A1/fr

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/641Heat extraction or cooling elements characterized by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/42Transparent materials

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
  • Non-Portable Lighting Devices Or Systems Thereof (AREA)

Abstract

L'invention concerne un module à diodes électroluminescentes (1) dans lequel une pluralité d'éléments à diode électroluminescente (2) sont disposés au-dessus d'un substrat en cuivre (3). Une plaque réfléchissante (5) est fixée à une région prédéterminée α sur la partie supérieure du substrat en cuivre (3) de manière à adhérer entièrement à cette dernière. Sur la plaque réfléchissante (5), les éléments à diode électroluminescente (2) sont montés dans un état électriquement isolé. Un film mince d'oxyde de titane (7) est formé au moyen d'un dépôt sous vide sur toute la surface du côté de la plaque réfléchissante (5) sur lequel la pluralité d'éléments à diode électroluminescente (2) sont fixés. Sur le substrat en cuivre (3), la pluralité d'éléments à diode électroluminescente (2) sont enfermés avec la plaque réfléchissante (5) par une résine transmettant la lumière qui comprend un matériau fluorescent.
PCT/JP2015/058843 2014-03-31 2015-03-24 Module à diodes électroluminescentes WO2015151918A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014072970A JP5859050B2 (ja) 2014-03-31 2014-03-31 発光ダイオードモジュール
JP2014-072970 2014-03-31

Publications (1)

Publication Number Publication Date
WO2015151918A1 true WO2015151918A1 (fr) 2015-10-08

Family

ID=54240245

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2015/058843 WO2015151918A1 (fr) 2014-03-31 2015-03-24 Module à diodes électroluminescentes

Country Status (2)

Country Link
JP (1) JP5859050B2 (fr)
WO (1) WO2015151918A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009119461A1 (fr) * 2008-03-26 2009-10-01 島根県 Module électroluminescent à semi-conducteur et son procédé de fabrication
WO2010113852A1 (fr) * 2009-03-31 2010-10-07 東芝ライテック株式会社 Dispositif électroluminescent et dispositif d'éclairage
JP2011014890A (ja) * 2009-06-02 2011-01-20 Mitsubishi Chemicals Corp 金属基板及び光源装置
JP2011044593A (ja) * 2009-08-21 2011-03-03 Hitachi Chem Co Ltd Led基板及びledパッケージ
JP2012109529A (ja) * 2010-09-16 2012-06-07 Hitachi Cable Ltd 半導体発光素子搭載用基板、及びそれを用いた半導体発光装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4844506B2 (ja) * 2007-08-28 2011-12-28 パナソニック電工株式会社 発光装置
JP2013149683A (ja) * 2012-01-17 2013-08-01 Nisshinbo Mechatronics Inc Led発光装置およびその製造方法ならびにled照明装置
JP2014033027A (ja) * 2012-08-01 2014-02-20 Tss Kk チップオンボード基板及びその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009119461A1 (fr) * 2008-03-26 2009-10-01 島根県 Module électroluminescent à semi-conducteur et son procédé de fabrication
WO2010113852A1 (fr) * 2009-03-31 2010-10-07 東芝ライテック株式会社 Dispositif électroluminescent et dispositif d'éclairage
JP2011014890A (ja) * 2009-06-02 2011-01-20 Mitsubishi Chemicals Corp 金属基板及び光源装置
JP2011044593A (ja) * 2009-08-21 2011-03-03 Hitachi Chem Co Ltd Led基板及びledパッケージ
JP2012109529A (ja) * 2010-09-16 2012-06-07 Hitachi Cable Ltd 半導体発光素子搭載用基板、及びそれを用いた半導体発光装置

Also Published As

Publication number Publication date
JP5859050B2 (ja) 2016-02-10
JP2015195299A (ja) 2015-11-05

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