WO2015114788A1 - Circuit de protection d'élément à semi-conducteur - Google Patents

Circuit de protection d'élément à semi-conducteur Download PDF

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Publication number
WO2015114788A1
WO2015114788A1 PCT/JP2014/052197 JP2014052197W WO2015114788A1 WO 2015114788 A1 WO2015114788 A1 WO 2015114788A1 JP 2014052197 W JP2014052197 W JP 2014052197W WO 2015114788 A1 WO2015114788 A1 WO 2015114788A1
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WO
WIPO (PCT)
Prior art keywords
circuit
semiconductor element
voltage
delay
short
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Application number
PCT/JP2014/052197
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English (en)
Japanese (ja)
Inventor
和俊 小川
石川　勝美
歩 畑中
景山　寛
徹 増田
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株式会社日立製作所
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Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to PCT/JP2014/052197 priority Critical patent/WO2015114788A1/fr
Publication of WO2015114788A1 publication Critical patent/WO2015114788A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0822—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches

Definitions

  • the present invention relates to a protection circuit suitable for application to a power conversion system using a semiconductor element that performs a switching operation for converting DC power into AC power or converting AC power into DC power.
  • IGBT Insulated Gate Bipolar Transistor
  • the power converter is a function for converting DC power supplied from a DC power source into AC power for supplying an AC electric load such as a rotating electrical machine, or for supplying AC power generated by the rotating electrical machine to a DC power source. It has a function to convert to DC power.
  • the power conversion device has an inverter circuit having a plurality of semiconductor elements, and the semiconductor elements repeat the conduction operation and the interruption operation, thereby changing the DC power to the AC power or the AC power to the DC power. Perform power conversion to power.
  • Patent Document 1 discloses a short-circuit protection circuit technology having such a short-circuit protection function.
  • the level of the gate voltage and the collector voltage of the IGBT is detected, and when both are high (hereinafter abbreviated as “H”), it is determined as a short circuit and the semiconductor element is protected. Means for doing this are described.
  • the on-resistance is reduced, so that the saturation current is larger and the mutual conductance is larger than the conventional Si switching device.
  • Patent Document 1 The invention described in Patent Document 1 is invented for a conventional Si switching device, and includes a comparison circuit 1 that compares a gate voltage with a reference value 1, and a comparison circuit that compares a drain voltage with a reference value 2. 2 and a logic circuit AND1 that determines a short circuit based on outputs of the comparison circuit 1 and the comparison circuit 2.
  • FIG. 1 shows a conventional Si switching device
  • FIG. 2 shows an example of the gate voltage, drain current, and drain voltage waveforms of a switching device having a large transconductance
  • comparison circuit 1 and comparison circuit 2 when the invention described in Patent Document 1 is applied.
  • the gate voltage at the time of non-short circuit of the conventional Si switching device has a period in which it remains constant due to the mirror effect.
  • a switching device with a large mutual conductance does not cause a large difference as compared with a conventional Si switching device.
  • Patent Document 1 is an invention considering the gate voltage waveform of the conventional Si switching device shown in FIG.
  • the gate voltage is compared with the reference value 1 in the period where the difference between the gate voltage and the non-short circuit shown in FIG. 1 is large, and H is output from the comparison circuit 1 in the case of a short circuit.
  • the outputs of the comparison circuit 1 and the comparison circuit 2 are input to the logic circuit AND1, and when the output of the logic circuit AND1 is H, it is determined as a short circuit.
  • H is output from the comparison circuit 1 at the time of non-short circuit, and the output of the comparison circuit 2 is also H during the period until the drain voltage reaches the reference value thereafter. It is determined as a short circuit, and a false detection occurs.
  • the semiconductor element protection circuit detects, for example, a first voltage that is a voltage between the gate terminal and the source terminal of a semiconductor element having a drain terminal, a source terminal, and a gate terminal.
  • a first comparison circuit for comparing the first voltage with a first threshold; a second voltage that is a voltage between the drain terminal and the source terminal of the semiconductor element;
  • a second comparison circuit that compares a voltage of 2 with a second threshold, a first delay circuit that delays an output signal of the first comparison circuit, the first delay circuit, and the second comparison
  • a short circuit determination circuit for determining a short circuit of the semiconductor element based on the output of the circuit.
  • the present invention it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • FIG. 1 is a diagram showing a circuit configuration described in Example 1.
  • FIG. FIG. 3 is a diagram showing an output waveform of the circuit described in Example 1.
  • 6 is a diagram showing a circuit configuration described in Example 2.
  • FIG. 6 is a diagram showing a circuit configuration described in Example 3.
  • FIG. 6 is a diagram illustrating an output waveform of a circuit described in Example 3.
  • FIG. 6 is a diagram showing a circuit configuration described in Example 4.
  • FIG. 6 is a diagram showing a circuit configuration described in Example 5.
  • FIG. 10 is a diagram showing a circuit configuration described in Example 6.
  • FIG. 10 is a diagram showing a circuit configuration described in Example 7.
  • the present invention is characterized by short-circuit detection means that takes into account the time from when the gate voltage reaches the reference value 1 to when the drain voltage reaches the reference value 2. Delay the output of the comparison circuit 1, and set the delay time to be longer than the time from when the non-short-circuited gate voltage reaches the reference value until the non-short-circuited drain voltage reaches the reference value. input. By detecting the delayed signal of the comparison circuit 1 and the output of the comparison circuit 2 as H, it is short-circuited. become.
  • FIG. 3 shows the circuit configuration of the first embodiment of the present invention
  • FIG. 4 shows the gate voltage, drain current, and drain voltage waveforms of the switching device 3, and outputs of the comparison circuit 1, the comparison circuit 2, the delay circuit 7, and the short circuit determination circuit 8. Each waveform is shown.
  • a gate circuit 4 for turning on and off the switching device at the gate terminal of the switching device 3 and a protection circuit 10 for protecting the switching device in the event of a short circuit.
  • the protection circuit 10 includes a drain voltage detection circuit 6, a gate voltage detection circuit 5, a comparison circuit 1, a comparison circuit 2, a delay circuit 7, a short circuit determination circuit 8, and a soft shutoff command circuit 9.
  • the comparison circuit 1 compares the output of the gate voltage detection circuit 5 with the reference value 1. At this time, H is output when the gate voltage detection circuit 5 is larger than the reference value 1, and L is output when the gate voltage detection circuit 5 is smaller.
  • the output of the drain voltage detection circuit 6 and the reference value 2 are compared by the comparison circuit 2.
  • H is output when the output of the drain voltage detection circuit 6 is large with respect to the reference value 2
  • L is output when the output is small.
  • the output of the comparison circuit 1 is delayed by the delay circuit 7.
  • the delay time is determined from the time from when the gate voltage detection circuit 5 at the turn-on time in the non-short circuit reaches the reference value 1 to the time when the output of the drain voltage detection circuit 6 reaches the reference value 2. Set to a longer time.
  • the outputs of the delay circuit 7 and the comparison circuit 2 are input to the short-circuit determination circuit 8, and when both signals are H, the short-circuit determination circuit 8 determines that it is short-circuited, and when either or both signals are L The short circuit determination circuit 8 determines that there is no short circuit.
  • the short circuit determination circuit can be easily configured by using a logic circuit AND or the like.
  • the gate circuit receives a command from the soft shut-off command circuit, shuts off the on / off signal when short-circuited, changes the gate voltage more slowly than when not short-circuited, and turns off the switching device.
  • Slow interruption can be achieved by switching to a larger gate resistance than when there is no short circuit.
  • the present embodiment it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • FIG. 5 is a circuit diagram showing the comparison circuit 1, the comparison circuit 2, the delay circuit 7, and the short circuit determination circuit 8 according to the second embodiment of the present invention as a comparator, a logic circuit, and a passive element.
  • the comparison circuit is composed of a comparator 31 and a comparator 32.
  • the reference voltage source 33 is input to the inverting input terminal of the comparator 31 and the output of the gate voltage detection circuit 5 is input to the non-inverting input terminal.
  • the reference voltage source 34 is input to the inverting input terminal of the comparator 32, and the output of the voltage detection circuit 6 is input to the non-inverting input terminal.
  • ⁇ ⁇ Short circuit determination circuit 8 consists of logic circuit AND37.
  • Delay circuit 7 is composed of capacitor 35 and resistor 36.
  • the output of the comparator 31 has a gentle waveform due to the capacitor and resistance.
  • a delay circuit can be configured by the capacitor 35 and the resistor 36.
  • the present embodiment it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • FIG. 6 shows the circuit configuration of the third embodiment of the present invention
  • FIG. 7 shows the gate voltage, drain current, and drain voltage waveforms of the switching device 3, and outputs of the comparison circuit 1, the comparison circuit 12, the delay circuit 7, and the short circuit determination circuit 8. Each waveform is shown.
  • a drain current detection circuit 11 includes a drain current detection circuit 11, a gate voltage detection circuit 5, a comparison circuit 1, a comparison circuit 12, a delay circuit 7, a short circuit determination circuit 8, and a soft shutoff command circuit 9.
  • drain current detection circuit 11 and reference value 3 are compared by comparison circuit 12. At this time, H is output when the output of the drain current detection circuit 11 is large with respect to the reference value 3, and L is output when the output is small.
  • the output of the comparison circuit 1 is delayed by the delay circuit 7.
  • the outputs of the delay circuit 7 and the comparison circuit 12 are input to the short-circuit determination circuit 8, and when both signals are H, the short-circuit determination circuit 8 determines that it is short-circuited, and when either or both signals are L The short circuit determination circuit 8 determines that there is no short circuit.
  • the present embodiment it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • FIG. 8 shows a circuit configuration of the fourth embodiment of the present invention.
  • the output of the comparator 33 is delayed when the switching device is turned off from the conducting state to the non-conducting state, the output of the comparator 1 becomes H and the output of the comparator 2 becomes H at the time of non-short circuit. There is a possibility of detection.
  • the cathode terminal of the diode 38 is connected to the output of the comparator 31, the anode terminal is connected to the resistor 36, the cathode terminal of the diode 39 is connected to the output of the comparator 32, and the logic circuit AND37.
  • the comparator 31 is connected via the diode 38 at the time of turn-on transitioning from non-conduction to conduction, and via the diode 39 at the turn-off transitioning from conduction to non-conduction.
  • the output is input to the logic circuit AND37.
  • the present embodiment it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • FIG. 9 shows a circuit configuration of the fifth embodiment of the present invention.
  • the present embodiment further includes a drive circuit that applies a gate voltage to the gate terminal and the source terminal of the semiconductor element, as compared with the first embodiment, and the drive circuit when the short circuit is determined based on the output of the short circuit determination circuit.
  • This is a circuit configuration in which a drive signal input to is cut off and a gate voltage is lowered in a sloped manner.
  • FIG. 9 shows the circuit configuration, but a circuit configuration (not shown) in which a similar configuration is added to the third embodiment instead of the first embodiment is also possible, and the same effect can be obtained by the circuit configuration. Is obtained.
  • the switching speed of a switching device varies depending on the drain current.
  • the turn-on speed is slow, and when the drain current is small, the turn-on speed is fast.
  • the time from when the gate voltage reaches the reference value until the drain voltage reaches the reference value is longer as the drain current is larger and shorter as the drain current is smaller.
  • the delay time becomes longer, the short-circuit current increases, so it is desirable that the delay time be as short as possible.
  • a delay time determination circuit 13 for changing the delay time according to the drain current value is added.
  • the delay time determination circuit 13 detects the on-state current of the switching device 3 acquired by the drain current detection circuit 11. The delay time is controlled to the minimum by increasing the delay time when the on-state current is large and shortening the delay time when the current is small.
  • the present embodiment it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • FIG. 10 shows a circuit configuration of the sixth embodiment of the present invention.
  • This embodiment is a circuit configuration obtained by adding a configuration that detects the drain current of the semiconductor element and changes the delay time of the first delay circuit based on the value of the detected drain current to the first embodiment.
  • FIG. 10 shows the circuit configuration, but a circuit configuration (not shown) in which a similar circuit is added to the third and fifth embodiments in place of the first embodiment is also possible, and the same is possible depending on the circuit configuration. The effect is obtained.
  • the switching speed of a switching device such as an IGBT varies depending on the temperature of the switching device.
  • the turn-on speed is slow, and when the temperature is low, the turn-on speed is fast.
  • the time from when the gate voltage reaches the reference value until the drain voltage reaches the reference value is longer as the temperature is higher and shorter as the temperature is lower.
  • the delay time of the delay circuit 7 must be set according to the time when the temperature is high.
  • a temperature detection circuit 14 for detecting the temperature and a delay time determination circuit 13 for changing the delay time according to the output are added.
  • the delay time determination circuit 13 detects the temperature of the switching device 3 obtained by the temperature detection circuit 14, and controls the delay time to the minimum by lengthening the delay time when the temperature is high and shortening the temperature when the temperature is low. .
  • the present embodiment it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • FIG. 11 shows a circuit configuration of the seventh embodiment of the present invention.
  • the present embodiment is a circuit configuration in which the temperature of the semiconductor element is detected and the configuration in which the delay time of the first delay circuit is changed based on the detected temperature is added to the first embodiment.
  • FIG. 11 shows the circuit configuration, but a circuit configuration (not shown) in which a similar circuit is added to the third embodiment, the fifth embodiment, and the sixth embodiment instead of the first embodiment is also possible. Similar effects can be obtained by the circuit configuration.
  • the switching speed of a switching device such as an IGBT varies depending on the magnitude of the drain voltage in the off state of the switching device.
  • the turn-on speed is slow, and when the drain voltage is low, the turn-on speed is fast.
  • the time from when the gate voltage reaches the reference value to when the drain voltage reaches the reference value is longer as the drain voltage is higher and shorter as the drain voltage is lower.
  • a delay time determination circuit 13 is added to change the delay time depending on the value of the drain voltage in the OFF state of the switching device.
  • the delay time determination circuit 13 detects the off-state voltage of the switching device 3 acquired by the drain voltage detection circuit 6. The delay time is controlled to a minimum by lengthening the delay time when the off-state voltage is high and shortening it when the voltage is low.
  • the present embodiment it is possible to accurately detect a short circuit even in a semiconductor element having a large mutual conductance with a small difference in gate voltage between a short circuit and a non-short circuit.
  • Comparison circuit 2 Comparison circuit 3
  • Switching device 4 Gate circuit 5
  • Gate voltage detection circuit 6 Drain voltage detection circuit 7
  • Delay circuit 8 Short circuit determination circuit 9
  • Soft cutoff command circuit 10 Protection circuit 11
  • Drain current detection circuit 12 Comparison circuit 13
  • Delay time determination circuit 14 Temperature detection circuit 24
  • Short circuit detection circuit 31 Comparator 32 Comparator 33
  • Reference voltage source 34 Reference voltage source 35
  • Capacitor 36 Resistance Logic circuit AND 38 Diode 39 Diode

Abstract

Selon la présente invention, dans le but de détecter avec précision un court-circuit d'un élément à semi-conducteur, un circuit à retard est connecté à un étage de sortie d'un circuit de comparaison qui compare l'une à l'autre une tension de grille et une valeur de référence. Plus précisément, ce circuit de protection d'élément à semi-conducteur est caractérisé en ce qu'il est pourvu: d'un circuit de comparaison (1), qui détecte une tension entre une borne grille et une borne source d'un élément à semi-conducteur comprenant une borne déversoir, la borne source et la borne grille, et qui compare la tension à une première valeur seuil; d'un circuit de comparaison (2), qui détecte une tension entre la borne déversoir et la borne source de l'élément à semi-conducteur, et qui compare la tension à une seconde valeur seuil; d'un circuit à retard (7), qui retarde des signaux de sortie du circuit de comparaison (1); d'un circuit de détermination de cour-circuit, qui détermine un court-circuit de l'élément à semi-conducteur sur la base de sorties du circuit à retard (7) et du circuit de comparaison (2).
PCT/JP2014/052197 2014-01-31 2014-01-31 Circuit de protection d'élément à semi-conducteur WO2015114788A1 (fr)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017143700A (ja) * 2016-02-12 2017-08-17 国立大学法人 東京大学 短絡検出装置および短絡検出方法
CN107852155A (zh) * 2016-02-17 2018-03-27 富士电机株式会社 半导体元件的过电流保护装置
CN109495102A (zh) * 2018-12-05 2019-03-19 徐州中矿大传动与自动化有限公司 一种SiC MOSFET一类短路电流抑制电路及方法
JP2019165347A (ja) * 2018-03-20 2019-09-26 三菱電機株式会社 駆動装置及びパワーモジュール
US11018661B2 (en) 2017-05-11 2021-05-25 Fuji Electric Co., Ltd. Short circuit detector including a voltage detector
WO2021230051A1 (fr) * 2020-05-13 2021-11-18 株式会社オートネットワーク技術研究所 Dispositif de commande d'alimentation électrique

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61184332U (fr) * 1985-05-09 1986-11-17
JPH05308717A (ja) * 1992-04-28 1993-11-19 Toshiba Corp 短絡保護回路
JPH11112313A (ja) * 1997-10-02 1999-04-23 Mitsubishi Electric Corp 半導体回路及びパワートランジスタ保護回路
JP2007259533A (ja) * 2006-03-22 2007-10-04 Hitachi Ltd 半導体素子の保護回路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61184332U (fr) * 1985-05-09 1986-11-17
JPH05308717A (ja) * 1992-04-28 1993-11-19 Toshiba Corp 短絡保護回路
JPH11112313A (ja) * 1997-10-02 1999-04-23 Mitsubishi Electric Corp 半導体回路及びパワートランジスタ保護回路
JP2007259533A (ja) * 2006-03-22 2007-10-04 Hitachi Ltd 半導体素子の保護回路

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017143700A (ja) * 2016-02-12 2017-08-17 国立大学法人 東京大学 短絡検出装置および短絡検出方法
CN107852155A (zh) * 2016-02-17 2018-03-27 富士电机株式会社 半导体元件的过电流保护装置
JPWO2017141545A1 (ja) * 2016-02-17 2018-06-21 富士電機株式会社 半導体素子の過電流保護装置
US10770888B2 (en) 2016-02-17 2020-09-08 Fuji Electric Co., Ltd. Overcurrent protection device for semiconductor device
CN107852155B (zh) * 2016-02-17 2021-04-20 富士电机株式会社 半导体元件的过电流保护装置
US11018661B2 (en) 2017-05-11 2021-05-25 Fuji Electric Co., Ltd. Short circuit detector including a voltage detector
JP2019165347A (ja) * 2018-03-20 2019-09-26 三菱電機株式会社 駆動装置及びパワーモジュール
JP7305303B2 (ja) 2018-03-20 2023-07-10 三菱電機株式会社 駆動装置及びパワーモジュール
CN109495102A (zh) * 2018-12-05 2019-03-19 徐州中矿大传动与自动化有限公司 一种SiC MOSFET一类短路电流抑制电路及方法
CN109495102B (zh) * 2018-12-05 2024-03-19 江苏国传电气有限公司 一种SiC MOSFET一类短路电流抑制电路及方法
WO2021230051A1 (fr) * 2020-05-13 2021-11-18 株式会社オートネットワーク技術研究所 Dispositif de commande d'alimentation électrique

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