WO2015096261A1 - 阵列基板的走线结构 - Google Patents
阵列基板的走线结构 Download PDFInfo
- Publication number
- WO2015096261A1 WO2015096261A1 PCT/CN2014/071182 CN2014071182W WO2015096261A1 WO 2015096261 A1 WO2015096261 A1 WO 2015096261A1 CN 2014071182 W CN2014071182 W CN 2014071182W WO 2015096261 A1 WO2015096261 A1 WO 2015096261A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- line
- thin film
- film transistor
- curing
- green
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 64
- 238000000034 method Methods 0.000 claims abstract description 23
- 239000010409 thin film Substances 0.000 claims description 59
- 239000010408 film Substances 0.000 claims description 7
- 238000013461 design Methods 0.000 abstract description 17
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 14
- 230000002093 peripheral effect Effects 0.000 abstract description 3
- 238000012360 testing method Methods 0.000 description 4
- 238000005265 energy consumption Methods 0.000 description 3
- 229920000642 polymer Polymers 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 238000011161 development Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
- G02F1/133711—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by organic films, e.g. polymeric films
Definitions
- TFT LCD thin film transistor liquid crystal display
- PSVA polymer polymer stable vertical alignment
- the trace structure of the array substrate of the vertical alignment type liquid crystal panel in the prior art includes a red line 14 , a green line 15 , a blue line 16 , an odd line 17 , an even line 8 , an array substrate common line 13 , and a color filter substrate.
- Common line 19 a total of seven curing lines.
- the red line 14, the green line 15, and the blue line 16 belong to the data line of the curing process, and the odd line 7 and the even line 18 belong to the scanning line of the curing process.
- the wiring structure of the vertical alignment type liquid crystal panel in the prior art further includes seven corresponding curing pads and an array substrate test pad. For the curing process, a voltage is applied to the curing pad, and the voltage is applied to the corresponding capacitor through a trace connected to the corresponding curing pad (i.e., - of the above seven lines).
- the wiring structure of the vertical alignment type liquid crystal panel of the prior art includes at least seven traces and curing requirements.
- the array substrate common line 13 is connected by a trace to be transmitted to the pixel display.
- the traces of the pad 134 are connected to the common line 13 of the array substrate, most of the traces may be bridged or bridged or connected in a through-hole manner.
- the trace of the curing pad 13-1 as shown in Fig. 1 is connected to other traces to form a wiring area, which has the risk of electrostatic discharge (ESD).
- the seven traces will increase the layout space of the array substrate design. Under the condition of the fixed glass substrate size, the more the trace requirements, the smaller the design space; and the more the traces, the more the intersections, the more The risk of ESD (Electronic Static Discharge) increases the risk of product yield loss.
- ESD Electro Static Discharge
- the present invention has improved the wiring structure of the array substrate.
- the invention improves the curing trace design of the array substrate of the vertical alignment type liquid crystal panel according to the actual opening condition of the curing alignment needle of the vertical alignment type liquid crystal panel, thereby reducing the number of curing traces, thereby increasing the installation space. , reducing the risk of yield loss, reducing the number of curing mats, and reducing the number of liquid crystal panel curing probes, reducing the cost of mass production.
- the present invention proposes a wiring structure of an array substrate.
- the wiring structure of the array substrate according to the present invention includes red, green and blue lines as data lines during curing, odd and even lines as scanning lines during curing, array substrate common lines, and color film substrate common lines, and respectively connected
- the red, green, and blue lines, the parity line, the array substrate common line, and the color film substrate common line are corresponding to the red, green, and blue curing pads, the parity curing pad, the array substrate curing pad, and the color film substrate. pad.
- the trace structure according to the present invention reduces the number of traces and curing pads compared to the prior art, thereby reducing the peripheral routing of the array substrate, increasing the buffer space for design layout, and reducing the occurrence of the process. Bad risks.
- the number of curing traces is reduced, thereby increasing the space of the design, reducing the risk of yield loss, reducing the number of curing pads, and reducing the number of curing probes required for the liquid crystal panel, thereby reducing the cost of mass production.
- the red, green and blue lines comprise a red line, a blue line and a green line, and two adjacent ones of the red line, the blue line and the green line are connected by a first thin film transistor, through a gate of the first thin film transistor
- the poles are controlled to be turned on and off, thereby controlling the adjacent two wires to be short-circuited or separated.
- a first signal line capable of applying a signal voltage is further included, and a drain of the first thin film transistor is connected to the first signal line.
- the first signal line can control the first thin film transistor.
- the blue line and the red line are connected by a first thin film transistor, and the green line and the red line are connected by a first thin film transistor.
- the blue line and the green line are connected by a first thin film transistor, and the red line and the green line are connected by a first thin film transistor.
- the odd-numbered line includes an odd-numbered line and an even-numbered line connected by a second thin film transistor, and is controlled to be turned on and off by a gate of the second thin film transistor, thereby controlling the odd-numbered line and the even-numbered line to be short-circuited or separated .
- By connecting the odd-numbered lines and the even-numbered lines through the thin film transistor it is convenient, quick, and uniform to control the odd-numbered lines and the even-numbered lines, thereby reducing energy consumption and improving the efficiency of the curing process.
- Fig. 2 shows the arrangement of the red line 4, the green line 15, the blue line 16, the odd line ⁇ and the even line 18 of the wiring structure of the vertical type liquid crystal panel of the prior art. It can be seen that in the prior art, the red line 14, the green line 15, the blue line 6, the odd line 17 and the even line 18 act as five independent lines, individually receiving voltage.
- the auxiliary curing line 24 is connected to the poles of the first thin film transistor 11 and the second thin film transistor 15, and the auxiliary curing pad 24-1 is configured to receive the gates of the first thin film transistor 11 and the second thin film transistor 15. Pressure.
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Power Engineering (AREA)
- Liquid Crystal (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020167020084A KR20160102518A (ko) | 2013-12-25 | 2014-01-23 | 어레이 기판의 배선구조 |
US14/240,385 US20150179666A1 (en) | 2013-12-25 | 2014-01-23 | Wiring structure of array substrate |
JP2016542975A JP2017502354A (ja) | 2013-12-25 | 2014-01-23 | アレイ基板の配線構造 |
GB1609366.8A GB2535103B (en) | 2013-12-25 | 2014-01-23 | Wiring structure of array substrate |
RU2016124652A RU2636800C1 (ru) | 2013-12-25 | 2014-01-23 | Структура металлических дорожек подложки матрицы |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310726450.4 | 2013-12-25 | ||
CN201310726450.4A CN103760693B (zh) | 2013-12-25 | 2013-12-25 | 阵列基板的走线结构 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2015096261A1 true WO2015096261A1 (zh) | 2015-07-02 |
Family
ID=50527952
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2014/071182 WO2015096261A1 (zh) | 2013-12-25 | 2014-01-23 | 阵列基板的走线结构 |
Country Status (6)
Country | Link |
---|---|
JP (1) | JP2017502354A (zh) |
KR (1) | KR20160102518A (zh) |
CN (1) | CN103760693B (zh) |
GB (1) | GB2535103B (zh) |
RU (1) | RU2636800C1 (zh) |
WO (1) | WO2015096261A1 (zh) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104076567A (zh) * | 2014-07-22 | 2014-10-01 | 深圳市华星光电技术有限公司 | 阵列基板及其制造方法、显示装置 |
CN105974703A (zh) * | 2016-07-13 | 2016-09-28 | 武汉华星光电技术有限公司 | 液晶显示面板 |
CN107065374B (zh) * | 2017-04-01 | 2019-10-22 | 上海天马微电子有限公司 | 一种电子纸的阵列基板、电子纸及其驱动方法 |
CN107037637B (zh) * | 2017-06-13 | 2020-02-28 | 深圳市华星光电技术有限公司 | 液晶光配向面板走线结构及液晶显示面板光配向方法 |
US10627684B2 (en) * | 2017-08-30 | 2020-04-21 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Liquid crystal mother substrate and vertical alignment curing method thereof |
CN107367872A (zh) * | 2017-08-30 | 2017-11-21 | 深圳市华星光电技术有限公司 | 液晶母基板及其垂直配向固化的方法 |
CN107632473B (zh) * | 2017-10-18 | 2020-05-12 | 深圳市华星光电半导体显示技术有限公司 | Psva液晶显示面板 |
CN107664892B (zh) * | 2017-11-03 | 2019-08-13 | 惠科股份有限公司 | 一种显示基板的走线结构 |
CN108681168B (zh) | 2018-06-27 | 2020-12-25 | 深圳市华星光电半导体显示技术有限公司 | 一种阵列基板、显示面板及显示设备 |
CN109637405B (zh) * | 2018-12-05 | 2021-04-06 | 惠科股份有限公司 | 阵列基板的测试方法、装置及存储介质 |
CN110189671B (zh) * | 2019-06-26 | 2022-02-01 | 滁州惠科光电科技有限公司 | 成盒测试电路、阵列基板和液晶显示装置 |
CN112904607B (zh) * | 2021-03-02 | 2022-07-29 | Tcl华星光电技术有限公司 | 一种走线结构及液晶显示面板 |
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JP2003255903A (ja) * | 2002-02-28 | 2003-09-10 | Toshiba Corp | 表示装置 |
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CN101592810A (zh) * | 2008-05-27 | 2009-12-02 | 乐金显示有限公司 | 液晶显示设备 |
CN101833910A (zh) * | 2009-03-11 | 2010-09-15 | 上海天马微电子有限公司 | 显示装置及其阵列基板的测试方法 |
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JP4252528B2 (ja) * | 1998-03-27 | 2009-04-08 | シャープ株式会社 | アクティブマトリクス型液晶表示パネル及びその検査方法 |
JP3865627B2 (ja) * | 2001-12-13 | 2007-01-10 | シャープ株式会社 | 液晶表示装置用基板及びそれを備えた液晶表示装置 |
JP2003248208A (ja) * | 2002-02-22 | 2003-09-05 | Fujitsu Display Technologies Corp | 液晶表示パネルの製造方法 |
TWI307437B (en) * | 2004-06-30 | 2009-03-11 | Chi Mei Optoelectronics Corp | Liquid crystal display panel and method of manufacturing the same |
JP4459006B2 (ja) * | 2004-10-07 | 2010-04-28 | シャープ株式会社 | 液晶表示装置及びその製造方法 |
JP2007011139A (ja) * | 2005-07-01 | 2007-01-18 | Toshiba Corp | 液晶表示装置及びその製造方法 |
JP2008033107A (ja) * | 2006-07-31 | 2008-02-14 | Victor Co Of Japan Ltd | 液晶表示装置 |
KR20090073903A (ko) * | 2007-12-31 | 2009-07-03 | 엘지디스플레이 주식회사 | 컬러 epd 장치의 화소배치방법 |
US8325315B2 (en) * | 2008-08-19 | 2012-12-04 | Samsung Display Co., Ltd. | Mother panel and method of manufacturing display panel using the same |
KR101992103B1 (ko) * | 2011-12-09 | 2019-06-25 | 엘지디스플레이 주식회사 | 액정표시장치 및 그 구동방법 |
-
2013
- 2013-12-25 CN CN201310726450.4A patent/CN103760693B/zh active Active
-
2014
- 2014-01-23 GB GB1609366.8A patent/GB2535103B/en active Active
- 2014-01-23 KR KR1020167020084A patent/KR20160102518A/ko not_active Application Discontinuation
- 2014-01-23 RU RU2016124652A patent/RU2636800C1/ru active
- 2014-01-23 WO PCT/CN2014/071182 patent/WO2015096261A1/zh active Application Filing
- 2014-01-23 JP JP2016542975A patent/JP2017502354A/ja active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2003255903A (ja) * | 2002-02-28 | 2003-09-10 | Toshiba Corp | 表示装置 |
CN101017299A (zh) * | 2007-02-14 | 2007-08-15 | 友达光电股份有限公司 | 像素结构以及在该像素结构中产生驱动电压的方法 |
JP2009236937A (ja) * | 2008-03-07 | 2009-10-15 | Casio Comput Co Ltd | 液晶表示装置及びその駆動方法 |
CN101592810A (zh) * | 2008-05-27 | 2009-12-02 | 乐金显示有限公司 | 液晶显示设备 |
CN101833910A (zh) * | 2009-03-11 | 2010-09-15 | 上海天马微电子有限公司 | 显示装置及其阵列基板的测试方法 |
CN102338948A (zh) * | 2011-10-24 | 2012-02-01 | 南京中电熊猫液晶显示科技有限公司 | 内嵌式液晶触控面板 |
Also Published As
Publication number | Publication date |
---|---|
JP2017502354A (ja) | 2017-01-19 |
RU2636800C1 (ru) | 2017-11-28 |
CN103760693B (zh) | 2016-06-29 |
CN103760693A (zh) | 2014-04-30 |
GB201609366D0 (en) | 2016-07-13 |
GB2535103A (en) | 2016-08-10 |
KR20160102518A (ko) | 2016-08-30 |
GB2535103B (en) | 2020-09-30 |
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