WO2015089758A1 - 一种电压调节电路系统 - Google Patents
一种电压调节电路系统 Download PDFInfo
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- WO2015089758A1 WO2015089758A1 PCT/CN2013/089808 CN2013089808W WO2015089758A1 WO 2015089758 A1 WO2015089758 A1 WO 2015089758A1 CN 2013089808 W CN2013089808 W CN 2013089808W WO 2015089758 A1 WO2015089758 A1 WO 2015089758A1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/461—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using an operational amplifier as final control device
Definitions
- the present invention relates to the field of electronic circuit technology, and in particular to a voltage regulating circuit system.
- DAC digital to analog converter
- the voltage accuracy that can be adjusted by using this DAC chip is mainly It is determined by the reference voltage and the bit width N, and the larger the bit width N, the higher the adjusted voltage accuracy.
- a high-bitwidth DAC chip needs to be used in the circuit, but the high-bitwidth DAC chip is costly, and some high-bitwidth DAC chips require a license (LICENSE) to be purchased, so that comparison is made. trouble.
- Embodiments of the present invention provide a voltage regulating circuit system for achieving high voltage accuracy adjustment using a low bit width DAC chip.
- An embodiment of the present invention provides a voltage adjustment circuit system, including: a digital to analog converter and m amplifiers, wherein m is a positive integer greater than 1, wherein:
- each of the m amplifiers is respectively connected to an output end of the digital-to-analog converter, and is respectively connected to a different output end, and an output end of the amplifier is connected to the first input end;
- the first amplifier of the m amplifiers is connected to a bias voltage circuit, and a second input of the amplifiers other than the first amplifier is connected to an output of another amplifier, the second input The terminal is the bias voltage terminal.
- Embodiments of the present invention also provide a voltage regulating circuit system including a first digital to analog converter and an amplifier, wherein:
- a first input end and a second input end of the amplifier are respectively connected to an output end of the first digital-to-analog converter, and are respectively connected to different output ends, an output end of the amplifier and the first input end Connection
- the second input of the amplifier is a bias voltage terminal.
- the embodiment of the invention further provides a voltage regulating circuit system, including a first digital-to-analog converter, and a second A digital to analog converter and x amplifiers, said X being greater than or equal to 3, wherein:
- the first input end and the second input end of one of the X amplifiers are respectively connected to the output ends of the first digital-to-analog converter, and respectively connected to different output ends;
- a first input end of the other of the X amplifiers is respectively connected to an output end of the second digital-to-analog converter, and is respectively connected to different output ends; an output end of the one amplifier is connected to one of the other amplifiers a second input of an amplifier, wherein a second input of the amplifier other than the one of the other amplifiers is coupled to an output of the other amplifier;
- An output of each of the X amplifiers is coupled to the first input, and a second input of the amplifier is a bias voltage terminal.
- the voltage regulating circuit system of this embodiment includes a plurality of amplifiers and digital-to-analog converters, wherein the first input end of each amplifier is respectively connected to the output end of the digital-to-analog converter, and respectively connected to different output ends;
- the first amplifier of the amplifiers is connected to the bias voltage circuit, and the second input of the amplifier other than the first amplifier is connected to the output of the other amplifier.
- the voltage regulation accuracy of one of the amplifier's output terminals can be used as a reference voltage to determine the voltage regulation accuracy of the other amplifier's output.
- the voltage can be adjusted with high precision through the low bit width DAC chip.
- FIG. 2 is a schematic structural diagram of a voltage regulating circuit system according to an embodiment of the present invention
- FIG. 2 is a schematic structural diagram of a voltage regulating circuit system according to an embodiment of the present invention
- FIGS. 3a and 3b are diagrams of an embodiment of the present invention
- FIG. 4 is a schematic structural diagram of another voltage regulating circuit system according to an embodiment of the present invention.
- Embodiments of the present invention provide a voltage adjustment circuit system, and a schematic structural diagram thereof is shown in FIGS. 1 a to 1 c, including a digital-to-analog converter and m amplifiers, where m is a positive integer greater than 1, wherein the digital-to-analog converter
- the bit width is N bits such as 12 bits, specifically:
- the first input end inl of each of the m amplifiers is respectively connected to the output end of the digital-to-analog converter, and is respectively connected to different output ends, and the output end of the amplifier is connected with the first input end, and the amplifier can be connected to the amplifier through a resistor.
- An output terminal and a first input terminal; one of the m amplifiers (such as the first amplifier) is connected to the bias voltage circuit, and the second input terminal in2 of the amplifiers other than the first amplifier of the m amplifiers is connected to the other amplifier
- the output of one of the m amplifiers (such as the second amplifier) is not connected to the second input of the other amplifier, in2.
- the output of the second amplifier is an overall output terminal of the voltage regulating circuit system, and can be connected to an adjustment load, which is an electronic device that needs to adjust the voltage through an analog signal.
- each amplifier has two input terminals, a first input terminal 1 and a second input terminal in2, the first input terminal is the negative input terminal of the amplifier, and the second input terminal is the positive input terminal of the amplifier, which is connected.
- the bias voltage terminal of the bias voltage circuit can adjust the bias voltage connected to the second input terminal so that the amplifier outputs a certain range of voltages.
- the digital-to-analog converter can convert the digital signal into an analog signal output, which is a digital-to-analog converter with a low bit width N (such as N less than 16 or 12), and a digital to analog converter can include at least one output.
- At least one digital-to-analog converter may be included in the voltage regulating circuit system, and the voltage regulating circuit system may include the following methods:
- the voltage regulating circuit system shown in FIG. 1a includes a digital-to-analog converter 10 and m amplifiers (illustrated by taking two amplifiers 11-1 and 11-2 in FIG. 1a as an example), the digital-to-analog converter 10 includes m output terminals (two in the figure), and the m output terminals are respectively connected to the first input terminals in1 of the m amplifiers.
- the voltage regulating circuit system shown in FIG. 1b includes m digital-to-analog converters 10 (illustrated by taking two digital-to-analog converters in FIG. 1b as an example), and each digital-to-analog converter 10 includes only one output terminal.
- the outputs of the m digital-to-analog converters 10 are respectively connected to the first input terminals in 1 of the m amplifiers.
- the voltage regulating circuit system shown in FIG. 1c includes n digital-to-analog converters (two digital-to-analog converters 10-1 and 10-2, and three amplifiers 11-1, 11- in FIG. 2 and 11-3 as an example), n digital modules
- the output of the partial digital-to-analog converter 10-1 of the converter includes one, and the output of the other part of the digital-to-analog converter 10-2 includes a plurality of (the two output terminals are illustrated in FIG. 1c as an example), n digital modes
- the number of all outputs of the converter is m, and the m outputs are respectively connected to the first input terminal in1 of the m amplifiers.
- the output end of the amplifier 11-2 is not connected to the second input end of the other amplifier, and the output end of the amplifier 11-2 is used as the voltage regulating circuit system.
- the overall output out can be connected to adjust the load.
- the output terminal of the amplifier 11-3 serves as the overall output out of the voltage regulating circuit system, and the adjustment load can be connected.
- first input terminal and the second input terminal and the first amplifier and the second amplifier do not indicate a sequential relationship, but illustrate different input terminals and different amplifiers.
- the reference voltages corresponding to the outputs of the digital-to-analog converters respectively connected to the m amplifiers are equal or approximately equal, it is necessary to use the voltage regulating circuit system described in this embodiment, such as the digital-to-analog converters in FIGS. 1a and 1b.
- the reference voltage of the reference voltage terminal REF1 corresponding to the output terminal Out1 and the reference voltage of the reference voltage terminal REF2 corresponding to the output terminal Out2 need to be equal or approximately equal.
- the reference voltages corresponding to the outputs of the digital-to-analog converters are not necessarily equal or approximately equal, and the resistances in the circuit can be adjusted.
- the voltage output from the output of the amplifier 11-1 can be set by the voltage V of the second input terminal in2.
- Ffset a reference voltage corresponding to the output terminal Out1 of the digital-to-analog converter 10 connected to the amplifier 11-1 is determined by VRE F1 , specifically if the output terminal OUT1 is connected to the first input terminal in1 of the amplifier 11-1 via the resistor R1
- the first input terminal in1 is connected to the output terminal through the resistor R2, and the maximum output voltage of the amplifier 11-1 is (R2/R1). *VRE F1 + V offS et o. Further, the output terminal of the amplifier 11-1 is connected.
- the voltage determining the voltage range of the output of the other amplifier 11-2 the voltage of the second input terminal in2 of the other amplifier 11-2 is the voltage of the output of one amplifier 11-1. That is, ( R2 / R1 ) * VRE F1 + V offS et , then the maximum output voltage of the other amplifier 11-2 is ( R2 / R1 ) * VRE F2 + ( R2 / R1 ) * VRE F1 + V. Ffset . If VREK is equal, the maximum output voltage of the other amplifier 11-2 is 2* ( R2/R1 ) *VRE F 2 +V offset o where R1 and R2 can use the same resistance value.
- the digital-to-analog converter includes an output terminal and a reference voltage terminal corresponding to the output end, and the adjustment precision of the output voltage of the output of the digital-to-analog converter can pass through the digital-to-analog converter.
- the bit width N and the reference voltage VREF of the reference voltage terminal REF corresponding to the output terminal are determined, and may be specifically 1/2 n *VRE F .
- the output of one amplifier is connected to the second input of another amplifier, wherein the voltage adjustment precision of an amplifier output is 1/2 n *VRE F , the amplifier After the output is connected to the second input of another amplifier, the reference voltage is 1/2 n *VRE F , which determines the voltage regulation accuracy of the output of the other amplifier.
- the voltage regulation accuracy of the output of the other amplifier is 1/2.
- N * ( 1/2 n *VRE F ) 1/2 2N *VRE F .
- This is equivalent to the voltage regulation accuracy achieved by a 2N-bit wide digital-to-analog converter, thereby achieving high-accuracy voltage adjustment using a low-bit-width digital-to-analog converter. It can be seen that the voltage adjustment circuit system in the embodiment can adjust the voltage range, and the voltage adjustment precision is high, which can meet the actual needs of the user.
- the regulating load that can be adjusted or controlled by analog signals is mainly connected to the overall output terminal of the voltage regulating circuit system, such as a voltage controlled oscillator (VCO).
- VCO voltage controlled oscillator
- the specific example shown in Figure 2 includes two amplifiers U1A and U1B, a digital-to-analog converter U2 (bit width N), a Field Programmable Gate Array (FPGA), and a regulated load.
- Transistor XI controlled by an analog signal where:
- the two outputs of the digital-to-analog converter U2, OutA and OutB, are respectively connected to the input of amplifier U1A.
- the input terminal 5 of the U1B is connected, the output terminal 1 of the amplifier U1A is connected to the input terminal 3 through the resistor R, and the input terminal 2 of the amplifier U1A is connected to the bias voltage circuit, and the bias voltage circuit includes a resistor connected in series between the ground and the power source.
- the input terminal 2 is connected to the series connection point between the resistors; the output terminal 6 of the amplifier U1B is connected to the input terminal 5 through the resistor R, the input terminal 4 of the amplifier U1B is connected to the output terminal 1 of the amplifier U1A, and the output terminal 6 of the amplifier U1B is connected to the transistor XI.
- the output of the transistor XI is connected to the FPGA, the FPGA is used to acquire the frequency of the output of the transistor XI, and the output of the digital-to-analog converter U2 can also be adjusted by connecting with the digital-to-analog converter U2.
- the reference voltage corresponding to the reference voltage terminals corresponding to the two output terminals of the digital-to-analog converter U2 is directly set to be 1/2 N *3V3A.
- the value of the digital-to-analog converter U2-output terminal OutB is first specified as a fixed value, such as any value between 0 and 1/2 N , such as 1/2 N — such that the output of the amplifier U1B is fixed.
- the amplifier U1A can then be combined with the bias voltage of the input terminal 2 of the amplifier U1A to adjust the output voltage of the other output terminal OutA of the digital-to-analog converter U1, so that the amplifier U1A can output a constant value between 0.2 and 1.25 with a voltage accuracy of 1 /2 N * V 3V3A , at this time, the output of the transistor XI is fed back to the FPGA, and the FPGA determines whether the error of the output of the transistor XI is the smallest, and if so, the output of the output terminal OutA of the digital-to-analog converter U2 is locked; After adjusting the output voltage of the output terminal OutB of the digital-to-analog converter U2, the voltage adjustment accuracy of the amplifier U1B is 1/2 2N *V 3V3A .
- the embodiment of the present invention further provides a voltage regulating circuit system, which is shown in FIG. 3a and FIG. 3b, and includes a digital-to-analog converter and an amplifier 21, wherein the bit width of the digital-to-analog converter is N bits, such as 8 bits, etc.
- Ground the bit width of the digital-to-analog converter is N bits, such as 8 bits, etc.
- the first input terminal in1 and the second input terminal in2 of the amplifier 21 are respectively connected to the output end of the digital-to-analog converter, and are respectively connected to different output terminals, and the output end of the amplifier 21 is connected to the first input terminal in1;
- the second input is a bias voltage terminal.
- the digital-to-analog converter can convert the digital signal into an analog signal output, which is a digital-to-analog converter with a low bit width N (such as N less than 12 or 16), and a digital to analog converter can include at least one output.
- the output of the amplifier 21 is the overall output out of the voltage regulating circuit system, and can be connected to an adjustment load, which is an electronic device that needs to adjust the voltage through an analog signal, such as a voltage controlled oscillator and a transistor.
- At least one digital-to-analog converter may be included in the voltage regulating circuit system, and the voltage regulating circuit system may include the following methods:
- the voltage regulating circuit system shown in FIG. 3a includes a digital-to-analog converter 20, the digital-to-analog converter 20 includes two output terminals, respectively, and a first input terminal in1 of the amplifier 21 The second input terminal in2 is connected.
- the voltage regulating circuit system shown in FIG. 3b includes two digital-to-analog converters 20-1 and 20-2, each of which includes only one output terminal, and the two digital-to-analog converters 20- The outputs of 1 and 20-2 are connected to a first input terminal in1 and a second input terminal in2 of the amplifier 21, respectively.
- the regulating load that can be adjusted or controlled by analog signals is mainly connected to the overall output terminal of the voltage regulating circuit system, such as a voltage controlled oscillator (VCO).
- VCO voltage controlled oscillator
- an output terminal out1 of the digital-to-analog converter is connected to the bias voltage terminal (ie, the second input end) of the amplifier 21, and an output terminal out1 of the digital-to-analog converter corresponds to the reference voltage.
- the reference voltage of the terminal is VRE F1
- the voltage regulation precision of one output terminal out1 of the digital-to-analog converter is 1/2 n *VRE F1
- the other output terminal out2 of the digital-to-analog converter is connected to the first input terminal inl of the amplifier 21, setting
- the reference voltage VRE F2 corresponding to the other output terminal out2 of the digital-to-analog converter connected to the first input terminal in1 of the amplifier 21 can be used as a reference voltage for measuring the output voltage accuracy of the amplifier 21.
- the maximum output voltage of the amplifier 21 is: ( R2 / Rl ) * V REF2 + Vouti, where V 0utl is the output voltage of one output terminal out1 of the digital-to-analog converter.
- the system in this embodiment is similar to the voltage adjustment circuit system shown in FIG. 1a to FIG. 1c, and can adopt a low bit width digital-to-analog converter to achieve high-precision voltage adjustment, but the implementation is different.
- the reference voltages of the output terminals of the digital-to-analog converters 20 respectively connected to the two input terminals of the amplifier 21 may be different, that is, the reference voltages of the reference voltage terminals REF1 and REF2 shown in FIG. 3a and FIG. 3b may be different.
- the embodiment of the invention further provides a voltage regulating circuit system, which is shown in FIG. 4a and FIG. 4b, and includes a plurality of first mode converters, a second digital to analog converter and X amplifiers (X is an integer greater than or equal to 3
- the amplifiers 32-1, 32-2 and 32-3 are taken as an example, where:
- the first input end in1 and the second input end 2 of one of the X amplifiers are respectively connected to the output ends of the first digital-to-analog converter, and are respectively connected to different output terminals;
- the first input terminals inl of other amplifiers are respectively connected to the output terminals of the second digital-to-analog converter, and are respectively connected to different output terminals, and the output of the above-mentioned amplifier 32-1
- the terminal is connected to the second input terminal in2 of one of the other amplifiers (such as the amplifier 32-2), and the second input terminal in2 of the amplifier other than the amplifier 32-2 is connected to the output of the other amplifier.
- the output of one of the other amplifiers (such as amplifier 32-3) is not connected to the second input of in2 of the other amplifier, in2.
- the output of the amplifier is the overall output of the voltage regulating circuit, and can be connected to an adjustment load, which is an electronic device that needs to adjust the voltage through an analog signal, such as a transistor and a voltage controlled oscillator.
- each of the X amplifiers is connected to the first input terminal in1, and the second input terminal in2 is a bias voltage terminal.
- the voltage regulating circuit system of the embodiment may include at least one first digital-to-analog converter and a second digital-to-analog converter.
- the voltage regulating circuit system may include the following methods:
- the voltage regulating circuit system shown in FIG. 4a includes a first digital-to-analog converter 30 and a second digital-to-analog converter 31.
- the first digital-to-analog converter 30 includes two output terminals out1 and out2. Separate The first input terminal in1 and the second input terminal in2 are connected to the amplifier 32-1, and the second digital-to-analog converter 31 includes X-1 output terminals out1 to outx-1 (illustrated by taking outl and out2 as an example) They are respectively connected to the first input terminal in1 of the other amplifiers (amplifiers 32-2 and 32-3).
- the voltage regulating circuit system shown in FIG. 4b includes two first digital-to-analog converters 30-1 and 30-2, each of which includes only one output terminal, the two The outputs of a digital to analog converter 30-1 and 30-2 are coupled to a first input terminal in1 and a second input terminal in2 of the amplifier 32-1, respectively.
- each of the second digital-to-analog converters includes only one output, and the outputs of the second digital-to-analog conversions are respectively connected to the first input terminals in1 of the other amplifiers (amplifiers 32-2 and 32-3) .
- the voltage regulating circuit system may further include y second digital-to-analog converters, and the output ends of the second digital-to-analog converters of the y second digital-to-analog converters include The output of the other part of the second digital-to-analog converter includes a plurality of outputs, and the number of all the output ends of the y data converters is X-1.
- the first digital-to-analog converter and the second digital-to-analog converter described above do not indicate sequential relationships, but rather illustrate different digital-to-analog converters.
- the bit widths of the first digital-to-analog converter and the second digital-to-analog converter are both N, at the bias voltage end of one amplifier 32-1 (ie, The second input end in2) is connected to the output endout1 of the first digital-to-analog converter, and the reference voltage corresponding to the output endout1 of the first digital-to-analog converter is VRE F1 , and the voltage adjustment precision of the output end of the first digital-to-analog converter is 1/2 n *VRE F1 ; the other output end out2 of the first digital-to-analog converter is connected to the first input end in1 of the amplifier 21, and the reference voltage corresponding to the reference voltage end of the other output end out2 of the first digital-to-analog converter is set to Therefore, the voltage accuracy of the reference voltage corresponding to the output terminal out2 of the first digital-to-analog converter connected to the first input terminal in1 of the amplifier 32-1 can be used as a
- the output of the amplifier 32-1 is connected to the second input of another amplifier 32-2, assuming a reference voltage corresponding to the output of the second digital-to-analog converter connected to the first input of the amplifier 32-1
- the voltage regulation accuracy of the overall output of the voltage regulation circuit system is finally 1/2 ( x +1 ) n *VRE F1 .
- This is equivalent to the voltage regulation accuracy achieved by a (X+1) N-bit wide digital-to-analog converter, thereby achieving high voltage accuracy using a low bit width digital-to-analog converter. Adjustment.
- the final circuit output system (including X amplifiers) has a maximum output voltage of X* ( R2/R1 ) *V REF2 +Vouti o
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Abstract
一种电压调节电路系统,应用于电子电路技术领域。电压调节电路系统中包括多个放大器(11-1,11-2)和数模转换器(10),每一个放大器的第一输入端(in1)分别与数模转换器的输出端(Out1,Out2)连接,且分别连接不同的输出端;多个放大器中第一放大器(11-1)连接偏置电压电路,除该第一放大器之外的其它放大器(11-2)的第二输入端(in2)连接另一放大器(11-1)的输出端,这样用低位宽的DAC芯片实现电压高精度调节。
Description
一种电压调节电路系统 技术领域
本发明涉及电子电路技术领域, 特别涉及电压调节电路系统。
背景技术
在电子产品的设计中, 如果需要精密电压调整的电路时, 一般采用 N位宽 的数模转换器( Digital to Analog Converter, DAC )芯片来实现, 采用这种 DAC 芯片可以调节的电压精度主要是由参考电压和位宽 N来决定, 且位宽 N越大, 调节的电压精度越高。这样为了实现高精度的电压调节, 需要在电路中使用高 位宽的 DAC芯片, 但是高位宽的 DAC芯片的成本高昂, 且部分高位宽的 DAC 芯片需要许可证(LICENSE )授权后才能采购, 这样比较麻烦。
发明内容
本发明实施例提供电压调节电路系统,用低位宽的 DAC芯片实现电压高精 度调节。
本发明实施例提供一种电压调节电路系统, 包括: 数模转换器和 m个放大 器,, 所述 m为大于 1的正整数, 其中:
所述 m个放大器中每一个放大器的第一输入端分别与所述数模转换器的 输出端连接,且分别连接不同的输出端, 所述放大器的输出端与所述第一输入 端连接;
所述 m个放大器中第一放大器连接偏置电压电路, 所述 m个放大器中除所 述第一放大器之外的其它放大器的第二输入端连接另一放大器的输出端,所述 第二输入端为偏置电压端。
本发明实施例还提供一种电压调节电路系统,包括第一数模转换器和放大 器, 其中:
所述放大器中的第一输入端和第二输入端分别与所述第一数模转换器的 输出端连接,且分别连接不同的输出端, 所述放大器的输出端与所述第一输入 端连接;
所述放大器的第二输入端为偏置电压端。
本发明实施例还提供一种电压调节电路系统, 包括第一数模转换器、 第二
数模转换器和 x个放大器, 所述 X大于或等于 3 , 其中:
所述 X个放大器中一个放大器的第一输入端和第二输入端分别与所述第一 数模转换器的输出端连接, 且分别连接不同的输出端;
所述 X个放大器中其它放大器的第一输入端分别与所述第二数模转换器的 输出端连接,且分别连接不同的输出端; 所述一个放大器的输出端连接所述其 它放大器中某一放大器的第二输入端,所述其它放大器中除所述某一放大器之 外的放大器的第二输入端连接另一放大器的输出端;
所述 X个放大器中每一个放大器的输出端都与第一输入端连接, 且放大器 的第二输入端为偏置电压端。
可见, 本实施例的电压调节电路系统中包括多个放大器和数模转换器, 其 中每一个放大器的第一输入端分别与数模转换器的输出端连接,且分别连接不 同的输出端; 多个放大器中第一放大器连接偏置电压电路, 除该第一放大器之 外的其它放大器的第二输入端连接另一放大器的输出端。其中某一个放大器输 出端的电压调节精度就可以作为决定另一放大器输出端的电压调节精度的参 考电压, 最终可以通过低位宽的 DAC芯片实现电压高精度调节。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施 例或现有技术描述中所需要使用的附图作筒单地介绍,显而易见地, 下面描述 中的附图仅仅是本发明的一些实施例, 对于本领域普通技术人员来讲,在不付 出创造性劳动性的前提下, 还可以根据这些附图获得其他的附图。
图 la到 lc是本发明实施例提供的一种电压调节电路系统的结构示意图; 图 2是本发明具体应用实施例中电压调节电路系统的结构示意图; 图 3a和 3b是本发明实施例提供的另一种电压调节电路系统的结构示意图; 图 4a和 4b是本发明实施例提供的另一种电压调节电路系统的结构示意 图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清 楚、 完整地描述, 显然, 所描述的实施例仅仅是本发明一部分实施例, 而不是 全部的实施例。基于本发明中的实施例, 本领域普通技术人员在没有作出创造
性劳动前提下所获得的所有其他实施例, 都属于本发明保护的范围。 本发明实施例提供一种电压调节电路系统, 其结构示意图如图 1 a到 1 c所 示, 包括数模转换器和 m个放大器, 这里 m为大于 1的正整数, 其中, 数模转换 器的位宽是 N位比如 12位, 具体地:
m个放大器中每一个放大器的第一输入端 inl分别与数模转换器的输出端 连接, 且分别连接不同的输出端, 放大器的输出端与第一输入端连接, 具体可 以通过电阻连接放大器的输出端和第一输入端; m个放大器中某一个放大器 (比如第一放大器)连接偏置电压电路, m个放大器中除第一放大器之外的其 它放大器的第二输入端 in2连接另一放大器的输出端,则 m个放大器中某一个放 大器(比如第二放大器) 的输出端未连接有另一放大器的第二输入端 in2。 则 该第二放大器的输出端为该电压调节电路系统的总体输出端 out, 可以连接调 节负载, 该调节负载是需要通过模拟信号来调节电压的电子器件。
可以理解,每个放大器都有两个输入端即第一输入端 in 1和第二输入端 in2 , 第一输入端是放大器的负极输入端, 第二输入端为放大器的正极输入端,是连 接偏置电压电路的偏置电压端,可以调节该第二输入端连接的偏置电压使得放 大器输出一定范围的电压。 而数模转换器可以将数字信号转换为模拟信号输 出, 是低位宽 N (比如 N小于 16或 12 ) 的数模转换器, 一个数模转换器可以包 括至少一个输出端。
在具体实现的过程中, 电压调节电路系统中可以包括至少一个数模转换 器, 则电压调节电路系统可以包括如下几种方式:
( 1 )如图 la所示的电压调节电路系统中包括一个数模转换器 10和 m个放 大器(图 la中以两个放大器 11-1和 11-2为例说明 ), 该数模转换器 10包括 m个输 出端 (图中以两个为例), 这 m个输出端分别与 m个放大器的第一输入端 inl连 接。
( 2 )如图 lb所示的电压调节电路系统包括 m个数模转换器 10 (图 lb中以 两个数模转换器为例说明), 每个数模转换器 10都只包括一个输出端, 这 m个 数模转换器 10的输出端分别与 m个放大器的第一输入端 in 1连接。
( 3 )如图 lc所示的电压调节电路系统中包括 n个数模转换器(图 lc中以两 个数模转换器 10-1和 10-2, 及三个放大器 11-1、 11-2和 11-3为例说明), n个数模
转换器中部分数模转换器 10-1的输出端包括一个, 另一部分数模转换器 10-2的 输出端包括多个(图 lc中以两个输出端为例说明 ) , n个数模转换器所有输出端 的个数为 m, 这 m个输出端分别与 m个放大器的第一输入端 inl连接。
在图 la和图 lb所示的电压调节电路系统中, 放大器 11-2的输出端未连接有 另一放大器的第二输入端, 则将该放大器 11-2的输出端作为该电压调节电路系 统的总体输出 out, 可以连接调节负载。 在图 lc所示的电压调节电路系统中, 放大器 11-3的输出端作为该电压调节电路系统的总体输出 out,可以连接调节负 载。
需要说明的是, 上述第一输入端和第二输入端,及第一放大器和第二放大 器并不表示顺序关系, 而是为了说明不同的输入端和不同的放大器。
当分别与 m个放大器连接的数模转换器的输出端对应的参考电压相等或 近似相等时, 需要使用本实施例中所述的电压调节电路系统, 比如图 la和 lb 中数模转换器中输出端 Outl对应的参考电压端 REF1的参考电压, 与输出端 Out2对应的参考电压端 REF2的参考电压需要相等或近似相等。 但是采用本实 施例的电压调节电路系统,不一定需要这些数模转换器输出端对应的参考电压 相等或近似相等, 而可以对电路中的电阻进行调节。
采用将数模转换器的输出端与一个放大器 11-1的第一输入端 inl连接后,则 放大器 11-1输出端输出的电压范围可以由第二输入端 in2的电压 V。ffset, 及与该 放大器 11-1连接的数模转换器 10的输出端 Outl对应的参考电压来 VREF1决定,具 体地如果输出端 OUT1通过电阻 R1连接到放大器 11-1的第一输入端 inl , 第一输 入端 inl通过电阻 R2与输出端连接, 则放大器 11-1的最大输出电压为 ( R2/R1 ) *VREF1+VoffSet o 进一步地, 采用一个放大器 11-1的输出端连接另一放大器 11-2 的第二输入端时, 决定另一放大器 11-2输出端的电压范围的因素中, 另一放大 器 11-2第二输入端 in2的电压为一个放大器 11-1输出端的电压即 ( R2/R1 ) *VREF1+VoffSet , 则另一放大器 11-2的最大输出电压为( R2/R1 ) *VREF2+ ( R2/R1 ) *VREF1+V。ffset。
VREK相等, 则另一放大器 11-2的最大输出电压为 2* ( R2/R1 ) *VREF2 +Voffset o 其中 R1和 R2可以采用相同的电阻值。
一般情况下,数模转换器除了包括输出端,还包括输出端对应的参考电压 端,则数模转换器一个输出端输出的电压的调节精度可以通过该数模转换器的
位宽 N和该输出端对应的参考电压端 REF的参考电压 VREF来决定, 具体可以为 1/2n*VREF。 而对于在本实施例的电压调节电路系统中, 采用一个放大器的输 出端连接另一放大器的第二输入端, 其中, 一个放大器输出端的电压调节精度 为 1/2n*VREF, 该放大器的输出端连接另一放大器的第二输入端后, 决定另一 个放大器输出端的电压调节精度的因素中, 参考电压为 1/2n*VREF, 因此另一 放大器输出端的电压调节精度为 1/2N* ( 1/2n*VREF ) =1/22N*VREF。 这样相当于 2N位宽的数模转换器所实现的电压调节精度, 从而采用低位宽的数模转换器 实现了电压高精度调节。可见, 本实施例中电压调节电路系统所能调节的电压 范围较大, 且电压调节精度高, 能满足用户的实际需求。
在实际应用中,主要是将可以通过模拟信号调节或控制的调节负载连接在 电压调节电路系统的总体输出端 out, 比如压控振荡器 (VCO ) 等。 例如图 2 所示的具体实例中包括两个放大器 U1A和 U1B , —个数模转换器 U2 (位宽为 N )、 现场可编程逻辑门阵列 ( Field Programmable Gate Array, FPGA )和调节 负载即可以用模拟信号控制的晶体管 XI , 其中:
数模转换器 U2的两个输出端 OutA和 OutB分别与放大器 U1A的输入端 3和
U1B的输入端 5连接,放大器 U1A输出端 1通过电阻 R连接输入端 3 ,放大器 U1A 的输入端 2连接偏置电压电路, 该偏置电压电路包括串联连接在地与电源之间 的电阻, 该输入端 2连接电阻的之间的串联连接点; 放大器 U1B输出端 6通过电 阻 R连接输入端 5,放大器 U1B的输入端 4连接放大器 U1A的输出端 1 ,且放大器 U1B的输出端 6连接晶体管 XI; 晶体管 XI的输出端与 FPGA连接, FPGA用于采 集晶体管 XI输出的频率, 也可以通过与数模转换器 U2的连接调节数模转换器 U2的输出。 其中直接设置数模转换器 U2的两个输出端对应的参考电压端的参 考电压一致为 1/2N*3V3A。
在实际调节的过程中, 先将数模转换器 U2—个输出端 OutB的值指定为固 定值, 比如 0到 1/2N之间的任一值比如 1/2N— 使得放大器 U1B输出固定值; 然 后可以结合放大器 Ul A输入端 2的偏置电压, 调节数模转换器 U1的另一输出端 OutA输出电压, 可以使得放大器 U1A输出 0.2到 1.25之间的一个定值, 电压精 度为 1/2N* V3V3A, 此时, 晶体管 XI的输出反馈给 FPGA, 由 FPGA判断晶体管 XI输出的误差是否最小, 如果最小则锁定数模转换器 U2输出端 OutA的输出;
之后再调节数模转换器 U2的输出端 OutB的输出电压, 则放大器 U1B的电压调 节精度为 1/22N*V3V3A。
本发明实施例还提供一种电压调节电路系统, 其结构示意图如图 3a和 3b 所示, 包括数模转换器和放大器 21 , 其中数模转换器的位宽是 N位比如 8位等, 具体地:
放大器 21中的第一输入端 inl和第二输入端 in2分别与数模转换器的输出端 连接, 且分别连接不同的输出端, 放大器 21的输出端与第一输入端 inl连接; 放大器 21的第二输入端为偏置电压端。 其中,数模转换器可以将数字信号转换 为模拟信号输出, 是低位宽 N (比如 N小于 12或 16 ) 的数模转换器, 一个数模 转换器可以包括至少一个输出端。放大器 21的输出端为该电压调节电路系统的 总体输出端 out, 可以连接调节负载, 该调节负载是需要通过模拟信号来调节 电压的电子器件, 比如压控振荡器和晶体管等。
在具体实现的过程中, 电压调节电路系统中可以包括至少一个数模转换 器, 则电压调节电路系统可以包括如下几种方式:
( 1 )如图 3a所示的电压调节电路系统中包括一个数模转换器 20, 该数模 转换器 20包括两个输出端, 这两个输出端分别与放大器 21的第一输入端 inl和 第二输入端 in2连接。
( 2 )如图 3b所示的电压调节电路系统包括两个数模转换器 20- 1和 20-2 , 每个数模转换器都只包括一个输出端, 这两个数模转换器 20-1和 20-2的输出端 分别与放大器 21的第一输入端 inl和第二输入端 in2连接。
在实际应用中,主要是将可以通过模拟信号调节或控制的调节负载连接在 电压调节电路系统的总体输出端 out, 比如压控振荡器(VCO )等。
在本实施例的电压调节电路系统中,在放大器 21的偏置电压端(即第二输 入端)连接数模转换器的一个输出端 outl , 该数模转换器的一个输出端 outl对 应参考电压端的参考电压为 VREF1,该数模转换器的一个输出端 outl的电压调节 精度为 1/2n*VREF1;数模转换器另一输出端 out2连接放大器 21的第一输入端 inl , 设置该数模转换器另一输出端 out2对应参考电压端的参考电压为 νκΕΚ=1/2Ν*νκΕΡ1。 这样放大器 21第一输入端 inl连接的数模转换器另一输出端 out2对应的参考电压 VREF2可以作为衡量该放大器 21输出电压精度的参考电压,
则该放大器 21输出端的电压调节精度为 1/2N* ( 1/2n*VREF1 ) =1/22N*VREF1。 这样 相当于 2N位宽的数模转换器所实现的电压调节精度, 从而采用低位宽的数模 转换器实现了电压高精度调节。 且本实施例中, 放大器 21的最大输出电压为: ( R2/Rl ) *VREF2+Vouti, 其中, V0utl为数模转换器一个输出端 outl的输出电压。
需要说明的是,本实施例中的系统与上述图 la到图 lc所示的电压调节电路 系统类似,都可以采用低位宽的数模转换器实现电压高精度调节,所不同的是, 本实施例中,放大器 21的两个输入端所分别连接的数模转换器 20的输出端对应 的参考电压可以不同, 即图 3a和图 3b中所示的参考电压端 REF1和 REF2的参考 电压可以不同。 本发明实施例还提供一种电压调节电路系统, 其结构示意图如图 4a和 4b 所示, 包括数第一模转换器、 第二数模转换器和 X个放大器(X大于或等于 3的 整数, 图中以放大器 32-1、 32-2和 32-3为例说明), 其中:
X个放大器中一个放大器(比如图中的放大器 32-1 ) 的第一输入端 inl和第 二输入端 in2分别与第一数模转换器的输出端连接, 且分别连接不同的输出端; X个放大器中其它放大器(比如放大器 32-2和 32-3 ) 的第一输入端 inl分别与第 二数模转换器的输出端连接, 且分别连接不同的输出端, 上述放大器 32-1的输 出端连接其它放大器中某一放大器(比如放大器 32-2 )的第二输入端 in2, 而其 它放大器中除某一放大器 32-2之外的放大器的第二输入端 in2连接另一放大器 的输出端。 其中其它放大器某一放大器(比如放大器 32-3 )的输出端未连接有 另一放大器的第二输入端 in2。 则该放大器的输出端即为该电压调节电路系统 的总体输出端 out, 可以连接调节负载, 该调节负载是需要通过模拟信号来调 节电压的电子器件, 比如晶体管和压控振荡器等。
其中这 X个放大器中每一个放大器的输出端与第一输入端 inl连接, 且第二 输入端 in2为偏置电压端。
在具体实现的过程中,本实施例的电压调节电路系统中可以包括至少一个 第一数模转换器和第二数模转换器,则电压调节电路系统可以包括如下几种方 式:
( 1 )如图 4a所示的电压调节电路系统中包括一个第一数模转换器 30和一 个第二数模转换器 31 , 该第一数模转换器 30包括的两个输出端 outl和 out2分别
与放大器 32-1的第一输入端 inl和第二输入端 in2连接, 且第二数模转换器 31包 括 X-1个输出端 outl到 outx-1 (图中以 outl和 out2为例说明)分别与其它放大器 (放大器 32-2和 32-3 ) 的第一输入端 inl连接。
( 2 )如图 4 b所示的电压调节电路系统包括两个第一数模转换器 30 - 1和 30-2, 每个第一数模转换器都只包括一个输出端, 这两个第一数模转换器 30-1 和 30-2的输出端分别与放大器 32-1的第一输入端 inl和第二输入端 in2连接。
且还包括 x-1个第二数模转换器 (比如图 4b中的第二数模转换器 31-2和
31- 2 ), 每个第二数模转换器都只包括一个输出端, 这些第二数模转换的输出 端分别与其它放大器(放大器 32-2和 32-3 ) 的第一输入端 inl连接。
需要说明的是, 在其它具体的实施例中, 电压调节电路系统还可以包括 y 个第二数模转换器, y个第二数模转换器中部分第二数模转换器的输出端包括 一个, 另一部分第二数模转换器的输出端包括多个, 这 y个数据转换器所有输 出端的个数为 X- 1。 且上述第一数模转换器和第二数模转换器并不表示顺序关 系, 而是为了说明不同的数模转换器。
本实施例中,在本实施例的电压调节电路系统中, 第一数模转换器和第二 数模转换器的位宽都为 N,在一个放大器 32-1的偏置电压端(即第二输入端 in2 ) 连接第一数模转换的输出端 outl , 该第一数模转换器输出端 outl对应的参考电 压为 VREF1, 则该第一数模转换器输出端 outl的电压调节精度为 1/2n*VREF1; 第 一数模转换器另一输出端 out2连接放大器 21的第一输入端 inl ,设置该第一数模 转换器另一输出端 out2对应参考电压端的参考电压为
,这样与 该放大器 32- 1第一输入端 inl连接的第一数模转换器的输出端 out2对应的参考 电压的电压精度可以作为衡量该放大器输出电压精度的参考电压,则该放大器
32- 1输出端的电压调节精度为 1/2N* ( 1/2n*VREF1 ) =1/22N*VREF1。 进一步地, 将 放大器 32-1的输出端连接到另一放大器 32-2的第二输入端, 假设与放大器 32-1 第一输入端连接的第二数模转换器的输出端对应的参考电压为 V,REF1 , 设置 V,REF1与 VREF^S等或近似相等, 则另一放大器 32-2输出端的电压调节精度为 1/2N* ( 1/22N*VREF1 ) =1/23N*VREF1, 以此类推, 最终得到电压调节电路系统总 体输出的电压调节精度为 1/2 ( x+1 ) n*VREF1。 这样相当于(X+1 ) N位宽的数模转 换器所实现的电压调节精度,从而采用低位宽的数模转换器实现了电压高精度
调节。
且本实施例中, 放大器 32-1输出端输出的最大电压为 ( R2/R1 ) *VREF2+Voutl,其中, V0UTL为第一数模转换器一个输出端 outl的输出电压, VREF2 为第一数模转换器另一输出端 out2对应的参考电压; 则放大器 32-2输出端输出 的最大电压为( R2/R1 ) *VREF2+Vouti+ ( 2/R1 ) *V,REF1= ( R2/R1 ) *VREF2+Vouti+ ( R2/R1 ) * VREF2=2* ( R2/R1 ) *VREF2+V0UTL。 以此类推, 最终得到电路调节系 统(包括 X个放大器) 总体输出的最大电压为 X* ( R2/R1 ) *VREF2+Vouti o
以上对本发明实施例所提供的电压调节电路系统进行了详细介绍,本文中 是用于帮助理解本发明的方法及其核心思想; 同时,对于本领域的一般技术人 员, 依据本发明的思想, 在具体实施方式及应用范围上均会有改变之处, 综上 所述, 本说明书内容不应理解为对本发明的限制。
Claims
1、 一种电压调节电路系统, 其特征在于, 包括: 数模转换器和 m个放大 器, 所述 m为大于 1的正整数, 其中:
所述 m个放大器中每一个放大器的第一输入端分别与所述数模转换器的 输出端连接,且分别连接不同的输出端, 所述放大器的输出端与所述第一输入 端连接;
所述 m个放大器中第一放大器连接偏置电压电路, 所述 m个放大器中除所 述第一放大器之外的其它放大器的第二输入端连接另一放大器的输出端,所述 第二输入端为偏置电压端。
2、 如权利要求 1所述的系统, 其特征在于, 所述电压调节电路系统包括 m 个数模转换器, 所述数模转换器包括一个输出端; 或,
所述电压调节电路系统包括一个数模转换器, 所述数模转换器包括 m个输 出端。
3、 如权利要求 1所述的系统, 其特征在于,
所述电压调节电路系统包括 n个数模转换器,所述 n个数模转换器中部分数 模转换器的输出端包括一个, 另一部分数模转换器的输出端包括多个, 所述 n 个数模转换器所有输出端的个数为所述 m。
4、 如权利要求 1至 3任一项所述的系统, 其特征在于, 还包括调节负载, 所述调节负载与所述 m个放大器中第二放大器的输出端连接,
所述第二放大器的输出端未连接有另一放大器的第二输入端。
5、 一种电压调节电路系统, 其特征在于, 包括数模转换器和放大器, 其 中:
所述放大器中的第一输入端和第二输入端分别与所述数模转换器的输出 端连接,且分别连接不同的输出端, 所述放大器的输出端与所述第一输入端连 接;
所述放大器的第二输入端为偏置电压端。
6、 如权利要求 5所述的系统, 其特征在于, 所述电压调节电路系统包括两 个数模转换器, 所述数模转换器包括一个输出端; 或,
所述电压调节电路系统包括一个数模转换器,所述数模转换器包括两个输
出端。
7、 如权利要求 5或 6所述的系统, 其特征在于, 还包括调节负载, 所述调 节负载与所述放大器的输出端连接。
8、 一种电压调节电路系统, 其特征在于, 包括第一数模转换器、 第二数 模转换器和 X个放大器, 所述 X大于或等于 3 , 其中:
所述 X个放大器中一个放大器的第一输入端和第二输入端分别与所述第一 数模转换器的输出端连接, 且分别连接不同的输出端;
所述 X个放大器中其它放大器的第一输入端分别与所述第二数模转换器的 输出端连接,且分别连接不同的输出端; 所述一个放大器的输出端连接所述其 它放大器中某一放大器的第二输入端,所述其它放大器中除所述某一放大器之 外的放大器的第二输入端连接另一放大器的输出端;
所述 X个放大器中每一个放大器的输出端都与第一输入端连接, 且放大器 的第二输入端为偏置电压端。
9、 如权利要求 8所述的系统, 其特征在于,
所述电压调节电路系统包括两个第一数模转换器,所述第一数模转换器包 括一个输出端, 或所述电压调节电路系统包括一个第一数模转换器, 所述第一 数模转换器包括两个输出端; 或,
所述电压调节电路系统包括 X- 1个第二数模转换器, 所述第二数模转换器 包括一个输出端; 或所述电压调节电路系统包括一个第二数模转换器, 所述第 二数模转换器包括 X-1个输出端; 或所述电压调节电路系统包括 y个第二数模转 换器, 所述 y个第二数模转换器中部分第二数模转换器的输出端包括一个, 另 一部分第二数模转换器的输出端包括多个, 所述 y个数据转换器所有输出端的 个数为所述 x- l。
10、 如权利要求 8或 9所述的系统, 其特征在于, 还包括调节负载, 所述 调节负载与所述 X 个放大器中输出端未连接有另一放大器的第二输入端的放 大器的输出端连接。
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| CN102868405A (zh) * | 2012-09-13 | 2013-01-09 | 成都驰通数码系统有限公司 | 一种并联模数信号转换装置 |
| CN103095303A (zh) * | 2012-10-23 | 2013-05-08 | 深圳先进技术研究院 | 一种电流型与电压型组合数模转换器 |
| CN103631296A (zh) * | 2013-12-18 | 2014-03-12 | 海能达通信股份有限公司 | 一种电压调节电路系统 |
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| CN102868405A (zh) * | 2012-09-13 | 2013-01-09 | 成都驰通数码系统有限公司 | 一种并联模数信号转换装置 |
| CN103095303A (zh) * | 2012-10-23 | 2013-05-08 | 深圳先进技术研究院 | 一种电流型与电压型组合数模转换器 |
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