WO2015059989A1 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- WO2015059989A1 WO2015059989A1 PCT/JP2014/071564 JP2014071564W WO2015059989A1 WO 2015059989 A1 WO2015059989 A1 WO 2015059989A1 JP 2014071564 W JP2014071564 W JP 2014071564W WO 2015059989 A1 WO2015059989 A1 WO 2015059989A1
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- sealing
- optical semiconductor
- semiconductor device
- semiconductor elements
- sealing layer
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/501—Wavelength conversion elements characterised by the materials, e.g. binder
- H01L33/502—Wavelength conversion materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/505—Wavelength conversion elements characterised by the shape, e.g. plate or foil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
Definitions
- the present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a method for manufacturing a semiconductor device and a semiconductor device manufactured thereby.
- an encapsulating sheet in which a sealing resin layer containing particles such as phosphors and silica is laminated on a long release sheet so as to be continuous in the longitudinal direction is arranged at an interval in the longitudinal direction.
- a sealing resin layer is disposed opposite to a plurality of LEDs to seal the LEDs (see, for example, Patent Document 1 below).
- the sealing resin layer that is, the sealing region
- the sealing resin layer positioned relatively near each LED covers the upper surface and the side surface of the LED. Contributes to LED sealing.
- a sealing resin layer positioned relatively remotely with respect to each LED specifically, a sealing resin layer positioned in the center (midway in the longitudinal direction) between adjacent LEDs (ie, non-blocking resin layer).
- the sealing region does not substantially contribute to LED sealing. Therefore, in the LED device, the sealing resin layer in the non-sealing region becomes an unnecessary region in the LED sealing, and accordingly, the yield of the sealing resin layer containing the above-described particles is lowered. As a result, there is a problem that the manufacturing cost of the LED device increases.
- An object of the present invention is to provide a method for manufacturing a semiconductor device and a semiconductor device manufactured thereby, which can improve the yield of a sealing layer and reduce the manufacturing cost of the semiconductor device.
- a sealing step of sealing a plurality of the semiconductor elements is provided so as to correspond to the elements on a one-to-one basis and are spaced apart in the first direction.
- the sealing step the plurality of semiconductor elements are sealed so that the plurality of sealing layers containing particles are spaced apart in the first direction in a one-to-one correspondence with each semiconductor element. Stop. That is, all of the plurality of sealing layers can contribute to the sealing of the plurality of semiconductor elements. Therefore, the sealing layer can be used effectively. As a result, the yield of the sealing layer can be improved and the manufacturing cost of the semiconductor device can be reduced.
- the plurality of semiconductor elements are arranged at intervals in a second direction intersecting the first direction, and in the sealing step, The sealing layer is sealed by the sealing layer continuous in the second direction, and the sealing layer is divided into a plurality of parts in the second direction after the sealing step. And a cutting step of cutting the substrate.
- the semiconductor device further includes a plurality of the semiconductor elements adjacent to each other in the second direction. It is preferable to arrange the substrates so as to be smaller than the distance between the elements, and it is also preferable to prepare the substrate extending in the first direction in the preparation step.
- the semiconductor device in the preparation step, a plurality of semiconductor elements are arranged at intervals in both the first direction and the second direction, and then the semiconductor elements are sealed by the sealing layer in the sealing step. Therefore, the semiconductor device can be manufactured efficiently.
- the semiconductor elements arranged at intervals in the second direction are sealed by the sealing layer continuous in the second direction, so that the semiconductor elements can be sealed easily and efficiently. Can do.
- the sealing layer and the substrate are cut so that the sealing layer is divided into a plurality of parts in the second direction by the cutting step, the sealing layer continuous in the second direction can be used effectively. .
- the sealing layers are arranged so as to be spaced apart in the first direction, and even if the sealing layers are arranged so as to be continuous in the second direction, the plurality of semiconductor elements are arranged in the first direction.
- the semiconductor elements are arranged so that the distance between adjacent semiconductor elements in the two directions is smaller than the distance between adjacent semiconductor elements in the first direction. If it does so, the sealing layer cut
- the substrate extending in the first direction is prepared, the substrate can be continuously supplied in the first direction. Therefore, the semiconductor device can be manufactured efficiently. Further, in the cutting step, the substrate extending in the first direction is cut so as to be divided into a plurality of parts in the second direction, so that the obtained semiconductor device is formed to extend in the first direction. Therefore, the length of the semiconductor device in the first direction can be adjusted to a desired dimension and used for various applications.
- the sealing step it is preferable that in the sealing step, the semiconductor element is sealed with the sealing layer previously formed in a sheet shape.
- the thickness of the sealing layer can be accurately adjusted in advance, thereby improving the sealing accuracy. be able to. Therefore, a semiconductor device having excellent reliability can be manufactured.
- the particle contains a phosphor
- the semiconductor element is an optical semiconductor element
- the method for manufacturing an optical semiconductor device it is preferable that the particle contains a phosphor, the semiconductor element is an optical semiconductor element, and the method for manufacturing an optical semiconductor device.
- the yield of the sealing layer can be improved and the manufacturing cost of the optical semiconductor device can be reduced.
- the semiconductor device of the present invention is obtained by the above-described method for manufacturing a semiconductor device.
- the yield of the sealing layer is improved, and the manufacturing cost is reduced.
- the yield of the sealing layer can be improved and the manufacturing cost of the semiconductor device can be reduced.
- the yield of the sealing layer is improved, and the manufacturing cost is reduced.
- FIG. 1 is a schematic plan view illustrating a method for manufacturing an optical semiconductor device according to the first embodiment of the present invention.
- FIG. 2 is a schematic cross-sectional view along the left-right direction for explaining the method of manufacturing the optical semiconductor device shown in FIG. 3A to 3E are schematic cross-sectional process diagrams along the front-rear direction for explaining the method of manufacturing the optical semiconductor device shown in FIG. 1.
- FIGS. 3A and 3B are a preparation process
- FIG. 3C is a sealing process.
- 3D shows a cutting process
- FIG. 3E shows a peeling process.
- FIG. 4 is a schematic plan view illustrating a method for manufacturing an optical semiconductor device according to the second embodiment of the present invention.
- FIG. 5 is a schematic cross-sectional view along the left-right direction for explaining the method of manufacturing the optical semiconductor device shown in FIG. 6A to 6D are schematic cross-sectional process diagrams along the front-rear direction for explaining the method of manufacturing the optical semiconductor device shown in FIG. 4.
- FIGS. 6A and 6B are a preparation process
- FIG. 6C is a sealing process.
- FIG. 6D shows the peeling process.
- FIG. 7 is a schematic plan view illustrating a method for manufacturing an optical semiconductor device according to the third embodiment of the present invention.
- FIG. 8 is a schematic plan view for explaining the method for manufacturing an optical semiconductor device according to the fourth embodiment of the present invention.
- FIG. 9 is a schematic plan view for explaining the method for manufacturing an optical semiconductor device according to the fifth embodiment of the present invention.
- the right side of the drawing is the front side (one side in the front-rear direction, which is an example of the first direction (downstream in the transport direction)), the left side of the page is the rear side (the other side in the front-rear direction (upstream in the transport direction)) Is the right side (one example of the second direction, one side in the left-right direction orthogonal to the front-rear direction), the lower side on the page is the left side (the other side in the left-right direction), and the front side is the upper side (the front-rear direction and the left-right direction)
- the thickness direction one side which is an example of the third direction orthogonal to the upper side, and the back side of the drawing indicates the lower side (the other side in the thickness direction).
- the direction of FIG. 1 is used as a reference.
- the release sheet 6 is omitted in order to clearly show the relative arrangement of the optical semiconductor element 3 and the sealing layer 5.
- the method of manufacturing the optical semiconductor device 1 according to the first embodiment of the present invention includes a preparation process (see FIGS. 3A and 3B) and a sealing process (see FIG. 3C) as an essential process.
- the manufacturing method of the optical semiconductor device 1 includes a preparation process (see FIGS. 3A and 3B), a sealing process (see FIG. 3C), a cutting process (see FIG. 3D), and a peeling process (see FIG. 3E). See).
- a preparation process see FIGS. 3A and 3B
- a sealing process see FIG. 3C
- a cutting process see FIG. 3D
- a peeling process see FIG. 3E. See.
- each process is explained in full detail.
- Each of the following steps is performed using, for example, an optical semiconductor manufacturing apparatus described in JP2013-512234A, JP2012-142364A, etc., from the rear side to the front side. That is, it is carried out while transporting from the upstream side toward the downstream side in the transport direction.
- a substrate 2 is prepared.
- the substrate 2 is formed in a substantially rectangular flat strip shape extending in the front-rear direction.
- the substrate 2 is made of an insulating substrate such as a silicon substrate, a ceramic substrate, a polyimide resin substrate, or a laminated substrate in which an insulating layer is laminated on a metal substrate.
- a conductor pattern (including an electrode (not shown) for electrical connection with a terminal (not shown) of the optical semiconductor element 3 to be described below and a wiring continuous therewith is provided. (Not shown) is formed.
- the conductor pattern is formed from a conductor such as gold, copper, silver, or nickel.
- the substrate 2 is prepared by being wound in a roll shape, and is unwound from the roll and continuously supplied to an optical semiconductor manufacturing apparatus (not shown).
- an optical semiconductor manufacturing apparatus (not shown).
- a long flat plate-like substrate 2 extending in the front-rear direction can be continuously provided to this optical semiconductor manufacturing apparatus (not shown).
- the dimension in plan view of the substrate 2 is appropriately selected.
- the length (width) in the left-right direction is, for example, 5 mm or more, preferably 10 mm or more, and, for example, 250 mm or less, preferably 150 mm or less.
- substrate 2 is 25 micrometers or more, for example, Preferably, it is 500 micrometers or more, for example, is 5000 micrometers or less, Preferably, it is 3000 micrometers or less.
- a plurality of optical semiconductor elements 3 are mounted on the substrate 2.
- a plurality of optical semiconductor elements 3 are arranged on the upper surface of the substrate 2 so as to be spaced apart from each other in the front-rear direction and the left-right direction. More specifically, a plurality of first element rows (left and right rows) 4A of the optical semiconductor elements 3 arranged in a row at intervals in the left-right direction are arranged at intervals in the front-rear direction. The Each first element row 4A is arranged in a straight line along the left-right direction so that the plurality of optical semiconductor elements 3 all overlap when projected in the left-right direction.
- the plurality of optical semiconductor elements 3 adjacent to each other in the front-rear direction are projected in the front-rear direction, the plurality of optical semiconductor elements 3 are all overlapped in the front-rear direction. It is arranged in a straight line along.
- the optical semiconductor element 3 is a semiconductor element that converts electrical energy into light energy, and is formed, for example, in a substantially rectangular shape in cross section.
- the optical semiconductor element 3 examples include an LED (light emitting diode element) such as a blue LED that emits blue light, and an LD (laser diode).
- the dimension of the optical semiconductor element 3 is appropriately set according to the application and purpose. Specifically, the thickness is, for example, 10 ⁇ m or more, and, for example, 1000 ⁇ m or less.
- the length in the front-rear direction of the optical semiconductor element 3 in plan view is, for example, 0.01 mm or more, preferably 0.1 mm or more, and for example, 20 mm or less, preferably 15 mm or less.
- the left-right direction in plan view of the optical semiconductor element 3 is, for example, 0.01 mm or more, preferably 0.1 mm or more, and for example, 20 mm or less, preferably 15 mm or less.
- the distance between the optical semiconductor elements 3 in the front-rear direction (pitch in the front-rear direction), that is, the distance L2 between the optical semiconductor elements 3 in each second element row 4B is, for example, 3 mm or more, preferably 5 mm or more. For example, it is 150 mm or less, Preferably, it is 70 mm or less.
- the distance in the left-right direction between the optical semiconductor elements 3 (the pitch in the left-right direction), that is, the distance L1 between the optical semiconductor elements 3 in each first element row 4A is, for example, an optical semiconductor in each second element row 4B.
- the distance L2 between the elements 3 is smaller than the distance L2 between the elements 3 (that is, the relationship L1 ⁇ L2 is satisfied), and specifically, for example, less than 80%, preferably 50% or less with respect to the distance L2. Moreover, it is 15% or more. More specifically, the distance L1 is 0.45 mm or more, for example, 2.4 mm or less, and preferably 1.5 mm or less. If the distance L1 is greater than or equal to the distance L2, the yield of the sealing layer 5 after the cutting process described later may not be improved.
- each optical semiconductor element 3 is flip-chip mounted on the substrate 2, for example.
- the optical semiconductor element 3 is connected to an electrode (not shown) of the substrate 2 by wire bonding.
- the substrate 2 on which the optical semiconductor element 3 is mounted is prepared.
- substrate 2 with which the optical semiconductor element 3 was mounted previously can also be prepared.
- the sealing process is performed after the preparation process. As shown in FIGS. 2 and 3B, in the sealing step, first, a plurality of sealing layers 5 are prepared.
- Each sealing layer 5 is formed in advance in the form of a sheet.
- a sealing composition is prepared.
- Sealing composition contains particles as essential components, and specifically contains particles and a resin.
- Examples of the particles include phosphors and fillers.
- the phosphor has a wavelength conversion function, and examples thereof include a yellow phosphor capable of converting blue light into yellow light, and a red phosphor capable of converting blue light into red light.
- yellow phosphor examples include silicate phosphors such as (Ba, Sr, Ca) 2 SiO 4 ; Eu, (Sr, Ba) 2 SiO 4 : Eu (barium orthosilicate (BOS)), for example, Y 3 Al Garnet-type phosphors having a garnet-type crystal structure such as 5 O 12 : Ce (YAG (yttrium, aluminum, garnet): Ce), Tb 3 Al 3 O 12 : Ce (TAG (terbium, aluminum, garnet): Ce) Examples thereof include oxynitride phosphors such as Ca- ⁇ -SiAlON.
- silicate phosphors such as (Ba, Sr, Ca) 2 SiO 4 ; Eu, (Sr, Ba) 2 SiO 4 : Eu (barium orthosilicate (BOS)
- Y 3 Al Garnet-type phosphors having a garnet-type crystal structure such as 5 O 12 : Ce (YAG (yttrium, aluminum, garnet): Ce
- red phosphor examples include nitride phosphors such as CaAlSiN 3 : Eu and CaSiN 2 : Eu.
- shape of the phosphor examples include a spherical shape, a plate shape, and a needle shape. Preferably, spherical shape is mentioned from a fluid viewpoint.
- the average value of the maximum length of the phosphor is, for example, 0.1 ⁇ m or more, preferably 1 ⁇ m or more, and for example, 200 ⁇ m or less, preferably 100 ⁇ m or less. It is.
- the phosphors can be used alone or in combination.
- the blending ratio of the phosphor is, for example, 0.1 parts by mass or more, preferably 0.5 parts by mass or more, for example, 80 parts by mass or less, preferably 50 parts by mass or less with respect to 100 parts by mass of the resin. It is.
- the filler examples include organic fine particles such as silicone particles, and inorganic fine particles such as silica, talc, alumina, aluminum nitride, and silicon nitride.
- the average value of the maximum length of the filler is, for example, 0.1 ⁇ m or more, preferably 1 ⁇ m or more, and, for example, 200 ⁇ m or less, preferably 100 ⁇ m or less.
- the filler can be used alone or in combination.
- the blending ratio of the filler is, for example, 0.1 parts by mass or more, preferably 0.5 parts by mass or more, for example, 70 parts by mass or less, preferably 50 parts by mass with respect to 100 parts by mass of the resin. Or less.
- the mixing ratio of the particles is, for example, 0.1 parts by mass or more, preferably 0.5 parts by mass or more, and, for example, 80 parts by mass or less, preferably 60 parts by mass with respect to 100 parts by mass of the resin. It is as follows.
- the resin examples include a thermoplastic resin that is plasticized by heating, for example, a thermosetting resin that is cured by heating, for example, an active energy ray curable that is cured by irradiation with active energy rays (for example, ultraviolet rays, electron beams, etc.). Resin etc. are mentioned.
- the thermoplastic resin examples include vinyl acetate resin, ethylene / vinyl acetate copolymer (EVA), vinyl chloride resin, EVA / vinyl chloride resin copolymer, and the like.
- the thermosetting resin include silicone resin, epoxy resin, polyimide resin, phenol resin, urea resin, melamine resin, and unsaturated polyester resin.
- the resin preferably includes a curable resin such as a thermosetting resin and an active energy ray curable resin.
- the curable resin examples include a two-stage curable resin and a one-stage curable resin, and a two-stage curable resin is preferable.
- the two-stage curable resin has a two-stage reaction mechanism, and is B-staged (semi-cured) by the first-stage reaction and C-staged (final-cured) by the second-stage reaction.
- the one-step curable resin has a one-step reaction mechanism and is completely cured by the first-step reaction.
- the B stage is a state between the A stage in which the curable resin is in a liquid state and the fully cured C stage, and the curing and gelation are slightly advanced, and the compression elastic modulus is the elasticity of the C stage. It is a state smaller than the rate.
- a sealing composition particles and a resin are blended.
- blending is A stage.
- the prepared sealing composition is applied to the surface of the release sheet 6.
- the sealing composition is applied to the surface of the release sheet 6 with an appropriate thickness by a method such as casting, spin coating, roll coating, or the like, to form a film.
- a film of the sealing composition is formed on the lower surface of the release sheet 6 with a pattern corresponding to the first element row 4A.
- the film is heated and / or irradiated with active energy rays. More specifically, when the resin contains a two-step curable resin, the sealing layer 5 is B-staged (semi-cured) by heating and / or active energy ray irradiation.
- the sheet-like sealing layer 5 is formed so as to be supported by the release sheet 6.
- each sealing layer 5 extending in the left-right direction are arranged on the lower surface of the release sheet 6 at intervals in the front-rear direction. As shown in FIG. 1, each sealing layer 5 is provided on the board
- the dimension of the sealing layer 5 is appropriately adjusted depending on the use and purpose. Specifically, the length (width) in the front-rear direction is longer than the length (width) in the front-rear direction of the optical semiconductor element 3, specifically, The width of the optical semiconductor element 3 is, for example, 1 mm or more, preferably 2 mm or more, more preferably 3 mm or more, and for example, 10 mm or less. Further, the length of the release sheet 6 in the left-right direction is the same as the length of the substrate 2 in the left-right direction. The width of the interval L3 between the sealing layers 5 adjacent in the front-rear direction is, for example, 0.5 mm or more, preferably 10 mm or more, and, for example, 100 mm or less, preferably 50 mm or less.
- each sealing layer 5 faces the optical semiconductor element 3 of each first element row 4A in the thickness direction.
- the plurality of optical semiconductor elements 3 are sealed with the plurality of sealing layers 5. Specifically, as shown by arrows in FIGS. 2 and 3B, the plurality of sealing layers 5 are pushed down relative to the substrate 2. Thus, each of the plurality of sealing layers 5 collectively covers (embeds) and seals the plurality of optical semiconductor elements 3 corresponding to each of the plurality of first element rows 4A.
- each of the plurality of sealing layers 5 embeds each of the plurality of optical semiconductor elements 3. That is, in each second element row 4B, each sealing layer 5 embeds each optical semiconductor element 3 on a one-to-one basis. Further, in each second element row 4B, the plurality of sealing layers 5 embed the plurality of optical semiconductor elements 3 so as to be spaced apart in the left-right direction corresponding to the respective optical semiconductor elements 3.
- each optical semiconductor element 3 the upper surface and the side surfaces (all side surfaces, specifically, the front side surface, the rear side surface, the right side surface, and the left side surface) of each optical semiconductor element 3 are covered with the sealing layer 5. Further, the upper surface of the substrate 2 corresponding to the first element row 4A (in the vicinity of each optical semiconductor element 3) is covered with the sealing layer 5, while not corresponding to the first element row 4A (in each optical semiconductor element 3). On the other hand, the upper surface of the substrate 2 located remotely, ie, located in the middle between the adjacent optical semiconductor elements 3, is exposed from the sealing layer 5.
- the substrate 2 has a sealing region 7 corresponding to the first element row 4A where the sealing layer 5 is formed, and an exposed region exposed from the sealing layer 5 that does not correspond to the first element row 4A. (Non-sealing region) 8 is formed.
- the sealing layer 5 contains a curable resin
- the sealing layer 5 is made to be C-staged (completely cured).
- an optical semiconductor device assembly 9 including a single substrate 2, a plurality of optical semiconductor elements 3, a plurality of sealing layers 5, and a single release sheet 6 is obtained.
- the cutting process is performed after the sealing process.
- the optical semiconductor device assembly 9 is cut so that the sealing layer 5 corresponding to each first element row 4A is divided into a plurality of parts in the left-right direction, as indicated by broken lines in FIGS. 1 and 3D. That is, in the cutting step, the sealing layer 5 and the substrate 2 are cut so that the sealing layers 5 corresponding to the plurality of optical semiconductor elements 3 are divided into a plurality of parts in the left-right direction.
- the sealing layer 5 between the optical semiconductor elements 3 in the first element array 4A and the plurality of optical semiconductor elements 3 in each first element array 4A are separated.
- the substrate 2 is cut.
- the plurality of optical semiconductor elements 3 corresponding to the second element rows 4B are not separated into pieces, while the sealing layer 5 and the substrate 2 between the optical semiconductor elements 3 in the first element row 4A are cut and applied.
- the optical semiconductor element 3 is singulated.
- a dicing device using a dicing blade, a cutting device using a cutter, a laser irradiation device, or the like is used.
- the substrate 2, the plurality of optical semiconductor elements 3 arranged in a line in the front-rear direction, and the plurality of optical semiconductor elements 3 are sealed, and
- An optical semiconductor as an example of a semiconductor device including a sealing layer 5 provided so as to form a sealing region 7 and an exposed region 8 on the substrate 2 and a release sheet 6 (see FIG. 3D) that supports the sealing layer 5 Device 1 is obtained.
- the optical semiconductor device 1 including the substrate 2, the optical semiconductor element 3, and the sealing layer 5 is obtained.
- the obtained optical semiconductor device 1 is used, for example, in the optical field, specifically in a light emitting device (not shown).
- the sealing step the plurality of sealing layers 5 containing particles are spaced apart in the front-rear direction in a one-to-one correspondence with the optical semiconductor elements 3 of each second element row 4B.
- a plurality of semiconductor elements 3 are sealed. That is, all of the plurality of sealing layers 5 corresponding to the sealing region 7 can contribute to the sealing of the plurality of semiconductor elements 3. Therefore, the sealing layer 5 can be used effectively. As a result, the yield of the sealing layer 5 can be improved and the manufacturing cost of the optical semiconductor device 1 can be reduced.
- a plurality of optical semiconductor elements 3 are arranged on the substrate 2 with an interval in both the front-rear direction and the left-right direction. Is sealed by the sealing layer 5, so that the optical semiconductor device 1 can be efficiently manufactured.
- the optical semiconductor elements 3 arranged at intervals in the left-right direction are sealed by the sealing layer 5 continuous in the left-right direction, so that the optical semiconductor elements 3 can be sealed easily and efficiently. Can be stopped.
- the sealing layer 5 and the substrate 2 are cut so that the sealing layer 5 is divided into a plurality of parts in the left-right direction by the cutting step, so that the sealing layer 5 continuous in the left-right direction is effectively used. Can do.
- the sealing layer 5 is disposed so as to be spaced apart in the front-rear direction, and even if the sealing layer 5 is disposed so as to be continuous in the left-right direction, a plurality of optical semiconductor elements 3 are formed.
- the space L1 between the adjacent optical semiconductor elements 3 in the left-right direction is set to be smaller than the distance L2 between the adjacent optical semiconductor elements 3 in the front-rear direction. If it does so, the sealing layer 5 cut
- the substrate 2 extending in the front-rear direction since the substrate 2 extending in the front-rear direction is prepared, the substrate 2 can be continuously supplied in the front-rear direction. Therefore, the optical semiconductor device 1 can be manufactured efficiently. Further, in the cutting step, the substrate 2 extending in the front-rear direction is cut so as to be divided into a plurality of parts in the front-rear direction, so that the obtained optical semiconductor device 1 is formed to extend in the front-rear direction. Therefore, the length of the optical semiconductor device 1 in the left-right direction can be adjusted to a desired dimension, and can be suitably used for various applications, specifically, a light emitting device (not shown) that is long in the front-rear direction.
- the optical semiconductor device 1 can be efficiently manufactured while improving the yield of the sealing layer 5 and reducing the manufacturing cost of the optical semiconductor device 1.
- the optical semiconductor element 3 is sealed by the sealing layer 5 previously formed in a sheet shape, the thickness of the sealing layer 5 can be accurately adjusted in advance. The accuracy of stopping can be improved. Therefore, the optical semiconductor device 1 having excellent reliability can be manufactured.
- the yield of the sealing layer 5 can be improved and the manufacturing cost of the optical semiconductor device 1 can be reduced.
- the yield of the sealing layer 5 is improved, and the manufacturing cost is reduced.
- the optical semiconductor element 3 is embedded and sealed by the sealing layer 5 previously formed in a sheet shape.
- the varnish made of the sealing composition is used as the substrate 2 and the optical semiconductor element. 3 may be applied directly so as to have the above-described pattern.
- the optical semiconductor device 1 can be obtained without performing the peeling process. As a result, man-hours can be reduced, and the optical semiconductor device 1 can be manufactured by a simple process and at a low cost.
- the sealing layer 5 is formed from a single layer, but the sealing layer 5 may be formed by laminating a plurality of different types of layers in the thickness direction. In that case, particles may be included as an essential component in any one of the plurality of layers constituting the sealing layer 5. In other words, the remaining layer of the plurality of layers constituting the sealing layer 5 can be configured as a layer not containing particles.
- optical semiconductor element 3 is described as an example of the semiconductor element in the present invention, for example, although not illustrated, they may be electronic elements.
- An electronic element is a semiconductor element that converts electrical energy into energy other than light, specifically, signal energy, and specifically includes a transistor, a diode, and the like.
- the dimensions of the electronic element are appropriately selected depending on the application and purpose.
- examples of the filler contained in the sealing layer 5 include black pigments such as carbon black.
- the blending ratio of the filler is, for example, 5 parts by mass or more, preferably 10 parts by mass or more, and for example, 99 parts by mass or less, preferably 95 parts by mass or less with respect to 100 parts by mass of the resin. .
- the physical properties (specifically, the compression elastic modulus, etc.) of the sealing layer 5 are the same as those of the first embodiment described above.
- each optical semiconductor element 3 in each first element row 4A is singulated, that is, one.
- the optical semiconductor device assembly 9 is cut so that each optical semiconductor element 3 is obtained.
- the number of optical semiconductor elements 3 smaller than the number of optical semiconductor elements 3 in each first element row 4A is configured so as to form an aggregate.
- the semiconductor device assembly 9 can also be cut. In that case, in the cut optical semiconductor device assembly 9, the spacing in the left-right direction between the plurality of optical semiconductor elements 3 in one assembly is, for example, 0.5 mm or more, for example, 3 mm or less.
- Second Embodiment A method of manufacturing the optical semiconductor device 1 according to the second embodiment of the present invention will be described with reference to FIGS. 4, 5, and 6A to 6D.
- FIG. 5 and FIGS. 6A to D members and steps similar to those of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.
- the plurality of sealing layers 5 extend in the left-right direction and are arranged on the substrate 2 at intervals in the front-rear direction.
- the plurality of sealing layers 5 are provided. It can also be arranged on the substrate 2 so as to extend in the front-rear direction and be spaced apart from each other in the left-right direction.
- the manufacturing method of the optical semiconductor device 1 includes a preparation process (see FIGS. 6A and 6B), a sealing process (see FIG. 6C), a cutting process (see FIGS. 4 and 5), and a peeling process (see FIG. 6D). Is provided.
- the sealing process is performed after the preparation process.
- first as shown in FIGS. 5 and 6B, a plurality of sealing layers 5 are prepared.
- Each sealing layer 5 is formed in advance in a sheet shape, and as illustrated in FIG. 4, for example, is formed in a substantially rectangular shape in plan view corresponding to each second element row 4 ⁇ / b> B long in the front-rear direction.
- the length in the left-right direction of each sealing layer 5 is the same as the length in the front-rear direction of each sealing layer 5 in the first embodiment, for example. Further, the interval between the sealing layers 5 adjacent in the left-right direction is the same as the interval L3 between the sealing layers 5 adjacent in the front-rear direction in the first embodiment.
- the optical semiconductor device assembly 9 is cut so that the sealing layer 5 corresponding to each second element row 4B is divided into a plurality of parts in the front-rear direction. That is, in the cutting step, the sealing layer 5 and the substrate 2 are cut so that the sealing layers 5 corresponding to the plurality of optical semiconductor elements 3 are divided into a plurality of parts in the front-rear direction. In the cutting of the optical semiconductor device assembly 9, the sealing layer 5 between the optical semiconductor elements 3 in the second element row 4B and the plurality of optical semiconductor elements 3 in each second element row 4B are separated. The substrate 2 is cut.
- the optical semiconductor elements 3 arranged at intervals in the front-rear direction are sealed by the sealing layer 5 continuous in the front-rear direction. Therefore, the optical semiconductor element 3 adjacently disposed in the front-rear direction can be easily and efficiently sealed.
- the sealing layer 5 and the substrate 2 are cut by the cutting step so that the sealing layer 5 is divided into a plurality of portions in the front-rear direction, so that the substrate 2 continuous in the front-rear direction can be used effectively.
- the sealing layer 5 that has been continuous in the front-rear direction is cut into a plurality of parts in the front-rear direction by the cutting process, Due to the spacing, the area of the margin of the sealing layer 5 with respect to the optical semiconductor element 3 in the left-right direction (that is, the outer side portions of the optical semiconductor element 3 in the left-right direction) It is narrower than the area of the margin of the stop layer 5 (that is, both outer portions in the front-rear direction of the optical semiconductor element 3). That is, the first embodiment can secure the above-described margin of the sealing layer 5 in a wider area than the second embodiment. Therefore, the yield of the sealing layer 5 is much better in the first embodiment than in the second embodiment.
- the plurality of optical semiconductor elements 3 are separated by a distance L1 between the adjacent optical semiconductor elements 3 in the left-right direction. It arrange
- the plurality of optical semiconductor elements 3 are separated from each other in the interval L1 between the optical semiconductor elements 3 adjacent in the left-right direction. It arrange
- the left-right distance (left-right pitch) L1 between the optical semiconductor elements 3 is, for example, 3 mm or more, preferably 5 mm or more, and, for example, 150 mm or less, preferably 70 mm or less.
- the front-rear direction interval (pitch in the front-rear direction) L2 between the optical semiconductor elements 3 is smaller than the horizontal interval (pitch in the left-right direction) L1 between the optical semiconductor elements 3, for example (ie, the pitch in the left-right direction).
- the distance L1 is less than 80%, preferably 50% or less, and 15% or more with respect to the distance L1.
- the distance L2 is 0.45 mm or more, for example, 2.4 mm or less, and preferably 1.5 mm or less. If the distance L2 is greater than or equal to the distance L1, the yield of the sealing layer 5 after the cutting process described later may not be improved.
- the interval L1 between the optical semiconductor elements 3 adjacent in the left-right direction of the plurality of optical semiconductor elements 3 is larger than the interval L2 between the optical semiconductor elements 3 adjacent in the front-rear direction.
- the sealing layer 5 that has been continuous in the front-rear direction is cut so as to be divided into a plurality of parts in the front-rear direction.
- the area of the margin of the sealing layer 5 with respect to the optical semiconductor element 3 in the left-right direction depends on the above-described interval between the optical semiconductor elements 3. It is narrower than the area of the margin of the sealing layer 5 with respect to the optical semiconductor element 3 in the left-right direction of the form (that is, both the left and right outer portions of the optical semiconductor element 3). That is, the third embodiment can secure the above-described margin of the sealing layer 5 in a wider area than the second embodiment. Therefore, the yield of the sealing layer 5 is much better in the third embodiment than in the second embodiment.
- FIG. 8 members and processes similar to those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.
- the sealing layer 5 is formed in a pattern corresponding to the plurality of optical semiconductor elements 3 in each first element row 4A.
- the sealing layer 5 is formed in each second The pattern is formed in a pattern corresponding to the plurality of optical semiconductor elements 3 in the element row 4B.
- a plurality of patterns are arranged in a pattern corresponding to a single (one) optical semiconductor element 3. You can also.
- Each sealing layer 5 corresponds to each optical semiconductor element 3, and specifically, is formed in a substantially rectangular shape in plan view including each optical semiconductor element 3 in plan view. In addition, the plurality of sealing layers 5 are aligned and spaced from each other in the front-rear direction and the left-right direction.
- the exposed region 8 is formed in a substantially grid pattern surrounding the sealing region 7 in plan view.
- the substrate 2 is cut so that the optical semiconductor elements 3 are separated into pieces.
- the optical semiconductor device 1 having the plurality of optical semiconductor elements 3 can be obtained by cutting the substrate 2 so that the plurality of optical semiconductor elements 3 become a unit.
- a plurality of optical semiconductor elements 3 are arranged on the substrate 2 so that the first element row 4A and the second element row 4B are formed.
- the first element row 4A and the second element row 4B are formed.
- the substrate 2 can also be arranged on the substrate 2 so that only the second element row 4B is formed.
- the plurality of optical semiconductor elements 3 are arranged in one row (vertical column) in the left-right direction with an interval in the front-rear direction with respect to the substrate 2.
- the method of the fifth embodiment does not include the cutting step described in the first embodiment. That is, the release sheet 6 after the sealing step is peeled from the sealing layer 5 in the peeling step to obtain the optical semiconductor device 1.
- this method does not include a cutting process, the number of steps can be reduced, and the optical semiconductor device 1 can be manufactured with a simple process and a reduced manufacturing cost.
- the semiconductor device manufacturing method is used for manufacturing a semiconductor device such as an optical semiconductor.
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Abstract
Description
図1において、紙面右側は、前側(第1方向の一例である前後方向一方側(搬送方向下流側))、紙面左側は、後側(前後方向他方側(搬送方向上流側))、紙面上側は、右側(第2方向の一例であり、前後方向に対して直交する左右方向一方側)、紙面下側は、左側(左右方向他方側)、紙面手前側は、上側(前後方向および左右方向に対して直交する第3方向の一例である厚み方向一方側)、紙面奥側は、下側(厚み方向他方側)を示す。図1以外の図面については、図1の方向を基準とする。また、図1において、剥離シート6を、光半導体素子3および封止層5の相対配置を明確に示すため、省略している。
用意工程では、まず、図1、図2および図3Aに示すように、基板2を用意する。
封止工程は、用意工程の後に実施される。図2および図3Bに示すように、封止工程では、まず、複数の封止層5を用意する。
切断工程は、封止工程の後に実施される。切断工程では、図1および図3Dの破線で示すように、各第1素子列4Aに対応する封止層5が左右方向において複数分割されるように、光半導体装置集合体9を切断する。すなわち、切断工程では、複数の光半導体素子3に対応する封止層5が左右方向において複数分割されるように、封止層5および基板2を切断する。光半導体装置集合体9の切断では、各第1素子列4Aにおける複数の光半導体素子3が個片化されるように、第1素子列4Aにおける各光半導体素子3間の封止層5および基板2を切断する。なお、各第2素子列4Bに対応する複数の光半導体素子3を個片化しない一方、第1素子列4Aにおける各光半導体素子3間の封止層5および基板2を切断して、かかる光半導体素子3を個片化する。光半導体装置集合体9を切断するには、例えば、ダイシングブレードを用いるダイシング装置、カッターを用いるカッティング装置、レーザー照射装置などが用いられる。
剥離工程では、図2および図3Eの矢印で示すように、剥離シート6を封止層5から剥離する。
この方法によれば、封止工程では、粒子を含有する複数の封止層5が、各第2素子列4Bの光半導体素子3に1対1で対応して前後方向に間隔が隔てられるように、複数の半導体素子3を封止する。つまり、封止領域7に対応する複数の封止層5のすべては、複数の半導体素子3の封止に寄与することができる。そのため、封止層5を有効に利用することができる。その結果、封止層5の歩留まりを向上させて、光半導体装置1の製造コストを低減することができる。
第1実施形態では、シート状に予め形成された封止層5によって光半導体素子3を埋設して封止しているが、例えば、封止組成物からなるワニスを、基板2および光半導体素子3に対して、上記したパターンとなるように、直接塗布することもできる。
本発明の第2実施形態である光半導体装置1の製造方法を、図4、図5および図6A~図Dを参照して説明する。
封止工程は、用意工程の後に実施される。封止工程では、まず、図5および図6Bに示すように、複数の封止層5を用意する。
切断工程では、図4および図5に示すように、各第2素子列4Bに対応する封止層5が前後方向において複数分割されるように、光半導体装置集合体9を切断する。すなわち、切断工程では、複数の光半導体素子3に対応する封止層5が前後方向において複数分割されるように、封止層5および基板2を切断する。光半導体装置集合体9の切断では、各第2素子列4Bにおける複数の光半導体素子3が個片化されるように、第2素子列4Bにおける各光半導体素子3間の封止層5および基板2を切断する。
第2実施形態によれば、第1実施形態と異なり、封止工程では、前後方向に連続する封止層5によって、前後方向に互いに間隔を隔てて配置された光半導体素子3を封止するので、前後方向に隣接配置される光半導体素子3を簡単かつ効率的に封止することができる。
本発明の第3実施形態である光半導体装置1の製造方法を、図7を参照して説明する。
この第3実施形態では、用意工程において、複数の光半導体素子3を、左右方向において隣接する光半導体素子3間の間隔L1が前後方向において隣接する光半導体素子3間の間隔L2よりも大きくなるように、つまり、L1>L2の関係を満足するように、配置するので、その後の切断工程において、前後方向に連続していた封止層5を、前後方向において複数分割されるように切断すれば、各光半導体素子3の上記した間隔によって、左右方向における光半導体素子3に対する封止層5のマージン(つまり、光半導体素子3の左右方向両外側部分)の面積は、上記した第2実施形態の左右方向における光半導体素子3に対する封止層5のマージン(つまり、光半導体素子3の左右方向両外側部分)の面積に比べて、狭い。つまり、第3実施形態は、第2実施形態に比べて、封止層5の上記したマージンを広い面積で確保することができる。そのため、第3実施形態は、第2実施形態に比べて、封止層5の歩留まりがより一層良好である。
本発明の第4実施形態である光半導体装置1の製造方法を、図8を参照して説明する。
各封止層5は、各光半導体素子3に対応しており、具体的には、平面視において、各光半導体素子3を含む平面視略矩形状に形成されている。また、複数の封止層5は、前後方向および左右方向に互いに間隔を隔てて整列配置される。
切断工程では、例えば、光半導体素子3が個片化されるように、基板2を切断する。
そして、この方法では、切断工程において、封止層5を切断することなく、基板2のみを切断するので、封止層5の切断に伴う封止層5の損傷などを防止することができる。
本発明の第5実施形態である光半導体装置1の製造方法を、図9を参照して説明する。
そして、この方法は、切断工程を備えないので、工数を低減することができ、簡易な工程で、かつ、製造コストを低減しながら、光半導体装置1を製造することができる。
2 基板
3 光半導体素子
5 封止層
L1 左右方向において隣接する光半導体素子間の間隔
L2 前後方向において隣接する光半導体素子間の間隔
Claims (7)
- 基板に実装され、第1方向に互いに間隔が隔てられる複数の半導体素子を用意する用意工程、および、
粒子を含有する複数の封止層が、各前記半導体素子に1対1で対応して前記第1方向に間隔が隔てられるように、複数の前記半導体素子を封止する封止工程
を備えることを特徴とする、半導体装置の製造方法。 - 前記用意工程では、複数の前記半導体素子を、前記第1方向に対して交差する第2方向に互いに間隔を隔てて配置し、
前記封止工程では、前記第2方向に連続する前記封止層によって、前記半導体素子を封止し、
前記封止工程の後に、複数の前記半導体素子に対応する前記封止層が前記第2方向において複数分割されるように、前記封止層および前記基板を切断する切断工程をさらに備えることを特徴とする、請求項1に記載の半導体装置の製造方法。 - 複数の前記半導体素子を、前記第2方向において隣接する前記半導体素子間の間隔が前記第1方向において隣接する前記半導体素子間の間隔より小さくなるように、配置する
ことを特徴とする
請求項2に記載の半導体装置の製造方法。 - 前記用意工程では、前記第1方向に延びる前記基板を用意する
ことを特徴とする、請求項2に記載の半導体装置の製造方法。 - 前記封止工程では、シート状に予め形成された前記封止層によって、前記半導体素子を封止する
ことを特徴とする、請求項1に記載の半導体装置の製造方法。 - 前記粒子が、蛍光体を含有し、
前記半導体素子が、光半導体素子である
光半導体装置の製造方法である
ことを特徴とする、請求項1に記載の半導体装置の製造方法。 - 基板に実装され、第1方向に互いに間隔が隔てられる複数の半導体素子を用意する用意工程、および、粒子を含有する複数の封止層が、各前記半導体素子に1対1で対応して前記第1方向に間隔が隔てられるように、複数の前記半導体素子を封止する封止工程を備える導体装置の製造方法により得られることを特徴とする、半導体装置。
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JP2013136671A (ja) * | 2011-12-28 | 2013-07-11 | Nitto Denko Corp | シリコーン樹脂シート、硬化シート、発光ダイオード装置およびその製造方法 |
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JP2013506985A (ja) * | 2009-10-01 | 2013-02-28 | エクセリタス カナダ,インコーポレイテッド | 横向きあるいは上向きデバイス配置のラミネートリードレスキャリアパッケージングを備えた光電子デバイス |
JP2013136671A (ja) * | 2011-12-28 | 2013-07-11 | Nitto Denko Corp | シリコーン樹脂シート、硬化シート、発光ダイオード装置およびその製造方法 |
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