WO2014155624A1 - Semiconductor-wafer manufacturing method and semiconductor wafer - Google Patents

Semiconductor-wafer manufacturing method and semiconductor wafer Download PDF

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Publication number
WO2014155624A1
WO2014155624A1 PCT/JP2013/059364 JP2013059364W WO2014155624A1 WO 2014155624 A1 WO2014155624 A1 WO 2014155624A1 JP 2013059364 W JP2013059364 W JP 2013059364W WO 2014155624 A1 WO2014155624 A1 WO 2014155624A1
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semiconductor wafer
abrasive
acid
manufacturing
abrasive grains
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PCT/JP2013/059364
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French (fr)
Japanese (ja)
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山根 昭彦
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Pvクリスタロックスソーラー株式会社
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Priority to PCT/JP2013/059364 priority Critical patent/WO2014155624A1/en
Publication of WO2014155624A1 publication Critical patent/WO2014155624A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H01L31/182Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • H01L31/02363Special surface textures of the semiconductor body itself, e.g. textured active layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method of manufacturing a semiconductor wafer that is etched with an acid for texture formation, and the semiconductor wafer.
  • Semiconductor wafers for solar cells are shipped through a slicing process for cutting a semiconductor wafer from a polycrystalline silicon ingot, a peeling process for peeling the semiconductor wafer from the support plate, and a final cleaning process for removing dirt and dust from the semiconductor wafer. Etched by battery manufacturer.
  • the free abrasive grain method is a method of cutting a semiconductor wafer by rubbing a slurry, which is a mixture of liquid and abrasive grains, onto a polycrystalline silicon ingot using a wire saw.
  • the semiconductor wafer is cut out while the abrasive grains contained in the slurry break the polycrystalline silicon ingot.
  • the fixed abrasive method is a method of cutting a semiconductor wafer by pressing a wire saw formed by dispersing and fixing abrasive grains on a core wire against a polycrystalline silicon ingot.
  • the slicing process by the fixed abrasive method is to cut a semiconductor wafer while chopping a polycrystalline silicon ingot. Therefore, in the fixed abrasive method, there are few layers that become chips compared to the free abrasive method, and many semiconductor wafers can be cut out from one polycrystalline silicon ingot, and cracks and the like are generated. There is an advantage that the semiconductor wafer can be cut out thinly.
  • Etching is a process of forming uneven texture on the surface of the semiconductor wafer. If the surface of the semiconductor wafer is flat, part of the incident light is reflected and cannot be converted into current. For this reason, solar cell manufacturers have provided irregularities called textures on the surface, giving them the opportunity to re-enter part of the reflected light on the semiconductor wafer multiple times, reducing the surface reflectance, and thus the performance of the solar cell. Has improved.
  • etching treatment examples thereof include an alkali etching treatment and an acid etching treatment.
  • alkali is to add isopropyl alcohol into an alkaline solution of KOH or NAOH and immerse one or both sides of a semiconductor wafer in the alkaline solution for several minutes.
  • a typical example of the etching process using an acid is one in which one or both sides of a semiconductor wafer are immersed in an acid solution containing hydrofluoric acid or nitric acid as a main component for about 1 to 2 minutes.
  • the fixed abrasive method is more advantageous than the free abrasive method in terms of production cost, and the practical use of the fixed abrasive method is expected.
  • an acid etching process is performed, a uniform texture cannot be formed on a semiconductor wafer sliced by a fixed abrasive method.
  • the present invention has been proposed in order to solve the above-described problems of the prior art, and while the semiconductor wafer is cut out by a fixed abrasive method, the entire surface of the semiconductor wafer is textured even in an etching process using an acid. It is an object of the present invention to provide a manufacturing method capable of forming a semiconductor wafer and a semiconductor wafer by the manufacturing method.
  • the present inventors have thought that the texture formed by the etching treatment with acid is greatly influenced by the damaged layer existing on the semiconductor wafer before the etching treatment.
  • Etching with acid is considered to be a method for removing only the damaged layer, and the shape of the damaged layer formed in as-slice (no processing after slicing) is similar to that of the texture. Because it is.
  • the damaged layer is a concavo-convex layer formed on the surface of the semiconductor wafer and is generated in the slicing process.
  • the entire surface of the semiconductor wafer is formed with unevenness in advance before the etching process.
  • the surface of the semiconductor wafer becomes a smooth surface cut with a knife, so that the uneven layer is incompletely formed.
  • Slicing step of fixed abrasive method that cuts out the semiconductor wafer by cutting a crystalline ingot with a core wire in which abrasive particles are dispersed and fixed on the surface.
  • the semiconductor A wet blast type damage layer forming step for forming a damaged layer on the semiconductor wafer by spraying a slurry of liquid and abrasive grains onto at least one surface of the wafer.
  • washing with water A drying step of drying the semiconductor wafer through cleaning.
  • a finish cleaning process using a solvent for the semiconductor wafer may be omitted between the damaged layer forming process and the drying process. This is because the cleaning effect by the wet blasting process appears by combining the slicing process by the fixed abrasive method and the damaged layer forming process by the wet blasting process.
  • the texture unevenness density and the damage layer depth can be controlled by the grain size of the abrasive grains used in the wet blasting process. It was. That is, in this damage layer forming step, the particle size of the abrasive grains contained in the slurry can be changed according to the target uneven density of the texture. In the damage layer forming step, the grain size of the abrasive grains contained in the slurry can be changed according to the depth of the damage layer to be formed.
  • a second aspect according to the present invention is a semiconductor wafer before being etched with an acid to form irregularities on the surface, which is a fixed abrasive that cuts a crystalline ingot with a core wire having abrasive grains fixed on the surface. It is characterized in that a damage layer is formed on the surface by being cut out by a grain method, and after being cut out, a slurry of liquid and abrasive grains is sprayed on at least one surface by a wet blast method.
  • a damaged layer can be formed on the entire surface even when a semiconductor wafer is cut out by a fixed abrasive method, and a texture can be formed even if an etching process with an acid is performed. Therefore, many semiconductor wafers can be cut out from one crystalline ingot as compared with the free abrasive grain method, and the manufacturing cost of the semiconductor wafer for solar cells can be reduced.
  • FIG. 2 is a photograph showing observation results after wet blasting treatment under conditions 1 and 2 of Example 1.
  • FIG. It is a photograph which shows the observation result of the case where wet blasting is performed under Condition 1 and Comparative Example 1.
  • FIG. 1 is a flowchart showing a semiconductor wafer manufacturing process.
  • the semiconductor wafer is for solar cells, and is manufactured by cutting out a crystalline ingot.
  • the crystalline ingot is, for example, a polycrystalline silicon ingot.
  • the manufacturing process is as follows. That is, as shown in FIG. 1, a semiconductor wafer is sliced from a crystalline ingot (step S01), a peeling step (step S02) for peeling the cut semiconductor wafer, and a damage layer on the surface of the semiconductor wafer.
  • the damaged layer forming step (step S03) for forming the semiconductor wafer and the drying step (step S04) for drying the semiconductor wafer through washing with water are sequentially manufactured.
  • the semiconductor wafer that has undergone this process is shipped to a solar cell manufacturer through an inspection process that separates good and defective products.
  • a solar cell manufacturer In the solar cell manufacturer, an uneven texture is formed on the surface, and further processing for the solar cell is performed.
  • the formation of the texture is intended to reduce the surface reflectance.
  • the formation of the texture is generally performed by various etching processes. However, in the present manufacturing method of a semiconductor wafer, it is assumed that the etching process with an acid is performed.
  • a plurality of semiconductor wafers are cut out from the crystalline ingot by a fixed abrasive method.
  • the fixed abrasive method the crystalline ingot is cut with a wire saw made of a core wire in which abrasive particles are dispersed and fixed on the surface.
  • FIG. 2 is a schematic diagram showing a fixed abrasive grain slicing process.
  • symbol 100 has shown the crystalline ingot.
  • a plurality of wire saws 10 are arranged in parallel and can travel between the rotating rollers 11 a and 11 b.
  • one side of the crystalline ingot is bonded to the support plate 12.
  • a plurality of semiconductor wafers are cut out from the crystalline ingot by moving relative to the traveling wire saw 10 while pressing the crystalline ingot supported by the support plate 12. The crystalline ingot is sliced until the support plate 12 is reached.
  • the core wire of the wire saw 10 is desirably a high carbon steel including a metal wire such as iron, nickel, cobalt, chromium, tungsten, molybdenum, copper, titanium, aluminum, and an alloy selected from these, or a piano wire.
  • a metal wire such as iron, nickel, cobalt, chromium, tungsten, molybdenum, copper, titanium, aluminum, and an alloy selected from these, or a piano wire.
  • abrasive grains can be applied as long as the abrasive grains dispersed and fixed to the core wire can cut silicon.
  • the abrasive grains are dispersed and fixed to the core wire using various methods such as a resin bond method, an electrodeposition method, or a brazing method.
  • the adhesive that bonds the crystalline ingot and the support plate 12 is not particularly limited, but it is desirable that the adhesive be bonded with an epoxy adhesive.
  • FIG. 3 is a schematic diagram showing a peeling process.
  • reference numeral 200 indicates a semiconductor wafer.
  • the support plate 12 and the semiconductor wafer are immersed in a basket 13 filled with a stripping solution 14 for dissolving the adhesive.
  • the stripping solution 14 an aqueous solution in which lactic acid is diluted with water can be used.
  • a uniform damaged layer is formed on the entire surface of the semiconductor wafer sliced by the fixed abrasive method after the fixed abrasive method slicing step and before the texture formation by etching using acid. Further, a rough cleaning step may be included between the slicing step and the damaged layer forming step.
  • the damage layer is a layer formed by irregularities on the surface of the semiconductor wafer. Forming a uniform damaged layer on the entire surface of the semiconductor wafer means that a damaged layer is formed on one or both sides of the semiconductor wafer, there is no smooth area on the surface, and the unevenness is formed evenly as a whole. is there.
  • the surface of the semiconductor wafer is wet blasted.
  • the wet blasting process is a process of grinding the surface of the semiconductor wafer by spraying a slurry of liquid and abrasive grains onto the surface of the semiconductor wafer.
  • FIG. 4 is a schematic diagram showing the wet blasting process.
  • a slurry in which a liquid and abrasive grains are mixed is sprayed from a nozzle 15 with compressed air.
  • the width of the nozzle 15 is sufficiently wider than the width of the semiconductor wafer, and the slurry ejected from the nozzle 15 is directed to the surface of the semiconductor wafer.
  • the nozzle 15 and the semiconductor wafer can be moved relatively, and the entire surface of the semiconductor wafer is wet-blasted. In this wet blasting process, scanning on the semiconductor wafer by the nozzle 15 may be repeated once or a plurality of times.
  • the abrasive used in the wet blasting process is any one of alumina, diamond, CBN, SiC, or a mixture thereof.
  • a liquid mixed with abrasive grains water is mainly used, but a surfactant may be contained.
  • the mixing ratio of abrasive grains in the slurry is preferably 10 to 30 vol%. In this range, in addition to the damage layer forming effect, the cleaning effect of the semiconductor wafer appears and the finishing cleaning process is not necessary.
  • the grain size of the abrasive grains can be changed according to the depth of the target damage layer and the target uneven density of the texture formed by etching.
  • the particle size of the abrasive used in this wet blasting process is large, the damage layer becomes deep, in other words, the height difference of the unevenness tends to increase. It was.
  • the particle size of the abrasive used in the wet blasting process is large, the uneven density of the texture tends to be improved. There is a tendency for the area of the two irregularities to become smaller and closer.
  • drying process In the drying process, the semiconductor wafer is placed in a drying chamber to remove moisture. This drying step is performed after washing with water following the damaged layer forming step. Washing with water is a process of washing away dirt and dust. That is, when wet blasting is performed, a finish cleaning step using ultrasonic waves in a solvent such as an alkali can be omitted.
  • the etching process In the etching process, the surface of the semiconductor wafer is exposed to an etching solution. Specifically, while rotating the semiconductor wafer, an etching solution is dropped on the surface, and the etching solution is spread over the entire surface of the semiconductor wafer. A semiconductor wafer may be immersed in an etching solution.
  • the etching process is not limited to this, and various methods can be adopted.
  • the etchant is an acid and is preferably a hydrofluoric acid solution that is a mixed acid of hydrofluoric acid and nitric acid. For example, phosphoric acid, acetic acid, carboxylic acid, or a surfactant may be added.
  • the semiconductor wafer is manufactured as follows and subjected to an etching process with an acid and observed. Went.
  • the present invention is not limited to these examples.
  • Example 1 A polycrystalline silicon wafer with a wafer thickness of 180 ⁇ m is cut out from the polycrystalline silicon ingot by a fixed abrasive method, and after peeling, the polycrystalline silicon wafer is wet-blasted only on one side under the conditions shown in FIG. did.
  • alumina A # 2000 (Mako Co., Ltd., Macorundum, particle size: 6.7 ⁇ m) is mixed with water to produce a slurry having an abrasive concentration of 20 vol%.
  • This slurry was sprayed onto the polycrystalline silicon wafer at a compressed air pressure of 0.2 MPa using a wet blasting device (manufactured by Macau Corporation, Sigma, nozzle width: 600 mm).
  • the projection distance between the nozzle tip from which the slurry is ejected and the polycrystalline silicon wafer was 20 mm, and the projection angle of the polycrystalline silicon wafer with respect to the slurry injection axis was 90 °.
  • the polycrystalline silicon wafer and the nozzle were moved relative to each other at 30 mm / sec, and the slurry was projected onto the entire surface of the polycrystalline silicon wafer.
  • the number of scans of the nozzle is one.
  • Condition 2 of the wet blasting process is a wet blasting apparatus in which alumina A # 800 (manufactured by Macau Corporation, Macorundum, particle size: 14.0 ⁇ m) and water are mixed to produce a slurry having an abrasive concentration of 20 vol%. (Mako Co., Ltd., Zeta, Nozzle width: 320 mm)
  • the surface state of the polycrystalline silicon wafer was observed with a laser microscope (Keyence Corporation, VL-9700) before and after the wet blast treatment and after the etching treatment with acid.
  • Comparative Example 1 A polycrystalline silicon wafer having a wafer thickness of 180 ⁇ m is cut out from the polycrystalline silicon ingot by a fixed abrasive grain method, and after performing a peeling process, an etching process using acid under the same conditions as in Example 1 without performing a wet blasting process. Went.
  • the depth of the damaged layer was about Ra: 0.387 ⁇ m and Rz: about 5.120 ⁇ m.
  • the depth of the damaged layer was about Ra: 0.459 ⁇ m and Rz: 5.934 ⁇ m. Note that the depth of the damaged layer is determined by masking a part of the polycrystalline silicon wafer so that the wet blast process does not reach the area, and measuring the step between the wet blast process and the masked area. It was obtained by doing.
  • FIG. 7 and 8 show the observation results after etching with acid for Example 1 and Comparative Example 1.
  • FIG. 7 shows the observation results of the case of wet blasting under condition 1 (wet blasting abrasive grain size 6.7 ⁇ m) and Comparative Example 1.
  • FIG. 8 shows the condition 2 (wet blasting abrasive grain of It is an observation result of the case of wet blasting with a diameter of 14.0 ⁇ m) and Comparative Example 1.
  • Example 7 and 8 it can be seen that the texture is uniformly formed in Example 1 as compared with Comparative Example 1 in which the wet blast treatment was not performed.
  • the surface roughness when etching with acid is Ra: 0.423 ⁇ m, Rz: 6.573 ⁇ m.
  • the surface roughness is Ra: 0.738 ⁇ m, Rz: 10.173 ⁇ m, and it can be seen that the surface roughness after etching can be controlled by changing the grain size of the abrasive grains used in the wet blast treatment.
  • Example 2 After a polycrystalline silicon wafer having a wafer thickness of 180 ⁇ m is cut out from the polycrystalline silicon ingot by a fixed abrasive method and subjected to a peeling process, the polycrystalline silicon wafer is wet-blasted only on one side under conditions 1 and 2 in FIG. Processing was carried out. Then, after washing with water and drying, the surface state of the polycrystalline silicon wafer was visually observed. That is, in order to confirm the cleaning effect by the wet blasting process, the finishing cleaning process was omitted.
  • preliminary cleaning, rinsing, alkaline solution cleaning, and rinsing were performed in this order, followed by drying with warm air.
  • preliminary cleaning and alkaline solution cleaning a polycrystalline silicon wafer was immersed in an alkaline solution and ultrasonic waves were emitted.
  • the alkaline solution used is 0.5-5% by weight NaOH.
  • the used ultrasonic waves are 10 to 100 kHz and 100 to 500 W.
  • rinsing a polycrystalline silicon wafer was immersed in pure water purified using an RO membrane and irradiated with ultrasonic waves.
  • the rinse time is 2-5 minutes.
  • drying with warm air the polycrystalline silicon wafer was exposed to 100 ° hot air.
  • the drying time with warm air is 2 to 5 minutes.
  • Example 2 Comparative Example 2
  • Comparative Example 3 Comparative Example 3
  • FIG. 9 Even when Example 2 was compared with Comparative Example 2, no difference was found in the surface cleanability.
  • a polycrystalline silicon wafer is cut out by the fixed abrasive method, dust adheres to the manufacturing method in which the finishing cleaning process is omitted only for the wet blasting process and the manufacturing method in which the finishing cleaning process is added after the wet blasting process. There was no difference in the degree.
  • silicon cutting waste generated in the slicing process, organic coolant residue used in the slicing process, and residue of the stripping liquid used in the detaching process It dried and adhered to the surface of the polycrystalline silicon wafer. That is, the cleaning effect cannot be expected in the drive blast process compared to the wet blast process.
  • the method for manufacturing a semiconductor wafer according to the present embodiment is a method for manufacturing a semiconductor wafer before etching with acid for texture formation, and includes the following steps.
  • the unevenness density of the texture can be freely designed by changing the particle size of the abrasive grains contained in the slurry, It is possible to freely design the depth of the damaged layer by changing the grain size of the abrasive grains contained in the slurry.

Abstract

Provided are: a manufacturing method in which a semiconductor wafer is cut using a fixed-abrasive technique and a texture can be formed across the entire surface of said semiconductor wafer, even with the use of an etching process using an acid; and a semiconductor wafer obtained via said manufacturing method. Said semiconductor wafer is manufactured via a fixed-abrasive slicing step, a wet-blast damage-layer formation step, and a drying step and is subjected to an etching process using an acid. In the slicing step, a crystalline ingot is cut by a core wire that has abrasive grains affixed to the surface thereof in a dispersed manner. In the damage-layer formation step, after the slicing step, the surface of the semiconductor wafer is sprayed with a slurry consisting of a liquid and abrasive grains. In the drying step, following the damage-layer formation step, the semiconductor wafer is dried.

Description

半導体ウェハの製造方法及び半導体ウェハSemiconductor wafer manufacturing method and semiconductor wafer
 本発明は、テクスチャー形成のために酸によるエッチングが施される半導体ウェハの製造方法及びその半導体ウェハに関する。 The present invention relates to a method of manufacturing a semiconductor wafer that is etched with an acid for texture formation, and the semiconductor wafer.
 太陽電池用の半導体ウェハは、多結晶シリコンインゴットから半導体ウェハを切り出すスライス工程、半導体ウェハを支持板から剥離する剥離工程、及び半導体ウェハから汚れやゴミを落とす仕上げ洗浄工程を順に経て出荷され、太陽電池メーカによりエッチング処理される。 Semiconductor wafers for solar cells are shipped through a slicing process for cutting a semiconductor wafer from a polycrystalline silicon ingot, a peeling process for peeling the semiconductor wafer from the support plate, and a final cleaning process for removing dirt and dust from the semiconductor wafer. Etched by battery manufacturer.
 スライス工程では、遊離砥粒方式によるワイヤーソーを用いたラップ加工、または固定砥粒方式によるワイヤーソーを用いた切削加工を採用することができる。遊離砥粒方式は、液体と砥粒の混合物であるスラリをワイヤーソーを用いて多結晶シリコンインゴットに擦りつけ、半導体ウェハを切り出す方式である。この遊離砥粒方式によるスライス処理は、スラリに含まれる砥粒が多結晶シリコンインゴットを崩しながら、半導体ウェハを切り出す。 In the slicing step, lapping using a wire saw by a loose abrasive method or cutting using a wire saw by a fixed abrasive method can be employed. The free abrasive grain method is a method of cutting a semiconductor wafer by rubbing a slurry, which is a mixture of liquid and abrasive grains, onto a polycrystalline silicon ingot using a wire saw. In the slicing process by the free abrasive grain method, the semiconductor wafer is cut out while the abrasive grains contained in the slurry break the polycrystalline silicon ingot.
 一方、固定砥粒方式は、砥粒を芯線に分散固定してなるワイヤーソーを多結晶シリコンインゴットに押しつけ、半導体ウェハを切り出す方式である。この固定砥粒方式によるスライス処理は、多結晶シリコンインゴットを切り刻みながら、半導体ウェハを切り出すものである。従って、固定砥粒方式の場合、遊離砥粒方式と比べて、切り屑となってしまう層が少なく、一つの多結晶シリコンインゴットから多くの半導体ウェハを切り出すことができ、また、クラック等が発生するおそれが少なく、その半導体ウェハも薄く切り出すことができるという利点がある。 On the other hand, the fixed abrasive method is a method of cutting a semiconductor wafer by pressing a wire saw formed by dispersing and fixing abrasive grains on a core wire against a polycrystalline silicon ingot. The slicing process by the fixed abrasive method is to cut a semiconductor wafer while chopping a polycrystalline silicon ingot. Therefore, in the fixed abrasive method, there are few layers that become chips compared to the free abrasive method, and many semiconductor wafers can be cut out from one polycrystalline silicon ingot, and cracks and the like are generated. There is an advantage that the semiconductor wafer can be cut out thinly.
 エッチング処理は、半導体ウェハの表面に凹凸のテクスチャーを形成する工程である。半導体ウェハの表面が平坦であると、入射した光の一部が反射してしまい、電流に変換されなくなってしまう。そのため、太陽電池メーカでは、表面にテクスチャーと呼ばれる凹凸を付け、反射光の一部を複数回に亘って半導体ウェハに再入射させる機会をもたらし、表面反射率を低減させ、以て太陽電池の性能を向上させている。 Etching is a process of forming uneven texture on the surface of the semiconductor wafer. If the surface of the semiconductor wafer is flat, part of the incident light is reflected and cannot be converted into current. For this reason, solar cell manufacturers have provided irregularities called textures on the surface, giving them the opportunity to re-enter part of the reflected light on the semiconductor wafer multiple times, reducing the surface reflectance, and thus the performance of the solar cell. Has improved.
 エッチング処理としては、各種の方法が採用できるが、例えば、アルカリによるエッチング処理や、酸によるエッチング処理が挙げられる。アルカリによるエッチング処理の代表例としては、KOH又はNAOHのアルカリ溶液中にイソプロピルアルコールを添加し、半導体ウェハの片面又は両面を当該アルカリ溶液に数分間浸すものがある。酸によるエッチング処理の代表例としては、半導体ウェハの片面又は両面をフッ酸や硝酸を主成分とした酸溶液に1~2分程度浸すものがある。 Various methods can be adopted as the etching treatment, and examples thereof include an alkali etching treatment and an acid etching treatment. A typical example of the etching process using alkali is to add isopropyl alcohol into an alkaline solution of KOH or NAOH and immerse one or both sides of a semiconductor wafer in the alkaline solution for several minutes. A typical example of the etching process using an acid is one in which one or both sides of a semiconductor wafer are immersed in an acid solution containing hydrofluoric acid or nitric acid as a main component for about 1 to 2 minutes.
特開2005-311060号公報Japanese Patent Laying-Open No. 2005-311060
 スライス処理においては、上述のように、遊離砥粒方式よりも固定砥粒方式のほうが生産コストの面から有利であり、固定砥粒方式の実用化が期待されている。しかしながら、酸によるエッチング処理を施した場合、固定砥粒方式でスライス処理した半導体ウェハ上には、均一なテクスチャーを形成することができなかった。 In the slicing process, as described above, the fixed abrasive method is more advantageous than the free abrasive method in terms of production cost, and the practical use of the fixed abrasive method is expected. However, when an acid etching process is performed, a uniform texture cannot be formed on a semiconductor wafer sliced by a fixed abrasive method.
 すなわち、遊離砥粒方式で半導体ウェハを切り出し、酸によるエッチング処理を施した場合には、半導体ウェハの表面全体に綿密なテクスチャーが形成される。 That is, when a semiconductor wafer is cut out by the free abrasive grain method and etched with acid, a fine texture is formed on the entire surface of the semiconductor wafer.
 しかしながら、固定砥粒方式で半導体ウェハを切り出し、酸によるエッチング処理を施した場合には、部分的に平坦な領域が残ってしまう。上述したように、テクスチャーは太陽光の反射率を低下させ、太陽電池の性能を向上させる重要な役割を果たしており、半導体ウェハ上の平坦な領域は看過することはできない。 However, when a semiconductor wafer is cut out by the fixed abrasive method and etched with acid, a partially flat region remains. As described above, the texture plays an important role in reducing the reflectance of sunlight and improving the performance of the solar cell, and the flat region on the semiconductor wafer cannot be overlooked.
 そのため、酸によるエッチング処理を前提として半導体ウェハを製造する場合には、遊離砥粒方式を採用せざるを得なかった。 Therefore, when manufacturing a semiconductor wafer on the premise of an etching treatment with an acid, a free abrasive grain method has to be adopted.
 本発明は、上記のような従来技術の問題点を解決するために提案されたもので、固定砥粒方式で半導体ウェハを切り出しつつ、酸によるエッチング処理であっても半導体ウェハの表面全体にテクスチャーを形成することのできる製造方法、及びその製造方法による半導体ウェハを提供することを目的とする。 The present invention has been proposed in order to solve the above-described problems of the prior art, and while the semiconductor wafer is cut out by a fixed abrasive method, the entire surface of the semiconductor wafer is textured even in an etching process using an acid. It is an object of the present invention to provide a manufacturing method capable of forming a semiconductor wafer and a semiconductor wafer by the manufacturing method.
 本発明者らは、鋭意研究の結果、酸によるエッチング処理で形成されるテクスチャーは、エッチング処理前に半導体ウェハ上に存在するダメージ層に大きく影響を受けているのではないかと考えた。酸によるエッチング処理は、ダメージ層のみを除去する手法であると考えられており、また、as-slice(スライス後に何らの処理をしない)において形成されているダメージ層とテクスチャーの形状が良く似ているためである。尚、ダメージ層とは、半導体ウェハ表面に形成された凹凸層であり、スライス工程で発生する。 As a result of diligent research, the present inventors have thought that the texture formed by the etching treatment with acid is greatly influenced by the damaged layer existing on the semiconductor wafer before the etching treatment. Etching with acid is considered to be a method for removing only the damaged layer, and the shape of the damaged layer formed in as-slice (no processing after slicing) is similar to that of the texture. Because it is. The damaged layer is a concavo-convex layer formed on the surface of the semiconductor wafer and is generated in the slicing process.
 遊離砥粒方式では、結晶性インゴットを崩すようにして半導体ウェハが切り出されるため、半導体ウェハの表面全体には、エッチング処理の前から予め凹凸が形成されている。しかし、固定砥粒方式では、半導体ウェハの表面はナイフでカットしたような滑らかな面となってしまうため凹凸層が不完全に形成される。 In the loose abrasive method, since the semiconductor wafer is cut out so as to break the crystalline ingot, the entire surface of the semiconductor wafer is formed with unevenness in advance before the etching process. However, in the fixed abrasive method, the surface of the semiconductor wafer becomes a smooth surface cut with a knife, so that the uneven layer is incompletely formed.
 そこで、本発明に係る第1の態様は、テクスチャー形成のために酸によるエッチングが施される前の半導体ウェハの製造方法であって、以下の工程を含むことを特徴とする。 Therefore, a first aspect according to the present invention is a method for manufacturing a semiconductor wafer before being etched with an acid for forming a texture, and includes the following steps.
 (1)表面に砥粒を分散固定した芯線によって結晶性インゴットを切削することで、前記半導体ウェハを切り出す固定砥粒方式のスライス工程
 (2)前記固定砥粒方式のスライス工程の後、前記半導体ウェハの少なくとも片面に対して液体と砥粒とのスラリを噴射することで、前記半導体ウェハにダメージ層を形成するウェットブラスト方式のダメージ層形成工程
 (3)前記ダメージ層形成処理の次に、水洗い洗浄を経て前記半導体ウェハを乾燥させる乾燥工程。
(1) Slicing step of fixed abrasive method that cuts out the semiconductor wafer by cutting a crystalline ingot with a core wire in which abrasive particles are dispersed and fixed on the surface. (2) After the slicing step of the fixed abrasive method, the semiconductor A wet blast type damage layer forming step for forming a damaged layer on the semiconductor wafer by spraying a slurry of liquid and abrasive grains onto at least one surface of the wafer. (3) Next to the damaged layer forming process, washing with water A drying step of drying the semiconductor wafer through cleaning.
 前記ダメージ層形成工程と前記乾燥工程との間には、半導体ウェハの溶剤を用いた仕上げ洗浄処理工程が省かれるようにしてもよい。固定砥粒方式によるスライス工程とウェットブラスト処理によるダメージ層形成工程とを組み合わせることにより、ウェットブラスト処理による洗浄効果が現れるためである。 A finish cleaning process using a solvent for the semiconductor wafer may be omitted between the damaged layer forming process and the drying process. This is because the cleaning effect by the wet blasting process appears by combining the slicing process by the fixed abrasive method and the damaged layer forming process by the wet blasting process.
 固定砥粒方式によるスライス工程とウェットブラスト処理によるダメージ層形成工程との組み合わせにおいては、ウェットブラスト処理で使用される砥粒の粒径によってテクスチャーの凹凸密度やダメージ層の深さを制御できることがわかった。すなわち、このダメージ層形成工程では、前記テクスチャーの目的の凹凸密度に応じて前記スラリに含まれる砥粒の粒径を変更することができる。また、前記ダメージ層形成工程では、形成しようとする前記ダメージ層の深さに応じて前記スラリに含まれる砥粒の粒径を変更することができる。 In the combination of the slicing process by the fixed abrasive method and the damaged layer forming process by the wet blasting process, it is understood that the texture unevenness density and the damage layer depth can be controlled by the grain size of the abrasive grains used in the wet blasting process. It was. That is, in this damage layer forming step, the particle size of the abrasive grains contained in the slurry can be changed according to the target uneven density of the texture. In the damage layer forming step, the grain size of the abrasive grains contained in the slurry can be changed according to the depth of the damage layer to be formed.
 本発明に係る第2の態様は、表面に凹凸を形成するために酸によるエッチングが施される前の半導体ウェハであって、表面に砥粒を固定した芯線によって結晶性インゴットを切削する固定砥粒方式によって切り出され、切り出された後に、ウェットブラスト方式により少なくとも片面に対して液体と砥粒とのスラリを噴射されることで、表面にダメージ層が形成されること、を特徴とする。 A second aspect according to the present invention is a semiconductor wafer before being etched with an acid to form irregularities on the surface, which is a fixed abrasive that cuts a crystalline ingot with a core wire having abrasive grains fixed on the surface. It is characterized in that a damage layer is formed on the surface by being cut out by a grain method, and after being cut out, a slurry of liquid and abrasive grains is sprayed on at least one surface by a wet blast method.
 本発明によれば、固定砥粒方式で半導体ウェハを切り出しても表面全体にダメージ層を形成することができ、酸によるエッチング処理を施してもテクスチャーの形成が可能となる。従って、遊離砥粒方式と比べて一つの結晶性インゴットから多くの半導体ウェハを切り出すことが可能となり、太陽電池用の半導体ウェハの製造コストを削減することが可能となる。 According to the present invention, a damaged layer can be formed on the entire surface even when a semiconductor wafer is cut out by a fixed abrasive method, and a texture can be formed even if an etching process with an acid is performed. Therefore, many semiconductor wafers can be cut out from one crystalline ingot as compared with the free abrasive grain method, and the manufacturing cost of the semiconductor wafer for solar cells can be reduced.
本実施形態に係る半導体ウェハの製造工程を示すフローチャートである。It is a flowchart which shows the manufacturing process of the semiconductor wafer which concerns on this embodiment. 固定砥粒方式のスライス工程を示す模式図である。It is a schematic diagram which shows the slicing process of a fixed abrasive system. 剥離工程を示す模式図である。It is a schematic diagram which shows a peeling process. ウェットブラスト処理を示す模式図である。It is a schematic diagram which shows a wet blast process. ウェットブラスト処理の条件を示す表である。It is a table | surface which shows the conditions of a wet blast process. 実施例1の条件1及び2によるウェットブラスト処理後の観察結果を示す写真である。2 is a photograph showing observation results after wet blasting treatment under conditions 1 and 2 of Example 1. FIG. 条件1によりウェットブラスト処理した場合と比較例1の観察結果を示す写真である。It is a photograph which shows the observation result of the case where wet blasting is performed under Condition 1 and Comparative Example 1. 条件2によりウェットブラスト処理した場合と比較例1の観察結果を示す写真である。It is a photograph which shows the observation result of the case where wet blasting is performed under Condition 2 and Comparative Example 1. 実施例2、比較例2、及び比較例3の観察結果を示す図である。It is a figure which shows the observation result of Example 2, the comparative example 2, and the comparative example 3. FIG.
 本発明に係る半導体ウェハの製造方法の実施形態について図面を参照しつつ詳細に説明する。図1は、半導体ウェハの製造工程を示すフローチャートである。 Embodiments of a semiconductor wafer manufacturing method according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a flowchart showing a semiconductor wafer manufacturing process.
 半導体ウェハは太陽電池用であり、結晶性インゴットを切り出すことで製造される。結晶性インゴットは、例えば多結晶シリコンインゴットである。その製造工程は、次の通りである。すなわち、図1に示すように、半導体ウェハは、結晶性インゴットから切り出されるスライス工程(ステップS01)と、切り出された半導体ウェハを剥離する剥離工程(ステップS02)と、半導体ウェハの表面にダメージ層を形成するダメージ層形成工程(ステップS03)と、水洗いを経て半導体ウェハを乾燥させる乾燥工程(ステップS04)とを順に経て製造される。 The semiconductor wafer is for solar cells, and is manufactured by cutting out a crystalline ingot. The crystalline ingot is, for example, a polycrystalline silicon ingot. The manufacturing process is as follows. That is, as shown in FIG. 1, a semiconductor wafer is sliced from a crystalline ingot (step S01), a peeling step (step S02) for peeling the cut semiconductor wafer, and a damage layer on the surface of the semiconductor wafer. The damaged layer forming step (step S03) for forming the semiconductor wafer and the drying step (step S04) for drying the semiconductor wafer through washing with water are sequentially manufactured.
 この工程を経た半導体ウェハは、良品と不良品とを分ける検査工程を経て太陽電池メーカに出荷される。太陽電池メーカでは、表面に凹凸のテクスチャーが形成され、太陽電池用の加工が更に施される。テクスチャーの形成は、表面反射率の低減を目的とするものである。テクスチャーの形成は、各種のエッチング処理により行われることが一般的であるが、半導体ウェハの本製造方法では、酸によるエッチング処理が施されることを前提とする。 The semiconductor wafer that has undergone this process is shipped to a solar cell manufacturer through an inspection process that separates good and defective products. In the solar cell manufacturer, an uneven texture is formed on the surface, and further processing for the solar cell is performed. The formation of the texture is intended to reduce the surface reflectance. The formation of the texture is generally performed by various etching processes. However, in the present manufacturing method of a semiconductor wafer, it is assumed that the etching process with an acid is performed.
 (スライス工程)
 スライス工程では、固定砥粒方式により、結晶性インゴットから複数の半導体ウェハを切り出す。固定砥粒方式では、表面に砥粒を分散固定した芯線からなるワイヤーソーによって結晶性インゴットを切削する。
(Slicing process)
In the slicing step, a plurality of semiconductor wafers are cut out from the crystalline ingot by a fixed abrasive method. In the fixed abrasive method, the crystalline ingot is cut with a wire saw made of a core wire in which abrasive particles are dispersed and fixed on the surface.
 図2は、固定砥粒方式のスライス工程を示す模式図である。図2において、符号100は、結晶性インゴットを示している。図2に示すように、ワイヤーソー10は、平行に複数配設され、回転ローラ11a、11b間を走行可能となっている。一方、結晶性インゴットは、一面が支持板12に接着されている。走行するワイヤーソー10に支持板12で支持された結晶性インゴットを押し当てながら相対移動させることで、複数の半導体ウェハが結晶性インゴットから切り出される。結晶性インゴットのスライスは、支持板12に達するまで行われる。 FIG. 2 is a schematic diagram showing a fixed abrasive grain slicing process. In FIG. 2, the code | symbol 100 has shown the crystalline ingot. As shown in FIG. 2, a plurality of wire saws 10 are arranged in parallel and can travel between the rotating rollers 11 a and 11 b. On the other hand, one side of the crystalline ingot is bonded to the support plate 12. A plurality of semiconductor wafers are cut out from the crystalline ingot by moving relative to the traveling wire saw 10 while pressing the crystalline ingot supported by the support plate 12. The crystalline ingot is sliced until the support plate 12 is reached.
 ワイヤーソー10の芯線は、鉄、ニッケル、コバルト、クロム、タングステン、モリブデン、銅、チタン、アルミニウム、及びこれらから選ばれる合金といった金属ワイヤ、又はピアノ線を含む高炭素鋼が望ましい。芯線に分散固定される砥粒は、シリコンの切断が可能であれば、種々のものが適用可能である。例えば、砥粒として、ダイアモンド、CBN、SiCのいずれか、あるいはこれらの混合物が用いられることが望ましい。砥粒は、レジンボンドによる方法、電着による方法、またはロウ付けによる方法等の各種の方法を用いて芯線に分散固定される。 The core wire of the wire saw 10 is desirably a high carbon steel including a metal wire such as iron, nickel, cobalt, chromium, tungsten, molybdenum, copper, titanium, aluminum, and an alloy selected from these, or a piano wire. Various kinds of abrasive grains can be applied as long as the abrasive grains dispersed and fixed to the core wire can cut silicon. For example, it is desirable to use diamond, CBN, SiC, or a mixture thereof as abrasive grains. The abrasive grains are dispersed and fixed to the core wire using various methods such as a resin bond method, an electrodeposition method, or a brazing method.
 結晶性インゴットに接着する支持板12としては、ガラス板が挙げられる。結晶性インゴットと支持板12とを接着する接着剤は、特に限定されないが、エポキシ系接着剤で接着されることが望ましい。 As the support plate 12 bonded to the crystalline ingot, a glass plate can be mentioned. The adhesive that bonds the crystalline ingot and the support plate 12 is not particularly limited, but it is desirable that the adhesive be bonded with an epoxy adhesive.
 (剥離工程)
 剥離工程では、結晶性インゴットから切り出された複数の半導体ウェハを支持板12から剥離する。図3は、剥離工程を示す模式図である。図3において、符号200は、半導体ウェハを示している。図3に示すように、支持板12と半導体ウェハは、接着剤を溶解させる剥離液14で満たされたバスケット13内に浸漬される。剥離液14としては、乳酸を水で希釈した水溶液を用いることができる。
(Peeling process)
In the peeling step, the plurality of semiconductor wafers cut out from the crystalline ingot are peeled off from the support plate 12. FIG. 3 is a schematic diagram showing a peeling process. In FIG. 3, reference numeral 200 indicates a semiconductor wafer. As shown in FIG. 3, the support plate 12 and the semiconductor wafer are immersed in a basket 13 filled with a stripping solution 14 for dissolving the adhesive. As the stripping solution 14, an aqueous solution in which lactic acid is diluted with water can be used.
 (ダメージ層形成工程)
 ダメージ層形成工程では、固定砥粒方式のスライス工程の後、酸を用いたエッチングによるテクスチャー形成の前に、固定砥粒方式でスライスした半導体ウェハの表面全体に一様なダメージ層を形成する。また、スライス工程とダメージ層形成工程との間には、粗洗浄工程が含まれてもよい。
(Damage layer forming process)
In the damaged layer forming step, a uniform damaged layer is formed on the entire surface of the semiconductor wafer sliced by the fixed abrasive method after the fixed abrasive method slicing step and before the texture formation by etching using acid. Further, a rough cleaning step may be included between the slicing step and the damaged layer forming step.
 ダメージ層は、半導体ウェハ表面の凹凸で形成された層である。半導体ウェハの表面全体に一様なダメージ層を形成するとは、半導体ウェハの片面又は両面にダメージ層が形成され、その面に滑らかな領域がなく、全体としてムラ無く凹凸が形成されていることである。 The damage layer is a layer formed by irregularities on the surface of the semiconductor wafer. Forming a uniform damaged layer on the entire surface of the semiconductor wafer means that a damaged layer is formed on one or both sides of the semiconductor wafer, there is no smooth area on the surface, and the unevenness is formed evenly as a whole. is there.
 このダメージ層形成工程では、半導体ウェハの表面に対してウェットブラスト処理を施す。ウェットブラスト処理は、液体と砥粒とのスラリを半導体ウェハの表面に噴射することで、半導体ウェハの表面を研削する処理である。 In this damaged layer forming step, the surface of the semiconductor wafer is wet blasted. The wet blasting process is a process of grinding the surface of the semiconductor wafer by spraying a slurry of liquid and abrasive grains onto the surface of the semiconductor wafer.
 図4は、ウェットブラスト処理を示す模式図である。図4に示すように、ウェットブラスト処理では、液体と砥粒とを混合したスラリを圧縮空気によりノズル15から噴射する。ノズル15の幅は、半導体ウェハの幅より十分広くなっており、ノズル15から噴出するスラリは、半導体ウェハの表面に向かう。このノズル15と半導体ウェハは、相対的に移動が可能となっており、半導体ウェハの表面全体がウェットブラスト処理される。このウェットブラスト処理では、ノズル15による半導体ウェハ上の走査を1回又は複数回繰り返してもよい。 FIG. 4 is a schematic diagram showing the wet blasting process. As shown in FIG. 4, in the wet blasting process, a slurry in which a liquid and abrasive grains are mixed is sprayed from a nozzle 15 with compressed air. The width of the nozzle 15 is sufficiently wider than the width of the semiconductor wafer, and the slurry ejected from the nozzle 15 is directed to the surface of the semiconductor wafer. The nozzle 15 and the semiconductor wafer can be moved relatively, and the entire surface of the semiconductor wafer is wet-blasted. In this wet blasting process, scanning on the semiconductor wafer by the nozzle 15 may be repeated once or a plurality of times.
 ウェットブラスト処理で使用される砥粒は、アルミナ、ダイアモンド、CBN、SiCのいずれか、あるいはこれらの混合物が用いられることが望ましい。また、砥粒と混合される液体としては、主に水が使用されるが、界面活性剤を含有させてもよい。スラリにおける砥粒の混合割合は、10~30vol%であることが望ましい。この範囲では、ダメージ層形成効果の他、半導体ウェハの洗浄効果が現れ、仕上げ洗浄工程が不要となる。 It is desirable that the abrasive used in the wet blasting process is any one of alumina, diamond, CBN, SiC, or a mixture thereof. Moreover, as a liquid mixed with abrasive grains, water is mainly used, but a surfactant may be contained. The mixing ratio of abrasive grains in the slurry is preferably 10 to 30 vol%. In this range, in addition to the damage layer forming effect, the cleaning effect of the semiconductor wafer appears and the finishing cleaning process is not necessary.
 砥粒の粒径は、目的とするダメージ層の深さや、エッチングにより形成するテクスチャーの目的の凹凸密度に応じて変更できる。すなわち、固定砥粒方式で半導体ウェハをスライスした場合、このウェットブラスト処理で使用される砥粒の粒径が大きいと、ダメージ層は深くなる、換言すると凹凸の高低差は高くなる傾向が見られた。また、固定砥粒方式で半導体ウェハをスライスした場合、このウェットブラスト処理で使用される砥粒の粒径が大きいと、テクスチャーの凹凸密度が向上する傾向がある、換言すると表面全体において一つ一つの凹凸の領域が小さくなり、綿密性が増す傾向がある。 The grain size of the abrasive grains can be changed according to the depth of the target damage layer and the target uneven density of the texture formed by etching. In other words, when a semiconductor wafer is sliced by the fixed abrasive method, if the particle size of the abrasive used in this wet blasting process is large, the damage layer becomes deep, in other words, the height difference of the unevenness tends to increase. It was. In addition, when a semiconductor wafer is sliced by the fixed abrasive method, if the particle size of the abrasive used in the wet blasting process is large, the uneven density of the texture tends to be improved. There is a tendency for the area of the two irregularities to become smaller and closer.
 尚、遊離砥粒方式で半導体ウェハをスライスした場合、スライスで使用される砥粒の粒径が大きいと、スライスの際に形成された凸部を削ってしまい、表面粗さが滑らかになってしまい、ダメージ層の深さをコントロールするは困難であった。 In addition, when slicing a semiconductor wafer by the free abrasive grain method, if the grain size of the abrasive grain used in slicing is large, the convex part formed at the time of slicing will be shaved, and the surface roughness will be smooth. Therefore, it was difficult to control the depth of the damaged layer.
 (乾燥工程)
 乾燥工程では、半導体ウェハを乾燥室に入れ、水分を除去する。この乾燥工程は、ダメージ層形成工程の次に水洗いを経た後に実施される。水洗いは、汚れやゴミを洗い流す処理である。すなわち、ウェットブラスト処理を行った場合は、アルカリ等の溶剤中の超音波等を用いた仕上げ洗浄工程を省くことができる。
(Drying process)
In the drying process, the semiconductor wafer is placed in a drying chamber to remove moisture. This drying step is performed after washing with water following the damaged layer forming step. Washing with water is a process of washing away dirt and dust. That is, when wet blasting is performed, a finish cleaning step using ultrasonic waves in a solvent such as an alkali can be omitted.
 (エッチング工程)
 エッチング工程では、半導体ウェハの表面をエッチング液にさらす。具体的には、半導体ウェハを回転させながら、表面にエッチング液を滴下し、エッチング液を半導体ウェハの表面全体に行き渡らせる。半導体ウェハをエッチング液中に浸漬してもよい。エッチング工程では、これに限定されることなく、各種の方法を採ることができる。エッチング液は、酸であり、フッ酸及び硝酸の混酸であるフッ硝酸溶液が望ましいが、例えばリン酸、酢酸、カルボン酸、又は界面活性剤等を加えても良い。
(Etching process)
In the etching process, the surface of the semiconductor wafer is exposed to an etching solution. Specifically, while rotating the semiconductor wafer, an etching solution is dropped on the surface, and the etching solution is spread over the entire surface of the semiconductor wafer. A semiconductor wafer may be immersed in an etching solution. The etching process is not limited to this, and various methods can be adopted. The etchant is an acid and is preferably a hydrofluoric acid solution that is a mixed acid of hydrofluoric acid and nitric acid. For example, phosphoric acid, acetic acid, carboxylic acid, or a surfactant may be added.
 (ダメージ層形成の効果の確認)
 固定砥粒方式のスライス工程及びウェットブラスト処理のダメージ層形成工程を経た半導体ウェハのダメージ層形成の効果を確認すべく、以下のように半導体ウェハを製造し、酸によるエッチング処理を施して、観察を行った。尚、本発明はこれらの実施例に限定されるものではない。
(Confirmation of damage layer formation effect)
In order to confirm the effect of forming the damaged layer of the semiconductor wafer that has undergone the fixed abrasive grain slicing process and the damaged layer forming process of the wet blasting process, the semiconductor wafer is manufactured as follows and subjected to an etching process with an acid and observed. Went. The present invention is not limited to these examples.
 (実施例1)
 多結晶シリコンインゴットから固定砥粒方式により、ウェハ厚みが180μmの多結晶シリコンウェハを切り出し、剥離処理を実施した後、その多結晶シリコンウェハを図5の条件にて片面にのみウェットブラスト処理を実施した。
(Example 1)
A polycrystalline silicon wafer with a wafer thickness of 180 μm is cut out from the polycrystalline silicon ingot by a fixed abrasive method, and after peeling, the polycrystalline silicon wafer is wet-blasted only on one side under the conditions shown in FIG. did.
 すなわち、ウェットブラスト処理の条件1では、アルミナA#2000(マコー株式会社製、マコランダム、粒径:6.7μm)を水と混合し、砥粒濃度が20vol%のスラリを作製する。このスラリをウェットブラスト装置(マコー株式会社製、シグマ、ノズル幅:600mm)を用いて、圧縮空気圧0.2MPaにて多結晶シリコンウェハに噴射した。スラリが噴出するノズル先端と多結晶シリコンウェハとの投射距離は、20mmであり、スラリの噴射軸に対する多結晶シリコンウェハの投射角度は、90°とした。多結晶シリコンウェハとノズルとは、相対的に30mm/secで移動させ、多結晶シリコンウェハの片面全体にスラリを投射した。ノズルの走査回数は1回である。 That is, under condition 1 of the wet blast treatment, alumina A # 2000 (Mako Co., Ltd., Macorundum, particle size: 6.7 μm) is mixed with water to produce a slurry having an abrasive concentration of 20 vol%. This slurry was sprayed onto the polycrystalline silicon wafer at a compressed air pressure of 0.2 MPa using a wet blasting device (manufactured by Macau Corporation, Sigma, nozzle width: 600 mm). The projection distance between the nozzle tip from which the slurry is ejected and the polycrystalline silicon wafer was 20 mm, and the projection angle of the polycrystalline silicon wafer with respect to the slurry injection axis was 90 °. The polycrystalline silicon wafer and the nozzle were moved relative to each other at 30 mm / sec, and the slurry was projected onto the entire surface of the polycrystalline silicon wafer. The number of scans of the nozzle is one.
 ウェットブラスト処理の条件2は、アルミナA#800(マコー株式会社製、マコランダム、粒径:14.0μm)と水とを混合して砥粒濃度が20vol%のスラリを作製し、ウェットブラスト装置(マコー株式会社製、ゼータ、ノズル幅:320mm)を使用する以外は、条件1と同様である。 Condition 2 of the wet blasting process is a wet blasting apparatus in which alumina A # 800 (manufactured by Macau Corporation, Macorundum, particle size: 14.0 μm) and water are mixed to produce a slurry having an abrasive concentration of 20 vol%. (Mako Co., Ltd., Zeta, Nozzle width: 320 mm)
 そして、水洗いして乾燥処理した後、酸によるエッチング処理として、各多結晶シリコンウェハのウェットブラスト処理した面にフッ硝酸溶液をまんべんなく行き渡らせた。 Then, after washing with water and drying treatment, as an etching treatment with acid, a hydrofluoric acid solution was spread evenly over the wet-blasted surface of each polycrystalline silicon wafer.
 ウェットブラスト処理の効果を確認するため、ウェットブラスト処理前後、及び酸によるエッチング処理後の多結晶シリコンウェハの表面状態をレーザ顕微鏡(キーエンス社、VL-9700)で観察した。 In order to confirm the effect of the wet blast treatment, the surface state of the polycrystalline silicon wafer was observed with a laser microscope (Keyence Corporation, VL-9700) before and after the wet blast treatment and after the etching treatment with acid.
 (比較例1)
 多結晶シリコンインゴットから固定砥粒方式により、ウェハ厚みが180μmの多結晶シリコンウェハを切り出し、剥離処理を実施した後、ウェットブラスト処理を実施せずに、実施例1と同じ条件で酸によるエッチング処理を行った。
(Comparative Example 1)
A polycrystalline silicon wafer having a wafer thickness of 180 μm is cut out from the polycrystalline silicon ingot by a fixed abrasive grain method, and after performing a peeling process, an etching process using acid under the same conditions as in Example 1 without performing a wet blasting process. Went.
 (結果)
 実施例1のウェットブラスト処理前の観察結果と、実施例1の条件1及び2によるウェットブラスト処理後の観察結果を図6に示す。
(result)
The observation results before the wet blast treatment of Example 1 and the observation results after the wet blast treatment according to Conditions 1 and 2 of Example 1 are shown in FIG.
 図6に示すように、ウェットブラスト処理前は、ワイヤーソーの走行方向に沿って所々に滑らかな平坦領域Rが存在するのに対し、ウェットブラスト処理後は、条件1及び2の両方において、その滑らかな平坦領域Rが消失し、全体的にダメージ層が形成されていることが確認できる。 As shown in FIG. 6, before the wet blasting process, there are smooth flat regions R in some places along the traveling direction of the wire saw, whereas after the wet blasting process, in both conditions 1 and 2, It can be confirmed that the smooth flat region R disappears and a damaged layer is formed as a whole.
 粒径が6.7μmの砥粒を用いた条件1のウェットブラスト処理の結果、ダメージ層の深さは、Ra:0.387μm、Rz:5.120μm程度であった。また、粒径が14.0μmの砥粒を用いた条件2のウェットブラスト処理の結果、ダメージ層の深さは、Ra:0.459μm、Rz:5.934μm程度であった。尚、ダメージ層の深さは、多結晶シリコンウェハの一部領域をマスクし、その領域にウェットブラスト処理が及ばないようにし、ウェットブラスト処理が及んだ領域とマスクした領域との段差を測定することで得た。 As a result of condition 1 wet blasting using abrasive grains having a particle size of 6.7 μm, the depth of the damaged layer was about Ra: 0.387 μm and Rz: about 5.120 μm. Further, as a result of wet blasting treatment under condition 2 using abrasive grains having a particle size of 14.0 μm, the depth of the damaged layer was about Ra: 0.459 μm and Rz: 5.934 μm. Note that the depth of the damaged layer is determined by masking a part of the polycrystalline silicon wafer so that the wet blast process does not reach the area, and measuring the step between the wet blast process and the masked area. It was obtained by doing.
 実施例1と比較例1について、酸によるエッチング処理後の観察結果を図7及び8に示す。図7は、条件1(ウェットブラスト処理の砥粒粒径が6.7μm)によりウェットブラスト処理した場合と比較例1の観察結果であり、図8は、条件2(ウェットブラスト処理の砥粒粒径が14.0μm)によりウェットブラスト処理した場合と比較例1の観察結果である。 7 and 8 show the observation results after etching with acid for Example 1 and Comparative Example 1. FIG. 7 shows the observation results of the case of wet blasting under condition 1 (wet blasting abrasive grain size 6.7 μm) and Comparative Example 1. FIG. 8 shows the condition 2 (wet blasting abrasive grain of It is an observation result of the case of wet blasting with a diameter of 14.0 μm) and Comparative Example 1.
 図7及び8に示すように、ウェットブラスト処理を行わなかった比較例1に比べ、実施例1では、テクスチャーが一様に形成されていることがわかる。 7 and 8, it can be seen that the texture is uniformly formed in Example 1 as compared with Comparative Example 1 in which the wet blast treatment was not performed.
 また、条件1と条件2の結果を比べてみると、固定砥粒方式でスライスした場合、ウェットブラスト処理で用いられる砥粒の粒径が大きい方が、凹凸が表面全体にわたって一様に存在し、綿密なテクスチャーが形成されていることがわかる。 In addition, when comparing the results of Condition 1 and Condition 2, when slicing with the fixed abrasive method, the larger the grain size of the abrasive used in the wet blasting treatment, the unevenness exists uniformly over the entire surface. It can be seen that a fine texture is formed.
 更に、条件1のウェットブラスト処理後、酸によるエッチング処理した際の表面粗さは、Ra:0.423μm、Rz:6.573μmであり、条件2のウェットブラスト処理後、酸によるエッチング処理した際の表面粗さは、Ra:0.738μm、Rz:10.173μmであり、ウェットブラスト処理に用いる砥粒の粒径を変更することでエッチング後の表面粗さをコントロールできることがわかる。 Furthermore, after the wet blasting treatment of condition 1, the surface roughness when etching with acid is Ra: 0.423 μm, Rz: 6.573 μm. When the etching treatment with acid is performed after wet blasting treatment of condition 2 The surface roughness is Ra: 0.738 μm, Rz: 10.173 μm, and it can be seen that the surface roughness after etching can be controlled by changing the grain size of the abrasive grains used in the wet blast treatment.
(洗浄効果の確認)
 次に、固定砥粒方式のスライス工程及びウェットブラスト処理のダメージ層形成工程を経た半導体ウェハの洗浄効果を確認すべく、以下のように半導体ウェハを製造した。尚、本発明はこれらの実施例に限定されるものではない。
(Confirmation of cleaning effect)
Next, in order to confirm the cleaning effect of the semiconductor wafer that has undergone the fixed abrasive grain slicing step and the damaged layer forming step of wet blasting, a semiconductor wafer was manufactured as follows. The present invention is not limited to these examples.
 (実施例2)
 多結晶シリコンインゴットから固定砥粒方式により、ウェハ厚みが180μmの多結晶シリコンウェハを切り出し、剥離処理を実施した後、その多結晶シリコンウェハを図5の条件1及び2にて片面にのみウェットブラスト処理を実施した。そして、水洗いを経て乾燥処理した後、多結晶シリコンウェハの表面状態を目視により観察した。すなわち、ウェットブラスト処理による洗浄効果を確認するために、仕上げ洗浄工程を省いた。
(Example 2)
After a polycrystalline silicon wafer having a wafer thickness of 180 μm is cut out from the polycrystalline silicon ingot by a fixed abrasive method and subjected to a peeling process, the polycrystalline silicon wafer is wet-blasted only on one side under conditions 1 and 2 in FIG. Processing was carried out. Then, after washing with water and drying, the surface state of the polycrystalline silicon wafer was visually observed. That is, in order to confirm the cleaning effect by the wet blasting process, the finishing cleaning process was omitted.
 (比較例2)
 多結晶シリコンインゴットから固定砥粒方式により、ウェハ厚みが180μmの多結晶シリコンウェハを切り出し、剥離処理を実施した後、その多結晶シリコンウェハを図5の条件1及び2にて片面にのみウェットブラスト処理を実施した。更に、ウェットブラスト処理後に仕上げ洗浄工程を実施し、乾燥処理した後、多結晶シリコンウェハの表面状態を目視により観察した。
(Comparative Example 2)
After a polycrystalline silicon wafer having a wafer thickness of 180 μm is cut out from the polycrystalline silicon ingot by a fixed abrasive method and subjected to a peeling process, the polycrystalline silicon wafer is wet-blasted only on one side under conditions 1 and 2 in FIG. Processing was carried out. Further, after the wet blasting process, a finishing cleaning process was performed, and after the drying process, the surface state of the polycrystalline silicon wafer was visually observed.
 比較例2で実施した仕上げ洗浄工程では、予備洗浄、リンス、アルカリ溶液洗浄、リンスを順番に経た後に温風による乾燥を行った。予備洗浄及びアルカリ溶液洗浄においては、アルカリ溶液中に多結晶シリコンウェハを浸し、超音波を放射した。使用したアルカリ溶液は、0.5~5重量%のNaOHである。使用した超音波は、10~100kHz、100~500Wである。リンスにおいては、RO膜を使用して精製した純水中に多結晶シリコンウェハを浸し、超音波で放射した。リンス時間は、2~5分である。温風による乾燥では、多結晶シリコンウェハを100度の温風に当てた。温風による乾燥時間は、2~5分である。 In the finish cleaning step performed in Comparative Example 2, preliminary cleaning, rinsing, alkaline solution cleaning, and rinsing were performed in this order, followed by drying with warm air. In preliminary cleaning and alkaline solution cleaning, a polycrystalline silicon wafer was immersed in an alkaline solution and ultrasonic waves were emitted. The alkaline solution used is 0.5-5% by weight NaOH. The used ultrasonic waves are 10 to 100 kHz and 100 to 500 W. In rinsing, a polycrystalline silicon wafer was immersed in pure water purified using an RO membrane and irradiated with ultrasonic waves. The rinse time is 2-5 minutes. In drying with warm air, the polycrystalline silicon wafer was exposed to 100 ° hot air. The drying time with warm air is 2 to 5 minutes.
 (比較例3)
 多結晶シリコンインゴットから固定砥粒方式により、ウェハ厚みが180μmの多結晶シリコンウェハを切り出し、剥離処理を実施した後、ウェットブラスト処理と仕上げ洗浄工程を施すことなく、水洗いを経て乾燥処理し、その結果を多結晶シリコンウェハの表面状態を目視により観察した。
(Comparative Example 3)
A polycrystalline silicon wafer having a wafer thickness of 180 μm is cut out from the polycrystalline silicon ingot by a fixed abrasive grain method, and after performing a peeling process, it is subjected to a drying process through washing with water without performing a wet blasting process and a final cleaning process. As a result, the surface state of the polycrystalline silicon wafer was visually observed.
 (結果)
 実施例2、比較例2、及び比較例3の観察結果を図9に示す。図9に示すように、実施例2と比較例2とを比べても表面の洗浄性に違いが見られなかった。すなわち、固定砥粒方式によって多結晶シリコンウェハを切り出した場合には、ウェットブラスト処理のみとして仕上げ洗浄工程を省いた製造方法と、ウェットブラスト処理後に仕上げ洗浄工程を加えた製造方法とにおいてゴミの付着の程度に違いが見られなかった。
(result)
The observation results of Example 2, Comparative Example 2, and Comparative Example 3 are shown in FIG. As shown in FIG. 9, even when Example 2 was compared with Comparative Example 2, no difference was found in the surface cleanability. In other words, when a polycrystalline silicon wafer is cut out by the fixed abrasive method, dust adheres to the manufacturing method in which the finishing cleaning process is omitted only for the wet blasting process and the manufacturing method in which the finishing cleaning process is added after the wet blasting process. There was no difference in the degree.
 一方、比較例3の観察結果に示されるように、ウェットブラスト処理と仕上げ洗浄工程を経なかった場合には、水洗いを経ても仕上げ洗浄工程が必要な程度にゴミの付着が見られた。 On the other hand, as shown in the observation result of Comparative Example 3, when the wet blast treatment and the final cleaning process were not performed, dust was adhered to the extent that the final cleaning process was necessary even after the water cleaning.
 この結果、ウェットブラスト処理を経れば、スライス工程で発生するシリコンの切削屑、スライス工程で使用する有機系クーラントの残渣、及び剥離工程で使用する剥離液の残渣が洗い流されてしまうため、仕上げ洗浄工程を省けることが確認された。 As a result, after the wet blasting process, silicon scrap generated in the slicing process, organic coolant residue used in the slicing process, and residue of the stripping solution used in the detaching process are washed away. It was confirmed that the washing process could be omitted.
 なお、遊離砥粒方式で多結晶シリコンウェハを切り出した場合、ウェットブラスト処理を施しても、仕上げ洗浄工程を実施しないと残渣を取り除くことができなかった。これは、遊離砥粒方式のスライス工程によれば、スライス工程で発生するシリコンの切削屑、スライス工程で使用する有機系クーラントの残渣、及び剥離工程で使用する剥離液の残渣の他、スライス工程においてワイヤーソーの屑も加わるため、ウェットブラスト処理によって洗い流し切れないものと思われる。ウェットブラスト処理において、ノズルの走査を複数回繰り返せば、遊離砥粒方式においても一定の洗浄効果が見られると思われるが、ダメージ層の深さをコントロールすることが困難となるため、適切ではない。 In addition, when a polycrystalline silicon wafer was cut out by the free abrasive grain method, even if wet blasting was performed, the residue could not be removed unless the finish cleaning process was performed. This is because, according to the slicing process of the loose abrasive method, the cutting process of silicon generated in the slicing process, the residue of the organic coolant used in the slicing process, and the residue of the stripping liquid used in the detaching process, the slicing process In this case, wire saw waste is also added, so it seems that it cannot be washed away by wet blasting. In the wet blasting process, if the nozzle scan is repeated several times, it seems that a certain cleaning effect can be seen even in the loose abrasive method, but it is not appropriate because it becomes difficult to control the depth of the damaged layer. .
 また、ウェットブラスト処理に代えてドライブラスト処理を実施した場合には、スライス工程で発生するシリコンの切削屑、スライス工程で使用する有機系クーラントの残渣、及び剥離工程で使用する剥離液の残渣が乾燥して、多結晶シリコンウェハの表面に固着してしまっていた。すなわち、ウェットブラスト処理に比べて、ドライブラスト処理に洗浄効果を期待することはできない。 In addition, when drive blasting is performed instead of wet blasting, silicon cutting waste generated in the slicing process, organic coolant residue used in the slicing process, and residue of the stripping liquid used in the detaching process It dried and adhered to the surface of the polycrystalline silicon wafer. That is, the cleaning effect cannot be expected in the drive blast process compared to the wet blast process.
 (効果)
 以上のように、本実施形態の半導体ウェハの製造方法は、テクスチャー形成のために酸によるエッチングが施される前の半導体ウェハの製造方法であって、以下の工程を含むことを特徴とする。
(effect)
As described above, the method for manufacturing a semiconductor wafer according to the present embodiment is a method for manufacturing a semiconductor wafer before etching with acid for texture formation, and includes the following steps.
 (1)表面に砥粒を分散固定した芯線によって結晶性インゴットを切削することで、半導体ウェハを切り出す固定砥粒方式のスライス工程
 (2)固定砥粒方式のスライス工程の後、半導体ウェハの表面に対して液体と砥粒とのスラリを噴射することで、半導体ウェハの表面全体にダメージ層を形成するウェットブラスト方式のダメージ層形成工程
 (3)ダメージ層形成処理の次に、前記半導体ウェハを乾燥させる乾燥工程。
(1) Slicing process of a fixed abrasive grain method of cutting a semiconductor wafer by cutting a crystalline ingot with a core wire in which abrasive grains are dispersed and fixed on the surface. (2) After the slicing process of a fixed abrasive grain method, the surface of the semiconductor wafer A wet blast type damaged layer forming step of forming a damaged layer on the entire surface of the semiconductor wafer by spraying a slurry of liquid and abrasive grains on the surface. (3) Next to the damaged layer forming process, Drying process to dry.
 これにより、固定砥粒方式で半導体ウェハを切り出しても表面全体にダメージ層を形成することができ、酸によるエッチング処理を施してもテクスチャーの形成が可能となる。従って、遊離砥粒方式と比べて一つの結晶性インゴットから多くの半導体ウェハを切り出すことが可能となり、太陽電池用の半導体ウェハの製造コストを削減することが可能となる。 Thereby, even if the semiconductor wafer is cut out by the fixed abrasive method, a damage layer can be formed on the entire surface, and a texture can be formed even if an etching process with acid is performed. Therefore, many semiconductor wafers can be cut out from one crystalline ingot as compared with the free abrasive grain method, and the manufacturing cost of the semiconductor wafer for solar cells can be reduced.
 また、固定砥粒方式によるスライス工程とウェットブラスト処理によるダメージ層形成工程とを組み合わせることにより、スラリに含まれる砥粒の粒径を変更することでテクスチャーの凹凸密度を自在に設計でき、また、スラリに含まれる砥粒の粒径を変更することでダメージ層の深さを自在に設計することが可能となる。 In addition, by combining the slicing process with the fixed abrasive method and the damage layer forming process with wet blasting, the unevenness density of the texture can be freely designed by changing the particle size of the abrasive grains contained in the slurry, It is possible to freely design the depth of the damaged layer by changing the grain size of the abrasive grains contained in the slurry.
 また、固定砥粒方式によるスライス工程とウェットブラスト処理によるダメージ層形成工程とを組み合わせることにより、ウェットブラスト処理に洗浄効果が現れるため、ダメージ層形成工程と乾燥工程との間において仕上げ洗浄処理工程を省くことができ、太陽電池用の半導体ウェハの製造コストを更に削減すること可能となる。 In addition, by combining the slicing process by the fixed abrasive method and the damaged layer forming process by the wet blasting process, a cleaning effect appears in the wet blasting process, so the finishing cleaning process process is performed between the damaged layer forming process and the drying process. This can save the manufacturing cost of the semiconductor wafer for the solar cell.
 以上のように、本発明のいくつかの実施形態を説明したが、これらの実施形態は、例として提示したものであり、発明の範囲を限定することを意図していない。これら新規な実施形態は、そのほかの様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。 As described above, several embodiments of the present invention have been described. However, these embodiments are presented as examples, and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.
10 ワイヤーソー
11a 回転ローラ
11b 回転ローラ
12 支持板
13 バスケット
14 剥離液
15 ノズル
DESCRIPTION OF SYMBOLS 10 Wire saw 11a Rotating roller 11b Rotating roller 12 Support plate 13 Basket 14 Stripping liquid 15 Nozzle

Claims (5)

  1.  テクスチャー形成のために酸によるエッチングが施される前の半導体ウェハの製造方法であって、
     表面に砥粒を分散固定した芯線によって結晶性インゴットを切削することで、前記半導体ウェハを切り出す固定砥粒方式のスライス工程と、
     前記固定砥粒方式のスライス工程の後、前記半導体ウェハの少なくとも片面に対して液体と砥粒とのスラリを噴射することで、前記半導体ウェハにダメージ層を形成するウェットブラスト方式のダメージ層形成工程と、
     前記ダメージ層形成処理の次に、水洗い洗浄を経て前記半導体ウェハを乾燥させる乾燥工程と、
     を含むこと、
     を特徴とする半導体ウェハの製造方法。
    A method of manufacturing a semiconductor wafer before being etched with an acid for texture formation,
    By cutting the crystalline ingot with a core wire in which abrasive grains are dispersed and fixed on the surface, a fixed abrasive grain slicing step of cutting out the semiconductor wafer;
    After the fixed abrasive grain slicing step, a wet blast type damage layer forming step of forming a damage layer on the semiconductor wafer by spraying a slurry of liquid and abrasive grains on at least one surface of the semiconductor wafer When,
    Next to the damage layer forming treatment, a drying step of drying the semiconductor wafer through washing with water,
    Including,
    A method for manufacturing a semiconductor wafer.
  2.  前記ダメージ層形成工程と前記乾燥工程との間には、前記半導体ウェハの溶剤による仕上げ洗浄処理工程が省かれること、
     を特徴とする請求項1記載の半導体ウェハの製造方法。
    Between the damaged layer forming step and the drying step, a finishing cleaning treatment step with a solvent of the semiconductor wafer is omitted,
    The method of manufacturing a semiconductor wafer according to claim 1.
  3.  前記ダメージ層形成工程では、
     前記テクスチャーの目的の凹凸密度に応じて前記スラリに含まれる砥粒の粒径を変更すること、
     を特徴とする請求項1又は2記載の半導体ウェハの製造方法。
    In the damage layer forming step,
    Changing the grain size of the abrasive grains contained in the slurry according to the desired uneven density of the texture,
    The method of manufacturing a semiconductor wafer according to claim 1 or 2.
  4.  前記ダメージ層形成工程では、
     形成しようとする前記ダメージ層の深さに応じて前記スラリに含まれる砥粒の粒径を変更すること、
     を特徴とする請求項1乃至3の何れかに記載の半導体ウェハの製造方法。
    In the damage layer forming step,
    Changing the grain size of the abrasive grains contained in the slurry according to the depth of the damage layer to be formed,
    The method for producing a semiconductor wafer according to claim 1, wherein:
  5.  表面に凹凸を形成するために酸によるエッチングが施される前の半導体ウェハであって、
     表面に砥粒を固定した芯線によって結晶性インゴットを切削する固定砥粒方式によって切り出され、
     切り出された後に、ウェットブラスト方式により少なくとも片面に対して液体と砥粒とのスラリを噴射されることで、表面にダメージ層が形成されること、
     を特徴とする半導体ウェハ。
    A semiconductor wafer before being etched with an acid to form irregularities on the surface,
    It is cut out by a fixed abrasive method that cuts a crystalline ingot with a core wire with abrasive particles fixed on the surface,
    After being cut out, a damage layer is formed on the surface by spraying a slurry of liquid and abrasive grains on at least one side by a wet blast method,
    A semiconductor wafer characterized by
PCT/JP2013/059364 2013-03-28 2013-03-28 Semiconductor-wafer manufacturing method and semiconductor wafer WO2014155624A1 (en)

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JP2016215142A (en) * 2015-05-21 2016-12-22 株式会社ケーブイケー Faucet
WO2018162546A1 (en) * 2017-03-10 2018-09-13 Gebr. Schmid Gmbh Method for producing textured wafers and roughening spray jet treatment device
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JP2011146432A (en) * 2010-01-12 2011-07-28 Noritake Co Ltd Method of manufacturing silicon substrate for solar battery
JP2011222608A (en) * 2010-04-06 2011-11-04 Okamoto Machine Tool Works Ltd Grinding method of semiconductor substrate and processing device for grinding semiconductor substrate used in the sam
JP2011243926A (en) * 2010-05-21 2011-12-01 Shin Etsu Chem Co Ltd Solar cell manufacturing method and solar cell
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JP2011146432A (en) * 2010-01-12 2011-07-28 Noritake Co Ltd Method of manufacturing silicon substrate for solar battery
JP2011222608A (en) * 2010-04-06 2011-11-04 Okamoto Machine Tool Works Ltd Grinding method of semiconductor substrate and processing device for grinding semiconductor substrate used in the sam
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JP2016215142A (en) * 2015-05-21 2016-12-22 株式会社ケーブイケー Faucet
WO2018162546A1 (en) * 2017-03-10 2018-09-13 Gebr. Schmid Gmbh Method for producing textured wafers and roughening spray jet treatment device
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