WO2014153822A1

WO2014153822A1 - Drive control unit, drive circuit, and drive control method of display substrate

Info

Publication number: WO2014153822A1
Application number: PCT/CN2013/075922
Authority: WO
Inventors: 段欣
Original assignee: 京东方科技集团股份有限公司; 北京京东方显示技术有限公司
Priority date: 2013-03-27
Filing date: 2013-05-20
Publication date: 2014-10-02
Also published as: CN103198803A; CN103198803B

Abstract

The present invention relates to the technical field of displays. Disclosed are a drive control unit, drive circuit, and drive control method of a display substrate, comprising a timing sequence controller and a delay controller. The timing sequence controller sends a timing sequence control signal to the delay controller; the delay controller adjusts the timing sequence signal according to the impedance of a drive signal line connected by pixels of the display substrate, allowing the actual charging time of the pixels to be within a preset time range. The timing sequence control signal of the pixels is changed according to the position of the pixels on a liquid crystal panel, such that the timing sequence control signals of the pixels at different positions differ from one another. Different timing sequence control signals compensate for the charging time error caused by delays on the signal line, thereby ensuring a consistent charging effect for the pixels at different positions on the liquid crystal panel.

Description

Driving control unit for display substrate, driving circuit and driving control method

Technical field

The invention belongs to the technical field of display, and in particular to a driving control unit, a driving circuit and a driving control method for a display substrate. Background technique

A conventional liquid crystal panel driving architecture includes a source driver and a gate driver. When the source driver and the gate driver drive pixels at different positions of the panel, the timing control signals are consistent, that is, the near and far points from the source driver and the gate driver, and the pixels use the same timing control signal. . When the gate driver drives the pixel points of each row, the time at which the deflection voltage is applied to the data line is fixed, and the time at which the pixel points at different positions in the same row of pixels are turned on is fixed.

Due to the limitation of the process characteristics of the liquid crystal panel, there is a certain impedance between the signal line connecting the near point and the far point, resulting in the performance of the near point when the gate driver and the source driver are loaded with the same signal, and the far point passing the signal line. The performance after the delay is inconsistent. When the same timing control signal is used for the near point and the far point, the actual charging time of the pixel is not the same, resulting in different pixel charging effects at different positions on the panel, and the screen consistency is affected. In large-sized panels, this problem is more pronounced due to the greater impedance of the signal lines. Moreover, not only liquid crystal panels, but also other types of display substrates using thin film transistor arrays have such problems. Summary of the invention

In view of the problems existing in the prior art, the present disclosure provides a driving control unit, a driving circuit, and a driving control method for a display substrate that adjusts timing control signals of respective pixels on a panel according to pixel position to improve picture consistency.

According to an aspect of the present invention, a driving control unit for a display substrate is provided, including a timing controller and a delay controller, wherein: the timing controller is configured to send a timing control signal to the delay controller; The delay controller is configured to adjust the timing control signal according to an impedance of a driving signal line connected to a pixel point of the display substrate, so that an actual charging duration of the pixel point is within a preset duration.

Optionally, the delay controller is configured to adjust the timing control signal according to an impedance of a driving signal line connected to a pixel point of the display substrate, which is:

The delay controller adjusts the timing control signal according to a length and a resistivity of a driving signal line connected between the pixel point and the pixel display driver.

Optionally, the delay controller is configured to adjust the timing control signal in the following manner:

Taking the impedance of the driving signal line connected between the second pixel point on the display panel and the pixel display driver and the first pixel point and the reference based on the timing control signal of the first pixel on the display panel The difference between the impedances of the driving signal lines connected between the pixels display drivers is used to adjust the delay time of the timing control signals of the second pixel points with respect to the first pixel point timing control signals.

Optionally, the first pixel point is a pixel point farthest from the pixel display driver on the display panel, which is called a pixel far point; and the second pixel point is other than the far point of the pixel on the display panel. Any pixel point.

Adjusting, according to the timing control signal of the far point of the pixel, a delay time of the timing control signal of the second pixel point in the same row as the far point of the pixel, and then adjusting the second pixel point of the same column as the far point of the pixel The delay time of the timing control signal.

The timing control signal is adjusted to make the delay time of the timing control signal of the second pixel point proportional to the magnitude of the difference of the impedance, based on the timing control signal of the first pixel on the display panel.

Alternatively, the pixel display driver refers to a gate driver or a source driver. Optionally, the preset duration includes a preset duration value.

A driving circuit for a display substrate according to an embodiment of the present invention includes the above-described driving control unit. In the driving control method of the display substrate of the embodiment of the invention, the driving device of the display substrate includes a timing controller and a delay controller; the method includes:

And causing the timing controller to send a timing control signal to the delay controller; and causing the delay controller to adjust the timing control signal according to an impedance of a driving signal line connected to a pixel point of the display substrate, so that The actual charging duration of the pixel is within a preset duration.

Optionally, the delay controller adjusts the timing control signal, including: displaying, according to a timing control signal of the first pixel on the display panel, according to the second pixel on the display panel and the pixel Adjusting the timing control signal of the second pixel point relative to the difference between the impedance of the driving signal line connected between the drivers and the impedance of the driving signal line connected between the first pixel point and the pixel display driver The delay time of the first pixel point timing control signal.

Optionally, the timing control signal is a gate driver control signal, the gate driver control signal controls a thin film transistor turn-on time of a pixel, and the delay controller adjusts the thin film transistor turn-on time to adjust the a delay time of the timing control signal of the second pixel relative to the first pixel point timing control signal; or, the timing control signal is a source driver control signal, and the source driver control signal controls a deflection voltage of the pixel point Loading time, the delay controller adjusts a delay time of the timing control signal of the second pixel relative to the first pixel point timing control signal by adjusting the deflection voltage loading time.

Optionally, the timing control signal is a pulse signal.

Optionally, the step of adjusting the timing control signal by the delay controller is: using a timing control signal of the first pixel on the display substrate as a reference, according to the second pixel on the display substrate and the pixel Adjusting a difference between an impedance of a driving signal line connected between the drivers and an impedance of a driving signal line connected between the first pixel and the pixel display driver to adjust a timing control signal of the second pixel relative to The delay time of the timing control signal at the first pixel point.

Optionally, the first pixel point is a pixel point farthest from the pixel display driver on the display panel, which is called a pixel far point; and the second pixel point is other than the far point of the pixel on the display panel. Any pixel point. Optionally, the delay controller is configured to adjust the timing control signal in the following manner:

Adjusting, according to the timing control signal of the first pixel, a delay time of a timing control signal of a second pixel in the same row as the first pixel; and/or controlling timing of the first pixel The signal is a reference, and the delay time of the timing control signal of the second pixel in the same column as the first pixel is adjusted.

The exemplary embodiment of the present invention changes the timing control signal of the pixel according to the position of the pixel on the liquid crystal panel, so that the timing control signals of the pixels at different positions are different, and the signals are controlled with different timings to compensate the charging time due to the delay of the signal line. The error ensures the consistency of the pixel charging effect at different positions of the liquid crystal panel. DRAWINGS

1 is a schematic structural view of a conventional liquid crystal panel;

2 is a schematic diagram of input and output of a gate driver control signal and a source driver control signal of a delay controller according to an embodiment of the present invention;

3 is a comparison diagram of delay times of gate driver signal lines at three points A, B, and C on the liquid crystal panel of FIG. 1;

4 is a comparison diagram of delay times of source driver signal lines of three points A, D, and E on the liquid crystal panel of FIG. 1;

Figure 5 is a comparison diagram of the actual charging time of the three points A, B, and C after adjustment by the delay controller;

Figure 6 is a comparison of the actual charging time of the three points A, D and E after adjustment by the delay controller.

detailed description

The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Description. The following exemplary embodiments are merely illustrative of the principles of the invention, but are not intended to limit the scope of the invention.

The embodiment provides an embodiment of a drive control unit for a display substrate, the drive control unit including a timing controller and a delay controller, wherein:

The timing controller is configured to send a timing control signal to the delay controller; the delay controller is configured to: adjust the timing control signal according to an impedance of a driving signal line connected to a pixel point of the display substrate , so that the actual charging duration of the pixel is within a preset duration.

Due to the difference in the arrangement positions of the pixel dots on the display substrate, the length of the driving signal line between the pixel and the pixel display driver is different, or the difference in resistivity caused by factors such as the metal material and the pattern design causes the different pixel points to be connected. The impedance of the driving signal line is different, so the delay time of the charging signal obtained by different pixel points is different, and finally the display effect is inconsistent. In this embodiment, the delay controller adjusts the timing control signal according to the impedance of the driving signal line connected to the pixel of the display substrate, so that the actual charging duration of each pixel point tends to be consistent. That is, it is a preset charging duration value, or has an acceptable error range with the preset charging duration value, that is, within a preset duration.

Thereby, the signal is controlled with different timings, the difference in charging time is compensated, and the consistency of the charging effect of the pixels at different positions on the display substrate is ensured.

The embodiment also provides a driving circuit for the display substrate, including the driving control unit as described above.

It should be noted that the embodiment of the present invention is not limited to the liquid crystal display panel, and can be applied to other types of display substrates using the thin film transistor array substrate; the pixel display driver can be a gate driver or a source driver. When the impedance difference on the gate line is large, only the delay of the gate driving signal is compensated, which can solve the problem that the pixel display effect is uneven due to the difference of the charging delay; similarly, when the impedance difference on the data line is different When the time is large, only the delay of the source driving signal is compensated, and the problem that the pixel display effect is uneven due to the difference in charging delay can be solved; of course, the delays of the gate driver and the source driving signal are compensated, and the Solve the problem well, and specifically the order of compensation for each pixel, the selection of the pixel to be compensated (all compensation or part) The manner of compensation, and which pixel points are compensated for, is not limited, and all the methods covered can solve the above technical problems, and thus the technical solutions covered by them are within the protection scope of the claims of the present invention.

Exemplary embodiments of various cases to which the present invention is applied are described below, wherein a liquid crystal panel is selected as an exemplary embodiment of a display substrate; a source driver 1 and a gate driver 2 are selected as an example of the pixel display driver Embodiments; and, the enumerated pixel compensation sequence and execution steps are described, but the embodiments of the present invention are not limited to these sequences and steps.

FIG. 1 is a schematic structural view of a conventional liquid crystal panel. As shown in FIG. 1, the liquid crystal panel includes a source driver 1, a gate driver 2, and a plurality of pixel points. The control signal output from the gate driver 2 controls the thin film transistor turn-on time of each pixel. The control signal output from the source driver 1 controls the deflection voltage loading time of each pixel. By controlling the timing of the control signal output from the source driver 1 and the control signal output from the gate driver 2 (eg, the turn-on time of the pixel, or the overlap time of the pixel point and the deflection voltage loading time of the corresponding pixel), It is possible to charge the pixels. When the same control signal is applied to the gate driver 2 and the source driver 1 regardless of the impedance of the signal line on the liquid crystal panel, the charging time of all the pixels on the liquid crystal panel is the same, and the charging effect is uniform. However, in practice, due to the process limitation of the liquid crystal panel, there is a certain impedance between the signal lines connecting the same row and the pixels in the same column. If the same control signal is loaded on the gate driver 2 and the source driver 1, it may result in The pixel charging effect at different positions on the panel is different, and the screen consistency is affected. In large-sized panels, this problem is more pronounced due to the greater impedance of the signal lines. For example, as shown in FIG. 1 , for the three pixel points A, B, and C in the same row on the liquid crystal panel, the delay time of the thin film transistor at each point is different due to the delay of the gate driver 2 control signal on the glass substrate trace. , as shown in Figure 3, that is, tl > t 2 > t 3 . If the source driver 1 control signal is unchanged, the actual charging time of the three points A, B, and C will be different, resulting in different charging levels of the three pixel positions. Similarly, for the three pixel points A, D, and E in the same column on the liquid crystal panel, the delay time of the three-point deflection voltage of the A, D, and E is different due to the delay of the control signal of the source driver 1 on the glass substrate. As shown in Fig. 4, that is, t4>t5>t6. If the gate driver 2 control signal is unchanged, the actual charging time of the three points A, D, and E will be different, resulting in different charging levels of the three pixel points. As shown in FIG. 2, the gate control signal and the source control signal are signals sent by the original timing controller, and the gate control signal and the source control signal are signals adjusted by the delay controller. The gate control signal charges each row of pixels corresponding to one pulse, and the low level is the time when the gate is turned on, and the time of the low level is adjusted by the delay controller to change the pixel gate turn-on time of different rows. Each pulse of the source control signal corresponds to the time when the pixel deflection voltage is loaded, and the delay signal is used to advance or delay the pulse signal to control when the pixel deflection voltage is applied to both ends of the liquid crystal.

Taking the gate control signal as an example, the original gate control signal enters the delay controller, divides it into a delay unit signal with a small pulse width, and sets a delay unit signal that needs to be superimposed in each line through an internal register. The number of times, through the internal timing signal superposition, achieves the purpose of separately controlling the timing signals of different rows. Similarly, the delay control principle of the source control signal can be obtained. After the signal adjusted by the delay controller, as shown in Figures 5 and 6, the actual charging times of the three points A, B, and C and D, E are the same.

Example 1

As shown in Fig. 1, if the scanning order of the gate lines and the data lines on the liquid crystal panel is from left to right and top to bottom, the last row on the liquid crystal panel, the last column of pixels

F and the first row on the liquid crystal panel, the charging time of the pixel A of the first column has the largest difference. Therefore, optionally, the delay controller adjusts based on the timing control signal of the far point F of the pixel farthest from the source driver and the gate driver on the liquid crystal panel. The optional adjustment manner is as follows: according to the difference between the impedance of the driving signal line connected between the second pixel point on the display substrate and the pixel display driver and the impedance of the driving signal line connected between the first pixel point and the pixel display driver, Adjusting the pixel in the same row as the pixel far point F according to the difference between the impedance of the driving signal line connected between the pixel far point F and the source driver and the impedance of the driving signal line connected between the pixel point of the same row and the source driver The delay time of the timing control signal of the point, the impedance difference between the pixel point E and the pixel far point F is the largest, and the delay time of the timing control signal of the column where the pixel point E is located needs to be adjusted, so that the timing control signal of the column of the pixel point E is late. The timing control signal is output at the column where the pixel far point F is located, thereby compensating for the delay between the pixel points E and F due to the gate driver control signal on the glass substrate trace. The impedance difference between the pixel point between the pixel points E and F and the pixel point F is smaller than the impedance difference between the pixel point E and the pixel point F, so the required delay compensation is also relatively small, and the delay of the timing control signal is required. The late time is adjusted in proportion to the magnitude of the impedance difference between the other pixels of the same line from the pixel far point F;

Then, according to the difference between the pixel far point F and the pixel difference between the pixels in the same column, the delay time of the timing control signal of the pixel in the same column as the pixel far point F is adjusted, and the impedance difference between the pixel point C and the pixel far point F is The maximum, the delay time of the timing control signal of the row where the pixel C is located needs to be adjusted, so that the timing control signal of the row where the pixel C is located is later than the timing control signal of the row where the pixel far point F is located, thereby compensating between the pixel points C and F. Due to the delay of the source driver control signal on the glass substrate trace. The difference between the impedance between the pixel points C and F and the pixel point F is smaller than the impedance difference between the pixel point C and the pixel point F, so the required delay compensation is relatively small, and the delay time of the signal is controlled according to the timing. It is adjusted in proportion to the magnitude of the impedance difference between other pixel points of the same line from the pixel far point F. The final adjustment to the charging time of all the pixels is basically the same as the far-point F charging time of the pixel, and the adjustment is completed.

It should be noted that the above adjustment mode is merely an exemplary embodiment, and the embodiment of the present invention is not limited to this adjustment mode. For example, it is not limited to adjusting only the timing control signal of the F point as a reference, and other pixel points may be selected for adjustment, as long as the charging time of all the pixels or most of the pixels in the panel is adjusted to be the same or substantially the same. can. It is also not limited to adjusting all the pixels as long as an acceptable consistency effect can be achieved, and the degree of consistency can be controlled as needed by those skilled in the art. Since there are many scanning methods, and are not limited to scanning from top to bottom and from left to right, the present embodiment is not limited to comparing pixel points in the upper left corner with pixel points in the lower right corner, as long as it is due to grid lines or The two pixel points of the data line whose trace impedance and the scanning sequence are different in charging time can be compared to adjust the charging time, and finally the purpose of adjusting the pixel charging time of the panel is achieved. , thereby improving the consistency of the display and improving the display effect.

The following embodiment is a case where adjustment is performed when different adjustment orders are selected and different pixel points are selected as reference points.

Example 2

As shown in FIG. 1 , the last row on the liquid crystal panel, the pixel point F of the last column and the first row on the liquid crystal panel, the pixel A of the first column has the largest difference in charging time, and the delay controller is separated from the source on the liquid crystal panel. Timing control of the farthest pixel farthing point F of the driver and gate driver Based on the signal, the delay time of the timing control signal of the pixel in the same column as the pixel far point F is adjusted according to the magnitude of the impedance difference between the pixel far point F and the pixel in the same column. The impedance difference between the pixel point C and the pixel far point F is the largest, and the delay time of the timing control signal of the row where the pixel point C is needed needs to be adjusted, so that the timing control signal of the row where the pixel point C is located is later than the timing control of the row where the pixel far point F is located. The signal is output to compensate for the delay between pixel points C and F due to the source driver control signal on the glass substrate trace. The difference between the impedance between the pixel points C and F and the pixel point F is smaller than the difference between the impedance between the pixel point C and the pixel point F, so the required delay compensation is relatively small, and the gate driver control signal is required. The delay time is adjusted in proportion to the difference in impedance between the pixel far point F and the other pixels in the same row. Then, according to the difference between the pixel far point F and the impedance of the pixel in the same row, the delay time of the timing control signal of the pixel in the same row as the far point of the pixel is adjusted, and the difference between the pixel point E and the pixel far point F is the largest. The delay time of the timing control signal of the column in which the pixel point E is located needs to be adjusted, so that the timing control signal of the column where the pixel point E is located is later than the timing driver control signal output of the column where the pixel far point F is located, thereby compensating between the pixel points E and F. Due to the delay of the gate driver control signal on the glass substrate trace. The difference between the impedance between the pixel points E and F and the pixel point F is smaller than the difference between the impedance between the pixel point E and the pixel point F, so the required delay compensation is relatively small, and the delay of the signal is controlled according to the timing. The time is proportional to the difference in the impedance between the other pixels of the same line from the far point of the pixel. The final adjustment to the charging time of all the pixels is basically the same as the pixel far-point F charging time, and the adjustment is completed.

Example 3

The delay controller adjusts and lines each line according to the difference between the impedance of the pixel point C and the pixel A and B of the same row on the same row of the liquid crystal panel, based on the timing control signal of the pixel C which is farthest from the gate driver in the same row. The delay time of the timing control signal of the pixel at the same row from the farthest pixel of the gate driver. The difference between the impedance of the pixel A and the pixel C is the largest, and the delay time of the timing control signal of the column where the pixel A is located needs to be adjusted, so that the timing control signal of the column of the pixel A is later than the timing control signal of the column of the pixel C. The output is thereby compensated for the delay between the pixel points A and C due to the gate driver control signal on the glass substrate trace. The difference between the impedance between the pixel points A, C (for example, point B in FIG. 1) and the pixel point C is smaller than the difference between the impedance between the pixel point A and the pixel point C, and thus the required delay compensation The repayment is relatively small, and the delay time of the timing control signal is adjusted in proportion to the magnitude of the impedance difference between the pixel points C and other pixels in the same row. Similarly, other lines on the LCD panel are also adjusted according to the above steps. Then, the delay time of the timing control signal is adjusted according to the difference between the impedance of the other row on the last row of the liquid crystal panel. For example, the last row of the liquid crystal panel has the largest impedance difference between the first row on the liquid crystal panel, and the timing control signal of the first row needs to be adjusted later than the timing control signal output of the last row, thereby compensating for the source between the first row and the last row. The delay of the pole driver control signal on the glass substrate trace. The impedance difference between the line between the first line and the last line and the last line is smaller than the impedance difference between the first line and the last line, so the required delay compensation is also relatively small, and the delay time of the timing control signal and the liquid crystal are required. The difference between the last row on the panel and the impedance of the other rows is proportional to the magnitude of the difference. Finally, the charging time of all the pixels on the liquid crystal panel is basically the same, and the adjustment is completed.

Example 4

The delay controller is based on the timing control signal of the pixel column E of the same column farthest from the source driver on the liquid crystal panel, and is adjusted according to the difference between the impedance of the pixel point E and the pixel A and D of the same column. The delay time of a timing control signal for a column of pixels in the same column from the farthest pixel of the source driver. The impedance difference between the pixel A and the pixel E is the largest, and the delay time of the timing control signal of the row where the pixel A is located needs to be adjusted, so that the timing control signal of the row where the pixel A is located is later than the timing control signal output of the row where the pixel E is located. , thereby compensating for the delay between the pixel points A and E due to the source driver control signal on the glass substrate trace. The difference between the impedance between the pixel points A and E (for example, point D in Fig. 1) and the pixel point E is smaller than the difference between the impedance between the pixel point A and the pixel point E, so the delay compensation required is also Relatively small, it is necessary to adjust the delay time of the timing control signal in proportion to the difference between the impedances of the pixel points E and other pixels in the same column. Similarly, the other columns on the LCD panel are also adjusted according to the above steps. Then, according to the difference between the impedance of the last column on the liquid crystal panel and the impedance of the other columns, the delay time of the timing control signal is adjusted. For example, the difference between the impedances of the first column of the liquid crystal panel and the first column of the liquid crystal panel is the largest, and the first column needs to be adjusted. The timing control signal is later than the timing control signal output of the last column, thereby compensating for the delay between the first column and the last column due to the gate driver control signal on the glass substrate trace. The difference between the impedance between the column between the first column and the last column and the last column is less than The difference between the impedances of the first column and the last column, so the required delay compensation is relatively small, and the delay time of the source driver control signal is proportional to the difference between the impedance of the last column on the liquid crystal panel and the other columns. Make adjustments. Finally, the charging time of all the pixels on the liquid crystal panel is basically the same, and the adjustment is completed.

Claims

claims

1. A drive control unit for a display substrate, including a timing controller and a delay controller, wherein:

The timing controller is used to send a timing control signal to the delay controller; the delay controller is used to adjust the timing control signal according to the impedance of the driving signal line connected to the pixel point of the display substrate, Make the actual charging time of the pixels within the preset time range.

2. The drive control unit as claimed in claim 1, wherein,

The delay controller is used to adjust the timing control signal according to the impedance of the driving signal line connected to the pixel point of the display substrate, which means:

The delay controller adjusts the timing control signal according to the length and resistivity of the drive signal line connected between the pixel point and the pixel display driver.

3. The drive control unit as claimed in claim 1, wherein,

The delay controller is used to adjust the timing control signal in the following manner: taking the timing control signal of the first pixel point on the display panel as a reference, according to the second pixel point on the display panel and the pixel display The difference between the impedance of the driving signal line connected between the drivers and the impedance of the driving signal line connected between the first pixel point and the pixel display driver is used to adjust the timing control signal of the second pixel point relative to The delay time of the first pixel timing control signal.

4. The drive control unit as claimed in claim 3, wherein,

The first pixel point is the pixel point farthest from the pixel display driver on the display panel, which is called the pixel far point; the second pixel point is any pixel point on the display panel except the pixel far point.

5. The drive control unit as claimed in claim 4, wherein,

The delay controller is used to adjust the timing control signal in the following manner: based on the timing control signal of the far point of the pixel, first adjust the timing control signal of the second pixel point in the same row as the far point of the pixel. Delay time, and then adjust the delay time of the timing control signal of the second pixel point in the same column as the far point of the pixel.

6. The drive control unit as claimed in claim 3, wherein,

The delay controller is used to adjust the timing control signal in the following manner: based on the timing control signal of the first pixel point on the display panel, adjust the timing control signal to control the timing of the second pixel point. The delay time of the signal is proportional to the difference in impedance.

7. The drive control unit as claimed in claim 2, wherein,

The pixel display driver refers to a gate driver or a source driver.

8. A drive circuit for a display substrate, including the drive control unit according to any one of claims 1 to 7.

9. A drive control method for a display substrate, the display substrate including a drive circuit having a timing controller and a delay controller; the method includes the following steps:

Let the timing controller send a timing control signal to the delay controller; Let the delay controller adjust the timing control signal according to the impedance of the driving signal line connected to the pixel point of the display substrate, so that The actual charging time of the pixels is within the preset time range.

10. The drive control method as claimed in claim 9,

The delay controller adjusts the timing control signal, including:

Taking the timing control signal of the first pixel point on the display panel as a reference, according to the impedance of the driving signal line connected between the second pixel point on the display panel and the pixel display driver and the first pixel point and the The difference in impedance of the driving signal lines connected between the pixel display drivers is used to adjust the delay time of the timing control signal of the second pixel point relative to the timing control signal of the first pixel point.

11. The drive control method according to claim 10, wherein,

The timing control signal is a gate driver control signal. The gate driver control signal controls the turn-on time of the thin film transistor of the pixel point. The delay controller adjusts the second pixel point by adjusting the turn-on time of the thin film transistor. The delay time of the timing control signal relative to the first pixel timing control signal; or,

The timing control signal is a source driver control signal. The source driver control signal controls the deflection voltage loading time of the pixel point. The delay controller adjusts the second pixel point by adjusting the deflection voltage loading time. The timing control signal is relative to the The delay time of the first pixel timing control signal.

12. The drive control method according to claim 9,

The step for the delay controller to adjust the timing control signal is: taking the timing control signal of the first pixel point on the display substrate as a reference, according to the relationship between the second pixel point on the display substrate and the pixel display driver. The difference between the impedance of the connected driving signal line and the impedance of the driving signal line connected between the first pixel point and the pixel display driver is used to adjust the timing control signal of the second pixel point relative to the third pixel display driver. The delay time of a pixel timing control signal.

13. The drive control method according to claim 12, wherein,

14. The drive control method as claimed in claim 12,

The delay controller is used to adjust the timing control signal in the following manner: based on the timing control signal of the first pixel point, first adjust the timing control of the second pixel point in the same row as the first pixel point. The delay time of the signal; and/or, based on the timing control signal of the first pixel point, adjust the delay time of the timing control signal of the second pixel point in the same column as the first pixel point.

15. The drive control method as claimed in claim 12, wherein the delay controller is used to adjust the timing control signal in the following manner:

Taking the timing control signal of the first pixel point on the display panel as a reference, the timing control signal is adjusted so that the delay time of the timing control signal of the second pixel point is proportional to the difference in impedance.