Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
Fig. 1 is a schematic diagram of a display panel in the related art, and as shown in fig. 1, two sub-pixels a and B driven by one data line D, a data input terminal DD on the data line is below the panel, and a distance from the data input terminal of the sub-pixel a is greater than a distance from the data input terminal of the sub-pixel B. Fig. 2 is a waveform diagram of data signals and scan signals received by the sub-pixels a and B. As shown in fig. 2, the same data signal is supplied to the sub-pixel a and the sub-pixel B. (a) The waveforms of the data signal data and the scan signal scan received for the sub-pixel a, and (B) the waveforms of the data signal data and the scan signal scan received for the sub-pixel a, it can be seen that the data delay at the position of the sub-pixel a is greater than the data delay at the position of the sub-pixel B. When the data signal is switched from 6V to 3V, that is, the data signal of 3V needs to be provided to the sub-pixel a, since the scan reservation time is short, a potential larger than 3V is written into the pixel circuit, which may result in the light emitting luminance of the sub-pixel a being darker. And the data delay at the position of the sub-pixel B is small, so that the data signals can be rapidly switched, and the preset 3V data signals can be written into the pixel circuit within the reserved time of scan, so that the light-emitting brightness of the sub-pixel B is normal. Therefore, it can be seen that the delay of the data signal on the data line affects the luminance of the corresponding sub-pixel, and the embodiment of the invention provides a driving method of a display panel, which compensates the delay of the data signal on the data line by adjusting the input process of the data signal, so as to increase the charging speed of the data signal on the sub-pixel, ensure that the sub-pixel can be charged to the target potential, thereby controlling the sub-pixel to display an accurate gray scale and improving the display effect of the panel.
An embodiment of the invention provides a driving method of a display panel, and fig. 3 is a schematic diagram of a display panel to which the driving method provided by the embodiment of the invention can be applied. As shown in fig. 3, the display panel includes a plurality of sub-pixels sp and a plurality of data lines D extending in a first direction x, one data line D electrically connecting the plurality of sub-pixels sp arranged in the first direction x, and the driving method includes:
in the display process of a frame of picture, a plurality of data signals are input to a data line D, the data signals correspond to sub-pixels sp electrically connected with the data line D one by one, each data signal comprises a target voltage signal, and the target voltage signal is a voltage value for controlling the sub-pixels to display gray scales. One data line drives a plurality of sub-pixels, and when the sub-pixels are displayed, the sub-pixels receive corresponding target voltage signals to realize gray scale display.
Fig. 4 is a flowchart of a data signal input process in the driving method according to the embodiment of the invention. As shown in fig. 4, the input process of at least part of the data signal includes:
step S101: inputting a compensation voltage signal in a first stage, wherein the compensation voltage signal is used for compensating the delay of the data signal transmitted on the data line, the absolute value of the difference between the compensation voltage signal and the current voltage signal is a first difference, and the current voltage signal is the voltage signal input to the data line at the previous moment in the input process; when the input process of the data signal is the input process of the first data signal on the data line, the current voltage signal is the initial voltage signal on the data line. When the input process of the data signal is not the input process of the first data signal on the data line, the current voltage signal is the target voltage signal of the previous data signal.
Step S102: and inputting a target voltage signal at the second stage, wherein the absolute value of the difference between the target voltage signal and the current voltage signal is a second difference, and the first difference is larger than the second difference. That is, the voltage variation from the current voltage signal to the compensation voltage signal is greater than the voltage variation from the current voltage signal to the target voltage signal, and the compensation voltage signal is equivalent to an overcharge signal.
By adopting the driving method provided by the embodiment of the invention, the input process of the data signal is adjusted, the compensation voltage signal is firstly input for a period of time in the input process of the data signal, then the normal target voltage signal is recovered to be input, and when the data signal is transmitted on the data line, the delay caused by the resistance and the capacitance on the data line is compensated through the compensation voltage, so that the delay time can be shortened. At the stage that the pixel circuit drives the sub-pixels to emit light, the charging speed of the sub-pixels can be increased, the charging time is further shortened, the sub-pixels can be charged to the target potential, the sub-pixels are controlled to display accurate gray scales, and the display effect is improved.
The following describes an embodiment of the present invention with a specific input process of data signals. Fig. 5 is a first waveform diagram of data signals before and after compensation, and fig. 6 is a first waveform diagram of data signals received by the same sub-pixel before and after compensation of simulation test. In the diagram, the current voltage signal is 0V, that is, the voltage signal on the data line before the data signal is input is 0V, and the target voltage signal is 2V.
As shown in fig. 5 (a), when the output mode of the data signal is not improved, in the input process of the data signal, a 2V target voltage signal is directly input to the data line, that is, a 0V voltage signal input to the data line directly jumps to the input 2V target voltage signal, the input duration of the data signal is M, the 2V target voltage signal is continuously input to the data line within the duration M, and M is a positive number. In this case, the simulation test results in a timing chart of the data received by the sub-pixel, as shown in fig. 6(a'), the sub-pixel starts to calculate from the received data signal due to the delay of the data signal, and can be charged to near 2V after the time n1 has elapsed.
After the input process of the data signal is adjusted by using the driving method provided by the embodiment of the present invention, as shown in (b) of fig. 5, a 2.5V compensation voltage signal is input in the first stage, and the input time duration is t 1; then, in the second stage, a target voltage signal of 2V is input, and the input time length is t2, and t1+ t2 is equal to M. The absolute value of the difference between the compensation voltage signal and the current voltage signal is 2.5 (first difference), the absolute value of the difference between the target voltage signal and the current voltage signal is 2 (second difference), and the first difference is larger than the second difference. The simulation diagram obtained by adjusting the input mode of the data signal refers to the schematic diagram in fig. 6 (b'), and the sub-pixel is calculated from the received data signal due to the delay of the data signal, and can be charged to be close to 2V after the time of n2, and n2< n 1. That is, the delay of the data signal can be reduced by adopting the input mode of the data signal provided by the embodiment of the invention. The charging time of the data signal to the sub-pixel can be shortened, so that the sub-pixel can be charged to the target potential within a short data writing time, the sub-pixel driven by the data signal can be ensured to display an accurate gray scale, the brightness abnormity of the sub-pixel caused by data signal delay is improved, and the display effect of the display panel can be improved.
Further, in one embodiment, the compensation voltage signal includes a first compensation voltage signal and a second compensation voltage signal; the input process of at least part of the data signal comprises:
when the target voltage signal is larger than the current voltage signal, inputting a first compensation voltage signal in a first stage, wherein the first compensation voltage signal is larger than the target voltage signal; then, the target voltage signal is input in the second stage. For the target voltage signal larger than the current voltage signal, the compensation method may refer to the corresponding descriptions of fig. 5 and fig. 6. In this compensation method, when a voltage signal with a voltage value larger than that of the current data line needs to be input to the data line, a voltage signal with a voltage value larger than that of the current data line (i.e., a first compensation voltage signal) is input to the data line, and then a normal voltage signal (i.e., a target voltage signal) is input to the data line. Therefore, in the stage of driving the sub-pixels to emit light, the larger overcharge signal compensates the delay of the data signal on the data line, the delay time is shortened, the charging speed of the data signal on the sub-pixels is improved, the charging time is further shortened, the sub-pixels can be charged to the target potential, and the sub-pixels are controlled to display the accurate gray scale.
When the target voltage signal is smaller than the current voltage signal, a second compensation voltage signal is input in the first stage, and the second compensation voltage signal is smaller than the target voltage signal. The description is given with respect to a specific input process of the data signal. Fig. 7 is a schematic diagram of waveforms of data signals before and after compensation, and fig. 8 is a schematic diagram of waveforms of data signals received by the same sub-pixel before and after compensation of simulation test. In the diagram, the current voltage signal is 6V, that is, the voltage signal on the data line before the data signal is input is 6V, and the target voltage signal is 2V.
As shown in fig. 7 (a), when the output mode of the data signal is not improved, in the input process of the data signal, a 2V target voltage signal is directly input to the data line, that is, a 6V voltage signal input to the data line directly jumps to the input 2V target voltage signal, the input duration of the data signal is M, the 2V target voltage signal is continuously input to the data line within the duration M, and M is a positive number. In this case, the simulation test results in a timing chart of the data received by the sub-pixel, as shown in fig. 8(a'), the sub-pixel starts to calculate from the received data signal due to the delay of the data signal, and can be charged to near 2V after the time n3 has elapsed.
After the input process of the data signal is adjusted by using the driving method provided by the embodiment of the present invention, as shown in (b) of fig. 7, a compensation voltage signal of 0V is input in the first stage, and the input time duration is t 1; then, in the second stage, a target voltage signal of 2V is input, and the input time length is t2, and t1+ t2 is equal to M. The absolute value of the difference between the compensation voltage signal and the current voltage signal is 6 (first difference), the absolute value of the difference between the target voltage signal and the current voltage signal is 4 (second difference), and the first difference is larger than the second difference. The simulation diagram obtained by adjusting the input mode of the data signal is shown in fig. 8 (b'), and the sub-pixel is charged to approximately 2V after n4 time, and n4< n3, since the sub-pixel is calculated from the received data signal due to the delay of the data signal.
In this compensation method, when a voltage signal with a voltage value smaller than that of the current data line needs to be input to the data line, a voltage signal with a smaller voltage value (i.e., a second compensation voltage signal) is input to the data line, and then a normal voltage signal (i.e., a target voltage signal) is input to the data line. Therefore, in the stage of driving the sub-pixels to emit light, the smaller overcharge signal compensates the delay of the data signal on the data line, the delay time is shortened, the charging speed of the data signal on the sub-pixels is improved, the charging time is further shortened, the sub-pixels can be charged to the target potential, and the sub-pixels are controlled to display the accurate gray scale.
Further, in the driving method provided by the embodiment of the present invention, the inputting the compensation voltage signal in the first stage includes: the time length of the input compensation voltage signal is in negative correlation with a compensation value, wherein the compensation value is the absolute value of the difference value of the compensation voltage signal and the target voltage signal. The input process of a specific data signal is explained. Take the current voltage signal as 0V and the target voltage signal as 2V as an example. Fig. 9 is a schematic waveform diagram of data signals before and after compensation in a first compensation method, and fig. 10 is a schematic waveform diagram of data signals before and after compensation in a second compensation method.
As shown in (a) of fig. 9, when the output mode of the data signal is not improved, in the input process of the data signal, the input time period of the data signal is M, and the target voltage signal of 2V is continuously input to the data line for the time period M. The data signal is compensated by the first compensation method, and the waveform of the compensated data signal is as shown in fig. 9 (b), a compensation voltage signal of 3V is input in the first stage of time duration t11, and then a target voltage signal of 2V is input in the second stage of time duration t21, where t11+ t21 is equal to M. In the first compensation method, the compensation value is |3-2| ═ 1.
As shown in (a) of fig. 10, when the output mode of the data signal is not improved, the input time period of the data signal is M during the input process of the data signal, and the target voltage signal of 2V is continuously input to the data line for the time period M. The data signal is compensated by the second compensation method, and the waveform of the compensated data signal is as shown in (b) of fig. 10, a compensation voltage signal of 2.5V is input in the first stage of time duration t12, and then a target voltage signal of 2V is input in the second stage of time duration t22, where t12+ t22 is equal to M. Wherein t12> t11, t22< t 21. In the second compensation method, the compensation value is 0.5 to 2 |.
In the driving method provided by the embodiment of the invention, the larger the compensation value is set, the shorter the input time of the compensation voltage signal is, so that the delay of the data signal can be compensated by inputting the compensation voltage signal in the input process of the data signal, and the excessive compensation can be avoided, thereby avoiding the abnormal brightness of the sub-pixels caused by the excessive compensation. Fig. 11 is a waveform diagram of a data signal received by a sub-pixel after overcompensation. As shown in fig. 11, the input duration and the compensation value of the compensation data signal in the first stage are not matched, so that the input compensation data signal causes an overcompensation for the delay of the data signal, and after the data signal is transmitted to the sub-pixel, the sub-pixel is charged to a higher potential, which is higher than 2V, so that the charged potential of the sub-pixel is higher than the target potential, and the luminance of the sub-pixel is lower. The embodiment of the invention sets the time length of the input compensation voltage signal and the compensation value to be in negative correlation, ensures that the input time length of the compensation voltage signal and the compensation value are matched with each other, ensures that the compensation voltage signal can carry out proper compensation on the delay of the data signal on the data line, shortens the delay time, and simultaneously avoids the abnormal brightness of the sub-pixel caused by the excessive compensation caused by the delay.
Further, the present invention studies the compensation time of the compensation voltage signal, i.e., the input duration in the first stage. In the display panel, a data line drives a plurality of sub-pixels in a column, the data line includes a data signal input terminal and a plurality of data signal output terminals, the position of the sub-pixel is the position of the data signal output terminal, that is, the data output terminals correspond to the data signals one to one. The data lines between each data output end and the data input end form a resistor-capacitor circuit, and the resistor-capacitor delay in the resistor-capacitor circuit causes delay when the data signals are transmitted on the data lines.
According to the delay formula of the resistor-capacitor circuit, the delay time is-R C ln ((E-V)/E), where R is the resistance in the circuit, C is the capacitance in the circuit, ln is the natural logarithm, the voltage between the resistor R and the capacitance C in series, and V is the voltage to be achieved.
According to the above delay equation, the capacitor in the circuit is charged to Vu from the initial V0, and then: vt is V0+ (Vu-V0) (-1-exp (-t/R C)), where Vt is the voltage across the capacitor at any time t. V0 is the initial voltage value on the capacitor. In the case where the data line applied between the data output and the data input constitutes a resistor-capacitor circuit, the voltage reference is set to 0V for ease of calculation, i.e., V0 is 0, because the dc component does not contribute to the capacitor-resistor delay.
The data lines applied between the data output terminal and the data input terminal form a resistor-capacitor circuit, and a time constant τ ═ R × C is defined, where R is the total resistance of the resistor-capacitor circuit and C is the total capacitance of the resistor-capacitor circuit. The above formula is further simplified as:
Vt=Vu*(1-exp(-t/τ))
it should be noted that, on a data line, a resistor-capacitor circuit is formed between a data input terminal and a data output terminal, and there are different resistor-capacitor circuits corresponding to different data output terminals. And corresponding to different resistor-capacitor circuits, because R and C are different, corresponding to different resistor-capacitor circuits, the time constant tau is different.
In the driving method provided in the embodiment of the present invention, the data signal input to the data line includes: the compensation voltage signal is input in the first stage, and the target voltage signal is input in the second stage. And calculating the voltage (including the target voltage waveform + the compensation voltage waveform) condition at each moment, wherein the compensated data waveform is required to be close to the target voltage signal but not larger than the target voltage signal, namely the voltage signal written by the final sub-pixel cannot be larger than the target voltage signal.
In the embodiment of the invention, the compensation voltage signal with the time length of T is input in the first stage. The absolute value of the difference between the target voltage signal and the current voltage signal is represented by Δ U, the compensation value of the compensation voltage signal is represented by k × Δ U, the absolute value of the difference between the compensation voltage signal and the target voltage signal is a compensation value U ', and the compensation value U' is the compensation value of the compensation voltage signal. Wherein k is a compensation coefficient of the compensation voltage signal. During calculation, when the time T is equal to the time T, the voltage value to which the compensation voltage signal can charge the capacitor at the time T is directly calculated, and when the time T is greater than the time T, the charged voltage value decreases within the time after the time T until the voltage is 0V.
When T is 0.5 τ.
At the time t is 0.5 τ, Vt is 0.39 Δ U +0.39 k Δ U < Δ U, and k <1.56 is calculated;
at time t 1.5 τ, Vt ═ 0.77 Δ U + (0.39 × k Δ U-0.39 × 0.63 × k Δ U) < Δ U, calculated as k < 1.59;
at time t 2.5 τ, Vt ═ 0.92 Δ U + (0.39 × k Δ U-0.39 × 0.86 × k Δ U) < Δ U, calculated as k < 1.46;
at time t 3.5 τ, Vt ═ 0.97 Δ U + (0.39 × k Δ U-0.39 × 0.95 × k Δ U) < Δ U, and k is calculated to be < 1.54.
In summary, when the input duration T of the compensation voltage signal is 0.5 times of the time constant, the compensation value U' is less than Δ U which is 1.46 times, otherwise, when the sub-pixel is charged by using the data signal input method provided by the embodiment of the present invention, the sub-pixel is excessively charged, and the luminance of the sub-pixel is abnormal.
When T ═ τ.
At time t τ, Vt is 0.63 Δ U +0.63 k Δ U < Δ U, calculated as k < 0.58;
at time t2 τ, Vt ═ 0.86 Δ U + (0.63 × k Δ U-0.63 × k Δ U) < Δ U, calculated as k < 0.6;
at time t 3 τ, Vt is 0.63 Δ U + (0.63 × k Δ U-0.63 × 0.86 × k Δ U) < Δ U, calculated as k <0.56
In summary, when the input duration T of the compensation voltage signal is 1 time constant, the compensation value U' is less than Δ U which is 0.56 time, otherwise, when the sub-pixel is charged by using the data signal input method provided by the embodiment of the present invention, the sub-pixel is overcharged, and the luminance of the sub-pixel is abnormal.
When T is 2 τ.
At time t τ, Vt is 0.63 Δ U +0.63 k Δ U < Δ U, calculated as k < 0.58;
at time t2 τ, Vt is 0.86 Δ U +0.86 k Δ U < Δ U, calculated as k < 0.16;
at time t 3 τ, Vt ═ 0.95 Δ U + (0.86 × k Δ U-0.86 × 0.63 × k Δ U) < Δ U, calculated as k < 0.15;
in summary, when the input duration T of the compensation voltage signal is 0.5 times of the time constant, the compensation value U' is less than Δ U which is 0.15 times, otherwise, when the sub-pixel is charged by using the data signal input method provided by the embodiment of the present invention, the sub-pixel is excessively charged, and the luminance of the sub-pixel is abnormal.
When T is 3 tau,
at time t τ, Vt is 0.63 Δ U +0.63 k Δ U < Δ U, calculated as k < 0.58;
at time t2 τ, Vt is 0.86 Δ U +0.86 k Δ U < Δ U, calculated as k < 0.16;
at time t 3 τ, Vt is 0.95 Δ U +0.95 × k Δ U < Δ U, calculated as k < 0.05;
at time t 4 τ, Vt ═ 0.95 Δ U + + (0.95 × k Δ U-0.95 × 0.63 × k Δ U) < Δ U, calculated as k < 0.05;
in summary, when the input duration T of the compensation voltage signal is 3 times of the time constant, the compensation value U 'is less than Δ U0.05 times, and considering that the compensation value U' is only 5% of Δ U at this time, the difference between the compensation voltage signal and the target voltage signal is very small, which means that the voltage is basically unchanged, and there is basically no compensation effect on the delay.
Through the above reasoning studies, the embodiment of the present invention provides a driving method, and fig. 12 is a flowchart of an alternative implementation manner of the data signal input process in the driving method provided by the embodiment of the present invention, as shown in fig. 12,
step S201: and inputting a compensation voltage signal with the time length of T in the first stage, wherein T is more than or equal to 0.5 tau and less than or equal to 3 tau, and tau is a time constant.
Step S102: and inputting a target voltage signal at the second stage, wherein the absolute value of the difference between the target voltage signal and the current voltage signal is a second difference, and the first difference is larger than the second difference.
Wherein τ ═ R ═ C. When the method is applied to the input process of the data signal corresponding to each data output end, because the input end of the data signal and each data output end form a specific resistor-capacitor circuit, the resistor R and the capacitor C are different corresponding to each resistor-capacitor circuit and are different at tau. Optionally, the input duration T of the respective compensation voltage signal may be set correspondingly for each data output end on one data line (that is, for each sub-pixel electrically connected to the data line). Optionally, a plurality of sub-pixels electrically connected to one data line may be grouped, and m sub-pixels adjacent in sequence form a group of input durations T sharing one compensation voltage signal.
By adopting the driving method provided by the embodiment, the input duration of the compensation voltage signal is limited to 0.5 tau to 3 tau, the delay of the data signal on the data line can be compensated by adopting the compensation voltage signal, the delay time is shortened, the charging speed of the sub-pixel is increased, the charging time is further shortened, the sub-pixel can be charged to the target potential, and the sub-pixel is controlled to display an accurate gray scale. Meanwhile, the phenomenon that the sub-pixel brightness is abnormal after the sub-pixel is overcharged due to excessive compensation caused by too long input time of a compensation voltage signal can be avoided.
In some alternative embodiments, a compensation voltage signal of duration T is input during the first phase, where T is 1 τ ≦ 2 τ. In practice, the appropriate input duration T can be selected to compensate the data delay according to the specific product requirements, the specific display screen, and the position of the data output end corresponding to the data signal in the display area.
Further, in one embodiment, the plurality of data signals includes a first data signal and a second data signal, a data output terminal corresponding to the first data signal is a first distance from the data input terminal, a data output terminal corresponding to the second data signal is a second distance from the data input terminal, and the first distance is greater than the second distance; referring to fig. 13, fig. 13 is a schematic diagram of a display panel capable of displaying by applying the driving method provided by the embodiment of the invention, in which the data input end DD, the data output end OUT1 (corresponding to sub-pixel sp1) and the data output end OUT2 (corresponding to sub-pixel sp2) are illustrated, the data output end OUT1 corresponds to a first data signal, and the data output end OUT2 corresponds to a second data signal, and it can be seen that the distance from the data output end OUT1 to the data input end is greater than the distance from the data output end OUT2 to the data input end.
In a frame picture display process, inputting a plurality of data signals to a data line, comprising:
inputting a first data signal to the data line, wherein a compensation voltage signal with a time duration of T1 is input in a first stage;
inputting a second data signal to the data line, wherein a compensation voltage signal having a time duration of T2 is inputted in the first stage, T1> T2.
It should be noted that, since the compensation voltage signal is related to the target voltage signal in the data signal and the current voltage signal on the data line before the data signal is input. Therefore, when data signals are actually input to the data lines, the magnitude of the compensation voltage signal in the first data signal and the magnitude of the compensation voltage signal in the second data signal need to be set according to specific display requirements.
Corresponding to the illustration in fig. 13, the input duration of the compensation voltage signal in the data signal corresponding to the sub-pixel sp1 is longer than the input duration of the compensation voltage signal in the data signal corresponding to the sub-pixel sp2, that is, the data output terminal farther from the data input terminal is longer than the input duration of the compensation voltage signal in the data signal corresponding to the data output terminal. Wherein the farther the data output is from the data input, the longer the delay in the resistor-capacitor circuit formed with the data input. According to the embodiment, the compensation of the compensation voltage signal for the delay is increased by increasing the input duration of the compensation voltage signal, so that the delay of the data signal corresponding to each data output end on one data line can be improved, the charging speed of the data signal for the sub-pixels is increased, each sub-pixel electrically connected with the data line can display an accurate gray scale, and the display effect of the panel is improved.
Through the above reasoning and research, the embodiment of the present invention further provides a driving method, where an absolute value of a difference between the compensation voltage signal and the target voltage signal is a compensation value U', where U ═ k × Δ U, Δ U is a second difference, k is a compensation coefficient of the compensation voltage signal, and k is greater than or equal to 0.05 and less than or equal to 1.45.
The application of the driving method provided in this embodiment is described with an input process of a data signal, where a target voltage signal of the data signal is 3V, a current voltage signal on a data line before the data signal is input is 5V, and then a second difference value, that is, an absolute value of a difference between the target voltage signal and the current voltage signal is 2, and then Δ U is 2. Alternatively, the compensation factor K is selected to be 1, and the compensation value U' 1 × 2 is 1V. In this example, if the target voltage signal is smaller than the current voltage signal, the compensation voltage signal is set to be smaller than the target voltage signal, and the compensation voltage signal is 3-1-2V. That is, with the method provided in this embodiment, the input process of the data signal includes: inputting a 2V compensation voltage signal in a first stage; in the second stage, a target voltage signal of 3V is input. By adopting the driving method provided by the embodiment, the compensation coefficient of the compensation voltage signal is set within a certain range, so that the compensation effect on the delay caused by too small compensation coefficient is poor, even no compensation effect is generated, and the excessive compensation caused by too large compensation coefficient on the delay caused by the compensation voltage signal is avoided, and the brightness of the sub-pixel is further deviated due to the excessive compensation. According to the embodiment, a proper compensation voltage signal can be determined by selecting a reasonable compensation coefficient according to specific display requirements, proper compensation is carried out on the delay of the data signal, the delay time is shortened, the charging speed of the sub-pixel can be increased, the charging time is further shortened, the sub-pixel can be charged to a target potential, and therefore the sub-pixel is controlled to display an accurate gray scale.
Further, k is more than or equal to 0.15 and less than or equal to 0.56. In practice, a suitable compensation coefficient can be selected to compensate the data delay according to the specific product requirement, the specific display picture and the position of the data output end corresponding to the data signal in the display area.
Further, in an embodiment, the plurality of data signals includes a first data signal and a second data signal, as can be seen with reference to the schematic of fig. 13, where the data output terminal OUT1 corresponding to the first data signal is a first distance from the data input terminal DD and the data output terminal OUT2 corresponding to the second data signal is a second distance from the data input terminal DD, the first distance being greater than the second distance;
in a frame picture display process, inputting a plurality of data signals to a data line, comprising:
inputting a first data signal to a data line, wherein a first compensation voltage signal is input in a first stage, a compensation value corresponding to the first compensation voltage signal is U1 ', U1' is k1 × Δ U1, k1 is a compensation coefficient of the first compensation voltage signal, and Δ U1 is a second difference value corresponding to the first data signal;
and inputting a second data signal to the data line, wherein a second compensation voltage signal is input in the first stage, the compensation value corresponding to the second compensation voltage signal is U2 ', U2' is k2 × Δ U2, k2 is a compensation coefficient of the second compensation voltage signal, Δ U2 is a second difference corresponding to the second data signal, and k1> k 2.
It should be noted that the second difference is an absolute value of a difference between the target voltage signal and the current voltage signal, and in one frame of image display, the target voltage signal in the data signal corresponding to one data output end (i.e. one sub-pixel) is fixed, and the current voltage signal on the data line before the data signal is input (i.e. the target voltage signal in the previous data signal) is also fixed. The first data signal has a second difference value corresponding thereto and the second data signal has a second difference value corresponding thereto.
In this embodiment, corresponding to the illustration in fig. 13, the compensation coefficient (k1) of the compensation voltage signal in the data signal corresponding to the sub-pixel sp1 is greater than the compensation coefficient (k2) of the compensation voltage signal in the data signal corresponding to the sub-pixel sp2, that is, the compensation coefficient of the compensation voltage signal in the data signal corresponding to the data output terminal is greater the further away from the data input terminal. Wherein the farther the data output is from the data input, the longer the delay in the resistor-capacitor circuit formed with the data input. According to the embodiment, the compensation coefficient of the compensation voltage signal is increased to increase the compensation of the compensation voltage signal to the delay, so that the delay of the data signal corresponding to each data output end on one data line can be improved, the charging speed of the data signal to the sub-pixel is increased, each sub-pixel electrically connected with the data line can display an accurate gray scale, and the display effect of the panel is improved.
Further, in an embodiment, during a display of one frame, a plurality of data signals are input to one data line, further comprising: the partial data signal input process comprises the following steps: when the target voltage signal is equal to the current voltage signal, the target voltage signal is continuously input to the data line.
The input process of a data signal is described, in which the target voltage signal is 3V, and the voltage signal input on the data line at the previous time of the data signal input process, that is, the current voltage signal is 3V. The target voltage signal is continuously input in the input process of the data signal, and in this case, since the current voltage signal is the same as the target voltage signal, there is no jump in the voltage signal on the data line, and there is no delay when the target voltage signal is input to the corresponding data output terminal. The embodiment of the invention does not perform delay compensation on the target voltage signal under the condition, thereby avoiding the abnormal brightness of the sub-pixel caused by the overcharge of the sub-pixel due to the overcompensation.
Further, in the embodiment of the present invention, the input duration of the first stage is t1, and the input duration of the second stage is t2, where t1/(t1+ t2) is 0.1 ≦ 0.5. Wherein, t1+ t2 is the total time length of a data signal input, and the input time length of the compensation voltage signal is set to be not too large in the total time length, so as to avoid the over-compensation of the compensation voltage signal to the delay, which causes the data signal to over-charge the sub-pixel, and causes the brightness of the sub-pixel to be abnormal. Meanwhile, the ratio of the input duration of the compensation voltage signal in the total duration cannot be too small, so that the compensation voltage signal has an obvious compensation effect on delay, and the sub-pixels can display accurate gray scale brightness.
Based on the same inventive concept, an embodiment of the present invention further provides a display panel, and fig. 14 is a schematic view of the display panel provided in the embodiment of the present invention. The display panel provided by the embodiment of the invention can display by adopting the driving method provided by any embodiment.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.