CN103198803B - The driving control unit of a kind of display base plate, drive circuit and driving control method - Google Patents
The driving control unit of a kind of display base plate, drive circuit and driving control method Download PDFInfo
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- CN103198803B CN103198803B CN201310101057.6A CN201310101057A CN103198803B CN 103198803 B CN103198803 B CN 103198803B CN 201310101057 A CN201310101057 A CN 201310101057A CN 103198803 B CN103198803 B CN 103198803B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
Abstract
The invention discloses the driving control unit of a kind of display base plate, drive circuit and drive control method, including time schedule controller and delay controller, described time schedule controller is to delay controller transmission timing control signal, the impedance of the delay controller drive signal line for being connected according to the pixel of described display base plate, regulate described timing control signal, in the range of making the actual charging duration of pixel be in default duration.The present invention is according to the timing control signal of the position change pixel of pixel on liquid crystal panel, the timing control signal making diverse location pixel is different, control signal with different timings, compensate the charging interval error caused due to holding wire delay, it is ensured that the pixel charging effect concordance of liquid crystal panel diverse location.
Description
Technical field
The invention belongs to Display Technique field, the driving control unit of a kind of display base plate,
Drive circuit and driving control method.
Background technology
Traditional liquid crystal panel drives framework to include source electrode driver and gate drivers, source electrode
Driver and gate drivers when driving the pixel of panel diverse location, the sequential control of employing
Signal processed is consistent, i.e. the near point of distance sources driver and gate drivers and far point picture
Vegetarian refreshments uses identical timing control signal, and the pixel of every a line is driven by gate drivers
Time, the time that data wire loads deflection voltage is fixing, and with in a line pixel
The time that the pixel of diverse location is opened is fixing.
Owing to liquid crystal panel operational characteristic limits, connect and deposit between near point and the holding wire of far point
In certain impedance, gate drivers and source electrode driver is caused to load same signal,
The performance of near point, inconsistent with far point performance after holding wire postpones, cause near point
With far point use as timing control signal time, the not phase of actual charging interval of pixel
With, the pixel charging effect causing diverse location on panel is different, and picture uniformity is subject to
To impact.In large size panel, the impedance existed due to holding wire is bigger, this problem meeting
Become apparent from；And, it is not only liquid crystal panel, utilizes other classes of thin film transistor (TFT) array
The display base plate of type there is also this problem.
Summary of the invention
The problem existed for prior art, it is an object of the invention to provide a kind of according to pixel
Each pixel timing control signal on some position adjustment panel, to improve the display of picture uniformity
The driving control unit of substrate, drive circuit and driving control method.
For achieving the above object, the driving control unit of the display base plate of the present invention, including sequential
Controller and delay controller, wherein:
Described time schedule controller is for described delay controller transmission timing control signal；
Described delay controller is for the driving connected according to the pixel of described display base plate
The impedance of holding wire, regulates described timing control signal, makes the actual charging duration of pixel
In the range of being in default duration.
Further, described delay controller is for being connected according to the pixel of described display base plate
The impedance of drive signal line, regulate described timing control signal, refer to:
Described delay controller is connected according between described pixel with pixel display driver
The length of drive signal line and resistivity, regulate described timing control signal.
Further, described delay controller is for regulating described sequencing contro letter in the following manner
Number:
On the basis of the timing control signal of the on display floater first pixel, according to described display
The drive signal line that the second pixel on panel is connected with between described pixel display driver
Impedance be connected with between described first pixel with described pixel display driver driving letter
The difference of the impedance of number line, regulates the timing control signal of described second pixel relative to institute
State the time delay of the first pixel timing control signal.
Further, described first pixel is that on display floater, range pixel display driver is farthest
Pixel, referred to as pixel far point；Described second pixel is except described on described display floater
Any pixel beyond pixel far point.
Further, described delay controller is for regulating described sequencing contro letter in the following manner
Number:
On the basis of the timing control signal of described pixel far point, first regulation is same with pixel far point
The time delay of the timing control signal of the second pixel of row, rear regulation and described pixel far point
Time delay of timing control signal with the second pixel of string.
Further, described delay controller is for regulating described sequencing contro letter in the following manner
Number:
On the basis of the timing control signal of the on display floater first pixel, regulate described sequential
Control signal makes the time delay of the timing control signal of described second pixel and described impedance
Difference size be directly proportional.
Further, described pixel display driver refers to gate drivers or source electrode driver.
Further, a preset duration value is included in the range of described default duration.
The drive circuit of the display base plate of the present invention, including above-mentioned driving control unit.
The driving control method of the display base plate of the present invention, in the driving means of described display base plate
Including time schedule controller and delay controller；Described method includes:
Make described time schedule controller to described delay controller transmission timing control signal；
Make the driving letter that described delay controller is connected according to the pixel of described display base plate
The impedance of number line regulates described timing control signal, makes the actual charging duration of pixel be in
In the range of the duration preset.
Further, described delay controller regulates described timing control signal, including:
On the basis of the timing control signal of the on display floater first pixel, according to described display
The drive signal line that the second pixel on panel is connected with between described pixel display driver
Impedance be connected with between described first pixel with described pixel display driver driving letter
The difference of the impedance of number line, regulates the timing control signal of described second pixel relative to institute
State the time delay of the first pixel timing control signal.
Further, described timing control signal is gate-driver control signal, and described grid drives
Dynamic device control signal controls the thin film transistor (TFT) opening time of pixel, and described delay controller leads to
Overregulating the described thin film transistor (TFT) opening time regulates the sequencing contro of described second pixel
Signal is relative to the time delay of described first pixel timing control signal；Or,
Described timing control signal is source electrode driver control signal, and described source electrode driver controls
Signal controls the deflection voltage load time of pixel, and described delay controller is described by regulation
The deflection voltage load time regulates the timing control signal of described second pixel relative to institute
State the time delay of the first pixel timing control signal.
Further, described timing control signal is pulse signal.
Further, the step of the described timing control signal of described delay controller regulation is: with aobvious
Show on substrate on the basis of the timing control signal of the first pixel, according on described display base plate
The impedance of the drive signal line being connected between the second pixel with described pixel display driver with
The resistance of the drive signal line being connected between described first pixel with described pixel display driver
Anti-difference, regulates the timing control signal of described second pixel relative to described first picture
The time delay of vegetarian refreshments timing control signal.
Further, described first pixel is that on display floater, range pixel display driver is farthest
Pixel, referred to as pixel far point；Described second pixel is except described on described display floater
Any pixel beyond pixel far point.
Further, described delay controller is for regulating described sequencing contro in the following manner
Signal:
On the basis of the timing control signal of described first pixel, first regulation and the first pixel
Time delay of timing control signal with second pixel of a line；And/or, with described
On the basis of the timing control signal of one pixel, regulation and described first pixel are with the of string
The time delay of the timing control signal of two pixels.
Further, described delay controller is for regulating described sequencing contro letter in the following manner
Number:
On the basis of the timing control signal of the on display floater first pixel, regulate described sequential
Control signal makes the time delay of the timing control signal of described second pixel and described impedance
Difference size be directly proportional.
The present invention is according to the sequencing contro letter of the position change pixel of pixel on liquid crystal panel
Number, the timing control signal making diverse location pixel is different, controls letter with different timings
Number, compensate the charging interval error caused due to holding wire delay, it is ensured that liquid crystal panel not coordination
The pixel charging effect concordance put.
Accompanying drawing explanation
Fig. 1 is the structural representation of available liquid crystal panel；
The gate drivers of the delay controller that Fig. 2 is provided by embodiment of the present invention controls letter
Number, the input of source electrode driver control signal, output schematic diagram；
Fig. 3 is the delay of the gate drivers holding wire of A, B, C 3 on liquid crystal panel in Fig. 1
Time comparison diagram；
Fig. 4 is the delay of the source electrode driver holding wire of A, D, E 3 on liquid crystal panel in Fig. 1
Time comparison diagram；
Fig. 5 be after delay controller regulates actual charging interval pair of A, B, C 3
Than figure；
Fig. 6 be after delay controller regulates actual charging interval pair of A, D, E 3
Than figure.
Detailed description of the invention
Below in conjunction with the accompanying drawings and embodiment, the detailed description of the invention of the present invention is made the most in detail
Describe.Following example are used for illustrating the present invention, but do not limit the scope of the invention.
Present embodiments provide for the embodiment of the driving control unit of a kind of display base plate, this drives
Dynamic control unit includes time schedule controller and delay controller, wherein:
Described time schedule controller is for described delay controller transmission timing control signal；
Described delay controller is used for: the driving connected according to the pixel of described display base plate
The impedance of holding wire, regulates described timing control signal, makes the actual charging duration of pixel
In the range of being in default duration.
Due to the difference of the pixel arrangement position on display base plate, cause it to show with pixel and drive
The length of the drive signal line between dynamic device is different, or because of metal material, Composition Design etc. because of
The resistivity contrasts that element causes so that the resistance on drive signal line that different pixels is connected
Anti-difference, the time delay of the charging signals that the most different pixels obtains is different, finally leads
Cause display effect heterogeneity.And in the present embodiment, described delay controller is according to described display base
The impedance of the drive signal line that the pixel of plate is connected, is carried out described timing control signal
Regulation, makes the actual charging duration of each pixel reach unanimity, i.e. to be default filling
Electricity duration value, or have acceptable range of error with this charging duration value preset, i.e. place
In the range of default duration.
Thus, control signal the most with different timings, compensate for charging interval difference, it is ensured that
The concordance of the pixel charging effect of diverse location on display base plate.
Present embodiment additionally provides the drive circuit of a kind of display base plate, including as above
Drive control unit.
It is noted, that embodiments of the present invention are not limited to display panels, also can answer
Display base plate for other kinds of use thin-film transistor array base-plate；Described pixel shows
Driver can be that gate drivers can also be for source electrode driver, when the resistance difference on grid line
Time bigger, the only delay to gate drive signal compensates, and is can to solve because of charging delay
The problem that the pixel display effect that difference causes is uneven；In like manner, when the impedance contrast on data wire
Different bigger time, the only delay to source drive signal compensates, it is also possible to solve because of charging prolong
The problem of the pixel display effect inequality that difference causes late；Certainly, to gate drivers and source electrode
The delay driving signal all compensates, it is possible to preferably solve this problem, and specifically to each picture
The order that vegetarian refreshments compensates, the selection of pixel to be compensated (all compensate or part
Compensate, and compensate which pixel) mode do not limit, all modes contained all can
Solving above-mentioned technical problem, therefore its technical scheme contained is all in the claims in the present invention
Within protection domain.
Below, the preferred embodiment of the various situations that the present invention by enumerating is applied, wherein,
Preferably liquid crystal panel is as the preferred embodiment of display base plate；Select source electrode driver 1 and grid
Driver 2 is as the preferred embodiment of described pixel display driver；Further, enumerate preferably
Pixel compensation order and execution step are introduced, and embodiment of the present invention is not limited to these orders
And step.
As it is shown in figure 1, be the structural representation of existing liquid crystal panel；Liquid crystal panel includes source
Driver 1, gate drivers 2 and multiple pixel, the control letter of gate drivers 2 output
Number control each pixel the thin film transistor (TFT) opening time；The control of source electrode driver 1 output
Signal processed controls the deflection voltage load time of each pixel；By controlling source electrode driver
The control signal of 1 output and (e.g., the pixel on opportunity of the control signal of gate drivers 2 output
Opening time, or deflection voltage load time of the opening time of pixel and corresponding pixel points
Overlapping time), it is possible to pixel is charged.Do not considering signal on liquid crystal panel
In the case of the impedance of line, gate drivers 2 and source electrode driver 1 load same control
During signal, on liquid crystal panel, the charging interval of all pixels is the most identical, and charging effect is consistent.
But, in reality, the technique by liquid crystal panel is limited, connect with a line and with string pixel it
Between holding wire all there is certain impedance, if at gate drivers 2 and source electrode driver 1
The control signal that upper loading is same, can cause the pixel charging effect of diverse location on panel
Difference, picture uniformity is affected.In large size panel, the resistance existed due to holding wire
Anti-bigger, this problem can become apparent from.Such as: as it is shown in figure 1, for same on liquid crystal panel
Tri-pixels of A, B, C of a line, owing to gate drivers 2 control signal is at glass substrate
Delay on cabling, the thin film transistor (TFT) opening time causing each point is different, as it is shown on figure 3,
I.e. t1 > t2 > t3, if source electrode driver 1 control signal is constant, can make the reality of A, B, C 3
The border charging interval is different, and the level of charge causing three position pixels is different.In like manner, for
With tri-pixels of A, D, E of string on liquid crystal panel, owing to source electrode driver 1 controls letter
Delay number on glass substrate cabling, causes 3 deflection voltage load times of A, D, E not
With, as shown in Figure 4, i.e. t4 > t5 > t6, if gate drivers 2 control signal is constant, also can
The actual charging interval making A, D, E 3 is different, causes the charging journey of three position pixels
Degree difference.
Send out as in figure 2 it is shown, grid control signal and source control signal are original temporal controller
The signal gone out, grid control signal ' and source control signal ' for regulate it through delay controller
After signal.The wherein pixel charging of grid control signal each pulse correspondence a line, low level
The time opened for grid, regulate the low level time by delay controller thus change difference
The row pixel gates opening time.Source control signal each pulse respective pixel deflection voltage loads
Time, in advance or delay pulse signal by delay controller, control pixel deflection voltage what
Time be loaded into liquid crystal two ends.
As a example by grid control signal, original grid control signal enters in delay controller,
It is divided into the delay unit signal of very small pulse width, and is set by internal register every
A line needs the quantity of the delay unit signal of superposition, by internal clock signal superposition, reaches
The purpose controlled respectively to the clock signal of different rows.In like manner can obtain the time delay of source control signal
Control principle.Through delay controller regulate after signal, as it can be seen in figures 5 and 6, A, B,
The actual charging interval of C 3 and A, D, E 3 is identical.
Embodiment 1
If as it is shown in figure 1, on liquid crystal panel the scanning sequency of grid line and data wire be from a left side to
If right, order from top to bottom, last column on liquid crystal panel, the pixel of last string
F and the first row on liquid crystal panel, the charging interval difference of the pixel A of first row is maximum, because of
This, it is preferable that delay controller with on liquid crystal panel at a distance of source electrode driver and gate drivers
On the basis of the timing control signal of farthest pixel far point F, it is adjusted, preferably regulative mode
As follows:
According to the second pixel on described display base plate and institute between described pixel display driver
The impedance of the drive signal line connected and described first pixel and described pixel display driver
Between the difference of the impedance of drive signal line that connected according between pixel far point F and source electrode driver
The impedance of the drive signal line connected and it is with institute between the pixel of a line and source electrode driver
The difference regulation of the impedance of the drive signal line connected and pixel far point F are with the pixel of a line
The time delay of timing control signal, the impedance differences between pixel E and pixel far point F is maximum,
Need to adjust the time delay of the timing control signal of pixel E column, make pixel E institute
Timing control signal at row is later than the timing control signal output of pixel far point F column, from
And owing to gate-driver control signal is on glass substrate cabling between retrieved image vegetarian refreshments E and F
Delay.Pixel between pixel E, F and the impedance differences between pixel F are less than pixel
Point E and pixel F between impedance differences, it is therefore desirable to delay compensation the most relatively small, need to press
According to time delay of timing control signal and pixel far point F between with other pixel of a line
The proportional relation of impedance differences size is adjusted；
Then further according to pixel far point F and it is with impedance differences size adjustment between the pixel of string
With pixel far point F with time delay of the timing control signal of the pixel of string, pixel C
And impedance differences is maximum between pixel far point F, need to adjust the sequencing contro that pixel C is expert at
The time delay of signal, the timing control signal making pixel C be expert at is later than pixel far point F
The timing control signal output being expert at, thus drive due to source electrode between retrieved image vegetarian refreshments C and F
Dynamic device control signal delay on glass substrate cabling.Pixel between pixel C, F
And between pixel F, the difference of impedance is less than impedance differences between pixel C and pixel F, therefore needs
The delay compensation wanted is the most relatively small, need to be remote with pixel according to the time delay of timing control signal
Point F proportional relation of impedance differences size away between other pixel of same a line is adjusted.Finally
Regulation is basically identical with the pixel far point F charging interval to the charging interval of all pixels, then adjust
Save complete；
It should be noted that, above-mentioned regulative mode is only preferred embodiment, the embodiment party of the present invention
Formula is not limited to this kind of regulative mode, such as, is not limited to the timing control signal only with F point
It is adjusted as benchmark, it is also possible to select other pixel to be adjusted, as long as by panel
In charging interval of all of pixel or major part pixel be adjusted to identical or basic one
Cause；It is also not limited to be all to be adjusted by all of pixel, as long as can reach to connect
The concordance effect being subject to, concrete degree of consistency those skilled in the art can be as required
It is controlled；Owing to scan mode has multiple, however it is not limited to from top to bottom, from left to right, because of
This present embodiment is also not necessarily limited to compare the pixel in the upper left corner and the pixel in the lower right corner
Right, as long as walk line impedence, the priority of scanning sequency and filling of causing because of grid line or data wire
Electricity time discrepant two pixels, can be carried out comparison thus carry out its charging interval
Regulation, finally realizes the purpose that the pixel charging interval of counter plate is adjusted, thus improves
The concordance of display, promotes display effect.
Following example are to select different regulation order, select different pixels as benchmark
Situation about being adjusted during point.
Embodiment 2
As it is shown in figure 1, last column on liquid crystal panel, the pixel F of last string and liquid crystal surface
The first row on plate, the charging interval difference of the pixel A of first row is maximum, delay controller with
At a distance of source electrode driver and the sequential control of the farthest pixel far point F of gate drivers on liquid crystal panel
On the basis of signal processed, according to pixel far point F and it is with impedance differences big between the pixel of string
Minor adjustment and pixel far point F with the time delay of the timing control signal of the pixel of string, as
Between vegetarian refreshments C and pixel far point F, impedance differences is maximum, needs to adjust the sequential that pixel C is expert at
The time delay of control signal, it is remote that the timing control signal making pixel C be expert at is later than pixel
The timing control signal output that some F is expert at, thus due to source electrode between retrieved image vegetarian refreshments C and F
The delay on glass substrate cabling of the driver control signal.Pixel between pixel C, F
Between point and pixel F, the difference of impedance is less than the difference of impedance between pixel C and pixel F, because of
This delay compensation needed is the most relatively small, need to according to the delay of gate-driver control signal time
Between and pixel far point F proportional relation of difference size of impedance away between other pixel of same a line enter
Row regulation.Then further according to pixel far point F and its with impedance between the pixel of a line difference adjust
Joint and pixel far point are with time delay of the timing control signal of the pixel of a line, pixel E
At a distance of between pixel far point F, the difference of impedance is maximum, needs to adjust the sequential control of pixel E column
The time delay of signal processed, the timing control signal of pixel E column is made to be later than pixel far point F
The sequence drivers control signal output of column, thus due to grid between retrieved image vegetarian refreshments E and F
The delay on glass substrate cabling of the driver control signal.Pixel between pixel E, F
Between point and pixel F, the difference of impedance is less than the difference of impedance between pixel E and pixel F, because of
This delay compensation needed is the most relatively small, need to be according to the time delay of timing control signal and picture
Element far point proportional relation of difference size of impedance away between other pixel of same a line is adjusted.
Final regulation is basically identical with the pixel far point F charging interval to the charging interval of all pixels,
Then regulate complete.
Embodiment 3
Delay controller regulate described timing control signal with on liquid crystal panel with a line at a distance of grid
On the basis of the timing control signal of the pixel C that driver is farthest, according to pixel C and its
Regulate with every a line at a distance of gate drivers with the difference of impedance between pixel A, B of a line
Remote pixel with the time delay of the timing control signal of the pixel of a line, pixel A with
The difference of impedance between pixel C is maximum, needs to adjust the sequencing contro letter of pixel A column
Number time delay, make the timing control signal of pixel A column be later than pixel C place
The timing control signal output of row, thus due to gate drivers between retrieved image vegetarian refreshments A and C
Control signal delay on glass substrate cabling.Pixel between pixel A, C and picture
Between vegetarian refreshments C, the difference of impedance is less than the difference of impedance between pixel A and pixel C, it is therefore desirable to
Delay compensation the most relatively small, need to be according to the time delay of timing control signal and pixel C
Away between other pixel of same a line, the proportional relation of size of impedance differences is adjusted.In like manner,
On liquid crystal panel, other row also regulates according to above-mentioned steps.Then further according to last on liquid crystal panel
The time delay of the difference size adjustment timing control signal of a line other impedance in the ranks apart, as
Liquid crystal panel last column on the liquid crystal panel first in the ranks impedance differences maximum, need to adjust
The timing control signal of the first row is later than the timing control signal output of last column, thus compensates
Owing to source electrode driver control signal is on glass substrate cabling between the first row and last column
Delay.Row between the first row and last column, and between last column impedance differences less than the
Impedance differences between a line and last column, it is therefore desirable to delay compensation the most relatively small, need
In the ranks hinder with other with last column on liquid crystal panel according to the time delay of timing control signal
The anti-proportional relation of difference size is adjusted.Finally regulate to pixels all on liquid crystal panel
The charging interval of point is basically identical, then regulate complete.
Embodiment 4
Delay controller regulate described timing control signal with on liquid crystal panel with string at a distance of source
On the basis of the timing control signal of the pixel E that driver is farthest, according to pixel E and its
Difference size adjustment and every string with impedance between pixel A, D of string are at a distance of source drive
The farthest pixel of device is with the time delay of the timing control signal of the pixel of string, pixel
Between A and pixel E, impedance differences is maximum, needs to adjust the sequencing contro letter that pixel A is expert at
Number time delay, the timing control signal making pixel A be expert at is later than pixel E place
The timing control signal output of row, thus due to source electrode driver between retrieved image vegetarian refreshments A and E
Control signal delay on glass substrate cabling.Pixel between pixel A, E, with
The difference of the impedance between pixel E is less than the difference of impedance between pixel A and pixel E, therefore
The delay compensation needed is the most relatively small, need to be according to the time delay of timing control signal and pixel
Point E proportional relation of difference size of impedance away between other pixel of same string is adjusted.With
Reason, on liquid crystal panel, other row also regulate according to above-mentioned steps.Then further according on liquid crystal panel
During the delay of last string difference size adjustment timing control signal of impedance between other arranges
Between, the difference maximum of string as last in liquid crystal panel impedance between first row on liquid crystal panel,
The timing control signal adjusting first row is needed to be later than the timing control signal output of last string,
Thus compensate between first row and last string owing to gate-driver control signal is at glass base
Delay on plate cabling.Row between first row and last string, and impedance between last string
Difference less than the difference of impedance between first row and last string, it is therefore desirable to delay compensation also
Relatively small, need on time delay and the liquid crystal panel according to source electrode driver control signal
Between rear string and other row, the proportional relation of difference size of impedance is adjusted.Final regulation is extremely
On liquid crystal panel, the charging interval of all pixels is basically identical, then regulate complete.
Claims (9)
1. the driving control unit of a display base plate, it is characterised in that include sequencing contro
Device and delay controller, wherein:
Described time schedule controller is for described delay controller transmission timing control signal；
Described delay controller is for the driving connected according to the pixel of described display base plate
The impedance of holding wire, regulates described timing control signal, makes the actual charging duration of pixel
In the range of being in default duration；
Wherein, described delay controller is for being connected according to the pixel of described display base plate
The impedance of drive signal line, regulates described timing control signal, refers to:
Described delay controller is for regulating described timing control signal in the following manner: for
It is connected to the first pixel and second pixel of same drive signal line, with on display floater
On the basis of the timing control signal of one pixel, according to this drive signal line at described display floater
On the second pixel and impedance between pixel display driver with this drive signal line described
The difference of the impedance between the first pixel and described pixel display driver, regulates described second
The timing control signal of pixel is relative to the delay of described first pixel timing control signal
Time, the actual charging interval making the first pixel and the second pixel is consistent；
Described first pixel is the pixel that on display floater, range pixel display driver is farthest
Point, referred to as pixel far point；Described second pixel is except described pixel is remote on described display floater
Any pixel beyond Dian；
Wherein,
Described delay controller is for regulating described timing control signal in the following manner:
On the basis of the timing control signal of described pixel far point, first regulation is same with pixel far point
The time delay of the timing control signal of the second pixel of row, rear regulation and described pixel far point
Time delay of timing control signal with the second pixel of string.
Drive control unit the most as claimed in claim 1, it is characterised in that
Described delay controller is for regulating described timing control signal in the following manner:
On the basis of the timing control signal of the on display floater first pixel, regulate described sequential
Control signal makes the time delay of the timing control signal of described second pixel and described impedance
Difference size be directly proportional.
Drive control unit the most as claimed in claim 1, it is characterised in that
Described pixel display driver refers to gate drivers or source electrode driver.
Drive control unit the most as claimed in claim 1, it is characterised in that described default
A preset duration value is included in the range of duration.
5. a drive circuit for display base plate, including institute as any one of Claims 1-4
The driving control unit stated.
6. a driving control method for display base plate, in the driving means of described display base plate
Including time schedule controller and delay controller；It is characterized in that, described method includes:
Make described time schedule controller to described delay controller transmission timing control signal；
Make the driving letter that described delay controller is connected according to the pixel of described display base plate
The impedance of number line regulates described timing control signal, makes the actual charging duration of pixel be in
In the range of the duration preset；
Described delay controller regulates described timing control signal, including:
On the basis of the timing control signal of the on display floater first pixel, same for being connected to
First pixel of one drive signal line and the second pixel, according to this drive signal line described
The second pixel on display floater and the impedance between pixel display driver and this driving signal
The difference of line impedance between described first pixel and described pixel display driver, regulates
The timing control signal of described second pixel is relative to described first pixel sequencing contro letter
Number time delay, the actual charging interval making the first pixel and the second pixel is consistent；
Described first pixel is the pixel that on display floater, range pixel display driver is farthest
Point, referred to as pixel far point；Described second pixel is except described pixel is remote on described display floater
Any pixel beyond Dian；
Wherein, described delay controller is for regulating described sequencing contro letter in the following manner
Number:
On the basis of the timing control signal of described first pixel, first regulation and the first pixel
Time delay of timing control signal with second pixel of a line；With, with described first picture
On the basis of the timing control signal of vegetarian refreshments, regulation and described first pixel are with the second picture of string
The time delay of the timing control signal of vegetarian refreshments.
Driving control method the most according to claim 6, it is characterised in that
Described timing control signal is gate-driver control signal, and described gate drivers controls
Signal controls the thin film transistor (TFT) opening time of pixel, and described delay controller is by regulation institute
Stating the thin film transistor (TFT) opening time, to regulate the timing control signal of described second pixel relative
Time delay in described first pixel timing control signal；Or,
Described timing control signal is source electrode driver control signal, and described source electrode driver controls
Signal controls the deflection voltage load time of pixel, and described delay controller is described by regulation
The deflection voltage load time regulates the timing control signal of described second pixel relative to institute
State the time delay of the first pixel timing control signal.
Driving control method the most according to claim 6, it is characterised in that time described
Sequence control signal is pulse signal.
Drive control method the most as claimed in claim 6, it is characterised in that
Described delay controller is for regulating described timing control signal in the following manner:
On the basis of the timing control signal of the on display floater first pixel, regulate described sequential
Control signal makes the time delay of the timing control signal of described second pixel and described impedance
Difference size be directly proportional.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310101057.6A CN103198803B (en) | 2013-03-27 | 2013-03-27 | The driving control unit of a kind of display base plate, drive circuit and driving control method |
| PCT/CN2013/075922 WO2014153822A1 (en) | 2013-03-27 | 2013-05-20 | Drive control unit, drive circuit, and drive control method of display substrate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310101057.6A CN103198803B (en) | 2013-03-27 | 2013-03-27 | The driving control unit of a kind of display base plate, drive circuit and driving control method |
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| CN103198803A CN103198803A (en) | 2013-07-10 |
| CN103198803B true CN103198803B (en) | 2016-08-10 |
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| CN201310101057.6A Active CN103198803B (en) | 2013-03-27 | 2013-03-27 | The driving control unit of a kind of display base plate, drive circuit and driving control method |
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| Country | Link |
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| CN (1) | CN103198803B (en) |
| WO (1) | WO2014153822A1 (en) |
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| WO2014153822A1 (en) | 2014-10-02 |
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