CN109473055A - Display device and its driving method - Google Patents
Display device and its driving method Download PDFInfo
- Publication number
- CN109473055A CN109473055A CN201811508120.7A CN201811508120A CN109473055A CN 109473055 A CN109473055 A CN 109473055A CN 201811508120 A CN201811508120 A CN 201811508120A CN 109473055 A CN109473055 A CN 109473055A
- Authority
- CN
- China
- Prior art keywords
- display device
- phase
- viewing area
- grid
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
A kind of display device has a viewing area, and the viewing area includes multiple sub- viewing areas, and the display device includes a plurality of source electrode line;A plurality of grid line, a plurality of source electrode line and a plurality of grid line define multiple pixels;An at least source drive unit, for providing data-signal to a plurality of source electrode line;An at least drive element of the grid, including multiple for providing the gate driving circuit of scanning signal to a plurality of grid line;And sequence controller, for providing multiple gate drive signals to the multiple gate driving circuit and adjusting the pixel charging time of the multiple sub- viewing area by adjusting the phase of the start pulse signal provided to the source drive unit.A kind of driving method of display device is also provided.
Description
Technical field
This announcement is related to display field, more particularly to a kind of display device and its driving method.
Background technique
In order to solve the problems, such as that it is inconsistent that gate drive signal and data-signal postpone, the prior art is by adjusting grid
The phase of driving signal compensates to realize.More particularly, display device can be divided into multiple regions, and sequence controller drives to grid
Dynamic circuit provides multiple gate drive signals (such as 12).For example, display device is divided into three regions, timing control
Device provides 12 gate drive signal CK1-CK12 and gives each region corresponding gate driving circuit, then by each region
Corresponding gate driving circuit generates scanning signal.
Theoretically, the corresponding gate driving circuit in first region, the corresponding gate driving circuit of Two Areas and
The corresponding gate driving circuit in three regions can receive gate drive signal CK1 simultaneously.Then, the corresponding grid in first region
Driving circuit, the corresponding gate driving circuit of the corresponding gate driving circuit of Two Areas and third region can receive simultaneously
Gate drive signal CK2.The rest may be inferred by gate drive signal CK2-3-CK12.
However, the prior art is adjustment in order to solve the problems, such as that it is inconsistent that gate drive signal and data-signal postpone
The phase that the corresponding gate driving circuit of Two Areas receives gate drive signal CK1 is later than the corresponding grid in first region and drives
Dynamic circuit receives the phase of gate drive signal CK1, and adjusts the corresponding gate driving circuit in third region and receive grid drive
The phase of dynamic signal CK1 is later than the phase that the corresponding gate driving circuit of Two Areas receives gate drive signal CK1.Timing
Controller is provided to source drive unit (to be locked with first region to trizonal corresponding trigger pulse (TP) signal
Deposit data and be written data signal) phase it is then identical.That is, passing through delay and Two Areas and third region
The phase of corresponding gate drive signal CK1-CK12 increases Two Areas and trizonal picture element charging time, by
This achievees the purpose that compensation.
Due to needing while adjusting the phase of 12 gate drive signal CK1-CK12, causing operation complicated and expending money
The problem of source.
Therefore it needs to propose a solution to the problems of the prior art.
Summary of the invention
This announcement is designed to provide a kind of display device and its driving method, and it is multiple to can solve operation in the prior art
The problem of miscellaneous and consuming resource.
To solve the above problems, a kind of display device that this announcement provides has a viewing area, the viewing area includes more
A sub- viewing area, the display device include a plurality of source electrode line;A plurality of grid line, a plurality of source electrode line and a plurality of grid
Line defines multiple pixels;An at least source drive unit, for providing data-signal to a plurality of source electrode line;An at least grid
Pole driving unit, including multiple for providing the gate driving circuit of scanning signal to a plurality of grid line;And timing control
Device processed, for providing multiple gate drive signals to the multiple gate driving circuit and by adjusting to the source drive list
The phase for the start pulse signal that member provides adjusts the pixel charging time of the multiple sub- viewing area.
In an embodiment, the sequence controller adjustment is corresponding with the more late sub- viewing area for receiving the scanning signal
Phase of the phase of start pulse signal earlier than start pulse signal corresponding with the more early sub- viewing area for receiving the scanning signal
Position.
In an embodiment, the phase of the start pulse signal according to first grid line, be located in the viewing area
Between grid line and the last item grid line and obtain.
In an embodiment, the same gate driving that the sequence controller is provided to the multiple gate driving circuit
The phase of signal is identical.
In an embodiment, the display device also has a non-display area, and the multiple gate driving circuit is set to
On the non-display area.
In a kind of driving method for display device that this announcement provides, the display device has a viewing area, described aobvious
Show that area includes multiple sub- viewing areas, the display device includes a plurality of source electrode line, a plurality of grid line, at least a source drive list
Member, at least a drive element of the grid and sequence controller, a plurality of source electrode line and a plurality of grid line define multiple
Pixel, the drive element of the grid include multiple gate driving circuits, and the driving method of the display device includes: the timing
Controller provides multiple gate drive signals to the multiple gate driving circuit;And the sequence controller by adjusting to
The phase for the start pulse signal that the source drive unit provides adjusts the pixel charging time of the multiple sub- viewing area.
In an embodiment, the sequence controller adjustment is corresponding with the more late sub- viewing area for receiving the scanning signal
Phase of the phase of start pulse signal earlier than start pulse signal corresponding with the more early sub- viewing area for receiving the scanning signal
Position.
In an embodiment, the phase of the start pulse signal according to first grid line, be located in the viewing area
Between grid line and the last item grid line and obtain.
In an embodiment, the same gate driving that the sequence controller is provided to the multiple gate driving circuit
The phase of signal is identical.
In an embodiment, the display device also has a non-display area, and the multiple gate driving circuit is set to
On the non-display area.
In the display device and its driving method of this announcement, the sequence controller is by adjusting to the source drive list
The phase for the start pulse signal that member provides adjusts the pixel charging times of different sub- viewing areas.The sequence controller is uncomfortable
The phase of the whole gate drive signal provided to the gate driving circuit.This announcement adjusts the phase of start pulse signal and shows
There is the phase for adjusting gate drive signal in technology to compare, operation is relatively simple and consuming resource is less.
For the above content of this announcement can be clearer and more comprehensible, preferred embodiment is cited below particularly, and cooperate institute's accompanying drawings, makees
Detailed description are as follows:
Detailed description of the invention
Fig. 1 shows the display device according to one embodiment of this announcement.
Fig. 2 shows the sequence controller of Fig. 1 to first grid driving circuit, second grid driving circuit and the third grid
The start pulse signal that the gate drive signal and sequence controller that pole driving circuit provides are provided to source drive unit
Timing diagram.
Fig. 3 shows the phase number and the relational graph of grid line of trigger pulse letter.
Fig. 4 shows the relational graph in charging time and grid line.
Fig. 5 shows the driving method flow chart of the display device according to one embodiment of this announcement
Specific embodiment
The explanation of following embodiment is to can be used to the particular implementation of implementation to illustrate this announcement with reference to additional schema
Example.
Referring to Fig. 1, Fig. 1 shows the display device according to one embodiment of this announcement.
The display device has a viewing area 10 and a non-display area 20.The display device includes a plurality of source electrode line
S1-S3840, a plurality of gate lines G 1-G2160, at least a source drive unit 12 (a source drive unit 12 is shown in figure)
At least a drive element of the grid 14 (drive element of the grid is shown in figure) and time schedule controller (Timing
Controller)16。
The a plurality of source electrode line S1-S3840 and a plurality of gate lines G 1-G2160 are set on the viewing area 10.More
Specifically, a plurality of source electrode line S1-S3840 is set on the viewing area 10 and extends to the source drive unit
12.The a plurality of gate lines G 1-G2160 is set on the viewing area 10 and extends to the drive element of the grid 14.It is described
A plurality of source electrode line S1-S3840 is formed along a first direction.The a plurality of gate lines G 1-G2160 is formed along a second direction.Institute
First direction is stated perpendicular to the second direction.The source electrode line S1-S3840 and gate lines G 1-G2160 defines multiple
Pixel 18.Each pixel 18 is electrically connected to a thin film transistor (TFT) 20.
The source drive unit 12 is set on the non-display area 20.The source drive unit 12 is electrically connected to
The a plurality of source electrode line S1-S3840 simultaneously is used to provide data-signal, the data-signal to a plurality of source electrode line S1-S3840
For the pixel 18 to be written.
The drive element of the grid 14 is set on the non-display area 20.The drive element of the grid 14 includes multiple use
In the gate driving circuit to gate lines G 1-G2160 offer scanning signal.In this present embodiment, the gate driving list
Member 14 includes first grid driving circuit 140, second grid driving circuit 142 and third gate driving circuit 144.However this
The drive element of the grid 14 of announcement is not limited to three gate driving circuits.The first grid driving circuit 140, described second
Gate driving circuit 142 and the third gate driving circuit 144 are set on the non-display area 20.That is, institute
Stating first grid driving circuit 140, the second grid driving circuit 142 and the third gate driving circuit 144 is battle array
Column substrate row drives (Gate driver On Array, GOA) circuit.The first grid driving circuit 140 is electrically connected to
The gate lines G 1-G720 simultaneously is used to provide scanning signal to the gate lines G 1-G720 to be connected and the gate lines G 1-
The corresponding thin film transistor (TFT) 20 of G720.The second grid driving circuit 142 is electrically connected to the gate lines G 721-G1440
And it is corresponding thin with the gate lines G 721-G1440 to be connected for providing scanning signal to the gate lines G 721-G1440
Film transistor 20.The third gate driving circuit 144 is electrically connected to the gate lines G 1441-G2160 and is used for described
Gate lines G 1441-G2160 provides scanning signal so that thin film transistor (TFT) 20 corresponding with the gate lines G 1441-G2160 is connected.
The sequence controller 16 is set on the non-display area 20 and is electrically connected to the source drive unit 12
And the drive element of the grid 14.The pixel 18 is written for controlling the source drive unit 12 in the sequence controller 16
Timing.
The sequence controller 16 to the first grid driving circuit 140, the second grid driving circuit 142 and
The third gate driving circuit 144 is sequentially provided multiple gate drive signal CK1-CK12 (as shown in Figure 2), so that described
One gate driving circuit 140, the second grid driving circuit 142 and the third gate driving circuit 144 generate conducting
The scanning signal of the thin film transistor (TFT) 20.
The viewing area 10 includes multiple sub- viewing areas.In this present embodiment, the viewing area 10 includes the first son display
Area A1, the second sub- viewing area A2 and the sub- viewing area A3 of third.However the viewing area 10 of this announcement is not limited to three son displays
Area.The first sub- viewing area A1 includes gate lines G 1-G720 and corresponds to the first grid driving circuit 140.Described
Two sub- viewing area A2 include gate lines G 721-G1440 and correspond to the second grid driving circuit 142.Third is aobvious
Show that area A3 includes gate lines G 1441-G2160 and corresponds to the third gate driving circuit 144.
Please refer to Fig. 1 and Fig. 2, Fig. 2 shows the sequence controller 16 of Fig. 1 to first grid driving circuit 140, second gate
The gate drive signal CK1-CK12 and timing control that pole driving circuit 142 and the third gate driving circuit 144 provide
The timing diagram for the start pulse signal TP (i.e. the signal of latch data and write-in data) that device 16 is provided to source drive unit 12.
The gate drive signal CK1-CK12 that the sequence controller 16 exports is sequentially provided to be driven to the first grid
Circuit 140, the second grid driving circuit 142 and the third gate driving circuit 144.The sequence controller 16 to
The first grid driving circuit 140, the second grid driving circuit 142 and the third gate driving circuit 144 mention
The phase of the same gate drive signal supplied is identical.That is, the sequence controller 16 drives to the first grid
The gate drive signal that circuit 140, the second grid driving circuit 142 and the third gate driving circuit 144 provide
The phase of CK1 is identical.The sequence controller 16 is to the first grid driving circuit 140, the second grid driving circuit
142 and the third gate driving circuit 144 provide gate drive signal CK2 phase it is identical, and so on.
Since the gate drive signal CK1-CK12 of the sequence controller 16 output writes with the source drive unit 12
The data-signal entered, which has, postpones inconsistent problem, and the charging time of the pixel 18 of the described second sub- viewing area A2 is caused to be shorter than
The charging time of the pixel 18 of the first sub- viewing area A1, and the charging time of the pixel 18 of the sub- viewing area A3 of the third is short
In the charging time of the pixel 18 of the described second sub- viewing area A2.
In in the prior art, adjustment is supplied to the phase of the gate drive signal CK1 of the second grid driving circuit 142
It is later than the phase for being supplied to the gate drive signal CK1 of the first grid driving circuit 140, and adjusts and be supplied to the third
The phase of the gate drive signal CK1 of gate driving circuit 144 is later than the grid for being supplied to the second grid driving circuit 142
The phase of driving signal CK1.Similarly, the phase of gate drive signal CK2-CK12 is also required to adjust.However, due to needing to adjust
The phase of whole 12 gate drive signal CK1-CK12, the problem of causing operation complicated and expend resource.
In the display device of this announcement, the sequence controller 16 does not adjust the phase of gate drive signal CK1-CK12,
The sequence controller 16 by adjusting provided to the source drive unit 12 start pulse signal TP (i.e. latch data with
The signal of data is written) phase adjust the described first sub- viewing area A1, the second sub- viewing area A2 and the third
The pixel charging time of sub- viewing area A3.
The adjustment of sequence controller 16 trigger pulse corresponding with the sub- viewing area of the more late reception scanning signal is believed
Phase of the phase of number TP earlier than start pulse signal TP corresponding with the more early sub- viewing area for receiving the scanning signal.Second
The time that the time viewing area A1 than first that sub- viewing area A2 receives the scanning signal receives the scanning signal is late, and the
The time that the time viewing area A2 than second that three sub- viewing area A3 receive the scanning signal receives the scanning signal is late.Cause
This, as shown in Fig. 2, the phase of the adjustment of the sequence controller 16 start pulse signal TP corresponding with the described second sub- viewing area A2
Phase of the position earlier than start pulse signal TP corresponding with the described first sub- viewing area A1, and adjust and the sub- viewing area of the third
Phase of the phase of the corresponding start pulse signal TP of A3 earlier than start pulse signal TP corresponding with the described second sub- viewing area A2
Position, can increase the charging time of the pixel 18 of the described second sub- viewing area A2 and the picture of the sub- viewing area A3 of the third whereby
The charging time of element 18.
It will be described below how calculating the phase of the corresponding start pulse signal TP in different sub- viewing areas.Assuming that described first
The goal-setting of the charging time T_chargetop of gate lines G 1 is 1 microsecond (microsecond, μ s), is located at the display
The goal-setting of the charging time T_chargemid of gate lines G 1080 among area 10 is 1.3 μ s, the last item grid
The goal-setting of the charging time T_chargebtm of line G2160 is 1.5 μ s.The clock frequency Fclk of the display device is
74.26 megahertzs (MegaHertz, MHz), clock cycle Tclk (Tclk=1/Fclk) be 13.466 nanoseconds (nanosecond,
ns)。
Assuming that the initial value of the phase of start pulse signal TP corresponding with first gate lines G 1 is 200, represent
The source drive unit 12 is started counting receiving the start pulse signal TP that the sequence controller 16 is transmitted, and is being counted
The pixel 18 that data-signal write-in is electrical connected with first article of gate lines G 1 when the 200th pulse of number.
Grid line between first gate lines G 1 and the gate lines G 1080 (being located among the viewing area 10)
The phase calculation of the start pulse signal TP_up (n) of (upper half of the i.e. described viewing area 10) is as follows.It is found out first every several
Grid line adjusts the phase of a pulse of start pulse signal TP:
TP_up_c=grid line line number/((T_chargemid-T_chargetop)/Tclk)
=1080/ ((1.3 μ s-1 μ s)/13.466ns)=48.47 ≈ 48
That is, every 48 grid lines adjust the phase of a pulse.Therefore, the trigger pulse letter of line n grid line
Number phase TP_up (n) can be calculated by following formula:
TP_up (n)=initial value-(n-1)/TP_up_c=200- (n-1)/48
The charging time T_up_charge (n) of the pixel 18 of line n grid line can be calculated by following formula:
T_up_charge (n)=T_chargetop+ (TP_up (n)-initial value) × Tclk
=1.0+ (TP_up (n) -200) × Tclk
Similarly, the grid between the gate lines G 1081 (being located among the viewing area 10) and the gate lines G 2160
The phase calculation of the start pulse signal TP_down (n) of polar curve (lower half of the i.e. described viewing area 10) is as follows.It finds out first every
Every the phase of a pulse of several grid line adjustment start pulse signal TP:
TP_down_c=grid line line number/((T_chargebtm-T_chargemid)/Tclk)
=1080/ ((1.5 μ s-1.3 μ s)/13.466ns)=72.7 ≈ 73
That is, every 73 grid lines adjust the phase of a pulse.Therefore, the trigger pulse letter of line n grid line
Number phase TP_down (n) can be calculated by following formula:
TP_down (n)=TP_up (1080)-(n-1080)/TP_down_c
=177- (n-1080)/73
The charging time T_down_charge (n) of the pixel 18 of line n grid line can be calculated by following formula:
T_down_charge (n)=T_chargetop+ (TP_down (n)-initial value) × Tclk
=1.0+ (TP_down (n) -200) × Tclk
Fig. 3 and Fig. 4 is please referred to, Fig. 3 shows the phase of start pulse signal TP and the relational graph of grid line.Fig. 4 is shown
The relational graph in charging time and grid line.
As shown in figure 3, the corresponding phase of gate lines G 1 is 200.The corresponding phase of gate lines G 1080 is about 177 (to represent institute
It states source drive unit 12 and starts counting receiving the start pulse signal TP that the sequence controller 16 is transmitted, and counting
The pixel 18 that data-signal write-in is electrical connected with the gate lines G 1080 when the 177th pulse.Gate lines G 2160 is corresponding
Phase be about 162, represent the source drive unit 12 and receiving the trigger pulse letter that the sequence controller 16 transmitted
Number TP is started counting, and the picture that data-signal write-in is electrical connected with the gate lines G 2160 when counting the 162nd pulse
Element 18.
From the foregoing, the adjustment of sequence controller 16 is corresponding with the more late sub- viewing area for receiving the scanning signal
The phase of start pulse signal TP is earlier than start pulse signal TP corresponding with the more early sub- viewing area for receiving the scanning signal
Phase.Therefore, as shown in figure 4, the charging time viewing area more sub- than described first of the grid line of the second sub- viewing area A2
The charging time of the grid line of A1 is long, and the charging time of the grid line of the sub- viewing area A3 of the third is than the first son display
The charging time of the grid line of area A2 is long.
In addition, from the foregoing the phase of the start pulse signal TP according to first grid line, be located at the display
Grid line wherein one of the second sub- viewing area A2 (can be) and the last item grid line among area and obtain.
Referring to Fig. 5, Fig. 5 shows the driving method flow chart of the display device according to one embodiment of this announcement.
The display device has a viewing area, and the viewing area includes multiple sub- viewing areas.The display device includes
A plurality of source electrode line, a plurality of grid line, at least a source drive unit, at least a drive element of the grid and sequence controller.Institute
It states a plurality of source electrode line and a plurality of grid line defines multiple pixels.The drive element of the grid includes multiple gate driving electricity
Road.The driving method of the display device includes following operation.
In operation S10, the sequence controller provides multiple gate drive signals to the multiple gate driving circuit.
In operation S20, the sequence controller is by adjusting the trigger pulse letter provided to the source drive unit
Number phase adjust the pixel charging time of the multiple sub- viewing area.
In an embodiment, the sequence controller adjustment is corresponding with the more late sub- viewing area for receiving the scanning signal
Phase of the phase of start pulse signal earlier than start pulse signal corresponding with the more early sub- viewing area for receiving the scanning signal
Position.
The phase of the start pulse signal according to first grid line, the grid line among the viewing area and
The last item grid line and obtain.
The phase for the multiple gate drive signal that the sequence controller is provided to the multiple gate driving circuit
It is identical.
The display device also has a non-display area, and the multiple gate driving circuit is set to the non-display area
On.
In the display device and its driving method of this announcement, the sequence controller is by adjusting to the source drive list
The phase for the start pulse signal that member provides adjusts the pixel charging times of different sub- viewing areas.The sequence controller is uncomfortable
The phase of the whole gate drive signal provided to the gate driving circuit.This announcement adjusts the phase of start pulse signal and shows
There is the phase for adjusting gate drive signal in technology to compare, operation is relatively simple and consuming resource is less.
Although above preferred embodiment is not to limit in conclusion this announcement is disclosed above with preferred embodiment
This announcement is made, those skilled in the art can make various changes and profit in the spirit and scope for not departing from this announcement
Decorations, therefore the protection scope of this announcement subjects to the scope of the claims.
Claims (10)
1. a kind of display device, which is characterized in that there is a viewing area, the viewing area includes multiple sub- viewing areas, described aobvious
Showing device includes:
A plurality of source electrode line;
A plurality of grid line, a plurality of source electrode line and a plurality of grid line define multiple pixels;
An at least source drive unit, for providing data-signal to a plurality of source electrode line;
An at least drive element of the grid, including multiple for providing the gate driving electricity of scanning signal to a plurality of grid line
Road;And
Sequence controller, for providing multiple gate drive signals to the multiple gate driving circuit and by adjusting to described
The phase for the start pulse signal that source drive unit provides adjusts the pixel charging time of the multiple sub- viewing area.
2. display device according to claim 1, which is characterized in that described in the sequence controller adjustment and more late reception
The phase of the corresponding start pulse signal in sub- viewing area of scanning signal is shown earlier than with the more early son for receiving the scanning signal
The phase of the corresponding start pulse signal in area.
3. display device according to claim 1, which is characterized in that the phase of the start pulse signal is according to first
Grid line, the grid line among the viewing area and the last item grid line and obtain.
4. display device according to claim 1, which is characterized in that the sequence controller is to the multiple gate driving
The phase for the same gate drive signal that circuit provides is identical.
5. display device according to claim 1, which is characterized in that the display device also has a non-display area, institute
Multiple gate driving circuits are stated to be set on the non-display area.
6. a kind of driving method of display device, which is characterized in that the display device has a viewing area, the viewing area packet
Include multiple sub- viewing areas, the display device includes a plurality of source electrode line, a plurality of grid line, an at least source drive unit, at least
One drive element of the grid and sequence controller, a plurality of source electrode line and a plurality of grid line define multiple pixels, institute
Stating drive element of the grid includes multiple gate driving circuits, and the driving method of the display device includes:
The sequence controller provides multiple gate drive signals to the multiple gate driving circuit;And
The sequence controller by adjusting the start pulse signal provided to the source drive unit phase to adjust
State the pixel charging time of multiple sub- viewing areas.
7. the driving method of display device according to claim 6, which is characterized in that the sequence controller is adjusted and got over
The phase that evening receives the corresponding start pulse signal in sub- viewing area of the scanning signal receives the scanning letter earlier than with more early
Number the corresponding start pulse signal in sub- viewing area phase.
8. the driving method of display device according to claim 6, which is characterized in that the phase of the start pulse signal
It is obtained according to first grid line, the grid line among the viewing area and the last item grid line.
9. the driving method of display device according to claim 6, which is characterized in that the sequence controller is to described more
The phase for the multiple gate drive signal that a gate driving circuit provides is identical.
10. the driving method of display device according to claim 6, which is characterized in that the display device also has one
Non-display area, the multiple gate driving circuit are set on the non-display area.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811508120.7A CN109473055A (en) | 2018-12-11 | 2018-12-11 | Display device and its driving method |
PCT/CN2019/071819 WO2020118847A1 (en) | 2018-12-11 | 2019-01-15 | Display device and driving method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811508120.7A CN109473055A (en) | 2018-12-11 | 2018-12-11 | Display device and its driving method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109473055A true CN109473055A (en) | 2019-03-15 |
Family
ID=65676057
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811508120.7A Pending CN109473055A (en) | 2018-12-11 | 2018-12-11 | Display device and its driving method |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN109473055A (en) |
WO (1) | WO2020118847A1 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112185315A (en) * | 2020-10-19 | 2021-01-05 | Tcl华星光电技术有限公司 | Liquid crystal display panel driving method, liquid crystal display panel and liquid crystal display device |
WO2021223269A1 (en) * | 2020-05-06 | 2021-11-11 | Tcl华星光电技术有限公司 | Time sequence controller, time sequence control method, and storage medium |
CN113990269A (en) * | 2021-11-05 | 2022-01-28 | 深圳市华星光电半导体显示技术有限公司 | Display, display terminal and display compensation method |
WO2023024169A1 (en) * | 2021-08-24 | 2023-03-02 | Tcl华星光电技术有限公司 | Display panel, driving method for display panel, and electronic device |
US11830452B2 (en) | 2021-08-24 | 2023-11-28 | Tcl China Star Optoelectronics Technologyco., Ltd. | Display panel, display panel driving method, and electronic device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103050103A (en) * | 2012-12-20 | 2013-04-17 | 深圳市华星光电技术有限公司 | Drive circuit of LCD (liquid crystal display) panel, driving method of drive circuit and LCD device |
CN103198803A (en) * | 2013-03-27 | 2013-07-10 | 京东方科技集团股份有限公司 | Drive control unit, drive circuit and drive control method of display substrate |
CN106205461A (en) * | 2016-09-30 | 2016-12-07 | 京东方科技集团股份有限公司 | Shift register cell, driving method, gate driver circuit and display device |
CN106297712A (en) * | 2016-09-26 | 2017-01-04 | 京东方科技集团股份有限公司 | A kind of display base plate and driving method, display device |
US9691341B2 (en) * | 2014-09-29 | 2017-06-27 | Samsung Display Co., Ltd. | Data driver and display apparatus including the same |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103514851A (en) * | 2009-07-29 | 2014-01-15 | 友达光电股份有限公司 | Liquid crystal display and shift register thereof |
CN101625841A (en) * | 2009-07-29 | 2010-01-13 | 友达光电股份有限公司 | Liquid crystal display and shift registering device |
KR102033569B1 (en) * | 2012-12-24 | 2019-10-18 | 삼성디스플레이 주식회사 | Display device |
KR101992158B1 (en) * | 2013-04-30 | 2019-09-30 | 엘지디스플레이 주식회사 | Gate shift register and display device using the same |
CN205092045U (en) * | 2015-11-09 | 2016-03-16 | 重庆京东方光电科技有限公司 | Display driver circuit, display device |
CN106228939A (en) * | 2016-07-29 | 2016-12-14 | 乐视控股(北京)有限公司 | LCD TV driving method, device and LCD TV drive circuit board |
CN107767820B (en) * | 2016-08-16 | 2019-10-18 | 晶宏半导体股份有限公司 | Drive And Its Driving Method for electrophoretic display device (EPD) |
CN107831614A (en) * | 2017-11-07 | 2018-03-23 | 深圳市华星光电半导体显示技术有限公司 | Pixel driving framework and display device |
-
2018
- 2018-12-11 CN CN201811508120.7A patent/CN109473055A/en active Pending
-
2019
- 2019-01-15 WO PCT/CN2019/071819 patent/WO2020118847A1/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103050103A (en) * | 2012-12-20 | 2013-04-17 | 深圳市华星光电技术有限公司 | Drive circuit of LCD (liquid crystal display) panel, driving method of drive circuit and LCD device |
CN103198803A (en) * | 2013-03-27 | 2013-07-10 | 京东方科技集团股份有限公司 | Drive control unit, drive circuit and drive control method of display substrate |
US9691341B2 (en) * | 2014-09-29 | 2017-06-27 | Samsung Display Co., Ltd. | Data driver and display apparatus including the same |
CN106297712A (en) * | 2016-09-26 | 2017-01-04 | 京东方科技集团股份有限公司 | A kind of display base plate and driving method, display device |
CN106205461A (en) * | 2016-09-30 | 2016-12-07 | 京东方科技集团股份有限公司 | Shift register cell, driving method, gate driver circuit and display device |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021223269A1 (en) * | 2020-05-06 | 2021-11-11 | Tcl华星光电技术有限公司 | Time sequence controller, time sequence control method, and storage medium |
US11908429B2 (en) | 2020-05-06 | 2024-02-20 | Tcl China Star Optoelectronics Technology Co., Ltd. | Timing controller, timing control method, and storage medium |
CN112185315A (en) * | 2020-10-19 | 2021-01-05 | Tcl华星光电技术有限公司 | Liquid crystal display panel driving method, liquid crystal display panel and liquid crystal display device |
WO2023024169A1 (en) * | 2021-08-24 | 2023-03-02 | Tcl华星光电技术有限公司 | Display panel, driving method for display panel, and electronic device |
US11830452B2 (en) | 2021-08-24 | 2023-11-28 | Tcl China Star Optoelectronics Technologyco., Ltd. | Display panel, display panel driving method, and electronic device |
CN113990269A (en) * | 2021-11-05 | 2022-01-28 | 深圳市华星光电半导体显示技术有限公司 | Display, display terminal and display compensation method |
Also Published As
Publication number | Publication date |
---|---|
WO2020118847A1 (en) | 2020-06-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109473055A (en) | Display device and its driving method | |
US9721674B2 (en) | GOA unit and method for driving the same, GOA circuit and display device | |
US9747854B2 (en) | Shift register, gate driving circuit, method for driving display panel and display device | |
US8049704B2 (en) | Liquid crystal display device | |
EP3214616B1 (en) | Goa unit and drive method, goa circuit, and display device | |
US20170270886A1 (en) | Complementary gate driver on array circuit employed for panel display | |
WO2017161678A1 (en) | Shift register, drive method thereof, corresponding gate drive circuit and display apparatus | |
US8049703B2 (en) | Flat display structure and method for driving flat display | |
US7283603B1 (en) | Shift register with four phase clocks | |
US10950322B2 (en) | Shift register unit circuit, method of driving the same, gate drive circuit, and display apparatus | |
WO2017107285A1 (en) | Goa circuit for narrow-bezel liquid crystal display panel | |
EP1923859A2 (en) | Liquid crystal display and method of driving the same | |
CN112005295B (en) | Display device driving method and display device | |
WO2016000280A1 (en) | Complementary goa circuit for flat panel display | |
WO2020168798A1 (en) | Shift register unit and driving method therefor, gate driving circuit and driving method therefor, and display device | |
WO2015176511A1 (en) | Touch display screen and time-sharing drive method thereof | |
JP6799069B2 (en) | GOA circuit with LTPS semiconductor thin film transistor | |
CN109817175B (en) | Display panel driving method and device, display panel and display device | |
US20090040168A1 (en) | Liquid crystal display with blocking circuits | |
TWI553620B (en) | Partial scanning gate driver and liquid crystal display using the same | |
US10453413B2 (en) | Array substrate and driving method, driving circuit, and display apparatus | |
CN107068108B (en) | Display panel driving method and device and display device | |
US9727165B2 (en) | Display with driver circuitry having intraframe pause capabilities | |
JP2002189203A (en) | Method and circuit for driving liquid crystal display device | |
US11158224B2 (en) | Start signal generation circuit, driving method and display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190315 |