WO2020181593A1 - Pixel drive circuit of display unit, and driving method therefor - Google Patents

Pixel drive circuit of display unit, and driving method therefor Download PDF

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Publication number
WO2020181593A1
WO2020181593A1 PCT/CN2019/080767 CN2019080767W WO2020181593A1 WO 2020181593 A1 WO2020181593 A1 WO 2020181593A1 CN 2019080767 W CN2019080767 W CN 2019080767W WO 2020181593 A1 WO2020181593 A1 WO 2020181593A1
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WIPO (PCT)
Prior art keywords
gate
source
pixel
feedback
display unit
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PCT/CN2019/080767
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French (fr)
Chinese (zh)
Inventor
陈小龙
吴嘉濂
温亦谦
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020181593A1 publication Critical patent/WO2020181593A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes

Definitions

  • the present disclosure relates to the field of display technology, in particular to a pixel driving circuit of a display unit and a driving method thereof.
  • the liquid crystal display panel includes scan lines and data lines, the data lines are driven by a data driving module, and the scan lines are driven by a scan driving module.
  • the existing large-size liquid crystal display panel 100 as shown in FIG. 1A, since the signal line from the gate driving device 10 to the two ends of the display panel 100 is longer than the signal line to the center of the display panel 100, the resistance difference will be As shown in Figure 1A, the pixel charging time T2 (the distance from the gate driving device 10 to the other end of the display panel 100) is much longer than the pixel charging time T1 (gate driving).
  • the distance between the device 10 and the display panel 100), the pixel charging time T2 at the other end of the display panel 100 relative to the gate driving device 10 is significantly longer than the pixel charging time T1 at one end of the gate driving device 10 of the display panel, and the display panel 100
  • the uneven charging of each pixel unit will result in poor display effect of the display panel 100 and uneven display brightness.
  • the gate time delay (RC Delay) will increase as the size of the display panel increases.
  • the gate driving device 10 outputs a gate driving signal to the gate line.
  • the gate drive signal will be delayed due to the gate RC load.
  • Source driver 20A The time at which the source driving signal is output by 20B and 20C is also delayed, so that the gate driving signal received by the pixel unit has different delay times.
  • the pixel charging time is relatively reduced.
  • Gate time delay (RC Delay) will cause the pixel charging time T1, T2, and T3 of the pixel units in each area of the display panel to be inconsistent.
  • the source driving device 20C that is the farthest from the gate driving device 10 corresponds to the maximum pixel charging time T3, which will cause the panel display brightness Uneven, severe color shift will result in the picture.
  • the gate time delay (RC Delay) of the existing display panel will cause the pixel charging time of the pixel units in each area of the display panel to be inconsistent, which will cause the technical defect of uneven display brightness of the panel.
  • the present disclosure provides a pixel drive circuit of a display unit.
  • the display unit includes a plurality of pixel units arranged in an array. Each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate.
  • the pixel driving circuit includes: one or more gate drivers for outputting a gate output signal, and each gate driver includes a gate feedback circuit connected to each gate line of each row of pixel units
  • each gate driver includes a gate feedback circuit connected to each gate line of each row of pixel units
  • One or more source drivers each source driver includes a source feedback circuit, respectively connected to the corresponding gate feedback circuit of each row of pixel units and connected to each of the source drivers, each source feedback circuit receives each The gate output signal of each gate line transmitted by the gate feedback circuit, and each source driver is used to convert the gate output signal into a gate feedback signal
  • a timing controller is connected to each of the source drivers And receive the gate feedback signal from each source driver, and calculate a delay time according to the gate feedback signal, and output a source feedback signal to each source driver for adjusting the corresponding source driver A charging time of the pixel unit in a period; wherein the delay time calculated based on each of the gate feedback signals respectively responds to the distance from the pixel unit to the gate driver.
  • the delay times corresponding to the source output signals are different from each other.
  • the period is a horizontal scanning period.
  • the charging time of the pixel units in each column is the same as each other.
  • the delay time respectively corresponds to a distance from the source line to the gate driver.
  • the present disclosure also provides a pixel drive circuit for a display unit.
  • the display unit includes a plurality of pixel units arranged in an array. Each column of pixel units is connected to a source line, and each row of pixel units is connected to a Gate line connection, the pixel drive circuit includes: one or more gate drivers for outputting a gate output signal, and each gate driver includes a gate feedback circuit connected to each gate of each row of pixel units Line; one or more source drivers, each source driver includes a source feedback circuit, respectively connected to each row of pixel unit corresponding to the gate feedback circuit and connected to each of the source drivers, each source feedback circuit receives Each gate output signal of each gate line transmitted by each gate feedback circuit, each source driver is used to convert the gate output signal into a gate feedback signal; a timing controller connected to each of the sources The driver also receives the gate feedback signal from each source driver, calculates a delay time according to the gate feedback signal, and outputs a source feedback signal to each source driver for adjusting the corresponding source driver
  • the delay times corresponding to the source output signals are different from each other.
  • the period is a horizontal scanning period.
  • the charging time of the pixel units in each column is the same as each other.
  • the delay time respectively corresponds to a distance from the source line to the gate driver.
  • the present disclosure provides another method for driving a pixel driving circuit of a display unit to drive a plurality of pixel units arranged in an array of a display unit.
  • Each column of pixel units is connected to a source line, and each row The pixel unit is connected to a gate line
  • the operation method includes: providing one or more gate drivers for outputting a gate output signal, wherein each gate driver includes a gate feedback line connected to each row of pixel units Provide one or more source drivers for receiving the gate output signal and converting the gate output signal into a gate feedback signal, wherein each source driver includes a source
  • the electrode feedback circuit is respectively connected to the gate feedback circuit corresponding to each row of pixel units and connected to each of the source drivers, and each source feedback circuit receives the gate output signal of each gate line transmitted by each gate feedback circuit ,
  • Each source driver is used to convert the gate output signal into a gate feedback signal; and provide a timing controller, calculate a delay time according to the gate feedback signal, and output a source feedback signal to For each source driver
  • the delay times corresponding to the source output signals are different from each other.
  • the period is a horizontal scanning period.
  • the charging time of the pixel units in each column is the same as each other.
  • the delay time respectively corresponds to a distance from the source line to the gate driver.
  • the beneficial effect of the present disclosure is that the timing controller calculates the delay time between each source through the gate feedback signal of each source driver, and outputs the source feedback signal to each source driver to adjust the charging of each source. Time to compensate for the difference in the charging time of the pixels caused by the gate time delay, minimize the difference in the charging time of the pixel units corresponding to each source, and make the source feedback signals output by different source drivers in the same row of pixel units be in one There are different delay times in the horizontal scanning period in order to reduce the difference in the charging time between the pixel units.
  • FIG. 1A and 1B are schematic diagrams showing that the charging time of each pixel unit of the display panel is not consistent.
  • FIG. 2 is a circuit block diagram of the disclosed pixel driving circuit.
  • FIG. 3 is a timing diagram of the application of the pixel driving circuit on the display panel of the disclosure.
  • FIG. 4 is a schematic flow chart of the driving method of the disclosed pixel driving circuit.
  • FIG. 2 is a circuit block diagram of the pixel driving circuit of the present disclosure.
  • a pixel driving circuit of a display unit 200 is disclosed.
  • the display unit 200 includes a plurality of arrays arranged Pixel units (not shown). Each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate line.
  • the pixel driving circuit includes: one or more gate drivers 210 for outputting a Gate output signal.
  • Each gate driver 210 includes a gate feedback line 211 connected to each gate line of each row of pixel units; one or more source drivers 220A, 220B, 220C, and each source driver 220A, 220B , 220C includes a source feedback circuit 221A, 221B, 221C, respectively connected to the gate feedback circuit 211 corresponding to each row of pixel units and connected to each of the source drivers 220A, 220B, 220C, each source feedback circuit 221A, 221B, 221C receive the gate output signal of each gate line transmitted by each gate feedback circuit 211, and each source driver 220 is used to convert the gate output signal into a gate feedback signal; a timing controller 300 , Connect each of the source drivers 220A, 220B, 220C and receive the gate feedback signal from each of the source drivers 220A, 220B, 220C, calculate a delay time according to the gate feedback signal, and output a The source feedback signal to each source driver 220A, 220B, 220C is used
  • the display unit may, for example, include M rows and N columns of pixel units 101, where M and N are both positive integers.
  • Each column of pixel units is connected to a source line (data line), and each row of pixel units is connected to a gate line (scanning line).
  • the charging time of the pixel units in each column is the same.
  • the following will take the source drivers 220A, 220B, and 220C as examples for illustration. The rest of the source drivers can be deduced by referring to the relevant descriptions of the source drivers 220A, 220B, and 220C, so they will not be repeated.
  • the source drivers 220A, 220B, and 220C are coupled between the timing controller 300 and the display unit 200.
  • the source drivers 220A, 220B, and 220C each include a source feedback circuit 221A, 221B, 221C and a plurality of driving circuits (not shown). These driving lines output multiple source feedback signals to multiple source lines of the display unit 200 in a one-to-one manner. For example, after the source drivers 220A, 220B, and 220C receive the horizontal scan signal provided by the timing controller 300, the horizontal scan signal is gradually shifted among these driving lines.
  • the gate driver 210 is coupled between the timing controller 300 and the display unit 200. After the gate driver 210 receives the vertical scanning signal provided by the timing controller 300, the vertical scanning signal starts to move gradually in the display unit.
  • the period is a horizontal scanning period. Therefore, the source drivers 220A, 220B, and 220C can drive each source line of the display unit 200 one by one according to the shift position of the horizontal scanning signal. . In accordance with the scanning timing of the source drivers 220A, 220B, and 220C, these source feedback signals can be written into multiple pixel units of the display unit 200 to display images.
  • the gate feedback line of each gate driver 210 is connected to each gate line of each row of pixel units, and each gate feedback line 211 feeds back the gate delay time (gate output signal) of each gate line to each gate driver 210.
  • the source feedback lines 221A, 221B, and 221C of the source drivers 220A, 220B, and 220C are respectively connected to the gate feedback line 211 corresponding to each row of pixel units, and the source feedback lines 221A, 221B, and 221C are connected to each The source drivers 220A, 220B, and 220C.
  • each source feedback circuit 221A, 221B, 221C receives the gate output signal of each gate line transmitted by the gate feedback circuit 211, which means that the gate delay time of the gate line will also be fed back to each source driver 220A ,220B,220C.
  • Each source driver 220A, 220B, 220C converts the gate output signal into a gate feedback signal and transmits it to the timing controller 300.
  • the timing controller 300 can control each of the source drivers 220A, 220B, and 220C based on the gate feedback signal to change the delay time of the source feedback signal in one horizontal scanning period. That is, the timing controller 300 outputs the source feedback signal to each source driver 220A, 220B, 220C to adjust the charging time of the pixel unit corresponding to each source driver 220A, 220B, 220C in a period, so each of the source feedback The delay time corresponding to the signal is different from each other.
  • the delay time of the source feedback signals respectively responds to the distance from the source lines to the gate driver 210. The longer the distance, the longer the delay time, thereby compensating for the gate delay time of the output signal of each gate line, and minimizing the difference in the charging time of the pixel unit corresponding to each source.
  • FIG. 3 is a timing diagram of the pixel driving circuit applied to the display panel. 3 and FIG. 2, the gate driver 210 outputs a gate driving signal to the gate line.
  • the gate drive signal will be delayed due to the gate RC load. Therefore, the gate drive signal received by the pixel unit has different delay times.
  • the delay time of the gate driving signal is in response to the distance from the pixel unit to the gate driver. As the size of the display unit increases, the delay effect of the gate line will be more obvious. The delay effect is the most serious at the position farthest from the gate driver 210.
  • the gate feedback circuit 211 and the source feedback circuits 221A, 221B, and 221C can control the time point at which the source is driven by collecting gate output signals, and change the source drivers 220A by outputting source feedback signals.
  • the delay times of these source feedback signals are respectively in response to the distances from the source lines to the gate driver 210. The longer the distance, the greater the delay time. In other words, the delay times of these source feedback signals are different from each other.
  • the delay time of the source feedback signal transmitted from each source drive line to the source line can be set to be different from each other, but these source drivers 220A, 220B, and 220C will correspond to each other.
  • the charging time Td1, Td2, Td3 of each pixel unit tends to be the same.
  • the charging time of one pixel unit is Td1
  • the charging time of another pixel unit is Td2
  • the charging time of another pixel unit is Td3.
  • the difference in charging time between each pixel unit can be minimized, which can improve each pixel unit. The problem of inconsistency between the charging time.
  • the different source feedback signals output by the source driving circuits have different delay times.
  • the embodiments of the present invention are not limited to this. That is, the delay times of these source feedback signals are respectively in response to the distance from the source line to the gate driver. The longer the distance, the greater the delay time.
  • the operation method includes: Step S01: providing one or more gate drivers for outputting a gate output signal, wherein each gate driver includes a gate feedback circuit connected to each gate line of each row of pixel units; Step S02: Provide one or more source drivers for receiving the gate output signal and converting the gate output signal into a gate feedback signal, wherein each source driver includes a source feedback circuit,
  • the gate feedback lines corresponding to each row of pixel units are respectively connected to each of the source drivers, and each source feedback line receives the gate output signal of each gate line transmitted by each gate feedback line, and each source The driver is used to convert the gate output signal into a gate feedback signal; and step S
  • the delay times corresponding to the source output signals are different from each other.
  • the period is a horizontal scanning period.
  • the charging time of the pixel units in each column is the same.
  • the delay time respectively corresponds to a distance from the source line to the gate driver, that is, the delay time of the source feedback signals issued by the timing controller is respectively in response to the source The distance from the line to the gate driver.
  • the present disclosure provides a pixel driving circuit of a display unit and a driving method thereof.
  • the timing controller calculates the delay time between each source through the gate feedback signal of each source driver, and outputs the source feedback signal to each source.
  • the electrode driver adjusts the charging time of each source to compensate for the difference in the charging time of the pixel caused by the gate time delay, minimizes the difference in the charging time of the pixel unit corresponding to each source, and makes different sources in the same row of pixel units
  • the source feedback signal output by the driver has different delay times in one horizontal scanning period, so as to reduce the difference in the charging time between the pixel units.

Abstract

A pixel drive circuit of a display unit, and a driving method therefor. The pixel drive circuit comprises: one or more gate drivers, one or more source drivers, and a time sequence controller. Each gate driver comprises a gate feedback line. Each source driver comprises a source feedback line. Source feedback lines receive gate output signals of gate lines transferred by gate feedback lines of pixel units in the same row. The source drivers are used for converting the gate output signal into a gate feedback signal, transferring same to the time sequence controller for calculating one delay time, and adjusting the charging time of pixel units corresponding to the source drivers in one period. The beneficial effect of minimizing the difference in the charging time of the pixel units is achieved.

Description

显示单元的像素驱动电路及其驱动方法Pixel driving circuit of display unit and driving method thereof 技术领域Technical field
本揭示涉及显示技术领域,具体涉及一种显示单元的像素驱动电路及其驱动方法。The present disclosure relates to the field of display technology, in particular to a pixel driving circuit of a display unit and a driving method thereof.
背景技术Background technique
液晶显示面板包括扫描线和数据线,数据线通过数据驱动模块来驱动,扫描线通过扫描驱动模块来驱动。现有的大尺寸液晶显示面板100,如图1A所示,由于从栅极驱动装置10至显示面板100两端的信号线要比至显示面板100中央的信号线要长,而这样的电阻差异会使得数据信号到达第一行的时候的失真程度会有差异,如图1A示意,像素充电时间T2(栅极驱动装置10到显示面板100另一端的距离)远大于像素充电时间T1(栅极驱动装置10到显示面板100中间的距离),显示面板100相对于栅极驱动装置10的另一端的像素充电时间T2明显大于显示面板的栅极驱动装置10的一端的像素充电时间T1,显示面板100各像素单元的充电不均匀,会导致显示面板100的显示效果不佳以及显示亮度不均匀。The liquid crystal display panel includes scan lines and data lines, the data lines are driven by a data driving module, and the scan lines are driven by a scan driving module. The existing large-size liquid crystal display panel 100, as shown in FIG. 1A, since the signal line from the gate driving device 10 to the two ends of the display panel 100 is longer than the signal line to the center of the display panel 100, the resistance difference will be As shown in Figure 1A, the pixel charging time T2 (the distance from the gate driving device 10 to the other end of the display panel 100) is much longer than the pixel charging time T1 (gate driving). The distance between the device 10 and the display panel 100), the pixel charging time T2 at the other end of the display panel 100 relative to the gate driving device 10 is significantly longer than the pixel charging time T1 at one end of the gate driving device 10 of the display panel, and the display panel 100 The uneven charging of each pixel unit will result in poor display effect of the display panel 100 and uneven display brightness.
并且随着显示面板的尺寸和分辨率的增大,如图1B所示,栅极时间延迟(RC Delay)会随着显示面板的尺寸的增加而增加。栅极驱动装置10输出栅极驱动信号至栅极线。栅极驱动信号会因为栅极RC负载导致传输延迟。源极驱动装置20A, 20B, 20C输出源极驱动信号的时间同样受到延迟,使像素单元所收到的栅极驱动信号具有不同的延迟时间。并且随着显示面板的分辨率和刷新频率的增加,像素充电时间相对减少。栅极时间延迟(RC Delay)会导致显示面板各区域的像素单元的像素充电时间T1,T2,T3不一致,距离栅极驱动装置10最远的源极驱动装置20C对应的像素充电时间T3最大,如此会导致面板显示亮度不均匀,严重时会导致画面色偏。And as the size and resolution of the display panel increase, as shown in Figure 1B, the gate time delay (RC Delay) will increase as the size of the display panel increases. The gate driving device 10 outputs a gate driving signal to the gate line. The gate drive signal will be delayed due to the gate RC load. Source driver 20A, The time at which the source driving signal is output by 20B and 20C is also delayed, so that the gate driving signal received by the pixel unit has different delay times. And as the resolution and refresh frequency of the display panel increase, the pixel charging time is relatively reduced. Gate time delay (RC Delay) will cause the pixel charging time T1, T2, and T3 of the pixel units in each area of the display panel to be inconsistent. The source driving device 20C that is the farthest from the gate driving device 10 corresponds to the maximum pixel charging time T3, which will cause the panel display brightness Uneven, severe color shift will result in the picture.
因此,有必要提供一种显示单元的像素驱动电路及其驱动方法,解决现有技术中面板的像素充电时间不一致导致画面色偏缺陷。Therefore, it is necessary to provide a pixel driving circuit of a display unit and a driving method thereof to solve the problem of color shift of the screen caused by the inconsistent charging time of the pixels of the panel in the prior art.
技术问题technical problem
现有的显示面板的栅极时间延迟(RC Delay)会导致显示面板各区域的像素单元的像素充电时间不一致,如此会导致面板显示亮度不均匀的技术缺陷。The gate time delay (RC Delay) of the existing display panel will cause the pixel charging time of the pixel units in each area of the display panel to be inconsistent, which will cause the technical defect of uneven display brightness of the panel.
技术解决方案Technical solutions
为了解决上述技术问题,本揭示提供一种显示单元的像素驱动电路,所述显示单元包括多个阵列排布的像素单元,每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述像素驱动电路包括:一个或多个栅极驱动器,用于输出一栅极输出信号,各栅极驱动器包括一栅极反馈线路,连接每一行像素单元的每一栅极线;一个或多个源极驱动器,各源极驱动器包括一源极反馈线路,分别连接每一行像素单元对应的所述栅极反馈线路并连接各所述源极驱动器,各源极反馈线路接收各栅极反馈线路所传送的各栅极线的栅极输出信号,各源极驱动器用于将所述栅极输出信号转换为一栅极反馈信号;一时序控制器,连接各所述源极驱动器并接收来自各源极驱动器的所述栅极反馈信号,并根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器用于调整各源极驱动器对应的像素单元于一期间内的一充电时间;其中,基于各所述栅极反馈信号计算出的所述延迟时间分别响应于像素单元至栅极驱动器的距离。In order to solve the above technical problems, the present disclosure provides a pixel drive circuit of a display unit. The display unit includes a plurality of pixel units arranged in an array. Each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate. Polar line connection, the pixel driving circuit includes: one or more gate drivers for outputting a gate output signal, and each gate driver includes a gate feedback circuit connected to each gate line of each row of pixel units One or more source drivers, each source driver includes a source feedback circuit, respectively connected to the corresponding gate feedback circuit of each row of pixel units and connected to each of the source drivers, each source feedback circuit receives each The gate output signal of each gate line transmitted by the gate feedback circuit, and each source driver is used to convert the gate output signal into a gate feedback signal; a timing controller is connected to each of the source drivers And receive the gate feedback signal from each source driver, and calculate a delay time according to the gate feedback signal, and output a source feedback signal to each source driver for adjusting the corresponding source driver A charging time of the pixel unit in a period; wherein the delay time calculated based on each of the gate feedback signals respectively responds to the distance from the pixel unit to the gate driver.
根据本文描述的一实施例,各所述源极输出信号对应的延迟时间互不相同。According to an embodiment described herein, the delay times corresponding to the source output signals are different from each other.
根据本文描述的一实施例,所述期间为一水平扫描期间。According to an embodiment described herein, the period is a horizontal scanning period.
根据本文描述的一实施例,每一列所述像素单元的充电时间互为相同。According to an embodiment described herein, the charging time of the pixel units in each column is the same as each other.
根据本文描述的一实施例,所述延迟时间分别对应于所述源极线至所述栅极驱动器的一距离。According to an embodiment described herein, the delay time respectively corresponds to a distance from the source line to the gate driver.
为了解决上述技术问题,本揭示另提供一种显示单元的像素驱动电路,所述显示单元包括多个阵列排布的像素单元,每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述像素驱动电路包括:一个或多个栅极驱动器,用于输出一栅极输出信号,各栅极驱动器包括一栅极反馈线路,连接每一行像素单元的每一栅极线;一个或多个源极驱动器,各源极驱动器包括一源极反馈线路,分别连接每一行像素单元对应的所述栅极反馈线路并连接各所述源极驱动器,各源极反馈线路接收各栅极反馈线路所传送的各栅极线的栅极输出信号,各源极驱动器用于将所述栅极输出信号转换为一栅极反馈信号;一时序控制器,连接各所述源极驱动器并接收来自各源极驱动器的所述栅极反馈信号,并根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器用于调整各源极驱动器对应的像素单元于一期间内的一充电时间。In order to solve the above technical problems, the present disclosure also provides a pixel drive circuit for a display unit. The display unit includes a plurality of pixel units arranged in an array. Each column of pixel units is connected to a source line, and each row of pixel units is connected to a Gate line connection, the pixel drive circuit includes: one or more gate drivers for outputting a gate output signal, and each gate driver includes a gate feedback circuit connected to each gate of each row of pixel units Line; one or more source drivers, each source driver includes a source feedback circuit, respectively connected to each row of pixel unit corresponding to the gate feedback circuit and connected to each of the source drivers, each source feedback circuit receives Each gate output signal of each gate line transmitted by each gate feedback circuit, each source driver is used to convert the gate output signal into a gate feedback signal; a timing controller connected to each of the sources The driver also receives the gate feedback signal from each source driver, calculates a delay time according to the gate feedback signal, and outputs a source feedback signal to each source driver for adjusting the corresponding source driver The pixel unit is charged for a period of time.
根据本文描述的一实施例,各所述源极输出信号对应的延迟时间互不相同。According to an embodiment described herein, the delay times corresponding to the source output signals are different from each other.
根据本文描述的一实施例,所述期间为一水平扫描期间。According to an embodiment described herein, the period is a horizontal scanning period.
根据本文描述的一实施例,每一列所述像素单元的充电时间互为相同。According to an embodiment described herein, the charging time of the pixel units in each column is the same as each other.
根据本文描述的一实施例,所述延迟时间分别对应于所述源极线至所述栅极驱动器的一距离。According to an embodiment described herein, the delay time respectively corresponds to a distance from the source line to the gate driver.
为了解决上述技术问题,本揭示另提供一种显示单元的像素驱动电路的驱动方法,以驱动一显示单元的多个阵列排布的像素单元,每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述操作方法包括:提供一个或多个栅极驱动器,用于输出一栅极输出信号,其中各栅极驱动器包括一栅极反馈线路,连接每一行像素单元的每一栅极线;提供一个或多个源极驱动器,用于接收所述栅极输出信号,并将所述栅极输出信号转换为一栅极反馈信号,其中各源极驱动器包括一源极反馈线路,分别连接每一行像素单元对应的所述栅极反馈线路并连接各所述源极驱动器,各源极反馈线路接收各栅极反馈线路所传送的各栅极线的栅极输出信号,各源极驱动器用于将所述栅极输出信号转换为一栅极反馈信号;以及提供一时序控制器,根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器,使各源极驱动器对应的像素单元的一充电时间根据所述延迟时间被调整。In order to solve the above technical problems, the present disclosure provides another method for driving a pixel driving circuit of a display unit to drive a plurality of pixel units arranged in an array of a display unit. Each column of pixel units is connected to a source line, and each row The pixel unit is connected to a gate line, and the operation method includes: providing one or more gate drivers for outputting a gate output signal, wherein each gate driver includes a gate feedback line connected to each row of pixel units Provide one or more source drivers for receiving the gate output signal and converting the gate output signal into a gate feedback signal, wherein each source driver includes a source The electrode feedback circuit is respectively connected to the gate feedback circuit corresponding to each row of pixel units and connected to each of the source drivers, and each source feedback circuit receives the gate output signal of each gate line transmitted by each gate feedback circuit , Each source driver is used to convert the gate output signal into a gate feedback signal; and provide a timing controller, calculate a delay time according to the gate feedback signal, and output a source feedback signal to For each source driver, a charging time of the pixel unit corresponding to each source driver is adjusted according to the delay time.
根据本文描述的一实施例,各所述源极输出信号对应的延迟时间互不相同。According to an embodiment described herein, the delay times corresponding to the source output signals are different from each other.
根据本文描述的一实施例,所述期间为一水平扫描期间。According to an embodiment described herein, the period is a horizontal scanning period.
根据本文描述的一实施例,每一列所述像素单元的充电时间互为相同。According to an embodiment described herein, the charging time of the pixel units in each column is the same as each other.
根据本文描述的一实施例,所述延迟时间分别对应于所述源极线至所述栅极驱动器的一距离。According to an embodiment described herein, the delay time respectively corresponds to a distance from the source line to the gate driver.
有益效果Beneficial effect
本揭示的有益效果在于,时序控制器通过各源极驱动器的栅极反馈信号计算出各源极之间的延迟时间,并输出源极反馈信号至各源极驱动器,以调整各源极的充电时间来补偿因为栅极时间延迟所造成像素的充电时间差,使各源极对应的像素单元的充电时间差异最小化,并使同一行像素单元中不同源极驱动器所输出的源极反馈信号在一个水平扫描期间内具有不同的延迟时间,以便减少各像素单元间的充电时间的差异化。The beneficial effect of the present disclosure is that the timing controller calculates the delay time between each source through the gate feedback signal of each source driver, and outputs the source feedback signal to each source driver to adjust the charging of each source. Time to compensate for the difference in the charging time of the pixels caused by the gate time delay, minimize the difference in the charging time of the pixel units corresponding to each source, and make the source feedback signals output by different source drivers in the same row of pixel units be in one There are different delay times in the horizontal scanning period in order to reduce the difference in the charging time between the pixel units.
附图说明Description of the drawings
图1A及图1B为显示面板的各像素单元的充电时间不一致的示意图。1A and 1B are schematic diagrams showing that the charging time of each pixel unit of the display panel is not consistent.
图2为本揭示像素驱动电路的电路方块示意图。FIG. 2 is a circuit block diagram of the disclosed pixel driving circuit.
图3为本揭示像素驱动电路应用在显示面板上的时序示意图。FIG. 3 is a timing diagram of the application of the pixel driving circuit on the display panel of the disclosure.
图4为本揭示像素驱动电路的驱动方法流程示意图。FIG. 4 is a schematic flow chart of the driving method of the disclosed pixel driving circuit.
本发明的实施方式Embodiments of the invention
以下各实施例的说明是参考附加的图式,用以例示本揭示可用以实施的特定实施例。The description of the following embodiments refers to the attached drawings to illustrate specific embodiments that the present disclosure can be implemented.
请参阅图2,其为本揭示像素驱动电路的电路方块示意图,在本揭示的一实施例中,揭示提供一种显示单元200的像素驱动电路,所述显示单元200包括多个阵列排布的像素单元(未图示),每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述像素驱动电路包括:一个或多个栅极驱动器210,用于输出一栅极输出信号,各栅极驱动器210包括一栅极反馈线路211,连接每一行像素单元的每一栅极线;一个或多个源极驱动器220A,220B,220C,各源极驱动器220A,220B,220C包括一源极反馈线路221A,221B,221C,分别连接每一行像素单元对应的所述栅极反馈线路211并连接各所述源极驱动器220A,220B,220C,各源极反馈线路221A,221B,221C接收各栅极反馈线路211所传送的各栅极线的栅极输出信号,各源极驱动器220用于将所述栅极输出信号转换为一栅极反馈信号;一时序控制器300,连接各所述源极驱动器220A,220B,220C并接收来自各源极驱动器220A,220B,220C的所述栅极反馈信号,并根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器220A,220B,220C用于调整各源极驱动器220A,220B,220C对应的像素单元于一期间内的一充电时间。Please refer to FIG. 2, which is a circuit block diagram of the pixel driving circuit of the present disclosure. In an embodiment of the present disclosure, a pixel driving circuit of a display unit 200 is disclosed. The display unit 200 includes a plurality of arrays arranged Pixel units (not shown). Each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate line. The pixel driving circuit includes: one or more gate drivers 210 for outputting a Gate output signal. Each gate driver 210 includes a gate feedback line 211 connected to each gate line of each row of pixel units; one or more source drivers 220A, 220B, 220C, and each source driver 220A, 220B , 220C includes a source feedback circuit 221A, 221B, 221C, respectively connected to the gate feedback circuit 211 corresponding to each row of pixel units and connected to each of the source drivers 220A, 220B, 220C, each source feedback circuit 221A, 221B, 221C receive the gate output signal of each gate line transmitted by each gate feedback circuit 211, and each source driver 220 is used to convert the gate output signal into a gate feedback signal; a timing controller 300 , Connect each of the source drivers 220A, 220B, 220C and receive the gate feedback signal from each of the source drivers 220A, 220B, 220C, calculate a delay time according to the gate feedback signal, and output a The source feedback signal to each source driver 220A, 220B, 220C is used to adjust a charging time of the pixel unit corresponding to each source driver 220A, 220B, 220C in a period.
其中,所述显示单元可以例如包括M行N列像素单元101,其中M和N均为正整数。每一列像素单元与源极线(数据线)连接,每一行像素单元与栅极线(扫描线)连接,在一实施例中,每一列所述像素单元的充电时间互为相同。以下将以源极驱动器220A,220B,220C作为说明范例。其余源极驱动器可以参照源极驱动器220A,220B,220C的相关说明而类推,故不再赘述。The display unit may, for example, include M rows and N columns of pixel units 101, where M and N are both positive integers. Each column of pixel units is connected to a source line (data line), and each row of pixel units is connected to a gate line (scanning line). In one embodiment, the charging time of the pixel units in each column is the same. The following will take the source drivers 220A, 220B, and 220C as examples for illustration. The rest of the source drivers can be deduced by referring to the relevant descriptions of the source drivers 220A, 220B, and 220C, so they will not be repeated.
所述源极驱动器220A,220B,220C耦接于时序控制器300与显示单元200之间。源极驱动器220A,220B,220C各包括一个源极反馈线路221A,221B,221C以及多个驱动线路(未图示)。这些驱动线路以一对一方式输出多个源极反馈信号给显示单元200的多个源极线。举例来说,在源极驱动器220A,220B,220C接收到时序控制器300所提供的水平扫描信号后,此水平扫描信号便在这些驱动线路之间逐级递移。The source drivers 220A, 220B, and 220C are coupled between the timing controller 300 and the display unit 200. The source drivers 220A, 220B, and 220C each include a source feedback circuit 221A, 221B, 221C and a plurality of driving circuits (not shown). These driving lines output multiple source feedback signals to multiple source lines of the display unit 200 in a one-to-one manner. For example, after the source drivers 220A, 220B, and 220C receive the horizontal scan signal provided by the timing controller 300, the horizontal scan signal is gradually shifted among these driving lines.
同样地,所述栅极驱动器210耦接于时序控制器300与显示单元200之间。在栅极驱动器210接收到时序控制器300所提供的垂直扫描信号后,垂直扫描信号便在显示单元内开始逐级递移。Similarly, the gate driver 210 is coupled between the timing controller 300 and the display unit 200. After the gate driver 210 receives the vertical scanning signal provided by the timing controller 300, the vertical scanning signal starts to move gradually in the display unit.
在本实施例中,所述期间为一水平扫描期间,因此,源极驱动器220A,220B,220C便可依据水平扫描信号之递移位置而一个接着一个地驱动显示单元200的每一条源极线。配合源极驱动器220A,220B,220C的扫描时序,这些源极反馈信号可以被写入显示单元200的多个像素单元中以显示影像。In this embodiment, the period is a horizontal scanning period. Therefore, the source drivers 220A, 220B, and 220C can drive each source line of the display unit 200 one by one according to the shift position of the horizontal scanning signal. . In accordance with the scanning timing of the source drivers 220A, 220B, and 220C, these source feedback signals can be written into multiple pixel units of the display unit 200 to display images.
各栅极驱动器210的栅极反馈线路连接每一行像素单元的每一栅极线,各栅极反馈线路211将各栅极线的栅极延迟时间 (栅极输出信号)反馈至各栅极驱动器210。而各源极驱动器220A,220B,220C的源极反馈线路221A,221B,221C分别连接每一行像素单元对应的所述栅极反馈线路211,各源极反馈线路221A,221B,221C并连接至各所述源极驱动器220A,220B,220C。因此,各源极反馈线路221A,221B,221C接收栅极反馈线路211所传送的各栅极线的栅极输出信号,即代表栅极线的栅极延迟时间同样会反馈到各源极驱动器220A,220B,220C。各源极驱动器220A,220B,220C将所述栅极输出信号转换为栅极反馈信号并传送至时序控制器300。The gate feedback line of each gate driver 210 is connected to each gate line of each row of pixel units, and each gate feedback line 211 feeds back the gate delay time (gate output signal) of each gate line to each gate driver 210. The source feedback lines 221A, 221B, and 221C of the source drivers 220A, 220B, and 220C are respectively connected to the gate feedback line 211 corresponding to each row of pixel units, and the source feedback lines 221A, 221B, and 221C are connected to each The source drivers 220A, 220B, and 220C. Therefore, each source feedback circuit 221A, 221B, 221C receives the gate output signal of each gate line transmitted by the gate feedback circuit 211, which means that the gate delay time of the gate line will also be fed back to each source driver 220A ,220B,220C. Each source driver 220A, 220B, 220C converts the gate output signal into a gate feedback signal and transmits it to the timing controller 300.
时序控制器300可以基于栅极反馈信号来控制各源极驱动器220A,220B,220C从而改变所述源极反馈信号于一个水平扫描期间内的延迟时间。即时序控制器300输出源极反馈信号至各源极驱动器220A,220B,220C以调整各源极驱动器220A,220B,220C对应的像素单元于一期间内的充电时间,因此各所述源极反馈信号对应的延迟时间互不相同。其中,这些源极反馈信号的延迟时间分别响应于这些源极线至栅极驱动器210的距离。距离越远,则延迟时间越大,从而补偿各栅极线输出信号的栅极延迟时间,使各源极所对应的像素单元的充电时间的差异最小化。The timing controller 300 can control each of the source drivers 220A, 220B, and 220C based on the gate feedback signal to change the delay time of the source feedback signal in one horizontal scanning period. That is, the timing controller 300 outputs the source feedback signal to each source driver 220A, 220B, 220C to adjust the charging time of the pixel unit corresponding to each source driver 220A, 220B, 220C in a period, so each of the source feedback The delay time corresponding to the signal is different from each other. Wherein, the delay time of the source feedback signals respectively responds to the distance from the source lines to the gate driver 210. The longer the distance, the longer the delay time, thereby compensating for the gate delay time of the output signal of each gate line, and minimizing the difference in the charging time of the pixel unit corresponding to each source.
举例来说,图3是像素驱动电路应用在显示面板上的时序示意图。请参照图3与图2,栅极驱动器210输出栅极驱动信号至栅极线。栅极驱动信号会因为栅极RC负载导致传输延迟。使得像素单元所收到的栅极驱动信号具有不同的延迟时间。栅极驱动信号的所述延迟时间响应于像素单元至栅极驱动器的距离。随着显示单元的尺寸加大,栅极线的延迟效应会越明显。在距离栅极驱动器210最远的位置,其延迟效应最为严重。For example, FIG. 3 is a timing diagram of the pixel driving circuit applied to the display panel. 3 and FIG. 2, the gate driver 210 outputs a gate driving signal to the gate line. The gate drive signal will be delayed due to the gate RC load. Therefore, the gate drive signal received by the pixel unit has different delay times. The delay time of the gate driving signal is in response to the distance from the pixel unit to the gate driver. As the size of the display unit increases, the delay effect of the gate line will be more obvious. The delay effect is the most serious at the position farthest from the gate driver 210.
所述栅极反馈线路211、所述源极反馈线路221A,221B,221C可以通过收集栅极输出信号来控制源极被驱动的时间点,通过输出源极反馈信号来改变各源极驱动器220A,220B,220C对应的各像素单元于一个水平扫描期间内进行充电的延迟时间。The gate feedback circuit 211 and the source feedback circuits 221A, 221B, and 221C can control the time point at which the source is driven by collecting gate output signals, and change the source drivers 220A by outputting source feedback signals. The delay time for each pixel unit corresponding to 220B and 220C to charge in one horizontal scanning period.
这些源极反馈信号的延迟时间分别响应于这些源极线至栅极驱动器210的距离。距离越远,则延迟时间越大。也就是说,这些源极反馈信号的延迟时间互不相同。举例来说(但不限于此),各源极驱动线路传输至源极线的源极反馈信号的延迟时间可以被设定为互不相同,但是会使这些源极驱动器220A,220B,220C对应的各像素单元的充电时间Td1,Td2,Td3趋于相同。The delay times of these source feedback signals are respectively in response to the distances from the source lines to the gate driver 210. The longer the distance, the greater the delay time. In other words, the delay times of these source feedback signals are different from each other. For example (but not limited to this), the delay time of the source feedback signal transmitted from each source drive line to the source line can be set to be different from each other, but these source drivers 220A, 220B, and 220C will correspond to each other. The charging time Td1, Td2, Td3 of each pixel unit tends to be the same.
对同一条栅极线而言,一像素单元的充电时间为Td1,另一像素单元的充电时间为Td2,而又一像素单元的充电时间为Td3。从图3可以知道,由于不同源极驱动线路所输出的源极驱动信号于水平扫描期间内具有不同的延迟时间,因此各个像素单元间的充电时间的差异可以被最小化,可以改善各个像素单元之间的充电时间不一致的问题。For the same gate line, the charging time of one pixel unit is Td1, the charging time of another pixel unit is Td2, and the charging time of another pixel unit is Td3. As can be seen from Figure 3, since the source drive signals output by different source drive circuits have different delay times during the horizontal scanning period, the difference in charging time between each pixel unit can be minimized, which can improve each pixel unit. The problem of inconsistency between the charging time.
于上述实施例中,这些源极驱动线路所输出不同源极反馈信号具有不同的延迟时间。无论如何,本发明的实施方式并不限于此。也就是说,这些源极反馈信号的延迟时间分别响应于所述源极线至栅极驱动器的距离。距离越远,则延迟时间越大。In the above embodiment, the different source feedback signals output by the source driving circuits have different delay times. In any case, the embodiments of the present invention are not limited to this. That is, the delay times of these source feedback signals are respectively in response to the distance from the source line to the gate driver. The longer the distance, the greater the delay time.
请续参阅图4,为本揭示像素驱动电路的驱动方法流程示意图。一种显示单元的像素驱动电路的驱动方法,以驱动一显示单元的多个阵列排布的像素单元,每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述操作方法包括:步骤S01:提供一个或多个栅极驱动器,用于输出一栅极输出信号,其中各栅极驱动器包括一栅极反馈线路,连接每一行像素单元的每一栅极线;步骤S02:提供一个或多个源极驱动器,用于接收所述栅极输出信号,并将所述栅极输出信号转换为一栅极反馈信号,其中各源极驱动器包括一源极反馈线路,分别连接每一行像素单元对应的所述栅极反馈线路并连接各所述源极驱动器,各源极反馈线路接收各栅极反馈线路所传送的各栅极线的栅极输出信号,各源极驱动器用于将所述栅极输出信号转换为一栅极反馈信号;以及步骤S03:提供一时序控制器,根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器,使各源极驱动器对应的像素单元的一充电时间根据所述延迟时间被调整。Please continue to refer to FIG. 4, which is a schematic flowchart of the driving method of the pixel driving circuit of the present disclosure. A method for driving a pixel drive circuit of a display unit to drive a plurality of pixel units arranged in an array of a display unit, each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate line, so The operation method includes: Step S01: providing one or more gate drivers for outputting a gate output signal, wherein each gate driver includes a gate feedback circuit connected to each gate line of each row of pixel units; Step S02: Provide one or more source drivers for receiving the gate output signal and converting the gate output signal into a gate feedback signal, wherein each source driver includes a source feedback circuit, The gate feedback lines corresponding to each row of pixel units are respectively connected to each of the source drivers, and each source feedback line receives the gate output signal of each gate line transmitted by each gate feedback line, and each source The driver is used to convert the gate output signal into a gate feedback signal; and step S03: provide a timing controller, calculate a delay time according to the gate feedback signal, and output a source feedback signal to each The source driver enables a charging time of the pixel unit corresponding to each source driver to be adjusted according to the delay time.
在一些实施例中,各所述源极输出信号对应的延迟时间互不相同。在另一些实施例中,所述期间为一水平扫描期间。并且在一些实施例中,每一列所述像素单元的充电时间互为相同。In some embodiments, the delay times corresponding to the source output signals are different from each other. In other embodiments, the period is a horizontal scanning period. And in some embodiments, the charging time of the pixel units in each column is the same.
在一些实施例中,所述延迟时间分别对应于所述源极线至所述栅极驱动器的一距离,即时序控制器所发出的这些源极反馈信号的延迟时间分别响应于所述源极线至栅极驱动器的距离。In some embodiments, the delay time respectively corresponds to a distance from the source line to the gate driver, that is, the delay time of the source feedback signals issued by the timing controller is respectively in response to the source The distance from the line to the gate driver.
本揭示提供的一种显示单元的像素驱动电路及其驱动方法,时序控制器通过各源极驱动器的栅极反馈信号计算出各源极之间的延迟时间,并输出源极反馈信号至各源极驱动器,以调整各源极的充电时间来补偿因为栅极时间延迟所造成像素的充电时间差,使各源极对应的像素单元的充电时间差异最小化,并使同一行像素单元中不同源极驱动器所输出的源极反馈信号在一个水平扫描期间内具有不同的延迟时间,以便减少各像素单元间的充电时间的差异化。The present disclosure provides a pixel driving circuit of a display unit and a driving method thereof. The timing controller calculates the delay time between each source through the gate feedback signal of each source driver, and outputs the source feedback signal to each source The electrode driver adjusts the charging time of each source to compensate for the difference in the charging time of the pixel caused by the gate time delay, minimizes the difference in the charging time of the pixel unit corresponding to each source, and makes different sources in the same row of pixel units The source feedback signal output by the driver has different delay times in one horizontal scanning period, so as to reduce the difference in the charging time between the pixel units.
以上所述是本揭示的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本揭示原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也视为本揭示的保护范围。The above are the preferred embodiments of the present disclosure. It should be pointed out that for those of ordinary skill in the art, without departing from the principles of the present disclosure, several improvements and modifications can be made, and these improvements and modifications are also considered The scope of protection of this disclosure.

Claims (15)

  1. 一种显示单元的像素驱动电路,所述显示单元包括多个阵列排布的像素单元,每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述像素驱动电路包括:A pixel drive circuit of a display unit. The display unit includes a plurality of pixel units arranged in an array. Each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate line. The pixel drive circuit include:
    一个或多个栅极驱动器,用于输出一栅极输出信号,各栅极驱动器包括一栅极反馈线路,连接每一行像素单元的每一栅极线;One or more gate drivers for outputting a gate output signal, each gate driver includes a gate feedback line connected to each gate line of each row of pixel units;
    一个或多个源极驱动器,各源极驱动器包括一源极反馈线路,分别连接每一行像素单元对应的所述栅极反馈线路并连接各所述源极驱动器,各源极反馈线路接收各栅极反馈线路所传送的各栅极线的栅极输出信号,各源极驱动器用于将所述栅极输出信号转换为一栅极反馈信号;One or more source drivers, each source driver includes a source feedback circuit, respectively connected to the gate feedback circuit corresponding to each row of pixel units and connected to each of the source drivers, each source feedback circuit receives each gate The gate output signal of each gate line transmitted by the pole feedback circuit, and each source driver is used to convert the gate output signal into a gate feedback signal;
    一时序控制器,连接各所述源极驱动器并接收来自各源极驱动器的所述栅极反馈信号,并根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器用于调整各源极驱动器对应的像素单元于一期间内的一充电时间;A timing controller is connected to each of the source drivers and receives the gate feedback signal from each source driver, calculates a delay time according to the gate feedback signal, and outputs a source feedback signal to each The source driver is used to adjust a charging time of the pixel unit corresponding to each source driver in a period;
    其中,基于各所述栅极反馈信号计算出的所述延迟时间分别响应于像素单元至栅极驱动器的距离。Wherein, the delay time calculated based on each of the gate feedback signals respectively responds to the distance from the pixel unit to the gate driver.
  2. 根据权利要求1所述的显示单元的像素驱动电路,其中各所述源极输出信号对应的延迟时间互不相同。4. The pixel driving circuit of the display unit according to claim 1, wherein the delay times corresponding to the source output signals are different from each other.
  3. 根据权利要求1所述的显示单元的像素驱动电路,其中所述期间为一水平扫描期间。4. The pixel driving circuit of the display unit according to claim 1, wherein the period is a horizontal scanning period.
  4. 根据权利要求1所述的显示单元的像素驱动电路,其中每一列所述像素单元的充电时间互为相同。The pixel driving circuit of the display unit according to claim 1, wherein the charging time of the pixel units in each column is the same as each other.
  5. 根据权利要求1所述的显示单元的像素驱动电路,其中所述延迟时间分别对应于所述源极线至所述栅极驱动器的一距离。4. The pixel driving circuit of the display unit according to claim 1, wherein the delay time respectively corresponds to a distance from the source line to the gate driver.
  6. 一种显示单元的像素驱动电路,所述显示单元包括多个阵列排布的像素单元,每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述像素驱动电路包括:A pixel drive circuit of a display unit. The display unit includes a plurality of pixel units arranged in an array. Each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate line. The pixel drive circuit include:
    一个或多个栅极驱动器,用于输出一栅极输出信号,各栅极驱动器包括一栅极反馈线路,连接每一行像素单元的每一栅极线;One or more gate drivers for outputting a gate output signal, each gate driver includes a gate feedback line connected to each gate line of each row of pixel units;
    一个或多个源极驱动器,各源极驱动器包括一源极反馈线路,分别连接每一行像素单元对应的所述栅极反馈线路并连接各所述源极驱动器,各源极反馈线路接收各栅极反馈线路所传送的各栅极线的栅极输出信号,各源极驱动器用于将所述栅极输出信号转换为一栅极反馈信号;One or more source drivers, each source driver includes a source feedback circuit, respectively connected to the gate feedback circuit corresponding to each row of pixel units and connected to each of the source drivers, each source feedback circuit receives each gate The gate output signal of each gate line transmitted by the pole feedback circuit, and each source driver is used to convert the gate output signal into a gate feedback signal;
    一时序控制器,连接各所述源极驱动器并接收来自各源极驱动器的所述栅极反馈信号,并根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器用于调整各源极驱动器对应的像素单元于一期间内的一充电时间。A timing controller is connected to each of the source drivers and receives the gate feedback signal from each source driver, calculates a delay time according to the gate feedback signal, and outputs a source feedback signal to each The source driver is used to adjust a charging time of the pixel unit corresponding to each source driver in a period.
  7. 根据权利要求6所述的显示单元的像素驱动电路,其中各所述源极输出信号对应的延迟时间互不相同。7. The pixel driving circuit of the display unit according to claim 6, wherein the delay times corresponding to the source output signals are different from each other.
  8. 根据权利要求6所述的显示单元的像素驱动电路,其中所述期间为一水平扫描期间。7. The pixel driving circuit of the display unit according to claim 6, wherein the period is a horizontal scanning period.
  9. 根据权利要求6所述的显示单元的像素驱动电路,其中每一列所述像素单元的充电时间互为相同。7. The pixel driving circuit of the display unit according to claim 6, wherein the charging time of the pixel units in each column is the same.
  10. 根据权利要求6所述的显示单元的像素驱动电路,其中所述延迟时间分别对应于所述源极线至所述栅极驱动器的一距离。7. The pixel driving circuit of the display unit according to claim 6, wherein the delay time respectively corresponds to a distance from the source line to the gate driver.
  11. 一种显示单元的像素驱动电路的驱动方法,以驱动一显示单元的多个阵列排布的像素单元,每一列像素单元与一源极线连接,每一行像素单元与一栅极线连接,所述操作方法包括:A method for driving a pixel drive circuit of a display unit to drive a plurality of pixel units arranged in an array of a display unit, each column of pixel units is connected to a source line, and each row of pixel units is connected to a gate line, so The operation methods include:
    提供一个或多个栅极驱动器,用于输出一栅极输出信号,其中各栅极驱动器包括一栅极反馈线路,连接每一行像素单元的每一栅极线;One or more gate drivers are provided for outputting a gate output signal, wherein each gate driver includes a gate feedback circuit connected to each gate line of each row of pixel units;
    提供一个或多个源极驱动器,用于接收所述栅极输出信号,并将所述栅极输出信号转换为一栅极反馈信号,其中各源极驱动器包括一源极反馈线路,分别连接每一行像素单元对应的所述栅极反馈线路并连接各所述源极驱动器,各源极反馈线路接收各栅极反馈线路所传送的各栅极线的栅极输出信号,各源极驱动器用于将所述栅极输出信号转换为一栅极反馈信号;以及One or more source drivers are provided for receiving the gate output signal and converting the gate output signal into a gate feedback signal, wherein each source driver includes a source feedback circuit connected to each The gate feedback circuit corresponding to a row of pixel units is connected to each of the source drivers, each source feedback circuit receives the gate output signal of each gate line transmitted by each gate feedback circuit, and each source driver is used for Converting the gate output signal into a gate feedback signal; and
    提供一时序控制器,根据所述栅极反馈信号计算出一延迟时间,并输出一源极反馈信号至各源极驱动器,使各源极驱动器对应的像素单元的一充电时间根据所述延迟时间被调整。Provide a timing controller, calculate a delay time according to the gate feedback signal, and output a source feedback signal to each source driver, so that a charging time of the pixel unit corresponding to each source driver is based on the delay time Be adjusted.
  12. 根据权利要求11所述的显示单元的像素驱动电路的驱动方法,其中各所述源极输出信号对应的延迟时间互不相同。11. The driving method of the pixel driving circuit of the display unit according to claim 11, wherein the delay times corresponding to the source output signals are different from each other.
  13. 根据权利要求11所述的显示单元的像素驱动电路的驱动方法,其中所述期间为一水平扫描期间。11. The driving method of the pixel driving circuit of the display unit according to claim 11, wherein the period is a horizontal scanning period.
  14. 根据权利要求11所述的显示单元的像素驱动电路的驱动方法,其中每一列所述像素单元的充电时间互为相同。11. The driving method of the pixel driving circuit of the display unit according to claim 11, wherein the charging time of the pixel units in each column is the same.
  15. 根据权利要求11所述的显示单元的像素驱动电路的驱动方法,其中所述延迟时间分别对应于所述源极线至所述栅极驱动器的一距离。11. The driving method of the pixel driving circuit of the display unit according to claim 11, wherein the delay time respectively corresponds to a distance from the source line to the gate driver.
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