WO2014134869A1 - 像素电路、有机电致发光显示面板以及显示装置 - Google Patents

像素电路、有机电致发光显示面板以及显示装置 Download PDF

Info

Publication number
WO2014134869A1
WO2014134869A1 PCT/CN2013/075509 CN2013075509W WO2014134869A1 WO 2014134869 A1 WO2014134869 A1 WO 2014134869A1 CN 2013075509 W CN2013075509 W CN 2013075509W WO 2014134869 A1 WO2014134869 A1 WO 2014134869A1
Authority
WO
WIPO (PCT)
Prior art keywords
module
switching transistor
gate
transistor
reference signal
Prior art date
Application number
PCT/CN2013/075509
Other languages
English (en)
French (fr)
Inventor
马占洁
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/359,165 priority Critical patent/US9406259B2/en
Publication of WO2014134869A1 publication Critical patent/WO2014134869A1/zh

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G09G2300/0866—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes by means of changes in the pixel supply voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • Pixel circuit organic electroluminescence display panel, and display device
  • Embodiments of the present invention relate to a pixel circuit, an organic electroluminescence display panel, and a display device. Background technique
  • OLED Organic Light Emitting Diode
  • each transistor used to realize image display on the backplane has a structural unevenness in the fabrication process, as well as non-uniformity in electrical performance and stability, causing the threshold voltage Vth of the transistor to drift.
  • the transistor will cause a decrease in stability when it is turned on for a long time.
  • the load on the signal line becomes larger, resulting in voltage attenuation on the signal line, such as a change in the operating voltage.
  • An embodiment of the present invention provides a pixel circuit, including: a light emitting device, a capacitor, a driving control sub-module, a charging and resetting sub-module, and an illumination control sub-module, wherein the first end of the capacitor serves as a first node Connected to the first end of the charging and resetting sub-module and the first end of the lighting control sub-module, the second end of the capacitor as a second node and the second end of the charging and reset sub-module respectively The first end of the driving control sub-module is connected; the second end of the driving control sub-module is connected to the first reference signal end, and the third end of the driving control sub-module is respectively connected to the charging and reset sub-module The third end is connected to the second end of the illumination control submodule, The driving control sub-module drives the light-emitting device to emit light under the control of the second node; the fourth end of the charging and resetting sub-module is connected to the data signal end, and the
  • Another embodiment of the present invention provides an organic electroluminescence display panel comprising the above pixel circuit.
  • Another embodiment of the present invention provides a display device including the above-described organic electroluminescence display panel.
  • FIGS. 2a and 2b are schematic views showing an exemplary structure of a pixel circuit provided by an embodiment of the present invention
  • 3a to 3d are circuit timing diagrams of a pixel circuit provided by an embodiment of the present invention, respectively. detailed description
  • Embodiments of the present invention provide a pixel circuit, an organic electroluminescence display panel, and a display device for improving uniformity of image brightness in a display area of a display device.
  • the pixel circuit, the organic electroluminescence display panel, and the display device provided by the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
  • a pixel circuit according to an embodiment of the present invention includes a light emitting device D1, a capacitor CST, a driving control sub-module 1, a charging and resetting sub-module 2, and an illumination control sub-module 3.
  • the first end of the capacitor CST is connected as the first node A to the first end a of the charging and resetting sub-module 2 and the first end a of the lighting control sub-module 3, respectively.
  • the two ends as the second node B are respectively connected to the second end b of the charging and resetting submodule 2 and the first end a" of the driving control submodule 1.
  • V ref 1 is connected, the third end c" of the drive control sub-module 1 is connected to the third end c of the charging and reset sub-module 2 and the second end b of the illumination control sub-module 3, respectively, and the drive control sub-module 1 is in the The light-emitting device D1 is driven to emit light under the control of the two-node B.
  • the fourth end d of the charging and resetting sub-module 2 is connected to the data signal terminal DATA, and the fifth end e of the charging and resetting sub-module 2 is connected to the gate signal terminal GATE, and the charging and resetting sub-module 2
  • the data signal from the data signal terminal DATA is transmitted under the control of the gate signal terminal GATE.
  • the third end c of the illumination control sub-module 3 is connected to the illumination signal terminal EMISSION, and the fourth end d of the illumination control sub-module 3 is connected to the first reference signal terminal V rcf 1 for illumination control.
  • the fifth end e of the sub-module 3 is connected to the first end X of the light-emitting device D1, the second end y of the light-emitting device D1 is connected to the second reference signal terminal V rcf 2 , and the light-emitting control sub-module 3 is used at the light-emitting signal end Under the control of EMISSION, the light-emitting device D1 is driven to emit light.
  • the signal received by the first reference signal terminal V rcf l is a DC signal or an AC signal, that is, the first reference signal terminal V rcf 1 is connected to the DC signal source or the AC signal source;
  • the signal received by the second reference signal terminal V rcf 2 is a DC signal, that is, the second reference signal terminal V rcf 2 is connected to the DC signal source.
  • the driving current of the light emitting device D1 when the first reference signal terminal V rcf l outputs a DC voltage, the driving current of the light emitting device D1 is related to the DC voltage and the voltage V DATA of the data signal; at the first reference signal end Vrcf 1 When the AC voltage is output, the driving current for the light-emitting device D1 to emit light is only related to the voltage V DATA of the data signal.
  • the driving of the light emitting device D1 is illuminated Current is V th regardless of the threshold voltage of the driving transistor TO, it is possible to avoid the driving transistor affects the TO threshold voltage Vth of the light emitting device D1 is, i.e., the data signal using the same load to different pixel cells, thereby achieving the same luminance The image, thereby improving the uniformity of image brightness in the display area of the display device.
  • the driving transistor and the switching transistor in the embodiment of the present invention may be a Thin Film Transistor (TFT) or a Metal Oxide Semiconductor Field Effect Transistor (MOSFET). These transistors may be N-type transistors or P-type transistors, which are not limited herein. Moreover, in embodiments of the invention, the sources and drains of these transistors are interchangeable and are not particularly distinguished. In the description of the exemplary embodiments, the case where the driving transistor and the switching transistor are both thin film transistors (TFTs) will be described as an example; and, taking the one end of the three electrodes of the TFT in the drawing as the drain as an example Description.
  • TFT Thin Film Transistor
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • the driving control sub-module 1 may include a driving transistor TO, wherein the gate of the driving transistor TO is connected to the second node B, and the source thereof and the first reference signal end V rcf 1 is connected, and its drain is connected to the second end b of the illumination control sub-module 3.
  • the light emitting device D1 may be an organic light emitting diode (OLED).
  • the light-emitting device D1 realizes the light-emitting display under the action of the on-state current of the driving transistor TO.
  • the operation process of the above pixel circuit provided by the embodiment of the present invention can be divided into the following two stages.
  • the first stage the data writing phase, in which the pixel circuit realizes the data signal writing of the first node, and also realizes the voltage reset function of the second node.
  • the illumination control sub-module 3 is in the off state; the charging and reset sub-module 2 is in the on state, and the voltage V DATA of the data signal outputted by the data signal terminal DATA is loaded to the first node A through the charging and reset sub-module 2, Charging the capacitor CST; at the same time, the charging and reset sub-module 2 in the on state shorts the drain and the gate of the driving transistor TO, and realizes the storage of the threshold voltage ⁇ ⁇ of the driving transistor TO at the second node B. Reset function.
  • the second stage an illuminating phase, in which the charging and resetting sub-module 2 is in a closed state; the illuminating control sub-module 3 is in an on state, thereby turning on the first end X of the illuminating device D1 and driving The drain of the transistor TO, the driving transistor TO is turned on according to the voltage of the reference signal applied to the source and the voltage corresponding to the discharge of the capacitor CST, and drives the light-emitting device D1 to emit light.
  • the threshold voltage ⁇ ⁇ is a negative value, and the voltage of the first reference signal terminal V rcf l is greater than the second reference signal terminal V rcf .
  • the voltage of 2 as shown in FIG. 2a, at this time, the anode of the light-emitting device D1 is the first end of the light-emitting device, and is connected to the light-emitting control sub-module 3; when the driving transistor TO is an N-type transistor, the threshold voltage ⁇ ⁇ is positive
  • the value of the voltage of the first reference signal terminal V ref 1 is smaller than the voltage of the second reference signal terminal V ref 2 , as shown in FIG. 2 b , the negative electrode of the light-emitting device D1 is the first end of the light-emitting device, and the light-emitting control sub-module 3 connected.
  • the charging and resetting sub-module 2 may include: a first switching transistor T1 and a second switching transistor T2.
  • the gate of the first switching transistor T1 is connected to the gate signal terminal GATE
  • the source of the first switching transistor T1 is connected to the data signal terminal DATA
  • the drain of the first switching transistor T1 is first.
  • the node A is connected; the gate of the second switching transistor T2 is connected to the gate signal terminal GATE, the source of the second switching transistor T2 is connected to the second node B, the drain of the second switching transistor T2 is connected to the driving control sub-module 1
  • the third terminal, that is, the drain of the driving transistor TO is connected.
  • the gate signal terminal GATE when the first switching transistor T1 and the second switching transistor T2 are P-type transistors, when the gate signal terminal GATE outputs a low-level gate signal, the gate thereof When the first switching transistor T1 and the second switching transistor T2 are N-type transistors, the gate will be turned on when the gate signal terminal GATE outputs a high-level gate signal.
  • the illumination control sub-module 3 may include: a third switching transistor T3 and a fourth switching transistor T4.
  • the gate of the third switching transistor ⁇ 3 is connected to the illuminating signal terminal EMISSION
  • the source of the third switching transistor T3 is connected to the first reference terminal V rcf 1
  • the drain of the third switching transistor T3 is The first node A is connected
  • the gate of the fourth switching transistor T4 is connected to the illuminating signal terminal EMISSION
  • the source of the fourth switching transistor T4 is connected to the third terminal of the driving control sub-module 1, that is, the drain of the driving transistor TO
  • the drain of the four-switch transistor T4 is connected to the first end of the light-emitting device D1.
  • the third switching transistor T3 and the fourth switch When the transistor T4 is a ⁇ -type transistor, the gate is turned on when the illuminating signal terminal EMISSION outputs a low-level illuminating signal; when the third switching transistor T3 and the fourth switching transistor T4 are N-type transistors, at the illuminating signal end When EMISSION outputs a high-level illuminating signal, its gate will be turned on.
  • the reference signal received at the first reference signal terminal V rcf 1 is a DC signal
  • the driving transistor T0, the first switching transistor T1, the second switching transistor ⁇ 2, the third switching transistor ⁇ 3, and the fourth switching transistor ⁇ 4 are ⁇ -type transistors.
  • the reference signal outputted by the first reference signal terminal V rcf l is a high level signal
  • the reference signal outputted by the second reference signal terminal V rcf 2 is a low level signal
  • the circuit signal timing diagram of the pixel circuit is as shown in FIG. 3a. Show.
  • the working principle of the pixel circuit is as follows.
  • the gate signal outputted by the gate signal terminal GATE controls the gate of the first switching transistor T1 to be turned on, so that the first switching transistor T1 becomes a diode connection mode, and the data signal
  • the voltage of the data signal outputted by the terminal DATA is written to the first node A connected to the drain thereof through the source of the first switching transistor T1, that is, the voltage of the first node A becomes V DATA , thereby realizing the data of the first node A.
  • the gate signal outputted by the gate signal terminal GATE simultaneously controls the gate of the second switching transistor T2 to be turned on, so that the second switching transistor T2 becomes a diode connection mode, and turns on the drain and gate of the driving transistor TO due to the driving transistor TO is a P-type transistor whose threshold voltage ⁇ ⁇ is a negative value, and the voltage value of the DC signal of the first reference signal terminal V rcf l is Vm, so that the voltage at the second node B becomes V m +Vth, thereby The storage of the threshold voltage ⁇ ⁇ and the reset function to the B point at the second node B are achieved.
  • the illuminating signal outputted by the illuminating signal terminal EMISSION controls the gate of the third switching transistor T3 to be turned on, so that the third switching transistor T3 becomes a diode connection manner, thereby the first node A
  • the voltage becomes the same V m as the voltage of the first reference signal terminal V ref 1 , and the voltage of the second node B changes accordingly according to the principle of conservation of capacitance 2V m -V DATA +Vth.
  • the driving transistor TO Since the driving transistor TO operates in a saturated state, it is known from the current characteristic of the saturated state that the on-state current i d of the driving transistor TO satisfies the formula: (V m - V DATA ) 2 ,
  • this value is relatively stable in the same structure and can be considered as a constant. It can be seen from the formula that the on-state current i d flowing through the drive transistor TO is only related to the voltage v DATA of the data signal and the voltage V m of the first reference signal terminal V ref 1 , regardless of the threshold voltage Vth of the drive transistor TO. Therefore, by driving the light-emitting device D1 to emit light by using the on-state current i d of the driving transistor TO, the current flowing through the OLED is not caused to be different due to the Vth unevenness caused by the manufacturing process of the back sheet, thereby causing a change in luminance. Meanwhile, in the embodiment of the present invention, it is also possible to improve the current variation flowing through the light-emitting device D1 due to the Vth decay, thereby causing a change in luminance and deteriorating the stability of the light-emitting device D1.
  • the reference signal received at the first reference signal terminal V rcf 1 is an alternating current signal
  • the driving transistor T0, the first switching transistor T1, the second switching transistor ⁇ 2, the third switching transistor ⁇ 3, and the fourth switching transistor ⁇ 4 are ⁇ -type transistors.
  • the reference signal outputted by the second reference signal terminal V rcf 2 is a low level signal
  • the circuit signal timing diagram of the pixel circuit is as shown in FIG. 3b.
  • the working principle of the pixel circuit is as follows.
  • the gate signal outputted by the gate signal terminal GATE controls the gate of the first switching transistor T1 to be turned on, so that the first switching transistor T1 becomes a diode connection mode, and the data signal
  • the data signal outputted by the terminal DATA is written to the first node A connected to the drain thereof through the source of the first switching transistor T1, that is, the voltage of the first node A becomes V DATA , and the data writing of the first node A is realized.
  • the gate signal outputted by the gate signal terminal GATE simultaneously controls the gate of the second switching transistor T2 to be turned on, so that the second switching transistor T2 becomes a diode connection mode, and turns on the drain and gate of the driving transistor TO due to the driving transistor TO is a P-type transistor whose threshold voltage ⁇ ⁇ is a negative value, and the voltage of the first reference signal terminal V ref l is 1 ⁇ 4, so that the voltage at the second node B becomes VrHVth, thereby realizing the second node B
  • the light-emitting phase of the pixel circuit that is, in the second phase, the voltage of the first reference signal terminal V rcf 1 becomes V 2 , and 2 >1 ⁇ 4, the light-emitting signal output from the light-emitting signal terminal EMISSION controls the gate of the third switching transistor T3.
  • the third switching transistor T3 is changed into a diode connection manner, so that the voltage of the first node A becomes the same as V 2 of the first reference signal terminal V rcf 1 , according to the principle of conservation of capacitance and power, the second node B The voltage changes accordingly
  • the voltage between the source and the gate of the driving transistor TO is Vg ⁇ Vg-V ⁇ VrVDATA+Vi+VarV ⁇ VrVDATA+V ⁇ Since the driving transistor TO operates in a saturated state, current characteristics according to the saturation state It can be seen that the on-state current i d of the driving transistor TO satisfies the formula: (VV DATA ) 2 ,
  • the on-state current i d flowing through the drive transistor TO is only related to the voltage V DATA of the data signal, regardless of the threshold voltage Vth of the drive transistor TO and the reference signal. Therefore, by driving the light-emitting device D1 to emit light by using the on-state current i d of the driving transistor TO, the current flowing through the OLED is not caused to be different due to the Vth unevenness caused by the manufacturing process of the back sheet, thereby causing a change in luminance.
  • the problem of display caused by the current difference caused by the ohmic voltage drop (IR Drop ) of V rcf 1 due to the load due to the load on the V rcf 1 signal line is also compensated.
  • the reference signal received at the first reference signal terminal V rcf 1 is a DC signal
  • the driving transistor T0, the first switching transistor T1, the second switching transistor ⁇ 2, the third switching transistor ⁇ 3, and the fourth switching transistor ⁇ 4 are ⁇ -type transistors.
  • the circuit signal timing diagram of the pixel circuit is as shown in FIG. 3c.
  • the reference signal of the first reference signal terminal V rcf l is a low level signal
  • the reference signal of the second reference signal terminal V ref 2 is a high level signal.
  • the working principle of the pixel circuit is as follows.
  • the gate signal outputted by the gate signal terminal GATE controls the gate of the first switching transistor T1 to be turned on, so that the first switching transistor T1 becomes a diode connection mode, and the data signal
  • the voltage of the data signal outputted by the terminal DATA is written to the first node A connected to the drain thereof through the source of the first switching transistor T1, that is, the voltage of the first node A becomes V DATA , thereby realizing the data of the first node A.
  • the gate signal outputted by the gate signal terminal GATE simultaneously controls the gate of the second switching transistor T2 to be turned on, so that the second switching transistor T2 becomes a diode connection mode, and turns on the drain and gate of the driving transistor TO due to the driving transistor TO is an N-type transistor whose threshold voltage Vth is a positive value, and the voltage value of the DC signal of the first reference signal terminal V ref l is V n , so that the voltage at the second node B becomes ⁇ ⁇ + ⁇ ⁇ , Thereby, the storage of the threshold voltage Vth and the reset function of the point B at the second node B are realized.
  • the light emitting signal outputted by the light emitting signal terminal EMISSION controls the gate of the third switching transistor T3 to be turned on, so that the third switching transistor T3 becomes a diode.
  • the connection mode of the tube so that the voltage of the first node A becomes the same V n as the voltage of the first reference signal terminal V ref l , according to the principle of conservation of capacitance, the voltage of the second node B becomes V n -V accordingly.
  • the driving transistor TO Since the driving transistor TO operates in a saturated state, it is known from the current characteristic of the saturated state that the on-state current i d of the driving transistor TO satisfies the formula: (Vn-VoATA+Vth-Vth) (V n -V
  • this value is relatively stable in the same structure and can be considered as a constant. It can be seen from the formula that the on-state current i d flowing through the driving transistor TO is only related to the voltage V DATA of the data signal and the voltage V n of the first reference signal terminal, regardless of the threshold voltage ⁇ ⁇ of the driving transistor TO. Therefore, by driving the light-emitting device D1 to emit light by using the on-state current i d of the driving transistor TO, the current flowing through the OLED is not caused by the ⁇ ⁇ unevenness caused by the manufacturing process of the back sheet , thereby causing a change in luminance. At the same time, it is also possible to improve the current variation through the light-emitting device D1 due to the ⁇ ⁇ decay, thereby causing a change in luminance and deteriorating the stability of the light-emitting device D1.
  • the reference signal received at the first reference signal terminal V rcf 1 is an alternating current signal, and the driving transistor
  • the reference signal outputted by the second reference signal terminal V rcf 2 is a high-level signal.
  • the circuit signal timing diagram of the pixel circuit is shown in Figure 3d. In this case, the working principle of the pixel circuit is as follows.
  • the gate signal outputted by the gate signal terminal GATE controls the gate of the first switching transistor T1 to be turned on, so that the first switching transistor T1 becomes a diode connection mode, and the data signal
  • the voltage of the data signal outputted by the terminal DATA is written to the first node A connected to the drain thereof through the source of the first switching transistor T1, that is, the voltage of the first node A becomes V DATA , thereby realizing the data of the first node A.
  • the gate signal outputted by the gate signal terminal GATE simultaneously controls the gate of the second switching transistor T2 to be turned on, so that the second switching transistor T2 becomes a diode connection mode, and turns on the drain and gate of the driving transistor TO due to the driving transistor TO is an N-type transistor whose threshold voltage ⁇ ⁇ is a positive value, and the voltage of the first reference signal terminal V ref l at this time is V 3 , and therefore, the voltage at the second node B becomes ⁇ 3 + ⁇ ⁇
  • the storage of the threshold voltage ⁇ ⁇ and the reset function of the B point at the second node B are achieved.
  • the voltage of the first reference signal terminal V rcf 1 is V 4 , and V 4 ⁇ V 3 , and the light-emitting signal output from the light-emitting signal terminal EMISSION controls the third switching transistor T 3 .
  • the gate is turned on, so that the third switching transistor ⁇ 3 becomes a diode connection manner, so that the voltage of the first node ⁇ becomes the same as the output of the first reference signal terminal V rcf 1 , according to the principle of conservation of capacitance and power, second
  • the voltage of the node B is correspondingly changed to V 4 - V DATA + V 3 + Vth.
  • the voltage between the source and the gate of the driving transistor TO is Vg ⁇ Vg-V ⁇ V ⁇ VDATA+Vg+Vfl ⁇ V ⁇ VrVDATA+V ⁇ Since the driving transistor TO operates in a saturated state, it is saturated according to the The state current characteristic shows that the on-state current i d of the driving transistor TO satisfies the formula: ( ⁇ 3 - ⁇ ⁇ + ⁇ ⁇ - ⁇ ⁇ ) (V 3 -V
  • ⁇ is a structural parameter, which is relatively stable in the same structure and can be regarded as a constant.
  • V 3 of the first reference signal terminal V rcf 1 is 0 volts. Therefore, from the formula derivation, the on-state current i d flowing through the driving transistor TO is only related to the voltage v DATA of the data signal, regardless of the threshold voltage ⁇ ⁇ of the driving transistor TO and the reference signal. Therefore, by driving the light-emitting device D1 to emit light by using the on-state current i d of the driving transistor TO, the current flowing through the OLED is not caused by the ⁇ ⁇ unevenness caused by the manufacturing process of the back sheet , thereby causing a change in luminance.
  • an embodiment of the present invention further provides an organic electroluminescence display panel comprising the above-described pixel circuit provided by an embodiment of the present invention. Since the working principle and the principle of solving the problem of the organic electroluminescent display panel provided by the embodiment of the present invention are similar to those of the foregoing pixel circuit, the implementation of the organic electroluminescent display panel can be referred to the implementation of the pixel circuit, and the repetition is no longer repeated. Narration.
  • an embodiment of the present invention further provides a display device including the above-described organic electroluminescent display panel provided by an embodiment of the present invention.
  • the display device provided by the embodiment of the present invention may be a display, a mobile phone, a television, a notebook, an all-in-one, etc., and other components of the display device are understood by those of ordinary skill in the art, and are not described herein. It should not be construed as limiting the invention.
  • embodiments of the present invention provide a pixel circuit, an organic electroluminescence display panel including the pixel circuit, and a display device including the organic electroluminescence display panel, the pixel circuit including: a capacitor, a light emitting device a driving control sub-module, a charging and resetting sub-module, and a lighting control sub-module; wherein the first end of the capacitor is connected as a first node to the first end of the charging and resetting sub-module and the first end of the lighting control sub-module, The second end is connected to the second end of the charging and resetting sub-module and the first end of the driving control sub-module as a second node; the second end of the driving control sub-module is connected to the first reference signal end, and the third end is respectively connected with The third end of the charging and reset sub-module is connected to the second end of the illumination control sub-module; the first end of the illumination device is connected to the fifth end of the illumination control sub-module, and the second
  • the charging and reset sub-module When the charging and reset sub-module is turned on, the data signal outputted by the data signal end is written into the first node, and the first end of the driving control sub-module is short-circuited with the third end, so that the voltage of the second node is reset. A process of charging the capacitor is achieved.
  • the driving control sub-module When the light-emitting control sub-module is turned on, the driving control sub-module is electrically connected to the light-emitting device to drive the light-emitting device to emit light.
  • the current that drives the light emitting device to emit light is related to the DC voltage and the voltage of the data signal; when the AC voltage is outputted from the first reference signal terminal, the current that drives the light emitting device to emit light is only related to the data signal. Voltage related. In both cases, the current that drives the illumination device to emit light is independent of the threshold voltage of the drive transistor in the drive control sub-module, so that the effect of the threshold voltage on the illumination device can be avoided, ie, the same data signal is used to load different In the case of a pixel unit, an image having the same brightness can be obtained, thereby improving the uniformity of the brightness of the image in the display area of the display device.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素电路、有机电致发光显示面板以及显示装置，用以提高显示装置的显示区域中的图像亮度的均匀性。该像素电路包括：电容器（CST）、发光器件（D1）、驱动控制子模块（1）、充电与复位子模块（2）以及发光控制子模块（3）。电容器（CST）的第一端为第一节点（A），其第二端为第二节点（B）；发光器件（D1）的第一端（X）与发光控制子模块（3）的第五端（e'）相连，其第二端（y）与第二参考信号端（Vref2）相连。在充电与复位子模块（2）导通时，将数据信号写入第一节点（A），并将驱动控制子模块（1）的第一端（a''）与第三端（c''）短接，使第二节点（B）的电压复位，电容器（CST）充电。在发光控制子模块（3）导通时，将驱动控制子模块（1）与发光器件（D1）导通，驱动发光器件（D1）发光。

Description

像素电路、 有机电致发光显示面板以及显示装置 技术领域
本发明的实施例涉及像素电路、 有机电致发光显示面板以及显示装置。 背景技术
有机发光二极管 （ Organic Light Emitting Diode, OLED )显示器因具有 功耗低、 亮度高、 成本低、 视角广以及响应速度快等优点而备受关注， 在有 机发光技术领域得到了广泛的应用。
OLED显示器中， 存在以下问题。 首先， 背板上用于实现图像显示的每 一个晶体管由于在制作过程中存在结构上的不均勾性， 以及电学性能和稳定 性方面的不均匀性， 导致晶体管的阈值电压 Vth发生了漂移。 其次， 晶体管 在长时间导通的情况下会造成稳定性下降。 另外， 随着 OLED尺寸大型化的 发展， 相应地信号线上的负载变大， 导致在信号线上出现电压衰减， 比如工 作电压发生改变。
当使用现有用于驱动 OLED发光的像素电路的结构驱动 OLED工作时， 流过 OLED的电流与驱动晶体管的阈值电压 νΛ、 驱动晶体管的稳定性、 参 考电压 Vref中的其中之一或其中多个因素有关。 当为每一个像素施加相同的 驱动信号时， 在背板的显示区域中流过每个 OLED的电流不相等， 导致背板 上的电流不均匀， 从而导致图像亮度不均匀。 发明内容
本发明的一个实施例提供一种像素电路， 其包括： 发光器件、 电容器、 驱动控制子模块、 充电与复位子模块以及发光控制子模块， 其中， 所述电容 器的第一端作为第一节点分别与所述充电与复位子模块的第一端和所述发光 控制子模块的第一端相连， 所述电容器的第二端作为第二节点分别与所述充 电与复位子模块的第二端和所述驱动控制子模块的第一端相连； 所述驱动控 制子模块的第二端与第一参考信号端相连， 所述驱动控制子模块的第三端分 别与所述充电与复位子模块的第三端和所述发光控制子模块的第二端相连， 所述驱动控制子模块在所述第二节点的控制下驱动所述发光器件发光； 所述 充电与复位子模块的第四端与数据信号端相连， 所述充电与复位子模块的第 五端与栅极信号端相连， 所述充电与复位子模块在栅极信号端的控制下传输 来自所述数据信号端的数据信号； 以及所述发光控制子模块的第三端与发光 信号端相连， 所述发光控制子模块的第四端与第一参考信号端相连， 所述发 光控制子模块的第五端与所述发光器件的第一端相连， 所述发光器件的第二 端与第二参考信号端相连， 所述发光控制子模块用于在所述发光信号端的控 制下驱动所述发光器件发光。
本发明的另一个实施例提供一种有机电致发光显示面板， 其包括上述像 素电路。
本发明的另一个实施例提供一种显示装置， 其包括上述有机电致发光显 示面板。 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 筒单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1为本发明的实施例提供的像素电路的示例性结构的示意图； 图 2a和图 2b分别为本发明的实施例提供的像素电路的示例性结构的示 意图； 以及
图 3a至图 3d分别为本发明的实施例提供的像素电路的电路时序图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图，对本发明实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。
本发明的实施例提供了一种像素电路、 有机电致发光显示面板以及显示 装置， 用以提高显示装置的显示区域中图像亮度的均匀性。 下面结合附图， 对本发明的实施例提供的像素电路、 有机电致发光显示 面板以及显示装置进行详细地说明。
本发明的实施例提供的一种像素电路，如图 1所示，包括：发光器件 Dl、 电容器 CST、 驱动控制子模块 1、 充电与复位子模块 2以及发光控制子模块 3。
在本发明的实施例中， 电容器 CST的第一端作为第一节点 A分别与充 电与复位子模块 2的第一端 a和发光控制子模块 3的第一端 a，相连， 电容器 CST的第二端作为第二节点 B分别与充电与复位子模块 2的第二端 b和驱动 控制子模块 1的第一端 a"相连。
在本发明的实施例中，驱动控制子模块 1的第二端 b"与第一参考信号端
Vref 1相连， 驱动控制子模块 1的第三端 c"分别与充电与复位子模块 2的第 三端 c和发光控制子模块 3的第二端 b，相连， 驱动控制子模块 1在第二节点 B的控制下驱动发光器件 D1发光。
在本发明的实施例中， 充电与复位子模块 2 的第四端 d与数据信号端 DATA相连， 充电与复位子模块 2的第五端 e与栅极信号端 GATE相连， 充 电与复位子模块 2在栅极信号端 GATE的控制下传输来自数据信号端 DATA 的数据信号。
在本发明的实施例中， 发光控制子模块 3 的第三端 c，与发光信号端 EMISSION相连， 发光控制子模块 3的第四端 d，与第一参考信号端 Vrcf 1相 连， 发光控制子模块 3的第五端 e，与发光器件 D1的第一端 X相连， 发光器 件 D1的第二端 y与第二参考信号端 Vrcf 2相连， 发光控制子模块 3用于在 发光信号端 EMISSION的控制下驱动发光器件 D1发光。
在本发明的实施例提供的上述像素电路中，第一参考信号端 Vrcfl接收的 信号为直流信号或者交流信号， 即第一参考信号端 Vrcf 1连接于直流信号源 或者交流信号源； 第二参考信号端 Vrcf 2接收的信号为直流信号， 即第二参 考信号端 Vrcf2连接于直流信号源。
在本发明的实施例中， 在第一参考信号端 Vrcf l输出直流电压时， 发光 器件 D1发光的驱动电流与该直流电压以及数据信号的电压 VDATA有关； 在 第一参考信号端 Vrcf 1输出交流电压时， 发光器件 D1发光的驱动电流仅与 数据信号的电压 VDATA有关。 在上述两种情况下， 发光器件 D1发光的驱动 电流都与驱动晶体管 TO的阈值电压 Vth无关， 因此能够避免驱动晶体管 TO 的阈值电压 Vth对发光器件 D1的影响，即在使用相同的数据信号加载到不同 的像素单元时， 能够得到亮度相同的图像， 从而提高了显示装置的显示区域 中图像亮度的均匀性。
需要说明的是， 本发明的实施例中的驱动晶体管和开关晶体管可以是薄 膜晶体管（Thin Film Transistor, TFT ) , 也可以是金属氧化物半导体场效应 晶体管 （ Metal Oxide Semiconductor field effect transistor, MOSFET ) , 这些 晶体管可以是 N型晶体管， 也可以是 P型晶体管， 在此不做限定。 此外， 在 本发明的实施例中， 这些晶体管的源极和漏极可以互换， 不做特别地区分。 在对示例性实施例的描述中， 以驱动晶体管和开关晶体管都为薄膜晶体管 ( TFT )为例进行说明； 并且， 以附图中 TFT的三个电极中带有箭头的一端 为漏极为例进行说明。
在本发明的实施例提供的上述像素电路中， 例如， 驱动控制子模块 1可 包括驱动晶体管 TO , 其中， 驱动晶体管 TO的栅极与第二节点 B相连， 其源 极与第一参考信号端 Vrcf 1相连， 其漏极与发光控制子模块 3的第二端 b，相 连。
在本发明的实施例提供的上述像素电路中， 例如， 发光器件 D1可以为 有机发光二极管（OLED )。 在本发明的实施例中， 发光器件 D1在驱动晶体 管 TO的开态电流的作用下实现发光显示。
下面对本发明的实施例提供的上述像素电路的工作原理进行筒要介绍。 本发明的实施例提供的上述像素电路的操作过程可分为以下两个阶段。 第一阶段： 数据写入阶段， 在此阶段中像素电路实现了第一节点的数据 信号写入， 同时还实现了第二节点的电压复位功能。 在此阶段， 发光控制子 模块 3处于关闭状态；充电与复位子模块 2处于导通状态，数据信号端 DATA 输出的数据信号的电压 VDATA通过充电与复位子模块 2加载到第一节点 A, 为电容器 CST充电； 同时， 处于导通状态的充电与复位子模块 2将驱动晶体 管 TO的漏极与栅极短接，在第二节点 B处实现了驱动晶体管 TO的阈值电压 νώ的存储与复位功能。
第二阶段： 发光阶段，在此阶段中， 充电与复位子模块 2处于关闭状态； 发光控制子模块 3处于导通状态， 从而导通发光器件 D1的第一端 X与驱动 晶体管 TO的漏极，驱动晶体管 TO根据加载到源极的参考信号的电压以及电 容器 CST放电对应的电压而导通， 驱动发光器件 D1发光。
需要说明的是， 在本发明的实施例中， 在驱动晶体管 TO为 P型晶体管 时， 其阈值电压 νΛ为负值， 第一参考信号端 Vrcf l的电压大于第二参考信号 端 Vrcf 2的电压， 如图 2a所示， 此时发光器件 D1的正极为发光器件的第一 端， 与发光控制子模块 3相连； 在驱动晶体管 TO为 N型晶体管时， 其阈值 电压 νώ为正值， 第一参考信号端 Vref 1的电压小于第二参考信号端 Vref 2的 电压， 如图 2b所示， 此时发光器件 D1的负极为发光器件的第一端， 与发光 控制子模块 3相连。
下面对本发明的实施例提供的上述像素电路中的充电与复位子模块 2和 发光控制子模块 3的示例性结构和工作原理进行详细说明。
在本发明的实施例提供的像素电路中， 充电与复位子模块 2, 如图 2a和 图 2b所示， 可以包括： 第一开关晶体管 T1和第二开关晶体管 T2。 在本发明 的实施例中， 第一开关晶体管 T1的栅极与栅极信号端 GATE相连， 第一开 关晶体管 T1的源极与数据信号端 DATA相连， 第一开关晶体管 T1的漏极 与第一节点 A相连； 第二开关晶体管 T2的栅极与栅极信号端 GATE相连， 第二开关晶体管 T2的源极与第二节点 B相连，第二开关晶体管 T2的漏极与 驱动控制子模块 1的第三端、 即驱动晶体管 TO的漏极相连。
需要注意的是， 在本发明的实施例中， 在第一开关晶体管 T1 和第二开 关晶体管 T2为 P型晶体管时， 在栅极信号端 GATE输出低电平的栅极信号 时其栅极才会开启；在第一开关晶体管 T1和第二开关晶体管 T2为 N型晶体 管时， 在栅极信号端 GATE输出高电平的栅极信号时其栅极才会开启。
在本发明的实施例提供的像素电路中， 发光控制子模块 3, 如图 2a和图 2b所示， 可以包括： 第三开关晶体管 T3和第四开关晶体管 T4。 在本发明的 实施例中， 第三开关晶体管 Τ3的栅极与发光信号端 EMISSION相连， 第三 开关晶体管 T3的源极与第一参考端 Vrcf 1相连， 第三开关晶体管 T3的漏极 与第一节点 A相连； 第四开关晶体管 T4的栅极与发光信号端 EMISSION相 连， 第四开关晶体管 T4的源极与驱动控制子模块 1的第三端、 即驱动晶体 管 TO的漏极相连，第四开关晶体管 T4的漏极与发光器件 D1的第一端相连。
需要注意的是， 在本发明的实施例中， 第三开关晶体管 T3和第四开关 晶体管 T4为 Ρ型晶体管时， 在发光信号端 EMISSION输出低电平的发光信 号时其栅极才会开启；在第三开关晶体管 T3和第四开关晶体管 T4为 N型晶 体管时，在发光信号端 EMISSION输出高电平的发光信号时其栅极才会开启。
下面通过本发明的实施例提供的像素电路的几种工作状态来详细说明像 素电路的工作原理。
在第一参考信号端 Vrcf 1接收的参考信号为直流信号， 并且驱动晶体管 T0、 第一开关晶体管 Tl、 第二开关晶体管 Τ2、 第三开关晶体管 Τ3和第四开 关晶体管 Τ4为 Ρ型晶体管时,此时第一参考信号端 Vrcf l输出的参考信号为 高电平信号， 第二参考信号端 Vrcf 2输出的参考信号为低电平信号， 像素电 路的电路信号时序图如图 3a所示。 在此情况下， 像素电路的工作原理如下。
在像素电路的数据写入阶段、 即第一阶段， 栅极信号端 GATE输出的栅 极信号控制第一开关晶体管 T1的栅极开启，使第一开关晶体管 T1变为二极 管的连接方式，数据信号端 DATA输出的数据信号的电压通过第一开关晶体 管 T1的源极写入与其漏极连接的第一节点 A处， 即第一节点 A的电压变为 VDATA, 从而实现第一节点 A的数据写入。 栅极信号端 GATE输出的栅极信 号同时控制第二开关晶体管 T2的栅极开启，使第二开关晶体管 T2变为二极 管的连接方式， 导通驱动晶体管 TO的漏极和栅极， 由于驱动晶体管 TO为 P 型晶体管， 其阈值电压 νώ为负值， 第一参考信号端 Vrcfl的直流信号的电压 值为 Vm, 因此， 在第二节点 B处的电压变为 Vm+Vth, 从而实现了在第二节 点 B处阈值电压 νώ的存储与对 B点的复位功能。
在像素电路的发光阶段、 即第二阶段， 发光信号端 EMISSION输出的发 光信号控制第三开关晶体管 T3的栅极开启，使第三开关晶体管 T3变为二极 管的连接方式， 从而第一节点 A的电压变为与第一参考信号端 Vref 1的电压 相同的 Vm , 根据电容电量守恒原理， 第二节点 B 的电压相应地变为
Figure imgf000008_0001
2Vm-VDATA+Vth。此时，驱动晶体管 TO的源极和栅极之间 的电压为 Vgs=Vg-Vs=2Vm-VDATA+Vth-Vm=Vm-VDATA+ νώ。
由于驱动晶体管 TO在饱和状态下工作， 因此根据饱和状态的电流特性 可知， 驱动晶体管 TO的开态电流 id满足公式： (Vm-VDATA ) 2,
Figure imgf000008_0002
其中 为结构参数， 在相同的结构中此数值相对稳定， 可以视作常量。 从公式推导可知， 流经驱动晶体管 TO 的开态电流 id仅与数据信号的电压 vDATA和第一参考信号端 Vref 1的电压 Vm有关，与驱动晶体管 TO的阈值电压 Vth无关。 因此， 通过利用驱动晶体管 TO的开态电流 id驱动发光器件 D1发 光， 流经 OLED的电流不会因背板的制造工艺原因所造成的 Vth不均匀而导 致不同， 从而引起亮度变化。 同时， 在本发明的实施例中， 还可以改善由于 Vth衰退而导致的流经发光器件 D1的电流变化， 从而引起亮度变化， 使发光 器件 D1的稳定性变差。
在第一参考信号端 Vrcf 1接收的参考信号为交流信号， 并且驱动晶体管 T0、 第一开关晶体管 Tl、 第二开关晶体管 Τ2、 第三开关晶体管 Τ3和第四开 关晶体管 Τ4为 Ρ型晶体管时，此时第二参考信号端 Vrcf 2输出的参考信号为 低电平信号，像素电路的电路信号时序图如图 3b所示。在此情况下，像素电 路的工作原理如下。
在像素电路的数据写入阶段、 即第一阶段， 栅极信号端 GATE输出的栅 极信号控制第一开关晶体管 T1的栅极开启，使第一开关晶体管 T1变为二极 管的连接方式， 数据信号端 DATA输出的数据信号通过第一开关晶体管 T1 的源极写入与其漏极连接的第一节点 A处，即第一节点 A的电压变为 VDATA, 实现第一节点 A的数据写入。栅极信号端 GATE输出的栅极信号同时控制第 二开关晶体管 T2的栅极开启，使第二开关晶体管 T2变为二极管的连接方式， 导通驱动晶体管 TO的漏极和栅极， 由于驱动晶体管 TO为 P型晶体管， 其阈 值电压 νώ为负值， 第一参考信号端 Vref l的电压为 ¼, 因此，在第二节点 B 处的电压变为 VrHVth, 从而实现了在第二节点 B处阈值电压 Vth的存储与对 B点的复位功能。
在像素电路的发光阶段、 即第二阶段， 此时第一参考信号端 Vrcf 1的电 压变为 V2,并且 2>¼,发光信号端 EMISSION输出的发光信号控制第三开 关晶体管 T3的栅极开启， 使第三开关晶体管 T3变为二极管的连接方式， 从 而第一节点 A的电压变为与第一参考信号端 Vrcf 1的 V2相同，根据电容电量 守恒原理， 第二节点 B的电压相应地变为
Figure imgf000009_0001
此时， 驱动晶体 管 TO的源极和栅极之间的电压为 Vg^Vg-V^VrVDATA+Vi+VarV^VrVDATA+V^ 由于驱动晶体管 TO在饱和状态下工作， 因此根据饱和状态的电流特性 可知， 驱动晶体管 TO的开态电流 id满足公式： (V VDATA ) 2,
Figure imgf000010_0001
其中 为结构参数， 在相同结构中此数值相对稳定， 可以视作常量。 在 本发明的实施例中，通常第一参考信号端 Vref l输出的 通常为 0伏。因此， 从公式推导可知， 流经驱动晶体管 TO 的开态电流 id仅与数据信号的电压 VDATA有关， 与驱动晶体管 TO的阈值电压 Vth和参考信号无关。 因此， 通过 利用驱动晶体管 TO的开态电流 id驱动发光器件 D1发光， 流经 OLED的电 流不会因背板的制造工艺原因所造成的 Vth不均匀而导致不同， 从而引起亮 度变化。 同时，还可以改善由于 Vth衰退而导致的流经发光器件 D1的电流变 化， 从而引起亮度变化， 使发光器件 D1稳定性变差。 进一步地， 在本发明 的实施例中，还补偿了因为 Vrcf 1信号线上由于负载原因所导致的 Vrcf 1的欧 姆电压降（IR Drop ) 而引起的电流差异造成显示的问题。
在第一参考信号端 Vrcf 1接收的参考信号为直流信号， 并且驱动晶体管 T0、 第一开关晶体管 Tl、 第二开关晶体管 Τ2、 第三开关晶体管 Τ3和第四开 关晶体管 Τ4为 Ν型晶体管时， 像素电路的电路信号时序图如图 3c所示， 此 时， 第一参考信号端 Vrcf l的参考信号为低电平信号， 第二参考信号端 Vref 2 的参考信号为高电平信号。 在此情况下， 像素电路的工作原理如下。
在像素电路的数据写入阶段、 即第一阶段， 栅极信号端 GATE输出的栅 极信号控制第一开关晶体管 T1的栅极开启，使第一开关晶体管 T1变为二极 管的连接方式，数据信号端 DATA输出的数据信号的电压通过第一开关晶体 管 T1的源极写入与其漏极连接的第一节点 A处， 即第一节点 A的电压变为 VDATA, 从而实现第一节点 A的数据写入。 栅极信号端 GATE输出的栅极信 号同时控制第二开关晶体管 T2的栅极开启，使第二开关晶体管 T2变为二极 管的连接方式， 导通驱动晶体管 TO的漏极和栅极， 由于驱动晶体管 TO为 N 型晶体管， 其阈值电压 Vth为正值， 第一参考信号端 Vref l的直流信号的电压 值为 Vn, 因此， 在第二节点 B处的电压变为 νη+νώ, 从而实现了在第二节 点 B处阈值电压 Vth的存储与对 B点的复位功能。
在像素电路的发光阶段、 即第二阶段， 发光信号端 EMISSION输出的发 光信号控制第三开关晶体管 T3的栅极开启，使第三开关晶体管 T3变为二极 管的连接方式， 从而第一节点 A的电压变为与第一参考信号端 Vref l的电压 相同的 Vn , 根据电容电量守恒原理， 第二节点 B 的电压相应地变为 Vn-VDATA+Vn+Vth= 2Vn-VDATA+Vth„ 此时， 驱动晶体管 TO的源极和栅极之间 的电压为 Vgs=Vg-Vs=2Vn-VDATA+Vth-Vn=Vn-VDATA+ νώ。
由于驱动晶体管 TO在饱和状态下工作， 因此根据饱和状态的电流特性 可知， 驱动晶体管 TO的开态电流 id满足公式： (Vn-VoATA+Vth- Vth ) (Vn-V
Figure imgf000011_0001
其中 为结构参数， 在相同的结构中此数值相对稳定， 可以视作常量。 从公式推导可知， 流经驱动晶体管 TO 的开态电流 id仅与数据信号的电压 VDATA和第一参考信号端的电压 Vn有关， 与驱动晶体管 TO的阈值电压 νώ 无关。 因此， 通过利用驱动晶体管 TO的开态电流 id驱动发光器件 D1发光， 流经 OLED的电流不会因背板的制造工艺原因所造成的 νώ不均匀而导致不 同， 从而引起亮度变化。 同时， 还可以改善由于 νώ衰退而导致的流经发光 器件 D1的电流变化， 从而引起亮度变化， 使发光器件 D1稳定性变差。
在第一参考信号端 Vrcf 1接收的参考信号为交流信号， 并且驱动晶体管
T0、 第一开关晶体管 Tl、 第二开关晶体管 Τ2、 第三开关晶体管 Τ3和第四开 关晶体管 Τ4为 Ν型晶体管时，此时第二参考信号端 Vrcf 2输出的参考信号为 高电平信号，像素电路的电路信号时序图如图 3d所示。在此情况下，像素电 路的工作原理如下。
在像素电路的数据写入阶段、 即第一阶段， 栅极信号端 GATE输出的栅 极信号控制第一开关晶体管 T1的栅极开启，使第一开关晶体管 T1变为二极 管的连接方式，数据信号端 DATA输出的数据信号的电压通过第一开关晶体 管 T1的源极写入与其漏极连接的第一节点 A处， 即第一节点 A的电压变为 VDATA, 从而实现第一节点 A的数据写入。 栅极信号端 GATE输出的栅极信 号同时控制第二开关晶体管 T2的栅极开启，使第二开关晶体管 T2变为二极 管的连接方式， 导通驱动晶体管 TO的漏极和栅极， 由于驱动晶体管 TO为 N 型晶体管， 其阈值电压 νώ为正值， 而此时的第一参考信号端 Vref l的电压为 V3, 因此， 在第二节点 B处的电压变为 ν3+νώ, 从而实现了在第二节点 B处 阈值电压 νώ的存储与对 B点的复位功能。 在像素电路的发光阶段、 即第二阶段， 此时第一参考信号端 Vrcf 1的电 压为 V4,且 V4<V3,发光信号端 EMISSION输出的发光信号控制第三开关晶 体管 T3的栅极开启， 使第三开关晶体管 Τ3变为二极管的连接方式， 从而第 一节点 Α的电压变为与第一参考信号端 Vrcf 1输出的 ¼相同，根据电容电量 守恒原理， 第二节点 B的电压相应地变为 V4-VDATA+V3+Vth。 此时， 驱动晶体 管 TO的源极和栅极之间的电压为 Vg^Vg-V^V^VDATA+Vg+Vfl^V^VrVDATA+V^ 由于驱动晶体管 TO在饱和状态下工作， 因此根据饱和状态电流特性可 知， 驱动晶体管 TO的开态电流 id满足公式： (ν3-νΟΑΤΑ+νώ-νώ ) (V3-V
Figure imgf000012_0001
其中^:为结构参数， 在相同的结构中此数值相对稳定， 可以视作常量。 在本发明的实施例中， 通常第一参考信号端 Vrcf l输出的 V3为 0伏。 因此， 从公式推导可知， 流经驱动晶体管 TO 的开态电流 id仅与数据信号的电压 vDATA有关， 与驱动晶体管 TO的阈值电压 νώ和参考信号无关。 因此， 通过 利用驱动晶体管 TO的开态电流 id驱动发光器件 D1发光， 流经 OLED的电 流不会因背板的制造工艺原因所造成的 νώ不均匀而导致不同， 从而引起亮 度变化。 同时，还可以改善由于 νώ衰退而导致的流经发光器件 D1的电流变 化， 从而引起亮度变化， 使发光器件 D1稳定性变差。 进一步地， 在本发明 的实施例中，还补偿了因为 Vrcf 1信号线上由于负载原因所导致的 Vrcf 1的欧 姆电压降（IR Drop ) 而引起的电流差异造成显示的问题。
基于同一发明构思， 本发明的实施例还提供了一种有机电致发光显示面 板， 其包括本发明的实施例提供的上述像素电路。 由于本发明的实施例提供 的有机电致发光显示面板的工作原理和解决问题的原理与前述像素电路相 似， 因此该有机电致发光显示面板的实施可以参见像素电路的实施， 重复之 处不再赘述。
基于同一发明构思， 本发明的实施例还提供了一种显示装置， 其包括本 发明的实施例提供的上述有机电致发光显示面板。 本发明的实施例提供的显 示装置可以是显示器、 手机、 电视、 笔记本、 一体机等， 对于显示装置的其 它组成部分均为本领域的普通技术人员应该理解具有的， 在此不做赘述， 也 不应作为对本发明的限制。 综上所述， 本发明的实施例提供了一种像素电路、 包括该像素电路的有 机电致发光显示面板以及包括该有机电致发光显示面板的显示装置， 该像素 电路包括： 电容器、 发光器件、 驱动控制子模块， 充电与复位子模块以及发 光控制子模块； 其中， 电容器的第一端作为第一节点分别与充电与复位子模 块的第一端和发光控制子模块的第一端相连， 第二端作为第二节点分别与充 电与复位子模块的第二端和驱动控制子模块的第一端相连； 驱动控制子模块 的第二端与第一参考信号端相连， 第三端分别与充电与复位子模块的第三端 和发光控制子模块的第二端相连； 发光器件的第一端与发光控制子模块的第 五端相连， 第二端与第二参考信号端相连。 在充电与复位子模块导通时， 将 数据信号端输出的数据信号写入第一节点， 并将驱动控制子模块的第一端与 和第三端短接， 使第二节点的电压复位， 实现对电容器的充电过程。 在发光 控制子模块导通时，将驱动控制子模块与发光器件导通，驱动发光器件发光。 在第一参考信号端输出直流电压时， 驱动发光器件发光的电流与该直流电压 以及数据信号的电压有关； 在第一参考信号端输出交流电压时， 驱动发光器 件发光的电流仅与数据信号的电压有关。 在上述两种情况下， 驱动发光器件 发光的电流都与驱动控制子模块中的驱动晶体管的阈值电压无关， 因此能够 避免阈值电压对发光器件的影响， 即在使用相同的数据信号加载到不同的像 素单元时， 能够得到亮度相同的图像， 从而提高了显示装置显示区域图像亮 度的均匀性。
最后应说明的是： 以上实施例仅用以说明本发明的技术方案， 而非对其 限制； 尽管参照前述实施例对本发明进行了详细的说明， 本领域的普通技术 人员应当理解： 其依然可以对前述各实施例所记载的技术方案进行修改， 或 者对其中部分技术特征进行等同替换； 而这些修改或者替换， 并不使相应技 术方案的本质脱离本发明各实施例技术方案的精神和范围。

Claims

权利要求书
1、 一种像素电路， 包括： 发光器件、 电容器、 驱动控制子模块、 充电与 复位子模块以及发光控制子模块， 其中，
所述电容器的第一端作为第一节点分别与所述充电与复位子模块的第一 端和所述发光控制子模块的第一端相连， 所述电容器的第二端作为第二节点 分别与所述充电与复位子模块的第二端和所述驱动控制子模块的第一端相 连；
所述驱动控制子模块的第二端与第一参考信号端相连， 所述驱动控制子 模块的第三端分别与所述充电与复位子模块的第三端和所述发光控制子模块 的第二端相连， 所述驱动控制子模块在所述第二节点的控制下驱动所述发光 器件发光；
所述充电与复位子模块的第四端与数据信号端相连， 所述充电与复位子 模块的第五端与栅极信号端相连， 所述充电与复位子模块在栅极信号端的控 制下传输来自所述数据信号端的数据信号； 以及
所述发光控制子模块的第三端与发光信号端相连， 所述发光控制子模块 的第四端与第一参考信号端相连， 所述发光控制子模块的第五端与所述发光 器件的第一端相连， 所述发光器件的第二端与第二参考信号端相连， 所述发 光控制子模块用于在所述发光信号端的控制下驱动所述发光器件发光。
2、如权利要求 1所述的像素电路， 其中， 所述第一参考信号端接收的信 号是直流信号或者交流信号。
3、如权利要求 1所述的像素电路， 其中， 所述第二参考信号端接收的信 号是直流信号。
4、 如权利要求 1所述的像素电路， 其中， 所述驱动控制子模块包括： 驱 动晶体管， 其中，
所述驱动晶体管的栅极与第二节点相连， 所述驱动晶体管的源极与第一 参考信号端相连， 所述驱动晶体管的漏极与所述发光控制子模块的第二端相 连。
5、如权利要求 1至 4中任一项所述的像素电路， 其中， 所述充电与复位 子模块包括： 第一开关晶体管和第二开关晶体管， 其中， 第一开关晶体管的栅极与栅极信号端相连， 第一开关晶体管的源极与数 据信号端相连， 第一开关晶体管的漏极与第一节点相连； 以及
第二开关晶体管的栅极与栅极信号端相连， 第二开关晶体管的源极与第 二节点相连， 第二开关晶体管的漏极与所述驱动控制子模块的第三端相连。
6、如权利要求 1至 4中任一项所述的像素电路， 其中， 所述发光控制子 模块包括： 第三开关晶体管和第四开关晶体管， 其中，
第三开关晶体管的栅极与发光信号端相连， 第三开关晶体管的源极与第 一参考信号端相连， 第三开关晶体管的漏极与第一节点相连； 以及
第四开关晶体管的栅极与发光信号端相连， 第四开关晶体管的源极与所 述驱动控制子模块的第三端相连， 第四开关晶体管的漏极与所述发光器件的 第一端相连。
7、 如权利要求 4所述的像素电路， 其中， 所述驱动晶体管为 P型晶体 管时， 所述第一参考信号端的电压大于所述第二参考信号端的电压； 所述驱 动晶体管为 N型晶体管时，所述第一参考信号端的电压小于所述第二参考信 号端的电压。
8、一种有机电致发光显示面板， 包括如权利要求 1至 7中任一项所述的 像素电路。
9、 一种显示装置， 包括如权利要求 8所述的有机电致发光显示面板。
PCT/CN2013/075509 2013-03-06 2013-05-10 像素电路、有机电致发光显示面板以及显示装置 WO2014134869A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/359,165 US9406259B2 (en) 2013-03-06 2013-05-10 Pixel circuits, organic electroluminescent display panels and display devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN2013100704607A CN103198788A (zh) 2013-03-06 2013-03-06 一种像素电路、有机电致发光显示面板及显示装置
CN201310070460.7 2013-03-06

Publications (1)

Publication Number Publication Date
WO2014134869A1 true WO2014134869A1 (zh) 2014-09-12

Family

ID=48721271

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2013/075509 WO2014134869A1 (zh) 2013-03-06 2013-05-10 像素电路、有机电致发光显示面板以及显示装置

Country Status (3)

Country Link
US (1) US9406259B2 (zh)
CN (1) CN103198788A (zh)
WO (1) WO2014134869A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103440843B (zh) * 2013-08-07 2016-10-19 京东方科技集团股份有限公司 一种抑制老化的oled交流驱动电路、驱动方法及显示装置
CN105206220B (zh) * 2014-06-13 2018-03-27 京东方科技集团股份有限公司 像素驱动电路、驱动方法、阵列基板及显示装置
CN104680980B (zh) 2015-03-25 2017-02-15 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示装置
US11170715B2 (en) * 2016-11-18 2021-11-09 Boe Technology Group Co., Ltd. Pixel circuit, display panel, display device and driving method
US10210810B1 (en) 2017-11-06 2019-02-19 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. OLED pixel driving circuit, OLED display panel, and driving method
CN107731168B (zh) * 2017-11-06 2019-12-03 深圳市华星光电半导体显示技术有限公司 Oled像素驱动电路、oled显示面板及驱动方法
CN110603580B (zh) * 2019-07-23 2022-09-27 京东方科技集团股份有限公司 Oled像素补偿电路及驱动方法、显示装置
CN113793566B (zh) * 2021-09-29 2023-04-14 合肥维信诺科技有限公司 一种像素驱动电路及其驱动方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4642552A (en) * 1985-03-04 1987-02-10 Hitachi, Ltd. Stabilized current source circuit
CN101034541A (zh) * 2006-03-07 2007-09-12 冲电气工业株式会社 电流驱动电路
CN101339737A (zh) * 2008-08-11 2009-01-07 上海广电光电子有限公司 主动式有机发光器件的像素电路
CN102194408A (zh) * 2010-03-12 2011-09-21 株式会社日立显示器 图像显示装置
CN102881255A (zh) * 2012-08-14 2013-01-16 友达光电股份有限公司 主动式有机发光二极管电路及其操作方法
CN102881253A (zh) * 2012-09-21 2013-01-16 京东方科技集团股份有限公司 一种像素电路和薄膜晶体管背板
CN102930824A (zh) * 2012-11-13 2013-02-13 京东方科技集团股份有限公司 像素电路及驱动方法、显示装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100514183B1 (ko) * 2003-09-08 2005-09-13 삼성에스디아이 주식회사 유기 전계발광 표시장치의 픽셀구동회로 및 그 구동방법
KR100846591B1 (ko) * 2006-12-01 2008-07-16 삼성에스디아이 주식회사 유기전계발광 표시장치 및 이의 구동방법
KR101329964B1 (ko) 2009-12-31 2013-11-13 엘지디스플레이 주식회사 유기 발광 다이오드 표시 장치
KR101323390B1 (ko) * 2010-09-20 2013-10-29 엘지디스플레이 주식회사 유기발광다이오드 표시소자와 그 저전력 구동방법
KR101374477B1 (ko) * 2010-10-22 2014-03-14 엘지디스플레이 주식회사 유기발광다이오드 표시장치
TWI436335B (zh) 2011-03-17 2014-05-01 Au Optronics Corp 具臨界電壓補償機制之有機發光顯示裝置及其驅動方法
CN102930820B (zh) * 2012-10-23 2015-04-29 京东方科技集团股份有限公司 像素驱动电路、显示装置及像素驱动方法
CN203085137U (zh) * 2013-03-06 2013-07-24 京东方科技集团股份有限公司 一种像素电路、有机电致发光显示面板及显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4642552A (en) * 1985-03-04 1987-02-10 Hitachi, Ltd. Stabilized current source circuit
CN101034541A (zh) * 2006-03-07 2007-09-12 冲电气工业株式会社 电流驱动电路
CN101339737A (zh) * 2008-08-11 2009-01-07 上海广电光电子有限公司 主动式有机发光器件的像素电路
CN102194408A (zh) * 2010-03-12 2011-09-21 株式会社日立显示器 图像显示装置
CN102881255A (zh) * 2012-08-14 2013-01-16 友达光电股份有限公司 主动式有机发光二极管电路及其操作方法
CN102881253A (zh) * 2012-09-21 2013-01-16 京东方科技集团股份有限公司 一种像素电路和薄膜晶体管背板
CN102930824A (zh) * 2012-11-13 2013-02-13 京东方科技集团股份有限公司 像素电路及驱动方法、显示装置

Also Published As

Publication number Publication date
CN103198788A (zh) 2013-07-10
US9406259B2 (en) 2016-08-02
US20150310804A1 (en) 2015-10-29

Similar Documents

Publication Publication Date Title
TWI533278B (zh) 畫素結構及其驅動方法
WO2017031909A1 (zh) 像素电路及其驱动方法、阵列基板、显示面板及显示装置
WO2014134869A1 (zh) 像素电路、有机电致发光显示面板以及显示装置
WO2017118124A1 (zh) 像素电路、驱动方法、有机电致发光显示面板及显示装置
WO2016187990A1 (zh) 像素电路以及像素电路的驱动方法
WO2017041453A1 (zh) 像素电路、其驱动方法及相关装置
WO2015169006A1 (zh) 一种像素驱动电路及其驱动方法和显示装置
WO2018210051A1 (zh) 像素驱动电路及像素驱动方法、显示装置
WO2016165529A1 (zh) 像素电路及其驱动方法、显示装置
WO2015000245A1 (zh) 像素电路及其驱动方法、显示面板及显示装置
WO2016023311A1 (zh) 像素驱动电路及其驱动方法和显示装置
WO2015000249A1 (zh) 像素电路、显示面板及显示装置
CN104021754B (zh) 一种像素电路、有机电致发光显示面板及显示装置
WO2016070477A1 (zh) 有机发光显示器像素驱动电路
TWI514352B (zh) 有機發光二極體顯示器之像素驅動電路及其操作方法
WO2015180352A1 (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
WO2015062318A1 (zh) 交流驱动的像素电路、驱动方法及显示装置
TWI417843B (zh) 對偶畫素單元及對偶驅動電路
WO2015051682A1 (zh) 像素电路及其驱动方法、薄膜晶体管背板
WO2015024338A1 (zh) 一种像素电路及其驱动方法、阵列基板和显示装置
WO2016045256A1 (zh) 像素电路及其发光器件驱动方法和有机电致发光显示面板
CN107871471B (zh) 一种像素驱动电路及其驱动方法、显示装置
WO2015062322A1 (zh) 交流驱动的像素电路、驱动方法及显示装置
WO2015196730A1 (zh) 像素电路及其驱动方法和显示装置
WO2015007027A1 (zh) 一种像素电路及其驱动方法、阵列基板和显示装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14359165

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13876791

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 17/12/15)

122 Ep: pct application non-entry in european phase

Ref document number: 13876791

Country of ref document: EP

Kind code of ref document: A1