WO2014067266A1 - 处理数据冲突的方法及系统 - Google Patents

处理数据冲突的方法及系统 Download PDF

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Publication number
WO2014067266A1
WO2014067266A1 PCT/CN2013/074347 CN2013074347W WO2014067266A1 WO 2014067266 A1 WO2014067266 A1 WO 2014067266A1 CN 2013074347 W CN2013074347 W CN 2013074347W WO 2014067266 A1 WO2014067266 A1 WO 2014067266A1
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WIPO (PCT)
Prior art keywords
pmbus
command
time
slave device
master
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PCT/CN2013/074347
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English (en)
French (fr)
Inventor
谢谦
王新入
杨国新
Original Assignee
华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2014067266A1 publication Critical patent/WO2014067266A1/zh
Priority to US14/583,427 priority Critical patent/US9792193B2/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3027Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/324Power saving characterised by the action undertaken by lowering clock frequency
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3296Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to the field of integrated circuit signal interface technologies, and in particular, to a method and system for processing data conflicts. Background technique
  • the original system may be 3 ⁇ 4 power supply, and now there may be 10 ⁇ 20 more power, and this 10 ⁇
  • the timing of power-on and power-off of more than 20 channels of power supply is also different, and the power is not the same, so power management is required.
  • PMBus Power Management Bus
  • PMBus is used as the management interface of the power chip.
  • the application of PMBus is more and more extensive. Take multiple masters (master devices) to control multiple output scenarios of the power chip in the same slave (slave device): PMBus includes a data bus and a clock bus, each master is connected to the data bus and clock bus. The PMBus command is sent to the power chip through the data bus and the clock bus, and then the power chip is controlled to enable the power chip to output a corresponding voltage or perform other operations. Since the PMBus bus is an I2C (Inter-Integrated Circuit) serial bus, data collision occurs when multiple Masters are running at the same time.
  • I2C Inter-Integrated Circuit
  • the data may be sent to the power chip at the same time.
  • the PMBus will initiate arbitration to determine who is eligible for MasterO and Master 1.
  • the data is transmitted by the bus, and the data of the master that failed the arbitration will be discarded.
  • a method and a system for processing data conflicts are provided, which can solve the problem of data collision of the power management bus PMBus in a multi-master scenario, and improve system reliability.
  • a method of handling data conflicts including:
  • the PMBus command is sent to the slave device through the power management bus PMBus to perform power management.
  • PMBus command fails to be sent, it is determined whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value, and the preset value is initialized in the system. Pre-configured;
  • the timing starts; when the time length reaches the retransmission time, the PMBus command is resent.
  • the retransmission time is greater than a time required for the master device to send a shortest PMBus command, and is less than or equal to a sum of times required by all masters in the system to issue one of the longest PMBus commands.
  • the method further includes: sending a command to the slave device to clear the alarm information in the slave device.
  • the retransmission time is configured as a fixed length of time or a random length of time.
  • the configuring the retransmission time to a fixed time length comprises: the PMBus passing the power management bus Before the PMBus command is sent to the slave device, the retransmission time of the master is configured to be the fixed length of time.
  • the fixed lengths of different master configurations in the system are different.
  • the configuring the retransmission time to a random time length includes:
  • the random time length is configured for the master that fails to send the PMBus command.
  • a second aspect provides a system for processing data conflicts, a master device, a slave device, and a power management bus PMBus, wherein the master device accesses the slave device through the PMBus for power management;
  • the master device includes: An adaptive voltage regulation AVS module, the AVS module comprising:
  • a command sending unit configured to send a PMBus command to the slave device by using the PMBus
  • a determining unit configured to determine, when the PMBus command fails to be sent, whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value,
  • the preset value is pre-configured at the time of system initialization; the timing unit is configured to start timing when the number of times the PMBus command fails to be sent is less than the preset value;
  • the command sending unit is further configured to resend the PMBus command when the timing time of the timing unit reaches a retransmission time.
  • the retransmission time is greater than a time required for the master to send a shortest PMBus command, and is less than or equal to a sum of times required by all masters in the system to issue a longest PMBus command.
  • the AVS module further includes: an alarm reporting unit;
  • the alarm reporting unit is configured to: when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, instruct the slave device to report the alarm information;
  • the master device further includes: a processing module
  • the processing module is configured to interrupt a process of sending the PMBus command to the slave device according to the alarm information acquired from the slave device.
  • command sending unit is further configured to: send a command to the slave device to clear the alarm information in the slave device.
  • the AVS module further includes:
  • a time configuration unit configured to configure the retransmission time to be a fixed time length or a random time length.
  • the time configuration unit includes:
  • a first time configuration subunit configured to configure a retransmission time of the master to the fixed time length before the sending the PMBus command to the slave device by using the PMBus, where different master configurations in the system are configured
  • the fixed lengths are not the same.
  • the time configuration unit further includes:
  • the second time configuration subunit when the number of times the PMBus command fails to be sent is less than the preset value, before the start timing, configuring the random time length for the master that fails to send the PMBus command.
  • the embodiment of the present invention sends a PMBus command to the slave device through the power management bus PMBus; when the PMBus command fails to be sent, it is determined whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value, The preset value is pre-configured at the time of system initialization; when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, the process ends according to the alarm information acquired from the slave device; when the PMBus command fails to be sent When it is less than the preset value, Start timing; when the time length reaches the retransmission time, the PMBus command is resent.
  • the above process is configured to reconfigure the PMBus command for a certain time length for the master device that has a data conflict in the system, and reduce the probability that the same data conflict occurs again when multiple Master retransmitted PMBus commands have occurred. Greatly improve the reliability of the system and ensure the normal operation of the system.
  • Embodiment 1 is a flowchart of a method according to Embodiment 1 of the present invention.
  • FIG. 3 is a flowchart of implementing a state machine according to Embodiment 2 of the present invention.
  • FIG. 4 and FIG. 5 are schematic structural diagrams of a system according to Embodiment 3 of the present invention.
  • FIG. 6 is a schematic structural diagram of a device according to Embodiment 4 of the present invention.
  • This embodiment provides a method for processing data conflicts. As shown in FIG. 1, the method includes: 101. A master device sends a PMBus command to a slave device through a power management bus PMBus. For power management.
  • the power management bus PMBus is a defined control power conversion and management device digital communication protocol.
  • PMBus is used as the management interface of the power chip of the slave device.
  • the master device can configure, monitor and operate the power converter of the slave device according to the standard command set.
  • the PMBus command can be used to set the working parameters of the power supply and monitor the power supply. Work and perform correct measurements based on failures and alarms.
  • the PMBus command may be a configuration command or a control command.
  • the configuration command may include: a voltage regulation command, an operating frequency configuration command, and a phase delay configuration command, where the output voltage setting value is configured
  • the control command may include: Controls the command to enable/disconnect from the device, the command to output the voltage from the device, the command to adjust the slave operating frequency and tolerance, and so on.
  • the slave device can configure corresponding parameters or adjust the working state according to specific commands.
  • the master determines whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value.
  • the preset value is pre-configured at system initialization.
  • the Master starts timing.
  • the master resends the PMBus command.
  • the retransmission time is greater than the time required for the Master to send a shortest PMBus command, and is less than or equal to the sum of the time required for all Masters in the system to issue one of the longest PMBus commands.
  • the retransmission time is configured as a fixed time length or a random time length.
  • the configuring the retransmission time as a fixed length of time includes:
  • the retransmission time of the master is configured to be the fixed length of time, wherein the fixed lengths of different master configurations in the system are different.
  • the configuring the retransmission time to a random time length includes:
  • the random time length is configured for the master that fails to send the PMBus command.
  • the method further includes:
  • the embodiment of the present invention sends a PMBus command to the slave device through the power management bus PMBus; when the PMBus command fails to be sent, it is determined whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value, The preset value is pre-configured at the time of system initialization; when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, the process ends according to the alarm information acquired from the slave device; when the PMBus command fails to be sent When the preset value is less than the preset value, the timing is started; when the timing time reaches the retransmission time, the PMBus command is resent.
  • Embodiment 2 This embodiment provides a method for processing data conflicts.
  • the slave device takes a power chip as an example. As shown in FIG. 2, the method includes:
  • the master device sends a power management bus PMBus command to the power chip.
  • the PMBus command may be a voltage regulation command or other control command
  • the power chip is a slave device
  • the master passes through a data bus (which may be called pmbus_data) and a clock bus (which may be called pmbus_elk).
  • the power chip sends the PMBus command, and the power chip can adjust the voltage output to the master after receiving the voltage regulation command, or perform corresponding operations according to other control commands, such as power-on operation.
  • multiple masters in the system control the power chip.
  • the PMBus bus sends commands simultaneously according to a certain mechanism.
  • the master arbitrates to determine which one of them has the highest priority. The high priority is allowed to control the bus to send the PMBus command. The master with a lower priority will fail to send the command. Therefore, the master performs step 202 to determine the next step. Execution process.
  • step 202 Determine whether the PMBus command is in error. If the PMBus command is in error, go to step 203. If the PMBus command has no error, end the process after sending the PMBus command.
  • the Master sends a byte of data to the power chip to get the response of the power chip.
  • the data bus will be kept low, so that the Master can know that the data is sent incorrectly, and then execute. Step 203.
  • the process can be directly ended.
  • step 203 Determine whether the number of errors of the PMBus command is less than a preset value of the system configuration. If the number of errors of the PMBus command is less than a preset value of the system configuration, perform step 204; if the number of errors of the PMBus command is greater than or equal to the system configuration Set the value and go to step 206.
  • the master sends a command to the power chip to clear the alarm information generated by the power chip.
  • the number of errors of the PMBus command sent by the master is less than the preset value, although the error may be caused by some problems that can be solved, the CPU chip will still generate the information about the current time. Incorrect alarm information, due to the improved processing flow of the present invention, these The alarm information becomes spam, and the power chip needs to be notified to clear and release the memory.
  • the master starts timing for the PMBus command, waits for the timing to reach the retransmission time, and performs step 201 again.
  • a time length lower limit min_length, min_length is defined for the retransmission time, which is the length of time required for the master to send a shortest PMBus command in the system.
  • Min_length there is a case for the defined min_length: Suppose there are two master devices, MasterO and Master 1, MasterO is sending the PMBus command, and Masterl is preparing for the retransmission time with a length slightly longer than min_length.
  • the PMBus command is issued, in which the time required for the MasterO to send the PMBus command is much longer than the min_length.
  • the Masterl starts to resend its own PMBus command while the MasterO starts to send the PMBus command, then the time in Masterl reaches min. After length, Masterl will resend the PMBus command, but MasterO has not completed the transmission of its own PMBus command, and data conflict will occur between the two.
  • min_length Due to the limitation of the setting principle of min_length, this situation is unavoidable, but when Masterl performs the second retransmission, the above problem will not occur again, so it is completely feasible to define the retransmission time as min_length. At the same time, in order to balance the bus efficiency of the system, the retransmission time cannot be defined too long, which is less than or equal to the upper limit max_length, and max_length is the sum of the lengths of time required for all the masters in the system to issue one longest PMBus command.
  • the retransmission time may be set for each master. For example, before the execution of step 201, a different fixed retransmission time is set for each master in the system to ensure two or more. The data conflict does not occur again when the Master performs retransmission; or, before the timer starts in step 205, the retransmission time is set for the Master that needs to resend the PMBus command.
  • the time can be a random value between min_length and max_length to ensure normal retransmission.
  • the master sends a command to the power chip, instructing the power chip to report the alarm information, and interrupting sending the PMBus command to the power chip according to the alarm information acquired from the slave device.
  • the state machine implementation process of the process of the embodiment of the present invention is as shown in FIG. 3, wherein if the PMBus command sent by the master does not generate an error, step 1, step 2, and step 3 in FIG. 3 are performed; If the PMBus command has an error and the number of retransmissions is less than the preset value, perform Step 1, Step 4, Step 5, and Step 6 in Figure 3. If the retransmission is successful, perform Step 2 and Step 3 in Figure 3, and then end the process. If the retransmission is unsuccessful, the steps 4, 5, and 6 in FIG. 3 are performed cyclically until the maximum number of errors is reached, and steps 7, 8 and 3 are performed, and then the process ends.
  • the master device in the embodiment of the present invention may be an ASIC or a board-level CPU, and the slave device may be a power chip or the like, but the specific form of the device is not limited.
  • the embodiment of the present invention sends a PMBus command to the slave device through the power management bus PMBus; when the PMBus command fails to be sent, it is determined whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value, The preset value is pre-configured at the time of system initialization; when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, the process ends according to the alarm information acquired from the slave device; when the PMBus command fails to be sent When the preset value is less than the preset value, the timing is started; when the timing time reaches the retransmission time, the PMBus command is resent.
  • Embodiment 3 is configured to reconfigure the PMBus command for a certain time length for the master device that has a data conflict in the system, and reduce the probability that the same data conflict occurs again when multiple Master retransmitted PMBus commands have occurred. Greatly improve the reliability of the system and ensure the normal operation of the system.
  • the embodiment provides a system 30 for processing data conflicts.
  • the system 30 includes a master device 31, a slave device 32, and a power management bus PMBus 33.
  • the master device 31 passes the PMBus 33 accesses the slave device 32 for power management;
  • the master device 31 includes: an AVS (Adaptive Voltage Scaling) module 311, and the AVS module 311 includes:
  • the command sending unit 3111 is configured to send a PMBus command to the slave device 32 through the PMBus 33.
  • the determining unit 3112 is configured to determine, when the PMBus command fails to be sent, whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value.
  • the preset value is pre-configured at system initialization;
  • the timing unit 3113 is configured to start timing when the number of times the PMBus command fails to be sent is less than the preset value
  • the command sending unit 3111 is further configured to resend the PMBus command when the time length of the timing unit 3113 reaches the retransmission time.
  • the retransmission time is greater than the time required for the Master to send a shortest PMBus command, and is less than or equal to the sum of the time required for all Masters in the system to issue one of the longest PMBus commands.
  • the AVS module 311 may further include:
  • the time configuration unit 3114 is configured to configure the retransmission time as a fixed time length or a random time length.
  • the time configuration unit 3114 may further include:
  • a first time configuration subunit 31141 configured to configure a retransmission time of the master to the fixed time length before the sending the PMBus command to the slave device 32 by using the PMBus 33, where different Master configurations in the system The fixed lengths of time are different;
  • the second time configuration sub-unit 31142 is configured to: when the number of times the PMBus command fails to be sent is less than the preset value, configure the random time length for the master that fails to send the PMBus command before the start timing.
  • the AVS module 311 may further include: an alarm reporting unit 3115; the alarm reporting unit 3115 is configured to: when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, The slave device 32 reports alarm information;
  • the master device 31 further includes: a processing module 312;
  • the processing module 312 is configured to interrupt the process of sending the PMBus command to the slave device 32 according to the alarm information acquired from the slave device 32.
  • command sending unit 3111 is further configured to send a command to the slave device 32 to clear the alarm information in the slave device 32.
  • the master device in the embodiment of the present invention may be an ASIC or a board-level CPU, and the slave device may be a power chip or the like, but the specific form of the device is not limited.
  • the embodiment of the present invention sends a PMBus command to the slave device through the power management bus PMBus; when the PMBus command fails to be sent, it is determined whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value, The preset value is pre-configured at the time of system initialization; when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, the process ends according to the alarm information acquired from the slave device; when the PMBus command fails to be sent When the preset value is less than the preset value, the timing is started; when the timing time reaches the retransmission time, the PMBus command is resent.
  • the above process is configured to reconfigure the PMBus command for a certain time length for the master device that has a data conflict in the system, and reduce the probability that the same data conflict occurs again when multiple Master retransmitted PMBus commands have occurred. Greatly improve the reliability of the system and ensure the normal operation of the system.
  • the embodiment provides a device 40 for processing data conflicts.
  • the device 40 includes: a transmitter 41, configured to send a PMBus command to a slave device through a power management bus PMBus; and Resending the PMBus command when the time length of the timer reaches the retransmission time;
  • the processor 42 is configured to: when the PMBus command fails to be sent, determine whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value, where the preset value is pre-configured at system initialization; and is used to be when the PMBus When the number of times the command fails to be sent is less than the preset value, the timing starts.
  • the retransmission time is greater than the time required for the master to send a shortest PMBus command, and is less than or equal to the sum of time required by all the masters in the system to issue one of the longest PMBus commands.
  • the processor 42 is further configured to: when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, instruct the slave device to report alarm information; according to the method obtained from the slave device The alarm information is used to interrupt the process of sending the PMBus command to the slave device.
  • the processor 42 is further configured to: configure the retransmission time to be a fixed time length or a random time length.
  • the processor 42 is further configured to: before the sending the PMBus command to the slave device by using the PMBus, configuring a retransmission time of the master to the fixed length of time, where different masters in the system The configured fixed time lengths are different; or, when the number of times the PMBus command fails to be sent is less than the preset value, before the start timing, the master configuration device that fails to send the PMBus command The length of the random time.
  • the transmitter 41 is further configured to send, to the slave device, a command to clear the alarm information in the slave device.
  • the embodiment of the present invention sends a PMBus command to the slave device through the power management bus PMBus; when the PMBus command fails to be sent, it is determined whether the number of times the PMBus command fails to be sent is greater than or equal to a preset value, The preset value is pre-configured at the time of system initialization; when the number of times the PMBus command fails to be sent is greater than or equal to the preset value, the process ends according to the alarm information acquired from the slave device; when the PMBus command fails to be sent When the preset value is less than the preset value, the timing is started; when the timing time reaches the retransmission time, the PMBus command is resent.
  • the above process is configured to reconfigure the PMBus command for a certain time length for the master device that has a data conflict in the system, and reduce the probability that the same data conflict occurs again when multiple Master retransmitted PMBus commands have occurred. Greatly improve the reliability of the system and ensure the normal operation of the system.
  • the system for processing data conflicts provided by the embodiment of the present invention may implement the foregoing method embodiments.
  • Implementation of the invention The method and system for handling data conflicts provided by the example can be applied to multiple master devices to send PMBus commands through the power management bus PMBus, but is not limited thereto.
  • the storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

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Abstract

本发明实施例公开了一种处理数据冲突的方法及系统,涉及集成电路信号接口技术领域,所述方法包括:通过电源管理总线PMBus向从设备发送PMBus命令,以进行电源管理;当所述PMBus命令发送失败时,判断所述PMBus命令发送失败的次数是否大于等于预设值,所述预设值在系统初始化时预先配置;若所述PMBus命令发送失败的次数小于所述预设值,则开始计时;当计时时间长度达到重发时间时,重新发送所述PMBus命令。本发明适用于多个主设备Master通过电源管理总线PMBus发送PMBus命令。

Description

处理数据冲突的方法及系统 本申请要求于 2012年 10月 31日提交中国专利局、申请号为 201210428003.6、 发明名称为"处理数据冲突的方法及系统"的中国专利申请的优先权, 其全部 内容通过引用结合在本申请中。 技术领域
本发明涉及集成电路信号接口技术领域, 特别涉及一种处理数据冲突的 方法及系统。 背景技术
随着半导体行业的快速发展, 人们发现对电源路数和功率需求是越来越 多, 原来一个系统可能 3 ~ 4路电源就可以了, 现在可能有 10 ~ 20多路电源, 而这 10 ~ 20多路的电源的上下电的时序也不尽相同, 功率大小也不一样, 因 此需要进行电源管理。
PMBus ( Power Management Bus, 电源管理总线)是一种开放标准的数字 电源管理协议, 可通过定义传输和物理接口以及命令语言来促进与电源转换 器或其他设备的通信, 该协议是由一群认为由于没有合适的标准而抑制了全 数字电源管理解决方案的发展的电源和半导体生产商共同建立的, 目前, 这 个协议正在迅速地获得业界的认可。
PMBus作为电源芯片的管理接口, 在目前的集成电路系统中 PMBus的应 用越来越广泛。 以多个 Master (主设备)控制同一个 Slave (从设备) 中电源 芯片的多路输出场景为例: PMBus包括一条数据总线和一条时钟总线, 每一 个 Master都与数据总线和时钟总线相连接,通过数据总线和时钟总线向电源芯 片发送 PMBus命令, 进而对电源芯片进行控制, 使电源芯片输出相应的电压 或实现其他操作。 由于 PMBus总线为 I2C ( Inter - Integrated Circuit, 内部集成 电路) 串口总线, 当存在多个 Master同时运行时, 会发生数据冲突。 例如, 存 在两个主设备 MasterO和 Master 1同时运行 , 当二者检测到总线空闲时, 可能会 同时向电源芯片中发送数据, 此时 PMBus会发起仲裁, 判断 MasterO和 Master 1 二者中谁有资格控制总线进行数据传输,仲裁失败的那一个 Master的数据将会 被丟弃。
针对上述问题, 现有技术中会丟弃仲裁失败的那一方的此次操作, 并通 过硬件重新发送数据; 或者上报告警, 然后通过软件下发重新发送数据的命 令进而重新发送数据。
现有技术中至少存在如下问题: 当多个 Master发生数据冲突时,如果通过 硬件或软件直接重新发送数据, 那么重新发送的数据仍然可能会不断地发生 冲突, 从而导致系统无法正常运行, 严重影响系统的可靠性。 发明内容
提供一种处理数据冲突的方法及系统,能够解决多 Master的场景下电源管 理总线 PMBus发生数据冲突的问题, 提高系统的可靠性。
第一方面, 提供一种处理数据冲突的方法, 包括:
通过电源管理总线 PMBus向从设备发送 PMBus命令 , 以进行电源管理; 当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送失败的次数是 否大于等于预设值, 所述预设值在系统初始化时预先配置;
若所述 PMBus命令发送失败的次数小于所述预设值, 则开始计时; 当计时时间长度达到重发时间时 , 重新发送所述 PMBus命令。
在第一种可能的实现方式中,所述重发时间大于主设备 Master发送一条最 短 PMBus命令所需的时间,且小于等于系统内所有 Master发出一条最长 PMBus 命令所需的时间之和。
若所述 PMBus命令发送失败的次数大于等于所述预设值, 指示所述从设 备上报告警信息;
根据从所述从设备获取的所述告警信息, 中断发送所述 PMBus命令给所 述从设备的流程。
当所述 PMBus命令发送失败的次数小于所述预设值时, 在所述开始计时 之前, 还包括: 向所述从设备发送清除所述从设备中的告警信息的命令。
结合第一方面或第一方面的第一种可能的实现方式, 在第二种可能的实 现方式中, 将所述重发时间配置为固定时间长度或随机时间长度。
结合第一方面或第一方面的第二种可能的实现方式, 在第三种可能的实 现方式中, 所述将所述重发时间配置为固定时间长度包括: 在所述通过电源 管理总线 PMBus向从设备发送 PMBus命令之前,将 Master的重发时间配置为所 述固定时间长度, 其中, 系统内不同的 Master配置的所述固定时间长度均不相 同。
可选的, 所述将所述重发时间配置为随机时间长度包括:
当所述 PMBus命令发送失败的次数小于所述预设值时, 在所述开始计时 之前 , 为发送所述 PMBus命令失败的 Master配置所述随机时间长度。
第二方面, 提供一种处理数据冲突的系统, 主设备 Master, 从设备和电源 管理总线 PMBus, 所述主设备通过所述 PMBus访问所述从设备, 以进行电源 管理; 所述主设备包括: 自适应电压调节 AVS模块, 所述 AVS模块包括:
命令发送单元, 用于通过所述 PMBus向所述从设备发送 PMBus命令; 判断单元, 用于当所述 PMBus命令发送失败时, 判断所述 PMBus命令发 送失败的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置; 计时单元, 用于当所述 PMBus命令发送失败的次数小于所述预设值时, 开始计时;
所述命令发送单元还用于当所述计时单元的计时时间长度达到重发时间 时, 重新发送所述 PMBus命令。
在第一种可能的实现方式中, 所述重发时间大于 Master发送一条最短 PMBus命令所需的时间, 且小于等于系统内所有 Master发出一条最长 PMBus 命令所需的时间之和。 进一步的, 所述 AVS模块还包括: 告警上报单元;
所述告警上报单元用于当所述 PMBus命令发送失败的次数大于等于所述 预设值时, 指示所述从设备上报告警信息;
所述主设备还包括: 处理模块;
所述处理模块用于根据从所述从设备获取的所述告警信息, 中断发送所 述 PMBus命令给所述从设备的流程。
进一步的, 所述命令发送单元还用于: 向所述从设备发送清除所述从设 备中的告警信息的命令。
结合第二方面或第二方面的第一种可能的实现方式, 在第二种可能的实 现方式中, 所述 AVS模块还包括:
时间配置单元, 用于将所述重发时间配置为固定时间长度或随机时间长 度。
结合第二方面或第二方面的第二种可能的实现方式, 在第三种可能的实 现方式中, 所述时间配置单元包括:
第一时间配置子单元, 用于在所述通过所述 PMBus向所述从设备发送 PMBus命令之前, 将 Master的重发时间配置为所述固定时间长度, 其中, 系统 内不同的 Master配置的所述固定时间长度均不相同。
可选的, 所述时间配置单元还包括:
第二时间配置子单元, 当所述 PMBus命令发送失败的次数小于所述预设 值时,在所述开始计时之前, 为发送所述 PMBus命令失败的 Master配置所述随 机时间长度。
与现有技术相比, 本发明实施例通过电源管理总线 PMBus向从设备发送 PMBus命令; 当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送失败 的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置; 当所述 PMBus命令发送失败的次数大于等于所述预设值时, 根据从所述从设备获取 的告警信息结束流程; 当所述 PMBus命令发送失败的次数小于所述预设值时, 开始计时; 当计时时间长度达到重发时间时, 重新发送所述 PMBus命令。 上 述流程通过为系统内发生数据冲突的主设备 Master配置一定时间长度的 PMBus命令重发緩冲时间,降低了已经发生数据冲突的多个 Master重发 PMBus 命令时再次发生同样的数据冲突的概率, 极大地提高了系统的可靠性, 保证 系统的正常运行。 附图说明
为了更清楚地说明本发明实施例中的技术方案, 下面将对实施例或现有 技术描述中所需要使用的附图作简单地介绍, 显而易见地, 下面描述中的附 图仅仅是本发明的一些实施例, 对于本领域普通技术人员来讲, 在不付出创 造性劳动的前提下, 还可以根据这些附图获得其它的附图。
图 1为本发明实施例一提供的方法流程图;
图 2为本发明实施例二提供的方法流程图;
图 3为本发明实施例二提供的状态机实现流程图;
图 4、 图 5为本发明实施例三提供的系统结构示意图;
图 6为本发明实施例四提供的装置结构示意图。
具体实施方式
下面将结合本发明实施例中的附图, 对本发明实施例中的技术方案进行 清楚、 完整地描述, 显然, 所描述的实施例仅仅是本发明一部分实施例, 而 不是全部的实施例。 基于本发明中的实施例, 本领域普通技术人员在没有做 出创造性劳动前提下所获得的所有其它实施例, 都属于本发明保护的范围。
为使本发明技术方案的优点更加清楚, 下面结合附图和实施例对本发明 作详细说明。
实施例一
本实施例提供一种处理数据冲突的方法, 如图 1所示, 所述方法包括: 101、 主设备 Master通过电源管理总线 PMBus向从设备发送 PMBus命令, 以进行电源管理。
需要说明的是, 电源管理总线 PMBus为规定的控制电源变换和管理器件 数字通信协议。 电源管理中, 釆用 PMBus作为从设备的电源芯片的管理接口, 主设备根据标准命令集可以配置、 监控和操作从设备的电源变换器, 具体通 过 PMBus命令, 可以设置电源的工作参量、 监控电源的工作和根据失效和报 警执行正确的测量等。 其中, 所述 PMBus命令可以为配置命令或控制命令, 例如, 配置命令具体可以包括: 配置输出电压设定值的调压命令、 工作频率 配置命令以及相位延迟配置命令等, 控制命令具体可以包括: 控制从设备进 行使能 /断开的命令、 使从设备输出电压的命令、 控制调整从设备工作频率以 及容限的命令等。
进一步的, 从设备在接收到 PMBus命令后可以根据具体的命令配置相应 的参数或调整工作状态。
102、 当所述 PMBus命令发送失败时, Master判断所述 PMBus命令发送失 败的次数是否大于等于预设值。
其中, 所述预设值是在系统初始化时所预先配置的。
需要说明的是, 当系统中存在多个主设备通过 PMBus对从设备进行控制 时, 若两个或两个以上的 Master同时通过 I2C总线向从设备发送调压命令或者 其他控制命令时, I2C总线会对这些 Master进行仲裁, 仅仅允许一个 Master对 总线进行控制, 其他没有得到总线允许的 Master的数据将会被丟弃,命令发送 失败, 需要进行重新发送。
103、 若所述 PMBus命令发送失败的次数小于所述预设值, 则 Master开始 计时。
104、 当计时时间长度达到重发时间时 , Master重新发送所述 PMBus命令。 其中 , 所述重发时间大于 Master发送一条最短 PMBus命令所需的时间 , 且 小于等于系统内所有 Master发出一条最长 PMBus命令所需的时间之和。
进一步的, 若所述 PMBus命令发送失败的次数大于等于所述预设值, 则 指示所述从设备上报告警信息;
根据从所述从设备获取的所述告警信息, 中断发送所述 PMBus命令给所 述从设备的流程。
进一步的, 将所述重发时间配置为固定时间长度或随机时间长度。
可选的, 所述将所述重发时间配置为固定时间长度包括:
在所述通过电源管理总线 PMBus向从设备发送 PMBus命令之前,将 Master 的重发时间配置为所述固定时间长度, 其中, 系统内不同的 Master配置的所述 固定时间长度均不相同。
可选的, 所述将所述重发时间配置为随机时间长度包括:
当所述 PMBus命令发送失败的次数小于所述预设值时, 在所述开始计时 之前 , 为发送所述 PMBus命令失败的 Master配置所述随机时间长度。
可选的, 当所述 PMBus命令发送失败的次数小于所述预设值时, 在所述 开始计时之前, 还包括:
向所述从设备发送清除所述从设备中的告警信息的命令。
与现有技术相比, 本发明实施例通过电源管理总线 PMBus向从设备发送 PMBus命令; 当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送失败 的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置; 当所述 PMBus命令发送失败的次数大于等于所述预设值时, 根据从所述从设备获取 的告警信息结束流程; 当所述 PMBus命令发送失败的次数小于所述预设值时, 开始计时; 当计时时间长度达到重发时间时, 重新发送所述 PMBus命令。 上 述流程通过为系统内发生数据冲突的主设备 Master配置一定时间长度的 PMBus命令重发緩冲时间,降低了已经发生数据冲突的多个 Master重发 PMBus 命令时再次发生同样的数据冲突的概率, 极大地提高了系统的可靠性, 保证 系统的正常运行。 实施例二 本实施例提供一种处理数据冲突的方法, 从设备以电源芯片为例, 如图 2 所示, 所述方法包括:
201、 主设备 Master向电源芯片发送电源管理总线 PMBus命令。
例如, 所述 PMBus命令可以为调压命令或者其他控制命令, 所述电源芯 片为从设备, Master通过一条数据总线(可以称作 pmbus— data )和一条时钟总 线 (可以称作 pmbus— elk ) 向电源芯片发送该 PMBus命令, 电源芯片在接收到 调压命令后可以相应调整向 Master输出的电压,或者根据其他控制命令执行相 应的操作, 例如上电操作等。
可选的, 一般情形下, 系统中会存在多个 Master对电源芯片进行控制, 当 两个或两个以上的 Master同时向电源芯片发送命令时, PMBus总线会依据某种 机制对同时发送命令的 Master进行仲裁, 判定它们之中哪一个优先级最高,优 先级高的才被允许控制总线发送 PMBus命令,优先级低的 Master发送命令会失 败, 因此 Master要执行步骤 202进行判定, 以决定下一步的执行流程。
202、 判断该 PMBus命令是否出错, 若该 PMBus命令出错, 执行步骤 203; 若该 PMBus命令没有出错, 在发送该 PMBus命令后结束流程。
其中, Master每向电源芯片发送一个字节的数据都会得到电源芯片的响 应, 当电源芯片不能响应 Master时, 会使数据总线保持低电平, 从而使 Master 能够得知该数据发送出错, 进而执行步骤 203。
可选的, 当 PMBus命令发送成功后, 可以直接结束流程。
203、 判断该 PMBus命令的出错次数是否小于系统配置的预设值, 若该 PMBus命令的出错次数小于系统配置的预设值, 执行步骤 204; 若该 PMBus命 令的出错次数大于等于系统配置的预设值, 执行步骤 206。
204、 Master向电源芯片发送清除电源芯片中产生的告警信息的命令。 可选的 , 当 Master发送的 PMBus命令的出错次数小于预设值时 , 虽然此时 的出错可能是一些可以解决的问题造成的, 不用上报 CPU处理, 但此时电源 芯片仍会生成关于此次错误的告警信息, 由于本发明的处理流程改进, 这些 告警信息成为了垃圾信息, 需要通知电源芯片进行清除, 释放内存。
205、 Master为该 PMBus命令启动计时, 等待计时达到重发时间, 再次执 行步骤 201。
例如, 当多个 Master同时发送 PMBus命令导致数据冲突, 并需要重发 PMBus命令时, 为了避免这些 Master重发 PMBus命令时再次导致数据冲突, 为 Master设定不同的重发等待时间, 即重发时间, 以使得这些 Master将发送 PMBus命令的时间错开, 避免数据冲突。
进一步的, 为了使重发时间能够有效错开 Master之间发送命令的时间, 为 重发时间定义一个时间长度下限 min— length, min— length为系统中 Master发送一 条最短 PMBus命令所需的时间长度。
需要说明的是, 针对定义的 min— length存在一种情形: 假设有 MasterO和 Master 1两个主设备, MasterO正在发送 PMBus命令, 而 Masterl以稍大于 min— length的时间长度为重发时间准备重发 PMBus命令,其中, MasterO发送此 条 PMBus命令所需的时间远大于 min— length, 而此时 Masterl在 MasterO开始发 送 PMBus命令的同时开始计时重发自身的 PMBus命令, 那么在 Masterl的计时 到达 min— length后, Masterl会进行 PMBus命令重发, 但 MasterO还未完成自身 PMBus命令的发送, 二者会发生数据冲突。 由于 min— length的设定原则限制, 此种情形是不可避免的, 但是当 Masterl进行第二次重发时, 上述问题不会再 次发生, 所以定义重发时间为 min— length是完全可行的。 同时为了兼顾系统的 总线效率, 不能将重发时间定义的太长, 要小于等于上限 max— length , max— length为系统中所有 Master发出一条最长 PMBus命令所需的时间长度之 和。
可选的,所述重发时间可以为每一个 Master均进行设置,例如,在步骤 201 执行之前就为系统中每一个 Master设置一个不相同的固定的重发时间,保证两 个或两个以上 Master进行重发时不会再次发生数据冲突; 或者, 在步骤 205开 始计时之前, 即时地为需要重发 PMBus命令的 Master设置重发时间, 此时设定 的时间可以为 min— length和 max— length之间不同的随机值, 以保证重发的正常 进行。
206、 Master向电源芯片发送命令, 指示电源芯片上报告警信息, 根据从 所述从设备获取的所述告警信息, 中断发送 PMBus命令给电源芯片。
进一步的, 本发明实施例的流程的状态机实现过程如图 3所示, 其中, 如 果 Master发送的 PMBus命令未发生错误, 则执行图 3中步骤 1、 步骤 2和步骤 3; 如果 Master发送的 PMBus命令发生错误, 且重发次数小于预设值, 则执行图 3 中步骤 1、 步骤 4、 步骤 5和步骤 6, 若重发成功, 执行图 3中步骤 2和步骤 3 , 然 后结束流程; 若重发不成功, 则循环执行图 3中步骤 4、 步骤 5和步骤 6直至达 到最大错误次数, 执行步骤 7、 步骤 8和步骤 3 , 然后结束流程。
需要说明的是, 本发明实施例中的主设备 Master可以为 ASIC或者板级 CPU等, 从设备可以为电源芯片等, 但不对设备的具体形式进行限定。
与现有技术相比, 本发明实施例通过电源管理总线 PMBus向从设备发送 PMBus命令; 当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送失败 的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置; 当所述 PMBus命令发送失败的次数大于等于所述预设值时, 根据从所述从设备获取 的告警信息结束流程; 当所述 PMBus命令发送失败的次数小于所述预设值时, 开始计时; 当计时时间长度达到重发时间时, 重新发送所述 PMBus命令。 上 述流程通过为系统内发生数据冲突的主设备 Master配置一定时间长度的 PMBus命令重发緩冲时间,降低了已经发生数据冲突的多个 Master重发 PMBus 命令时再次发生同样的数据冲突的概率, 极大地提高了系统的可靠性, 保证 系统的正常运行。 实施例三
本实施例提供一种处理数据冲突的系统 30, 如图 4所示, 所述系统 30包括 主设备 Master31、从设备 32和电源管理总线 PMBus33 , 所述主设备 31通过所述 PMBus33访问所述从设备 32 , 以进行电源管理;
进一步的,如图 5所示,所述主设备 31包括: AVS( Adaptive Voltage Scaling, 自适应电压调节)模块 311 , 所述 AVS模块 311包括:
命令发送单元 3111 , 用于通过所述 PMBus33向从设备 32发送 PMBus命令; 判断单元 3112 , 用于当所述 PMBus命令发送失败时 , 判断所述 PMBus命 令发送失败的次数是否大于等于预设值, 所述预设值在系统初始化时预先配 置;
计时单元 3113 , 用于当所述 PMBus命令发送失败的次数小于所述预设值 时, 开始计时;
所述命令发送单元 3111还用于当所述计时单元 3113的计时时间长度达到 重发时间时 , 重新发送所述 PMBus命令。
其中 , 所述重发时间大于 Master发送一条最短 PMBus命令所需的时间 , 且 小于等于系统内所有 Master发出一条最长 PMBus命令所需的时间之和。
进一步的, 如图 5所示, 所述 AVS模块 311还可以包括:
时间配置单元 3114, 用于将所述重发时间配置为固定时间长度或随机时 间长度。
进一步的, 如图 5所示, 所述时间配置单元 3114还可以包括:
第一时间配置子单元 31141 , 用于在所述通过所述 PMBus33向所述从设备 32发送 PMBus命令之前,将 Master的重发时间配置为所述固定时间长度,其中, 系统内不同的 Master配置的所述固定时间长度均不相同;
第二时间配置子单元 31142, 用于当所述 PMBus命令发送失败的次数小于 所述预设值时, 在所述开始计时之前, 为发送所述 PMBus命令失败的 Master 配置所述随机时间长度。
进一步的,如图 5所示,所述 AVS模块 311还可以包括:告警上报单元 3115; 所述告警上报单元 3115用于当所述 PMBus命令发送失败的次数大于等于 所述预设值时, 指示所述从设备 32上报告警信息; 所述主设备 31还包括: 处理模块 312;
所述处理模块 312用于根据从所述从设备 32获取的所述告警信息, 中断发 送所述 PMBus命令给所述从设备 32的流程。
进一步的, 所述命令发送单元 3111还用于向所述从设备 32发送清除所述 从设备 32中的告警信息的命令。
需要说明的是, 本发明实施例中的主设备 Master可以为 ASIC或者板级 CPU等, 从设备可以为电源芯片等, 但不对设备的具体形式进行限定。
与现有技术相比, 本发明实施例通过电源管理总线 PMBus向从设备发送 PMBus命令; 当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送失败 的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置; 当所述 PMBus命令发送失败的次数大于等于所述预设值时, 根据从所述从设备获取 的告警信息结束流程; 当所述 PMBus命令发送失败的次数小于所述预设值时, 开始计时; 当计时时间长度达到重发时间时, 重新发送所述 PMBus命令。 上 述流程通过为系统内发生数据冲突的主设备 Master配置一定时间长度的 PMBus命令重发緩冲时间,降低了已经发生数据冲突的多个 Master重发 PMBus 命令时再次发生同样的数据冲突的概率, 极大地提高了系统的可靠性, 保证 系统的正常运行。 实施例四
本实施例提供一种处理数据冲突的装置 40,如图 6所示,所述装置 40包括: 发送器 41 , 用于通过电源管理总线 PMBus向从设备发送 PMBus命令; 以 及用于当处理器 42的计时时间长度达到重发时间时, 重新发送所述 PMBus命 令;
处理器 42, 用于当所述 PMBus命令发送失败时, 判断所述 PMBus命令发 送失败的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置; 以及用于当所述 PMBus命令发送失败的次数小于所述预设值时, 开始计时。 其中,所述重发时间大于 Master发送一条最短 PMBus命令所需的时间, 且 小于等于系统内所有 Master发出一条最长 PMBus命令所需的时间之和。
进一步的, 所述处理器 42还用于: 当所述 PMBus命令发送失败的次数大 于等于所述预设值时, 指示所述从设备上报告警信息; 根据从所述从设备获 取的所述告警信息, 中断发送所述 PMBus命令给所述从设备的流程。
进一步的, 所述处理器 42还用于: 将所述重发时间配置为固定时间长度 或随机时间长度。
进一步的, 所述处理器 42还用于: 在所述通过所述 PMBus向所述从设备 发送 PMBus命令之前 , 将 Master的重发时间配置为所述固定时间长度 , 其中, 系统内不同的 Master配置的所述固定时间长度均不相同; 或者, 用于当所述 PMBus命令发送失败的次数小于所述预设值时, 在所述开始计时之前, 为发 送所述 PMBus命令失败的 Master配置所述随机时间长度。
进一步的, 所述发送器 41还用于向所述从设备发送清除所述从设备中的 告警信息的命令。
与现有技术相比, 本发明实施例通过电源管理总线 PMBus向从设备发送 PMBus命令; 当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送失败 的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置; 当所述 PMBus命令发送失败的次数大于等于所述预设值时, 根据从所述从设备获取 的告警信息结束流程; 当所述 PMBus命令发送失败的次数小于所述预设值时, 开始计时; 当计时时间长度达到重发时间时, 重新发送所述 PMBus命令。 上 述流程通过为系统内发生数据冲突的主设备 Master配置一定时间长度的 PMBus命令重发緩冲时间,降低了已经发生数据冲突的多个 Master重发 PMBus 命令时再次发生同样的数据冲突的概率, 极大地提高了系统的可靠性, 保证 系统的正常运行。
本发明实施例提供的处理数据冲突的系统可以实现上述提供的方法实施 例, 具体功能实现请参见方法实施例中的说明, 在此不再赘述。 本发明实施 例提供的处理数据冲突的方法及系统可以适用于多个主设备 Master通过电源 管理总线 PMBus发送 PMBus命令, 但不仅限于此。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流 程, 是可以通过计算机程序来指令相关的硬件来完成, 所述的程序可存储于 一计算机可读取存储介质中, 该程序在执行时, 可包括如上述各方法的实施 例的流程。其中,所述的存储介质可为磁碟、光盘、只读存储记忆体( Read-Only Memory, ROM )或随机存储记忆体 ( Random Access Memory, RAM )等。
以上所述, 仅为本发明的具体实施方式, 但本发明的保护范围并不局限 于此, 任何熟悉本技术领域的技术人员在本发明揭露的技术范围内, 可轻易 想到的变化或替换, 都应涵盖在本发明的保护范围之内。 因此, 本发明的保 护范围应该以权利要求的保护范围为准。

Claims

权利要求 书
1、 一种处理数据冲突的方法, 其特征在于, 包括:
通过电源管理总线 PMBus向从设备发送 PMBus命令 , 以进行电源管理; 当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送失败的次数是否 大于等于预设值, 所述预设值在系统初始化时预先配置;
若所述 PMBus命令发送失败的次数小于所述预设值, 则开始计时; 当计时时间长度达到重发时间时 , 重新发送所述 PMBus命令。
2、根据权利要求 1所述的方法,其特征在于,所述重发时间大于主设备 Master 发送一条最短 PMBus命令所需的时间,且小于等于系统内所有 Master发出一条最 长 PMBus命令所需的时间之和。
3、 根据权利要求 2所述的方法, 其特征在于, 将所述重发时间配置为固定 时间长度或随机时间长度。
4、 根据权利要求 3所述的方法, 其特征在于, 所述将所述重发时间配置为 固定时间长度包括:
在所述通过电源管理总线 PMBus向从设备发送 PMBus命令之前, 将 Master 的重发时间配置为所述固定时间长度, 其中, 系统内不同的 Master配置的所述固 定时间长度均不相同。
5、 根据权利要求 3所述的方法, 其特征在于, 所述将所述重发时间配置为 随机时间长度包括:
当所述 PMBus命令发送失败的次数小于所述预设值时, 在所述开始计时之 前 , 为发送所述 PMBus命令失败的 Master配置所述随机时间长度。
6、 根据权利要求 1所述的方法, 其特征在于, 若所述 PMBus命令发送失败 的次数大于等于所述预设值, 指示所述从设备上报告警信息;
则还包括:
根据从所述从设备获取的所述告警信息, 中断发送所述 PMBus命令给所述 从设备的流程。
7、 根据权利要求 1所述的方法, 其特征在于, 当所述 PMBus命令发送失败 的次数小于所述预设值时, 在所述开始计时之前, 还包括:
向所述从设备发送清除所述从设备中的告警信息的命令。
8、 一种处理数据冲突的系统, 其特征在于, 包括主设备、 从设备和电源管 理总线 PMBus, 所述主设备通过所述 PMBus访问所述从设备, 以进行电源管理; 所述主设备包括: 自适应电压调节 AVS模块, 所述 AVS模块包括:
命令发送单元, 用于通过所述 PMBus向所述从设备发送 PMBus命令; 判断单元, 用于当所述 PMBus命令发送失败时, 判断所述 PMBus命令发送 失败的次数是否大于等于预设值, 所述预设值在系统初始化时预先配置;
计时单元, 用于当所述 PMBus命令发送失败的次数小于所述预设值时, 开 始计时;
所述命令发送单元还用于当所述计时单元的计时时间长度达到重发时间 时, 重新发送所述 PMBus命令。
9、 根据权利要求 8所述的系统, 其特征在于, 所述重发时间大于 Master发送 一条最短 PMBus命令所需的时间, 且小于等于系统内所有 Master发出一条最长 PMBus命令所需的时间之和。
10、 根据权利要求 9所述的系统, 其特征在于, 所述 AVS模块还包括: 时间配置单元, 用于将所述重发时间配置为固定时间长度或随机时间长度。
11、 根据权利要求 10所述的系统, 其特征在于, 所述时间配置单元包括: 第一时间配置子单元, 用于在所述通过所述 PMBus向所述从设备发送 PMBus命令之前, 将 Master的重发时间配置为所述固定时间长度, 其中, 系统内 不同的 Master配置的所述固定时间长度均不相同。
12、 根据权利要求 10所述的系统, 其特征在于, 所述时间配置单元包括: 第二时间配置子单元, 用于当所述 PMBus命令发送失败的次数小于所述预 设值时,在所述开始计时之前, 为发送所述 PMBus命令失败的 Master配置所述随 机时间长度。
13、 根据权利要求 8所述的系统, 其特征在于, 所述 AVS模块还包括: 告警 上报单元;
所述告警上报单元用于当所述 PMBus命令发送失败的次数大于等于所述预 设值时, 指示所述从设备上报告警信息;
所述主设备还包括: 处理模块;
所述处理模块用于根据从所述从设备获取的所述告警信息, 中断发送所述 PMBus命令给所述从设备的流程。
14、 根据权利要求 8所述的系统, 其特征在于, 所述命令发送单元还用于: 向所述从设备发送清除所述从设备中的告警信息的命令。
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