WO2014040357A1 - 一种用于相变存储器的富锑高速相变材料及其制备方法和应用 - Google Patents

一种用于相变存储器的富锑高速相变材料及其制备方法和应用 Download PDF

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WO2014040357A1
WO2014040357A1 PCT/CN2012/087596 CN2012087596W WO2014040357A1 WO 2014040357 A1 WO2014040357 A1 WO 2014040357A1 CN 2012087596 W CN2012087596 W CN 2012087596W WO 2014040357 A1 WO2014040357 A1 WO 2014040357A1
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phase change
phase
change memory
change material
speed
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French (fr)
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宋志棠
吴良才
彭程
饶峰
朱敏
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中国科学院上海微系统与信息技术研究所
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Priority to US14/129,957 priority Critical patent/US20150207070A1/en
Publication of WO2014040357A1 publication Critical patent/WO2014040357A1/zh

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    • C—CHEMISTRY; METALLURGY
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    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
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    • C—CHEMISTRY; METALLURGY
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3464—Sputtering using more than one target
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • C23C14/352—Sputtering by application of a magnetic field, e.g. magnetron sputtering using more than one target
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H10N70/023—Formation of switching materials, e.g. deposition of layers by chemical vapor deposition, e.g. MOCVD, ALD
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828—Tellurides, e.g. GeSbTe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/884—Switching materials based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors

Definitions

  • the invention relates to a metal element doped phase change material in the field of microelectronics, in particular to a bismuth-rich high-speed phase change material for a phase change memory and a preparation method and application thereof.
  • Phase-change storage technology is an emerging high-capacity storage technology that is the main force to replace existing non-volatile storage technologies with high speed, high density, low voltage, low power consumption and good fatigue characteristics.
  • PCRAM phase change memory
  • the working principle of PCRAM is very simple. It utilizes the large difference in resistance exhibited by the phase change material in amorphous and crystalline states to achieve "0" and "1" storage.
  • phase change memory technology has not been able to demonstrate competitive advantages due to technical limitations.
  • the rapid development of microelectronics technology The advantages of phase-change memory are becoming more and more obvious.
  • Phase change materials are the core of PCRAM's work, which almost determines all the characteristics of PCRAM, so the study of phase change materials is naturally indispensable.
  • GeTe in the ternary Ge-Sb-Te material (3 ⁇ 4 21 3 ⁇ 4 2 73 ⁇ 4 5 , binary Ge-Te material) is a typical phase change material with good comprehensive properties.
  • (3 ⁇ 4 21 3 ⁇ 4 2 73 ⁇ 4 5 material has a large density change in phase transition, the crystallization rate is not good, generally several hundred nanoseconds (ns), and the crystallization temperature is lower, about 160 °C. The temperature is maintained at 80 ° C for ten years, and the operating voltage is high.
  • GeTe crystallization temperature is higher than Ge 2 Sb 2 Te 5 , high and low resistance before and after phase change
  • the gap is large, the current operation speed can reach several ns, but the melting point of GeTe is up to 720 °C, and its operating power consumption is even larger than that of Ge 2 Sb 2 Te 5 , and the data retention cannot meet the requirements of industry and military aerospace.
  • finding a phase change material with fast phase transition, low melting point and good data retention is the development direction of PCRAM.
  • Binary material Sb 2 Te belongs to ⁇ phase in Sb-Te binary phase diagram. , this phase has a stable hexagonal crystal Configuration, Sb 2 Te crystalline material by ⁇ ?
  • An object of the present invention is to provide a phase change material which is excellent in overall performance and compatible with the C0MS process, in view of the disadvantages or deficiencies in the prior art.
  • a first aspect of the present invention provides a cerium-rich high-speed phase change material for a phase change memory having a chemical formula of: A x (Sb 2 Te)!. x , ; c is an atomic percentage, wherein A is selected from W, Ti, Ta or Mn.
  • A is selected from W.
  • Phase change memory material of the present invention may be a metal element such as W, Ti, Ta, or Mn, and the same technical effect can be achieved.
  • the phase change material provided by the present invention is a single phase W-Sb-Te material.
  • the phase change material provided by the present invention is similar to the conventional GeSbTe material, and is advantageous for achieving high density storage. It has a reversible phase change material under the action of an externally driven nanosecond pulse.
  • the phase change rate of the W-Sb-Te phase change material is three times that of the GeSbTe material, which is advantageous for realizing a high speed phase change memory.
  • the phase change material utilizes the chemical bond formed by W and 73 ⁇ 4 to increase the crystallization temperature and the thermal stability of the amorphous state, fix the element ratio of Sb-Te, adjust the content of W, and obtain different crystallization temperatures and different crystallization activation energies. Low melting point phase change storage material.
  • the H ⁇ 3 ⁇ 4 2 73 ⁇ 4) phase change memory material of the invention can rapidly change from an amorphous state to a stable hexagonal structure under the action of an electrical pulse, without an intermediate state, and the resistance is stable before and after the phase change, and the lower energy can be completed. Reversible phase change of the material. After crystallization, the W atoms are evenly distributed in the 2 73 ⁇ 4 crystal lattice. The whole material has a uniform hexagonal crystal structure, no phase separation, and the reliability of the device is improved, which is suitable for high-density storage.
  • the phase change memory material can change the physical properties of the material by using the W-73 ⁇ 4 bond present in the material, so that the thermal stability can be greatly improved. Therefore, the present invention inherits the advantages of the high-speed, low-melting point of the phase change material 2 73 ⁇ 4, and has a small volume change before and after the phase change, and can work stably at a high temperature.
  • the H ⁇ 3 ⁇ 4 2 73 ⁇ 4) phase change memory material of the invention can realize the reversible phase change of high and low resistance states by external electric pulse, and realize the storage function by using the difference of the front and back resistance values.
  • the phase change memory material of the present invention H ⁇ 3 ⁇ 4 2 73 ⁇ 4);_" W, Sb, Te element electronegativity is 2.36, 2.01 and 2.1, respectively, and the electronegativity difference between W-Te atoms is greater than Sb-Te
  • the nucleation frequency of the original Sb-Te material can be increased, the crystallization speed can be accelerated, and the high-speed phase transition can be realized.
  • the grain size can be reduced, and the scattering of carriers between the grain boundaries can be increased, thereby High crystalline resistance reduces power consumption.
  • the W atom can reduce the amorphous conductance activation energy of the material, so that the difference in the forbidden band width of the material before and after the phase change is reduced, thereby reducing the energy required for the reversible phase transition.
  • the W atom since the W atom is heavier relative to the Sb and Te atoms, it is difficult to be displaced by the action of the electric pulse. Therefore, during the crystallization process, the W atom blocks the diffusion of the Sb and Te atoms, thereby reducing the composition segregation and improving the phase transition. The fatigue characteristics of the unit.
  • a second aspect of the present invention provides a method for preparing a cerium-rich high-speed phase change material, which comprises various methods such as a magnetron sputtering method, a chemical vapor deposition method, an atomic layer deposition method, a pulsed laser deposition method, an electron beam evaporation method, and an electroplating method.
  • the preparation method is selected from magnetron sputtering.
  • the phase-change film prepared by magnetron sputtering is relatively more flexible. It can be co-sputtered by W, Sb, Te target, and the adjustment of each component can be realized by controlling the power of each target. It is also possible to use W target and ⁇ 3 ⁇ 4. 2 73 ⁇ 4 alloy target co-sputtering method, can also be used The alloy target single target sputtering is realized, and these methods can be used to prepare the cerium-rich W-Sb-Te high-speed phase change material of the present invention according to the ratio of the components in the chemical composition formula.
  • the magnetron sputtering method is: and W ⁇ 2 73 ⁇ 4 using dual target sputtering were prepared on a silicon substrate after the thermal oxidation O ⁇ T ⁇ - ⁇ film, wherein when the co-sputtering this vacuum of 1.8-2.2 X 10- 4 Pa, the argon gas pressure during sputtering was 0.18-0.26Pa.
  • the sputtering power of the 2 73 ⁇ 4 target is radio frequency (RF) 20W
  • the sputtering power of the W target is radio frequency (RF) 5-10W.
  • Phase change memory material of the present invention The preparation process is mature, and the various elements are compatible with COMS.
  • a third aspect of the invention provides the use of the cerium-rich high-speed phase change material in the field of phase change film materials.
  • phase change memory material of the present invention is based on 2 73 ⁇ 4, and the W element is appropriately incorporated to prepare a high-performance phase change film, and the preparation process is mature, and various elements thereof have good compatibility with COMS.
  • the phase change memory material ⁇ ⁇ — ⁇ of the invention can accelerate the crystallization speed after the low temperature heat treatment, thereby improving the operation speed of the phase change unit.
  • the low-temperature heat treatment is performed by: annealing at 150 ° C for 2 minutes to make the amorphous material structure closer to the crystalline state or scanning the prepared device with a low voltage of 0. 2-0. 5V.
  • a fourth aspect of the present invention provides a phase change memory device unit prepared by the germanium-rich high-speed phase change material.
  • the phase change memory device unit is fabricated in a 0.13 m CMOS process.
  • the method for preparing the phase change memory unit specifically includes the following steps: depositing a layer on the W electrode.
  • phase change memory cell of the invention reduces the phase change region to the nanometer level by means of opening and filling holes, increases the surface area/volume ratio of the phase change material, and changes the material crystallization mechanism by the interface effect, thereby accelerating the phase transition speed.
  • the phase change memory device unit exhibits a reversible phase change characteristic under a nanosecond voltage pulse.
  • the ⁇ -rich W-Sb-Te high-speed phase change material of the present invention can rapidly phase under the nanosecond electrical pulse. Change, before and after the phase change can clearly distinguish between "0" and "1".
  • the phase change memory device unit can stably repeat the operation for more than 10 5 times under a short and low voltage pulse, and the high and low resistance values are almost unchanged, and the reliability is good.
  • Figure 1 is a graph showing the sheet resistance of a different tungsten content H ⁇ 3 ⁇ 4 2 73 ⁇ 4 phase change film as a function of temperature;
  • FIG. 2 is a comparison of the crystallization rate curve of each sample in Example 1 with G l 3 ⁇ 4 2
  • FIG. 3 is a comparison of the Arrhenius curve of each sample in Example 1 with Ge 2 Sb 2 Te 5 ;
  • Figure 4 is a crystalline X-ray diffraction pattern of a #, 1) # and £ ;# samples
  • FIG. 5 is a schematic diagram of a limited-type T-type phase change memory cell in Embodiment 1;
  • Figure 7 is a cycle life curve of a T-type phase change memory cell based on c# sample in Example 1. detailed description
  • the activation energy (E a ) of the sample sample and the 10-year retention temperature T 10y were calculated according to the Arrhenius equation.
  • the results are shown in Fig. 3.
  • the specific experimental methods are as follows: First, the samples obtained in step 1 which are grown on the oxide sheet and not annealed are subjected to in-situ resistance tests at different constant temperatures, and the resistance-time curve is recorded, and then extracted from the resistance-time curve. The failure time at a constant temperature (wherein the failure time is defined as the time when the normalized resistance value drops to 0.5); Finally, the Arrhenius equation is used to calculate the sum and the result is shown in Fig. 3 (in the figure) GST is Ge 2 Sb 2 T e5 ).
  • A#, b# and c# samples were annealed at 250 °C for 2 min and subjected to X-ray diffraction. The results are shown in Figure 4. It can be seen that each sample has crystallized. As the W content increases, the intensity of the diffraction peak decreases significantly, indicating a reduction in grain size. By comparison with standard XRD cards, each sample has the same hexagonal phase structure and no phase separation is found. A stable crystal structure helps to improve the stability of the device's SET operation.
  • the c# sample Since the c# sample has suitable high and low resistance difference and data retention, the c# sample is prepared into a limited T-type phase change memory device using a 0.13 ⁇ CMOS process, and its electrical properties are tested.
  • the structure diagram is shown in Figure 5.
  • Figure 6 shows the resistance-voltage and resistance-pulse test results of the device unit. Under a voltage pulse of 20 nanoseconds, the device unit exhibits a reversible phase change characteristic, and the erase voltage and write voltage are IV and 2.7V, respectively.
  • the high and low resistance values are 46 times different, and the device can perform SET operation under the pulse of 6ns. This shows that the c# sample can rapidly change phase under the action of lower electric pulse, and its speed can reach the level of DRAM.
  • Figure 7 shows the cycle life test of the device unit. It is easy to see from the figure that under a shorter, lower voltage pulse, the device can stably repeat more than 10 5 times, and the high and low resistance values remain almost unchanged. Better reliability.
  • Example 2
  • the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

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Abstract

一种用于相变存储器的富锑高速相变材料及其制备方法和应用。一种用于相变存储器的富锑高速相变材料，其化学通式为：Ax（Sb2Te)1-x，x为原子百分比，其中A选自W、Ti、Ta或Mn，0＜x＜0.5。该相变材料与通常的GeSbTe材料类似，有利于实现高密度存储。其在外部电驱动纳秒级脉冲作用下具有可逆相变。W-Sb-Te相变材料的相变速度是GeSbTe材料的3倍，有利于实现高速相变存储器。

Description

一种用于相变存储器的富锑高速相变材料及其制备方法和应用
技术领域
本发明涉及微电子技术领域的金属元素掺杂的相变材料， 尤其涉及一种用于相变存储器 的富锑高速相变材料及其制备方法和应用。 背景技术
相变存储技术是一种新兴的大容量存储技术， 它以高速、 高密度、 低压、 低功耗和良好 的疲劳特性成为可替代现有非易失性存储技术的主力军。 近年来， 关于相变存储器 ( PCRAM ) 的研究成为科学界的一大热点。 PCRAM 的工作原理很简单， 它利用相变材料 在非晶态和结晶态所表现出的巨大电阻差值来实现" 0"和 "1"的存储。 虽然相变材料的这种性 能早在上世纪 60 年代就已经被发现， 但是由于技术条件的限制， 相变存储技术一直没能体 现出竞争优势， 直到最近十来年， 微电子技术的高速发展， 使得相变存储器的优势逐渐明 显， 它可以突破传统 COMS 存储器的物理极限的限制， 在纳米尺度进行稳定的相变操作， 表现出强大的应用前景。 最近， 英特尔公司已经在 45nm节点上完成了 PCRAM 芯片的量 产， 并且和 DRAM 集成在一起作为新的内存。 韩国三星公司也将在 22nm 节点上进行 PCRAM量产。 可见， PCRAM技术作为主流存储技术的趋势越发明显。
相变材料是 PCRAM工作的核心部分， 它几乎决定了 PCRAM的所有特性， 所以对相变 材料的研究自然是不可或缺的。 相变材料中， 三元系 Ge-Sb-Te材料中的（¾21¾27¾5、 二元系 Ge-Te 材料中的 GeTe 都是典型的相变材料， 具有良好的综合性能。 但在应用当中发现， (¾21¾27¾5材料在相变时有较大的密度变化， 结晶速度不佳， 一般为几百纳秒 （ns)， 另外其 结晶温度较低， 为 160°C左右， 十年保持温度为 80°C左右， 另外操作电压较高， 这些缺点严 重阻碍了此材料在相变存储领域的广泛应用。 GeTe 结晶温度高于 Ge2Sb2Te5, 相变前后高低 电阻差距大， 电流操作时速度可以达到几个 ns， 但 GeTe熔点高达 720°C左右， 其操作功耗 甚至大于 Ge2Sb2Te5, 数据保持力也不能满足工业界和军事航天领域的要求。 综上所述， 寻 找一种相变速度快， 熔点低， 而且具有较好数据保持力的相变材料是 PCRAM发展的方向。 二元材料 Sb2Te在 Sb-Te二元相图中属于 δ相， 此相具有稳定的六方晶体结构， 晶态的 Sb2Te 材料由 ^^？^和 Sb2层相互叠加而成， 其中 Sb2层可以加快材料结晶的速度。 此外， δ相的 Sb-Te材料熔点都在 540°C左右， 远远低于 Ge2Sb2Te5， 相变前后电阻变化高达 4个数量级。 然而， 27¾唯一不足是它的结晶温度较低， 约为 145 °C。 所以 ^27¾并不能完全满足应用的 需要， 特别是针对某些高温环境的应用。 要想弥补这个缺陷， 掺杂其他元素进行材料改性不 失为解决这一问题的一种方法。 发明内容
本发明的目的是针对现有技术中的缺点或不足， 提供一种综合性能优异、 与 C0MS 工 艺兼容的相变材料。
本发明第一方面提供一种用于相变存储器的富锑高速相变材料， 其化学通式为： Ax(Sb2Te)!.x, ;c为原子百分比， 其中 A选自 W、 Ti、 Ta或 Mn。
优选的， 0<;c<0.5。
优选的， 0<x 0.12。
优选的， A选自 W。
本发明的相变存储材料
Figure imgf000004_0001
材料中的 A元素可以为 W、 Ti、 Ta、 Mn等金属元 素， 可以达到同样的技术效果。
优选的， 本发明所提供的相变材料为单相的 W-Sb-Te材料。
本发明所提供的相变材料与通常的 GeSbTe材料类似， 有利于实现高密度存储。 其在外 部电驱动纳秒级脉冲作用下具有可逆相变的材料。 所述的 W-Sb-Te相变材料的相变速度是 GeSbTe材料的 3倍， 有利于实现高速相变存储器。 该相变材料利用 W与 7¾所形成的化学 键来提高其结晶温度及非晶态的热稳定性， 固定 Sb-Te 的元素比例， 调节 W 的含量， 可以 得到不同结晶温度、 不同结晶激活能的低熔点相变存储材料。
本发明的 H^¾27¾) 相变存储材料， 在电学脉冲作用下能快速地从非晶态转变到稳定 的六方结构， 没有中间态， 相变前后电阻稳定， 较低的能量就可以完成所述材料的可逆相 变。 其结晶后 W原子均匀分布在 27¾的晶格中， 整个材料具有统一的六方晶体结构， 没有 相分离， 对器件的可靠性有所改善， 适合高密度存储。 所述相变存储材料， 利用材料中存在 的 W-7¾ 键改变该材料的物性， 可以使其热稳定性得到大幅度提高。 所以， 本发明继承了相 变材料 27¾高速、 低熔点的优点， 同时其相变前后具有较小的体积变化， 能够在高温下较 稳定地工作。
本发明的 H^¾27¾) 相变存储材料可以通过外部电脉冲来实现高低阻态的可逆相变， 利用前后阻值差异实现存储功能。
本发明的相变存储材料 H^¾27¾);_" W、 Sb、 Te元素电负性分别为 2.36、 2.01禾口 2.1， W-Te原子之间的电负性差值大于 Sb-Te， 可以增加原来 Sb-Te材料的成核频率， 加快结晶速 度， 实现所述的高速相变。 同时可以减小晶粒尺寸， 增加晶粒间界对载流子的散射， 从而提 高晶态电阻， 降低功耗。
本发明的相变存储材料 H^¾27¾) 中， W原子可以降低材料非晶态电导激活能， 使得 相变前后材料禁带宽度差值减小， 从而减低可逆相变所需的能量。 另外， 由于 W 原子相对 于 Sb、 Te 原子较重， 在电脉冲的作用下很难发生位移， 因此在结晶过程中 W原子会阻挡 Sb、 Te原子的扩散， 从而减小成分偏析， 改善相变单元的疲劳特性。
本发明第二方面提供富锑高速相变材料的制备方法， 包含磁控溅射法、 化学气相沉积 法、 原子层沉积法、 脉冲激光沉积法、 电子束蒸发法、 电镀法等各种方法。
优选的， 所述制备方法选自磁控溅射法。 磁控溅射法制备相变薄膜相对更为灵活， 可以 用 W、 Sb、 Te 靶共溅射的方法， 通过控制各个靶位电源功率实现各组分的调节， 还可以采 用 W靶和 ^¾27¾合金靶共溅射的方法， 也可以采用制好的
Figure imgf000005_0001
合金靶单靶溅射实 现， 这些方法都可以用来按照化学组成通式中各成分的配比制备本发明的富锑 W-Sb-Te 高 速相变材料。
优选的， 所述磁控溅射法的具体步骤为： 使用 W和 ^27¾双靶共溅射法在热氧化后的硅 衬底上制备 O^T^— χ薄膜， 其中共溅射时， 本底真空度为 1.8-2.2 X 10— 4Pa， 溅射时的氩气 气压为 0.18-0.26Pa。 27¾靶的溅射功率为射频 （RF) 20W, W靶的溅射功率为射频 （RF ) 5-10W。
本发明的相变存储材料
Figure imgf000005_0002
的制备工艺成熟， 其中的各种元素与 COMS 的兼容 性好。
本发明第三方面提供所述富锑高速相变材料在相变薄膜材料领域的应用。
本发明的相变存储材料是在 27¾的基础上， 适当掺入 W元素来制备高性能的相变薄 膜， 其制备工艺成熟， 其中的各种元素与 COMS的兼容性好。
本发明的相变存储材料 π ο^^τ^ — χ， 在低温热处理过后可以加快其结晶的速度， 从而 提升相变单元的操作速度。
优选的， 所述低温热处理的方法为： 用 150°C退火 2分钟使得非晶态材料结构更接近于 晶态或把制备好的器件用 0. 2-0. 5V的低电压进行扫描。
本发明第四方面提供了所述富锑高速相变材料所制备的相变存储器件单元。
优选的， 所述相变存储器件单元的制备方法为 0.13 m CMOS工艺。
优选的， 所述相变存储单元的制备方法具体包括如下步骤： 在 W 电极上沉积一层 8-
12nm厚的 Si02介质层， 用聚焦离子束的方法在 W 电极正上方的 Si02介质层上做一个 8-
12nm 宽的小孔， 随后用 CVD ( Chemical Vapor Deposition , 化学气相沉积） 或者 PVD ( Physical Vapor Deposition, 物理气相沉积） 的方法将 Η ί^^Γβ ^相变材料填入孔中， 最 后用 PVD沉积一层 15-25nm厚的 TiN粘附层和 290-310nm厚的 A1顶电极。
本发明的相变存储单元通过开孔填孔的方式将相变区域縮小到纳米量级， 增加了相变材 料的表面积 /体积比， 利用界面效应改变材料结晶机制， 从而加快相变速度。
该相变存储器件单元在纳秒级的电压脉冲下， 表现出可逆相变的特性， 采用本发明的富 锑 W-Sb-Te 高速相变材料能在纳秒级的电学脉冲作用下快速相变， 相变前后可以明显辨别 "0 "和" 1"。 而且该相变存储器件单元在较短、 较低的电压脉冲下， 能够稳定地重复工作 105 次以上， 而且高低电阻值几乎保持不变， 具有较好的可靠性。 附图说明
图 1 为不同钨含量 H^¾27¾ 相变薄膜方块电阻随温度变化关系曲线；
图 2为实例 1中各样品的结晶速率曲线与 G l¾2 的对比； 图 3 为实施例 1中各样品的阿 伦尼乌斯曲线与 Ge2Sb2Te5的对比；
图 4为 a#、 1) #和£；#样品的结晶态 X射线衍射图
图 5 为实施例 1中限制型 T型结构相变存储单元的示意图；
图 6 为实施例 1 中基于 c#样品的 T 型结构相变存储单元的电阻 -电压曲线和电阻-脉冲曲 线； II
图 7 为实施例 1中基于 c#样品的 T型结构相变存储单元的循环寿命曲线。 具体实施方式
以下通过特定的具体实例说明本发明的实施方式， 本领域技术人员可由本说明书所揭露 的内容轻易地了解本发明的其他优点与功效。 本发明还可以通过另外不同的具体实施方式加 以实施或应用， 本说明书中的各项细节也可以基于不同观点与应用， 在没有背离本发明的精 神下进行各种修饰或改变。
须知， 下列实施例中未具体注明的工艺设备或装置均采用本领域内的常规设备或装置； 所有压力值和范围都是指绝对压力。
此外应理解， 本发明中提到的一个或多个方法步骤并不排斥在所述组合步骤前后还可以 存在其他方法步骤或在这些明确提到的步骤之间还可以插入其他方法步骤， 除非另有说明； 还应理解， 本发明中提到的一个或多个设备 /装置之间的组合连接关系并不排斥在所述组合 设备 /装置前后还可以存在其他设备 /装置或在这些明确提到的两个设备 /装置之间还可以插入 其他设备 /装置， 除非另有说明。 而且， 除非另有说明， 各方法步骤的编号仅为鉴别各方法 步骤的便利工具， 而非为限制各方法步骤的排列次序或限定本发明可实施的范围， 其相对关 系的改变或调整， 在无实质变更技术内容的情况下， 当亦视为本发明可实施的范畴。 实施例 1
1.利用磁控溅射 W和 27¾双靶共溅射法在热氧化后的硅衬底上制备 Η θ^^Γ^— χ薄膜， 其中共溅射时， 本底真空度为 2.0 x 10— 4 Pa， 溅射时的氩气气压为 0.22Pa。 ^27¾靶的溅射功 率锁定为射频 （RF ) 20W, 改变 W靶的溅射功率， 分别为射频 （RF ) 0W、 5W、 7W、 10W, 得到 4种不同 W掺杂浓度的相变薄膜 a#、 b#、 c#、 d#。 该四种薄膜相变材料的参数 如下表 1所示： 表 1
Figure imgf000007_0001
2.将步骤 1 所得的长在氧化片上且未做退火处理的 l^O^^T^ 薄膜材料做原位电阻测 试， 结果如图 1 所示。 可以看出， 没有掺 W的 27¾结晶温度为 145 °C。 在掺入 W元素以 后， 相变薄膜结晶温度得到大幅度提升， 其中 d#薄膜的结晶温度高达 241 °C， 可见热稳定性 有明显提高。 另外晶态电阻随着 W 的掺杂含量增加而呈增大的变化趋势， 这对于器件的功 耗降低起到关键的作用。
3. 将图 1 中各曲线带入到结晶率公式中进行计算， 可以得到各个样品的结晶速率曲 线， 如图 2所示， 其中 GST代表（¾2ι¾27¾。 图中各曲线的最大值表示了该材料的结晶速度 快慢， 从图中可以清晰看出， 随着 W含量的增加， 结晶速率在减小， 但是 1) #和£；#样品的结 晶速度仍有 GST的 3倍和 2倍。 说明
Figure imgf000008_0001
GST的新材料， 在相变速度上更 具优势。
4. 根据阿伦尼乌斯方程对样品样品的激活能 （Ea) 和 10 年保持温度 T10y 进行了推 算， 结果如图 3所示。 具体实验方法如下： 首先将步骤 1所得的长在氧化片上且未做退火处 理的，各样品做不同恒定温度下的原位电阻测试， 记录电阻 -时间曲线， 然后从电阻-时间曲线 中摘取恒定温度下的失效时间 （这里失效时间的定义为当归一化电阻值下降到 0.5 时的时 间）； 最后利用阿伦尼乌斯方程对 ^和 进行推算， 得到结果如图 3所示 （图中 GST为 Ge2Sb2Te5)。 从图 3中我们可以得到 a#样品的 为 2.03eV， T10y为 52°C。 而 W掺杂后保持 能力和激活能明显提升， d#样品的 ^为 5.13eV， TJOy高达 173 °C。 说明 W掺杂获得的
Figure imgf000008_0002
从而使相变材料能够在高温下较稳定地工 作。
5. 将 a#、 b #和 c#样品在 250°C下退火 2min， 并进行 X射线衍射测试， 结果如图 4所 示。 可以看出， 每个样品都已经结晶。 随着 W含量的增加， 衍射峰的强度明显下降， 标志着 晶粒尺寸的縮小。 通过与标准 XRD卡片对比可知， 每个样品都具有相同的六方相结构， 没有 发现任何相分离。 稳定的晶体结构有助于提高器件 SET操作的稳定性。
6. 由于 c#样品有合适的高低阻值差和数据保持力， 所以利用 0.13μηι CMOS工艺将 c# 样品制备成限制型的 T型结构的相变存储器件， 并对其进行电学性能的测试， 其结构示意图 如图 5所示。 图 6为该器件单元的电阻-电压和电阻-脉冲测试结果， 在 20纳秒的电压脉冲 下， 器件单元表现出可逆相变的特性， 擦除电压和写入电压分别为 IV和 2.7V, 高低电阻值 相差 46倍， 而且器件能在 6ns的脉冲作用下进行 SET操作， 这说明 c#样品能在较低的电学 脉冲作用下快速相变， 其速度可以达到 DRAM 的水平， 在这种速度下器件还可以明显辨别 "0 "和" 1"。 图 7为该器件单元的循环寿命测试， 从图中不难看出， 在较短、 较低的电压脉冲 下， 器件能够稳定地重复工作 105次以上， 而且高低电阻值几乎保持不变， 具有较好的可靠 性。 实施例 2
1.利用磁控溅射在热氧化后的硅衬底上制备 r^O^^re)^薄膜。 具体实验方法为： 用做 好的 7 ι0¾27¾)。9单靶溅射， 功率为射频 30W， 本底真空度为 x lO^ Pa, 溅射时的氩气气 压为 0.19Pa， 薄膜厚度为 200nm。
2.用原位电阻-温度测试 7 ι0¾27¾)。·9薄膜的结晶温度为 225 V , 数据保持力计算为
137°C , 两个值都远远高于 σ ι¾27¾5薄膜。
3. ？^^^^？^^薄膜相变前后体积变化很小， 晶粒分布非常均匀， 而且没有分相， 很适 合用在高速、 高密度存储器中。
综上所述， 本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本发明的原理及其功效， 而非用于限制本发明。 任何熟悉此技 术的人士皆可在不违背本发明的精神及范畴下， 对上述实施例进行修饰或改变。 因此， 举凡 所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等 效修饰或改变， 仍应由本发明的权利要求所涵盖。

Claims

权利要求书 、 一种用于相变存储器的富锑高速相变材料， 其化学通式为： A S Te^, X 为原子百分 比， 其中 A选自 W、 Ti、 Ta或 Mn， 0<;c<0.5。
、 如权利要求 1 所述的一种用于相变存储器的富锑高速相变材料， 其特征在于， 0<x 0.12。
、 如权利要求 2 所述的一种用于相变存储器的富锑高速相变材料， 其特征在于， 所述富锑 高速相变材料为单相的 W-Sb-Te材料。
、 如权利要求 1 所述的一种用于相变存储器的富锑高速相变材料， 其特征在于， 所述富锑 高速相变材料在电脉冲作用下可逆相变。
、 如权利要求 1-4 任一权利要求所述的一种用于相变存储器的富锑高速相变材料的制备方 法， 所述制备方法选自磁控溅射法、 化学气相沉积法、 原子层沉积法、 脉冲激光沉积 法、 电子束蒸发法或电镀法。
、 如权利要求 5 所述的一种用于相变存储器的富锑高速相变材料的制备方法， 所述 H^¾27¾) 的磁控溅射法的具体步骤为： 使用 W和 ^27¾双靶共溅射法在热氧化后的硅 衬底上制备 Η^Ο^^Γ^— χ薄膜， 其中共溅射时， 本底真空度为 1.8-2.2 X 10— 4Pa， 溅射时的 氩气气压为 0.18-0.26Pa。 27¾靶的溅射功率为射频 （RF) 20W, W靶的溅射功率为射 频 （RF) 5-10W。
、 如权利要求 1-4 任一权利要求所述的一种用于相变存储器的富锑高速相变材料在相变薄 膜材料领域的应用。
、 由权利要求 1-4 任一权利要求所述的一种用于相变存储器的富锑高速相变材料所制备的 相变存储器件单元。
、 如权利要求 8所述的一种相变存储器件单元的制备方法， 所述制备方法为 0.13μηι CMOS 工艺。
0、 如权利要求 9所述的一种相变存储器件单元的制备方法， 包括如下步骤： 在 W电极 上沉积一层 8-12nm厚的 Si02介质层， 用聚焦离子束的方法在 W电极正上方的 Si02介 质层上做一个 8-12nm宽的小孔， 随后用 CVD或者 PVD的方法将 Ι^Ο^^Γ^— x相变材料 填入孔中， 最后用 PVD沉积一层 15-25nm厚的 TiN粘附层和 290-310nm厚的 A1顶电 极。
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