WO2014029626A3 - Leiterplatine - Google Patents

Leiterplatine Download PDF

Info

Publication number
WO2014029626A3
WO2014029626A3 PCT/EP2013/066606 EP2013066606W WO2014029626A3 WO 2014029626 A3 WO2014029626 A3 WO 2014029626A3 EP 2013066606 W EP2013066606 W EP 2013066606W WO 2014029626 A3 WO2014029626 A3 WO 2014029626A3
Authority
WO
WIPO (PCT)
Prior art keywords
layer
circuit board
printed circuit
component contact
electrically conductive
Prior art date
Application number
PCT/EP2013/066606
Other languages
English (en)
French (fr)
Other versions
WO2014029626A2 (de
Inventor
Michael Decker
Original Assignee
Continental Automotive Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Continental Automotive Gmbh filed Critical Continental Automotive Gmbh
Publication of WO2014029626A2 publication Critical patent/WO2014029626A2/de
Publication of WO2014029626A3 publication Critical patent/WO2014029626A3/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0352—Differences between the conductors of different layers of a multilayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

Es wird eine Leiterplatine (100, 200, 300, 400, 500, 600, 700) beschrieben, welche eine Schichtanordnung aus einer ersten Schicht (102, 202, 302, 402, 502, 602, 702) und einer damit verbundenen zweiten Schicht (104, 204, 304, 404, 504, 604, 704), ein elektrisch leitfähiger Bauelementkontakt (106, 206, 306, 406, 506, 606, 706) in einem Oberflächenbereich der ersten Schicht (102, 202, 302, 402, 502, 602, 702), wobei der Bauelementkontakt (106, 206, 306, 406, 506, 606, 706) mit einem auf der Leiterplatte (100, 200, 300, 400, 500, 600, 700) zu montierenden elektronischen Bauelement elektrisch leitfähig verbindbar ist, eine zwischen der ersten Schicht (102, 202, 302, 402, 502, 602, 702) und der zweiten Schicht (104, 204, 304, 404, 504, 604, 704) in der Schichtanordnung eingebettete elektrisch leitfähige Struktur (108, 208, 308, 408, 509, 609, 709) mit einer Stromleitfläche, die größer ist als eine Bauelementkontaktfläche des Bauelementkontakts (106, 206, 306, 406, 506, 606, 706), und eine die erste Schicht (102, 202, 302, 402, 502, 602, 702) durchdringende, elektrisch leitfähige Durchkontaktierung (110, 210, 310, 410, 510, 610, 710) aufweist, welche den Bauelementkontakt (106, 206, 306, 406, 506, 606, 706) mit der elektrisch leitfähigen Struktur (108, 208, 308, 408, 509, 609, 709) elektrisch leitfähig verbindet. Ferner werden eine Anordnung mit einer Leiterplatine sowie eine Motorsteuerung mit einer Leitplatine oder einer Anordnung mit einer Leiterplatine beschrieben.
PCT/EP2013/066606 2012-08-23 2013-08-08 Leiterplatine WO2014029626A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102012214982.1A DE102012214982B4 (de) 2012-08-23 2012-08-23 Leiterplatine
DE102012214982.1 2012-08-23

Publications (2)

Publication Number Publication Date
WO2014029626A2 WO2014029626A2 (de) 2014-02-27
WO2014029626A3 true WO2014029626A3 (de) 2014-09-12

Family

ID=48948427

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2013/066606 WO2014029626A2 (de) 2012-08-23 2013-08-08 Leiterplatine

Country Status (2)

Country Link
DE (1) DE102012214982B4 (de)
WO (1) WO2014029626A2 (de)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0052738A1 (de) * 1980-11-25 1982-06-02 Contraves Ag Leiterplatte
EP0430157A2 (de) * 1989-11-27 1991-06-05 The Furukawa Electric Co., Ltd. Zusammengestellte Schaltungsplatte und Herstellungsverfahren dafür
US5527999A (en) * 1995-02-21 1996-06-18 Delco Electronics Corp. Multilayer conductor for printed circuits
EP1102525A1 (de) * 1998-07-08 2001-05-23 Ibiden Co., Ltd. Gedruckte leiterplatte und verfahren zu deren herstellung
US20040050585A1 (en) * 2002-09-17 2004-03-18 International Business Machines Corporation Method to obtain high density signal wires with low resistance in an electronic package
EP1534050A1 (de) * 2003-11-19 2005-05-25 Ruwel AG Verfahren zur Herstellung von Leiterplatten und Leiterplatte
US20060113658A1 (en) * 2004-11-29 2006-06-01 Tzyy-Jang Tseng Substrate core and method for fabricating the same
US20080093117A1 (en) * 2005-07-12 2008-04-24 Murata Manufacturing Co., Ltd. Multilayer circuit board and manufacturing method thereof
US20090095519A1 (en) * 2007-10-16 2009-04-16 Timothy Harrison Daubenspeck Current distribution structure and method
WO2013005451A1 (ja) * 2011-07-06 2013-01-10 株式会社 豊田自動織機 多層配線板および多層配線板の製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6856209B2 (en) * 2002-09-27 2005-02-15 Visteon Global Technologies, Inc. EMI suppression method for powertrain control modules
JP4452222B2 (ja) * 2005-09-07 2010-04-21 新光電気工業株式会社 多層配線基板及びその製造方法
JP2007096147A (ja) * 2005-09-30 2007-04-12 Toshiba Corp コンデンサ
TWI290820B (en) * 2005-10-13 2007-12-01 Phoenix Prec Technology Corp Circuit board structure of integrated optoelectronic component

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0052738A1 (de) * 1980-11-25 1982-06-02 Contraves Ag Leiterplatte
EP0430157A2 (de) * 1989-11-27 1991-06-05 The Furukawa Electric Co., Ltd. Zusammengestellte Schaltungsplatte und Herstellungsverfahren dafür
US5527999A (en) * 1995-02-21 1996-06-18 Delco Electronics Corp. Multilayer conductor for printed circuits
EP1102525A1 (de) * 1998-07-08 2001-05-23 Ibiden Co., Ltd. Gedruckte leiterplatte und verfahren zu deren herstellung
US20040050585A1 (en) * 2002-09-17 2004-03-18 International Business Machines Corporation Method to obtain high density signal wires with low resistance in an electronic package
EP1534050A1 (de) * 2003-11-19 2005-05-25 Ruwel AG Verfahren zur Herstellung von Leiterplatten und Leiterplatte
US20060113658A1 (en) * 2004-11-29 2006-06-01 Tzyy-Jang Tseng Substrate core and method for fabricating the same
US20080093117A1 (en) * 2005-07-12 2008-04-24 Murata Manufacturing Co., Ltd. Multilayer circuit board and manufacturing method thereof
US20090095519A1 (en) * 2007-10-16 2009-04-16 Timothy Harrison Daubenspeck Current distribution structure and method
WO2013005451A1 (ja) * 2011-07-06 2013-01-10 株式会社 豊田自動織機 多層配線板および多層配線板の製造方法
DE112012002829T5 (de) * 2011-07-06 2014-04-24 Kabushiki Kaisha Toyota Jidoshokki Mehrschichtige Leiterplatte und Verfahren zum Herstellen einer mehrschichtigen Leiterplatte

Also Published As

Publication number Publication date
DE102012214982A1 (de) 2014-02-27
DE102012214982B4 (de) 2021-06-02
WO2014029626A2 (de) 2014-02-27

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