WO2014008719A1 - 发光器件及其制作方法 - Google Patents

发光器件及其制作方法 Download PDF

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Publication number
WO2014008719A1
WO2014008719A1 PCT/CN2012/083713 CN2012083713W WO2014008719A1 WO 2014008719 A1 WO2014008719 A1 WO 2014008719A1 CN 2012083713 W CN2012083713 W CN 2012083713W WO 2014008719 A1 WO2014008719 A1 WO 2014008719A1
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Prior art keywords
light
semiconductor
layer
type semiconductor
metal
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PCT/CN2012/083713
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English (en)
French (fr)
Inventor
陈珉
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京东方科技集团股份有限公司
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Priority to US13/981,021 priority Critical patent/US9379167B2/en
Publication of WO2014008719A1 publication Critical patent/WO2014008719A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N19/00Integrated devices, or assemblies of multiple devices, comprising at least one thermoelectric or thermomagnetic element covered by groups H10N10/00 - H10N15/00
    • H10N19/101Multiple thermocouples connected in a cascade arrangement
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/01Manufacture or treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/38Cooling arrangements using the Peltier effect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/87Arrangements for heating or cooling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/8794Arrangements for heating and cooling

Definitions

  • Embodiments of the present invention relate to a light emitting device and a method of fabricating the same. Background technique
  • OLED Organic Light-Emitting Diode
  • liquid crystal display technology can be used in the third generation display technology after liquid crystal display technology, and has a wide range of applications in various fields such as flat panel display, illumination, and backlight.
  • the organic materials in OLEDs are sensitive to oxygen and, when exposed to oxygen, are prone to react with oxygen, which deteriorates the performance of OLEDs.
  • glass is generally used to coat the entire light-emitting portion of the OLED.
  • the use of glass coating can prevent the organic material in the OLED from coming into contact with oxygen, but there is a gap between the OLED itself and the coated glass, and the glass itself is a material that is not easily thermally conductive. Therefore, the heat generated by the OLED energization work is not easily conducted, which may cause overheating damage of the OLED and affect the service life of the OLED. Summary of the invention
  • Embodiments of the present invention provide a light emitting device and a manufacturing method thereof, which can effectively improve heat dissipation performance of an illuminating device, thereby prolonging the service life of the illuminating device.
  • an embodiment of the present invention provides a light emitting device including a substrate, wherein the substrate is provided with a light emitting portion; the light emitting device further includes a semiconductor thermoelectric refrigeration portion, and the semiconductor thermoelectric refrigeration portion is disposed in the light emitting portion on.
  • an embodiment of the present invention provides a method for fabricating the above light emitting device, comprising the steps of: preparing a light emitting portion on a substrate; preparing a semiconductor thermoelectric refrigeration portion on the substrate on which the light emitting portion is prepared; The substrate having the light-emitting portion and the semiconductor thermoelectric cooling portion is subjected to a packaging process.
  • the light-emitting device and the manufacturing method thereof are provided in the embodiment of the invention, wherein the light-emitting device is integrated with a semiconductor thermoelectric refrigeration unit, which utilizes the principle of thermoelectric effect to absorb and release heat generated by the light-emitting portion when the light-emitting portion operates.
  • the temperature at the time of operation of the light-emitting portion is lowered, and therefore, the heat dissipation performance of the light-emitting device can be effectively improved, thereby prolonging the service life of the light-emitting device.
  • FIG. 1 is a schematic structural diagram of a light emitting device according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a light emitting device according to an embodiment of the present invention.
  • FIG. 3 (a) - (c) are schematic diagrams showing the principle of connection of a semiconductor refrigeration unit in a light emitting device according to an embodiment of the present invention
  • FIG. 4 is a schematic structural diagram of a light emitting device according to an embodiment of the present invention. detailed description
  • a light emitting device includes a substrate 1 on which a light emitting portion 2 is disposed; a semiconductor thermoelectric cooling portion 3 is further integrated in the light emitting device, and a semiconductor thermoelectric cooling portion 3 is disposed in the On the light-emitting portion 2.
  • the semiconductor thermoelectric refrigeration section 3 is a component that performs refrigeration using a semiconductor thermoelectric material based on the Peltier effect (i.e., thermoelectric effect) principle, and includes a cold end 31 and a hot end 32. Cold end 31 is close to hair The light portion 2 is for absorbing heat generated by the light-emitting portion 2, and the hot end 32 is away from the light-emitting portion 2 for releasing heat absorbed by the cold end 31.
  • Peltier effect i.e., thermoelectric effect
  • the semiconductor thermoelectric refrigeration unit 3 is integrated in the light-emitting device, and is directly prepared on the light-emitting portion 2, so that a good cooling effect can be obtained.
  • the light-emitting device provided by the embodiment of the present invention absorbs and releases the heat generated by the light-emitting portion 2 by the semiconductor thermoelectric refrigeration unit 3 when the light-emitting portion 2 is operated, thereby reducing the temperature during operation of the light-emitting portion 2, and thus the heat dissipation performance of the light-emitting device. An effective improvement can be obtained, so that the service life of the light-emitting device can be extended.
  • the semiconductor thermoelectric refrigeration section 3 includes a first insulating and thermally conductive layer 301, a semiconductor thermopile layer 302, and a second insulating and thermally conductive layer 303;
  • the layer 301 is disposed on the light emitting portion 2
  • the semiconductor thermopile layer 302 is disposed on the first insulating heat conductive layer 301
  • the second insulating heat conductive layer 303 is disposed on the semiconductor thermopile layer 302.
  • the semiconductor thermopile layer 302 includes at least one semiconductor refrigeration unit 304 (shown in phantom).
  • Each of the semiconductor refrigeration units 304 includes a metal lower electrode 3041, a P-type semiconductor 3042, an N-type semiconductor 3043, and a metal upper electrode 3044.
  • the metal lower electrode 3041 is disposed on the first insulating and thermally conductive layer 301, and the P-type semiconductor 3042 and the N-type semiconductor 3043. It is disposed on the metal lower electrode 3041, and the metal upper electrode 3044 is disposed on the top of the P-type semiconductor and on the top of the N-type semiconductor.
  • the bottom of the P-type semiconductor 3042 of the same semiconductor refrigeration unit 304 and the bottom of the N-type semiconductor 3043 are connected by the metal lower electrode 3041; when the semiconductor thermopile layer 302 includes a plurality of semiconductor refrigeration units 304, Metal upper electrode 3044 is used for the connection between adjacent semiconductor refrigeration units 304.
  • the heat generated by the light-emitting portion 2 is transmitted to the cold end through the first insulating heat-conducting layer 301, the cold end absorbs the heat, and the hot end releases the heat absorbed by the cold end, and the heat is released. Heat is transferred to the outside of the light emitting element through the second insulating heat conductive layer 303.
  • the semiconductor thermopile layer 302 includes a plurality of (two or more) semiconductor refrigeration units 304.
  • the plurality of semiconductor refrigeration units 304 may be arranged in an array; as shown in FIGS. 3(a) to 3(c), the plurality of semiconductor refrigeration units 304 may be connected in series, in parallel, or in series and parallel to form a multi-stage thermopile.
  • the multi-stage thermopile expands the area of the cold and hot ends for better cooling. This embodiment realizes the connection between the plurality of semiconductor refrigeration units 304 through the metal upper electrode 3044.
  • a plurality of semiconductor refrigeration units are distributed in two columns, two columns of semiconductor refrigeration units are connected in series, current flows through each semiconductor refrigeration unit without splitting, and current flowing through each refrigeration unit is N.
  • the type semiconductor flows to the P-type semiconductor.
  • a plurality of semiconductor refrigeration units are divided into two columns, two columns of semiconductor refrigeration units are connected in parallel, current is divided and flows through two columns of semiconductor refrigeration units, and current flowing through each refrigeration unit is N.
  • the type semiconductor flows to the P-type semiconductor.
  • a series-parallel combination connection refers to both a column and a column series connection, and a parallel connection of columns and columns.
  • Fig. 3 (a) to Fig. 3 (c) are only schematic schematic views of the connection between the plurality of semiconductor refrigeration units 304, and do not indicate the number and true connection of the semiconductor refrigeration unit of the present embodiment.
  • each column of semiconductor refrigeration units may include one or more semiconductor refrigeration units, and a plurality of columns of semiconductor refrigeration units may be distributed in the semiconductor thermopile layer 302.
  • a person skilled in the art can select the number and/or the number of semiconductor refrigeration units according to the connection principle of FIG. 3(a) to FIG. 3(c), and realize series connection and parallel connection of a plurality of semiconductor refrigeration units through the metal upper electrode 3044. Or series-parallel combination connection, and will not be described here.
  • an insulating isolation portion 305 may be disposed between the P-type semiconductor 3042 and the N-type semiconductor 3043 of the same semiconductor refrigeration unit 304 and between the adjacent semiconductor refrigeration units 304 to effectively ensure the semiconductor refrigeration unit 304. Electrical performance.
  • the materials of the first insulating and thermally conductive layer 301 and the second insulating and thermally conductive layer 302 may be the same or different, and since both are used to conduct heat, the materials of both are preferably inorganic materials having high thermal conductivity.
  • the materials of the first insulating heat conductive layer 301 and the second insulating heat conductive layer 302 may be selected from the group consisting of diamond-like, aluminum nitride, boron nitride, silicon nitride, aluminum oxide, and magnesium oxide.
  • the materials of the first insulating and thermally conductive layer 301 and the second insulating and thermally conductive layer 302 may be the same or different.
  • the first and second insulating and thermally conductive layers 302 have a thickness of 100-5000 nm.
  • the material of the P-type semiconductor 3042 may be selected from one or a combination of the following materials: bismuth telluride binary solid solution Bi 2 Te 3 — Sb 2 Te 3 , bismuth telluride ternary solid solution Bi 2 Te 3 - Sb 2 Te 3 - Sb 2 Se 3 , P-type Ag (lx) Cu(x) Ti Te, YBaCuO superconducting material.
  • the material of the N-type semiconductor 3043 may be selected from one or a combination of the following materials: Bismuth telluride binary solid solution Bi 2 Te 3 — Bi 2 Se 3 , bismuth telluride ternary solid solution Bi 2 Te 3 - Sb 2 Te 3 - Sb 2 Se 3 , N-type Bi - Sb alloy, YBaCuO superconducting material.
  • the ternary solid solution of bismuth telluride increases the forbidden band width of the solid solution material, and can further reduce the lattice thermal conductivity.
  • the materials of the metal upper electrode 3044 and the metal lower electrode 3041 may be the same or different, and may be selected from one of the following materials: silver, copper, gold, and aluminum, and the thickness of the two may be the same. They may be different, for example, each may be 50-1000 nm.
  • the illuminating device may be an OLED, an inorganic light emitting diode, an organic solar cell, an inorganic solar cell, an organic thin film transistor, an inorganic thin film transistor, a photodetector, etc., which is not limited by the present invention.
  • the embodiment of the present invention further provides a method for fabricating the above light emitting device, comprising the following steps:
  • Step 10 preparing a light-emitting portion on the substrate.
  • This step can be completed, for example, by using related steps in the prior art, and details are not described herein again.
  • Step 11 Prepare a semiconductor thermoelectric refrigeration unit on the substrate on which the light-emitting portion is prepared.
  • this step 11 may include, for example, the following steps.
  • a first insulating and thermally conductive layer is deposited on the light emitting portion.
  • the first insulating and thermally conductive layer is deposited by printing, electroplating or the like, which is not limited in the present invention.
  • a metal lower electrode is prepared by a shadow mask process.
  • the mask process exposes the position where the metal lower electrode needs to be formed through the mask, and blocks other positions, so that the metal lower electrode is only prepared at the position where the mask is exposed, and the position blocked by the mask is protected.
  • the principle of the other mask processes used below is the same.
  • the metal lower electrode can be vacuum vapor deposited, magnetron sputtered, ion plated, DC sputter coated, RF sputter coated, ion beam sputter coated, ion beam assisted deposition, plasma enhanced chemical vapor deposition, high density inductor Coupled plasma source chemical vapor deposition, ion beam deposition, metal organic chemical vapor deposition, catalytic chemical vapor deposition, laser pulse deposition, pulsed plasma method, pulsed laser method, electron beam evaporation, sol-gel method
  • the preparation is carried out by means of inkjet printing, electroplating, etc., and the invention is not limited thereto.
  • a P-type semiconductor and an N-type semiconductor are separately prepared by using a mask process.
  • the order of preparation of the P-type semiconductor and the N-type semiconductor is not limited, and a P-type semiconductor can be prepared first, and then an N-type semiconductor can be prepared, and vice versa.
  • MOCVD metal organic chemical vapor deposition
  • PLD pulsed laser deposition
  • MBE molecular beam epitaxy
  • MS magnetron sputtering
  • IBS ion beam sputtering
  • Co- co-evaporation
  • the P-type semiconductor and the N-type semiconductor are prepared by one or several methods of evaporation and flash evaporation, which are not limited in the present invention.
  • a metal upper electrode is prepared by a mask process.
  • the metal upper electrode can be prepared in the same manner as the metal lower electrode, and will not be described again here.
  • a second insulating thermally conductive layer is deposited on the metal upper electrode.
  • the second insulating and thermally conductive layer can be prepared in the same manner as the first insulating and thermally conductive layer, and details are not described herein.
  • the manufacturing method in order to ensure the electrical performance of the light emitting device, and effectively avoid electrical failure such as short circuit, before preparing the P-type semiconductor and the N-type semiconductor, before preparing the metal upper electrode, the manufacturing method It also includes the following steps.
  • An insulating process is applied between the P-type semiconductor and the N-type semiconductor of the same semiconductor refrigeration unit and the adjacent semiconductor refrigeration unit 304 by applying a mask process.
  • Step 12 encapsulating the substrate on which the light-emitting portion and the semiconductor thermoelectric cooling portion are prepared.
  • a plurality of packaging methods such as a metal foil, a glass package cover, and a composite film may be used, and a hybrid package may also be used.
  • the hybrid package refers to packaging at least two packages at the same time, for example, using Metal foil package, glass cover on metal foil Package.
  • the illuminating device is exemplified as an OLED.
  • the light emitting device is an OLED, but the invention is not limited thereto, and may be, for example, an LED prepared from an inorganic semiconductor material.
  • the OLED includes a substrate 1 on which a light emitting portion 2 is disposed, and a light emitting portion 2 is provided with a semiconductor thermoelectric cooling portion 3; the light emitting portion 2 includes an anode layer 20, an organic functional layer 21, and a metal electrode layer 22.
  • the anode layer 20 is disposed on the substrate 1, the organic functional layer 21 is disposed on the anode layer 20, and the metal electrode layer 22 is disposed on the organic functional layer 21.
  • the structure of the semiconductor thermoelectric refrigeration portion 3 is the same as that of the embodiment shown in FIG. It is not described again that the first insulating and thermally conductive layer 301 is disposed on the metal electrode layer 22.
  • the substrate 1 has good light transmission properties in the visible light region, has a certain ability to penetrate water vapor and oxygen, and has good surface flatness.
  • the substrate 1 may be a glass or a flexible substrate, and the flexible substrate may be made of one of a polyester or a polyimide compound or a relatively thin metal.
  • the anode layer 20 serves as a connection layer for the forward voltage of the organic light emitting diode, such as an inorganic metal oxide (such as indium tin oxide ITO, oxidized yttrium, etc.), an organic conductive polymer (such as PEDOT: PSS, PANI, etc.) or high work.
  • the metal material of the function such as gold, copper, silver, platinum, etc.).
  • the metal electrode layer 22 serves as a connection layer for the negative voltage of the device, for example, a low work function metal material such as lithium, magnesium, calcium, barium, aluminum, indium or the like having a lower work function or an alloy thereof with copper, gold or silver, or Includes a thin layer of buffered insulation (such as LiF MgF2, etc.) and the metals or alloys mentioned above.
  • a low work function metal material such as lithium, magnesium, calcium, barium, aluminum, indium or the like having a lower work function or an alloy thereof with copper, gold or silver
  • a thin layer of buffered insulation such as LiF MgF2, etc.
  • the anode layer 20 is an ITO layer
  • the metal electrode layer 22 is a Mg:Ag alloy layer
  • the first insulating heat conductive layer 301 and the second insulating heat conductive layer 303 are diamond-like layers, and the thickness thereof is
  • the material of the metal upper electrode 3044 and the metal lower electrode 3041 is A1
  • the thickness of the 1000 P-type semiconductor 3042 is Bi 2 Te 3 — Sb 2 Te 3
  • the N-type semiconductor 3043 is Bi 2 Te 3 — Bi 2 Se 3 .
  • Thickness is 1500nm
  • the method for fabricating the OLED can include the following steps:
  • An anode layer 20, an organic functional layer 21, and a metal electrode layer 22 are sequentially formed on the substrate 1 to complete the preparation of the light-emitting portion 2.
  • the high-purity graphite is used as the cathode, and the vacuum of the vacuum chamber is 1 (T 3 Pa, arc current 70 A, arc voltage 20 V, and filtered magnetic field current 20 A, Produces a magnetic field of 40mT, using 99.999% high-purity argon as the working gas, the gas flow rate is controlled at 1.5sccm, the periodic bias is (0, -50V), the deposition time is 60min, and the distance between the substrate 1 and the high-purity graphite cathode 30cm
  • the diamond-like carbon film prepared in this step has a thickness of 500 nm, the surface is dense and smooth, and the surface roughness is less than 1 nm.
  • a dense thermal conductivity A1 metal array (multiple metal lower electrodes 3041) is prepared on the diamond-like carbon film by magnetron sputtering using a mask process.
  • the A1 metal array is used to connect the P-type semiconductor and the N-type semiconductor in each of the semiconductor refrigeration units 304.
  • a P-type semiconductor array (multiple P-type semiconductors 3042) is prepared by RF magnetron sputtering using a mask process.
  • the target of RF magnetron sputtering is binary solid solution alloy Bi 2 Te 3 — Sb 2 Te 3 , sputtering power is 100W, sputtering pressure is 3Pa (Ar gas pressure), sputtering time is 60min, film thickness For 1500
  • an N-type semiconductor array (multiple N-type semiconductors 3042) is prepared by RF magnetron sputtering using a mask process.
  • the target of RF magnetron sputtering is a binary solid solution alloy Bi 2 Te 3 — Bi 2 Se 3 , a sputtering power of 120 W, a sputtering gas pressure of 2 Pa (Ar gas pressure), a sputtering time of 40 min, and a film thickness. It is 1500nm.
  • process parameters used may be the same as those in step 2.
  • those skilled in the art may also select other process parameters, and details are not described herein again.
  • Al metal array is used to connect adjacent semiconductors of adjacent semiconductor refrigeration units 304 such that the plurality of semiconductor refrigeration units 304 are connected in series, in parallel, or in a series-parallel combination.
  • a diamond-like carbon film (second insulating and thermally conductive layer 303) is prepared.
  • step 2 the process parameters used are the same as those in step 2, and are not described here.
  • steps 7 and 8 may be repeated a plurality of times to form a multilayer composite film structure sealing layer, that is, a dense layer may be prepared by magnetron sputtering on the diamond-like film prepared in step 8.
  • the A1 metal layer with high thermal conductivity forms a sealing layer together with the diamond-like film to block the damage of the OLED device by water and oxygen, and at the same time increase the edge of the composite sealing layer.
  • a diamond-like film is further prepared on the metal layer, and this is repeated several times to form a multilayer composite film structure sealing layer.
  • the anode layer 20 is an ITO layer
  • the metal electrode layer 22 is a Mg:Ag alloy
  • the first insulating heat conductive layer 301 and the second insulating heat conductive layer 303 are aluminum nitride layers
  • the thickness thereof is
  • the material of the metal upper electrode 3044 and the metal lower electrode 3041 is A1, the thickness is 1000 ⁇
  • the P-type semiconductor 3042 is Bi 2 Te 3 — Sb 2 Te 3
  • the N-type semiconductor 3043 is Bi 2 Te 3 — Bi 2 Se. 3
  • the thickness is 1500nm.
  • the method for fabricating the OLED can include the following steps:
  • An anode layer 20, an organic functional layer 21, and a metal electrode layer 22 are sequentially formed on the substrate 1 to complete the preparation of the light-emitting portion 2.
  • An aluminum nitride film (first insulating layer 301) is grown on the metal electrode layer 22 by RF reactive magnetron sputtering.
  • the vacuum in the working chamber is 3 x 10 4 Pa
  • the sputtering target is 99.99% A1 target
  • the working gas is 99.99% Ar and 99.99% N 2
  • the partial pressure ratio of Ar to N 2 was 24:4
  • the target base was 7.0 cm
  • the temperature of the substrate 1 was 20 ° C (room temperature)
  • the power was 40 W
  • the sputtering time was 60 min.
  • the target is pre-sputtered at a power of 30 W for 15 min before sputter deposition of the film to remove impurities such as oxides on the surface of the A1 target.
  • a dense A1 metal array multiple metal lower electrodes 3041) having a high thermal conductivity on the aluminum nitride film prepared in step 2 by magnetron sputtering.
  • a P-type semiconductor array (a plurality of P-type semiconductors 3042) is prepared by a radio frequency magnetron sputtering method using a mask process.
  • the target of RF magnetron sputtering is binary solid solution alloy Bi 2 Te 3 — Sb 2 Te 3 , sputtering power is 100W, sputtering pressure is 3Pa (Ar gas pressure), sputtering time is 60min, film thickness It is 1500 baht.
  • an N-type semiconductor array (a plurality of N-type semiconductors 3042) is prepared by a radio frequency magnetron sputtering method using a mask process.
  • the target of RF magnetron sputtering is a binary solid solution alloy Bi 2 Te 3 — Bi 2 Se 3 , in which the sputtering power is 120 W, the sputtering pressure is 2 Pa (Ar gas pressure), and the sputtering time is 40 min.
  • the thickness is 1500 nm.
  • an A1 metal array (a plurality of metal upper electrodes 3044) is prepared by a magnetron sputtering method on a P-type semiconductor array and an N-type semiconductor array.
  • an aluminum nitride film (second insulating and thermally conductive layer 303) is prepared.
  • step 2 the process parameters used are the same as those in step 2, and are not described here.
  • steps 7 and 8 can be repeated in multiple cycles to form a multilayer composite film structure sealing layer.
  • the anode layer 20 is an ITO layer
  • the metal electrode layer 22 is a Mg:Ag alloy layer
  • the first insulating heat conductive layer 301 and the second insulating heat conductive layer 303 are aluminum oxide layers
  • the thickness thereof is The material of the metal upper electrode 3044 and the metal lower electrode 3041 is Al, the thickness is 1000 ⁇
  • the P-type semiconductor 3042 is Bi 2 Te 3 — Sb 2 Te 3
  • the N-type semiconductor 3043 is Bi 2 Te 3 — Bi 2 Se. 3
  • the thickness is 1500nm.
  • the method for fabricating the OLED can include the following steps:
  • the anode layer 20, the organic functional layer 21, and the metal electrode layer 22 are sequentially prepared on the substrate 1 to The preparation of the light-emitting portion 2 is completed.
  • an aluminum oxide film is prepared by RF magnetron reactive sputtering.
  • A1 is high-purity target, high-purity 02 as a reaction gas, 200W of RF power, sputtering gas pressure of 0.5 Pa is, a target substrate distance of 70mm, 02 gas flow l.Osccm, Ar gas flow rate It is lO.Osccm, the substrate temperature is room temperature, and the deposited film thickness is 500 nm.
  • a dense layer of Ag metal with high thermal conductivity is prepared by magnetron sputtering, and a sealing layer is formed together with the alumina to block the damage of the OLED device by water and oxygen. Can increase the toughness of the composite sealing layer.
  • steps 3 and 4 may be repeated a plurality of times to form a multilayer composite film structure sealing layer (first insulating heat conducting layer 301).
  • a P-type semiconductor array (a plurality of P-type semiconductors 3042) is prepared by a radio frequency magnetron sputtering method using a mask process.
  • the target of RF magnetron sputtering is a binary solid solution alloy Bi 2 Te 3 — Sb 2 Te 3 , in which the sputtering power is 100 W, the sputtering pressure is 3 Pa (Ar gas pressure), and the sputtering time is 60 min.
  • the thickness is 1500 ⁇ .
  • an N-type semiconductor array (a plurality of N-type semiconductors 3042) is prepared by a radio frequency magnetron sputtering method using a mask process.
  • the target was a binary solid solution alloy Bi 2 Te 3 — Bi 2 Se 3 , in which the sputtering power was 120 W, the sputtering gas pressure was 2 Pa (Ar gas pressure), the sputtering time was 40 min, and the film thickness was 1500 ⁇ .
  • step 2 the process parameters used can be the same as in step 2, and will not be described here.
  • an A1 metal array (a plurality of metal upper electrodes 3044) is prepared by a magnetron sputtering method on a P-type semiconductor array and an N-type semiconductor array.
  • an aluminum oxide film (second insulating and thermally conductive layer 303) is prepared.
  • step 2 the process parameters used are the same as those in step 2, and are not described here. 10.
  • step 2 the process parameters used are the same as those in step 2, and are not described here. 10.
  • the anode layer 20 is an ITO layer
  • the metal electrode layer 22 is a Mg:Ag alloy layer
  • the first insulating heat conductive layer 301 and the second insulating heat conductive layer 303 are diamond-like layers, and the thickness thereof is 500 nm
  • the material of the metal upper electrode 3044 and the metal lower electrode 3041 is A1
  • the thickness of the 1000 P type semiconductor 3042 is a ternary solid solution Bi 2 Te 3 - S b2 Te 3 - Sb 2 Se 3
  • the N type semiconductor 3043 is ternary Solid solution Bi 2 Te 3 - Sb 2 Te 3 - Sb 2 Se 3 , thickness 1500nm
  • the preparation method is similar to that of Example 3 except that the materials of the P-type semiconductor 3042 and the N-type semiconductor 3043 are prepared, and will not be described herein.
  • the OLED of the semiconductor thermoelectric refrigeration section was not integrated, and the light-emitting section was prepared in the same manner as in the foregoing Examples 1 to 3.
  • the OLED provided by the embodiment of the present invention has a lower operating temperature and a longer lifetime, that is, the heat dissipation performance of the light emitting device can be effectively improved, thereby prolonging the service life of the light emitting device.

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Abstract

一种发光器件及其制作方法,可有效改善发光器件的散热性能,延长发光器件的使用寿命。所述发光器件包括基板(1),所述基板(1)上设置有发光部(2),所述发光器件中还集成有半导体热电制冷部(3),所述半导体热电制冷部(3)设置在所述发光部(2)上;所述半导体制冷部(3)包括冷端(31)和热端(32),所述冷端(31)靠近所述发光部(2),所述热端(32)远离所述发光部(2)。

Description

发光器件及其制作方法 技术领域
本发明的实施例涉及一种发光器件及其制作方法。 背景技术
有机电致发光二极管( Organic Light-Emitting Diode, OLED )可以被用于 继液晶显示技术之后的第三代显示技术, 且在平板显示、 照明、 背光源等各 个领域具有广泛的应用。
OLED中的有机材料对氧气敏感, 一旦接触到氧气, 易于与氧气发生反 应, 从而使 OLED的性能产生恶化。 为了防止这种情况发生, 一般使用玻璃 对 OLED的整个发光部分进行包覆。使用玻璃包覆虽然能够避免 OLED中的 有机材料与氧气接触, 但是, 由于 OLED本身与包覆的玻璃之间留有缝隙, 而且玻璃本身是不容易导热的材料。 因此, OLED通电工作所产生的热量不 易于传导出去, 易造成 OLED过热损坏, 影响 OLED的使用寿命。 发明内容
本发明实施例提供了一种发光器件及其制作方法, 能够有效改善发光器 件的散热性能, 从而延长发光器件的使用寿命。
一方面, 本发明实施例提供一种发光器件, 包括基板, 所述基板上设置 有发光部; 所述发光器件中还集成有半导体热电制冷部, 所述半导体热电制 冷部设置在所述发光部上。
另一方面, 本发明实施例提供一种上述发光器件的制作方法, 包括以下 步骤: 在基板上制备发光部; 在所述制备有发光部的基板上, 制备半导体热 电制冷部; 对所述制备有发光部和半导体热电制冷部的基板进行封装处理。
本发明实施例提供的发光器件及其制作方法, 该发光器件中集成有半导 体热电制冷部, 该半导体热电制冷部利用热电效应原理, 在发光部工作时, 吸收并释放发光部所产生的热量, 降低发光部工作时的温度, 因此, 能够有 效改善发光器件的散热性能, 从而延长发光器件的使用寿命。 附图说明
为了更清楚地说明本发明实施例的技术方案, 下面将对实施例的附图作 简单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例, 而非对本发明的限制。
图 1为本发明实施例提供的发光器件的一种结构示意图;
图 2为本发明实施例提供的发光器件的一种结构示意图;
图 3 ( a ) - ( c )为本发明实施例提供的发光器件中, 半导体制冷单元的 连接方式的原理示意图;
图 4为本发明实施例提供的发光器件为 OLED的结构示意图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本发 明实施例的附图,对本发明实施例的技术方案进行清楚、 完整地描述。显然, 所描述的实施例是本发明的一部分实施例, 而不是全部的实施例。 基于所描 述的本发明的实施例, 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例, 都属于本发明保护的范围。
除非另作定义, 此处使用的技术术语或者科学术语应当为本发明所属领 域内具有一般技能的人士所理解的通常意义。 本发明专利申请说明书以及权 利要求书中使用的 "第一" 、 "第二" 以及类似的词语并不表示任何顺序、 数量或者重要性,而只是用来区分不同的组成部分。同样, "一个 "或者 "一" 等类似词语也不表示数量限制, 而是表示存在至少一个。 "连接" 或者 "相 连" 等类似的词语并非限定于物理的或者机械的连接, 而是可以包括电性的 连接, 不管是直接的还是间接的。 "上" 、 "下" 、 "左" 、 "右" 等仅用 于表示相对位置关系, 当被描述对象的绝对位置改变后, 则该相对位置关系 也相应地改变。
本发明的一个实施例提供一种发光器件。 如图 1所示, 本发明实施例提 供的发光器件包括基板 1 ,基板 1上设置有发光部 2; 所述发光器件中还集成 有半导体热电制冷部 3 , 半导体热电制冷部 3设置在所述发光部 2上。
半导体热电制冷部 3是一种基于帕尔帖效应 (即热电效应)原理、 利用 半导体热电材料进行制冷的部件, 其包括冷端 31和热端 32。 冷端 31靠近发 光部 2, 用于吸收发光部 2所产生的热量, 而热端 32远离于发光部 2, 用于 释放冷端 31所吸收的热量。
本发明实施例提供的发光器件, 半导体热电制冷部 3是集成在发光器件 中的, 其直接制备在发光部 2上, 能够获得良好的制冷效果。
本发明实施例提供的发光器件, 在发光部 2工作时, 利用半导体热电制 冷部 3吸收并释放发光部 2所产生的热量,从而降低发光部 2工作时的温度, 因此该发光器件的散热性能能够得到有效的改善, 从而发光器件的使用寿命 得以延长。
例如, 在本发明的一个实施例的一个示例中, 如图 2所示, 半导体热电 制冷部 3包括第一绝缘导热层 301、 半导体热电堆层 302和第二绝缘导热层 303; 第一绝缘导热层 301设置在发光部 2上,半导体热电堆层 302设置在第 一绝缘导热层 301上, 第二绝缘导热层 303设置在半导体热电堆层 302上。
半导体热电堆层 302包括至少一个半导体制冷单元 304 (虚线框所示)。 每个半导体制冷单元 304包括金属下电极 3041、 P型半导体 3042、 N型半导 体 3043和金属上电极 3044;金属下电极 3041设置在第一绝缘导热层 301上, P型半导体 3042和 N型半导体 3043设置在金属下电极上 3041 ,金属上电极 3044设置在 P型半导体的顶部和 N型半导体的顶部。
图 2所示的示例中, 同一半导体制冷单元 304的 P型半导体 3042的底 部和 N型半导体 3043的底部通过金属下电极 3041相连接; 当半导体热电堆 层 302包括多个半导体制冷单元 304时,金属上电极 3044用于相邻半导体制 冷单元 304之间的连接。
当直流电流由 N型半导体 3043流向 P型半导体 3044时,基于帕尔帖效 应原理, N型半导体 3043与金属下电极 3041、 以及 P型半导体 3042与金属 下电极 3041接触的部位吸热 ,称为冷端。 N型半导体 3043与金属上电极 3044、 以及 P型半导体 3042与金属上电极 3044接触的部位放热, 称为热端。 图 2 所示的发光元件工作时, 发光部 2产生的热量穿过第一绝缘导热层 301传递 至冷端, 冷端将吸收该热量, 而热端释放冷端所吸收的热量, 所释放的热量 穿过第二绝缘导热层 303传递至发光元件外部。
优选的, 在本发明的实施例中, 为了有效提高制冷效果, 半导体热电堆 层 302包括多个 (二个或二个以上)半导体制冷单元 304。 在一些示例中, 该多个半导体制冷单元 304可呈阵列状分布; 如图 3 (a)至图 3 (c)所示, 多个半导体制冷单元 304可串联连接、 并联连接或串并联组合连接形成多级 热电堆, 多级热电堆扩大了冷端和热端的面积, 制冷效果更好。 本实施例通 过金属上电极 3044实现多个半导体制冷单元 304之间的连接。
参见图 3 (a) , 多个半导体制冷单元分布为两列, 两列半导体制冷单元 串联连接, 电流全部通过每一半导体制冷单元而不分流, 且流经每一制冷单 元的电流均是由 N型半导体流向 P型半导体。
参见图 3 (b) , 多个半导体制冷单元分为两列, 两列半导体制冷单元并 联连接, 电流分流后分别流经两列半导体制冷单元, 且流经每一制冷单元的 电流均是由 N型半导体流向 P型半导体。
参见图 3 (c) , 串并联组合连接是指既包括列和列串联连接, 还包括列 和列的并联连接。
需要说明的是, 图 3 (a)至图 3 (c)仅为多个半导体制冷单元 304之间 的连接的原理性示意图, 并不表示本实施例的半导体制冷单元的个数和真实 连接。 例如, 每列半导体制冷单元可包括一个或多个半导体制冷单元, 半导 体热电堆层 302中可以分布有多列半导体制冷单元。 本领域技术人员可根据 图 3 (a)至图 3 (c) 的连接原理, 选择半导体制冷单元的个数和 /或列数, 并通过金属上电极 3044实现多个半导体制冷单元的串联、并联或者串并联组 合连接, 这里不再赘述。
在本实施例中, 同一个半导体制冷单元 304的 P型半导体 3042和 N型 半导体 3043之间, 以及相邻半导体制冷单元 304之间可设置有绝缘隔离部 305, 以有效保证半导体制冷单元 304的电学性能。
本实施例中, 第一绝缘导热层 301与第二绝缘导热层 302的材料可相同 也可不同, 而且由于两者用于传导热量, 因此两者的材料优选为高热导率的 无机材料。 可选的, 第一绝缘导热层 301与第二绝缘导热层 302的材料均可 选自类金刚石、 氮化铝、 氮化硼、 氮化硅、 三氧化二铝、 氧化镁中的一种。 此外, 第一绝缘导热层 301与第二绝缘导热层 302的材料可相同也可不同, 可选的,所述第一绝缘导热层与第二绝缘导热层 302的厚度为 100-5000纳米。
本实施例中 , P型半导体 3042的材料可选自以下材料中的一种或几种的 组合: 碲化铋二元固溶体 Bi2Te3— Sb2Te3、碲化铋三元固溶体 Bi2Te3 - Sb2Te3 - Sb2Se3, P型 Ag(l-x)Cu(x)Ti Te, YBaCuO超导材料。
本实施例中 , N型半导体 3043的材料可选自以下材料中的一种或几种的 组合: 碲化铋二元固溶体 Bi2Te3— Bi2Se3 , 碲化铋三元固溶体 Bi2Te3 - Sb2Te3 - Sb2Se3, N型 Bi - Sb合金, YBaCuO超导材料。
碲化铋三元固溶体相对于碲化铋二元固溶体来讲, 提高了固溶体材料的 禁带宽度, 可以进一步降低晶格热导率。
本实施例中, 金属上电极 3044和金属下电极 3041的材料可相同也可不 同, 均可选自以下材料中的银、 铜、 金和铝中的一种, 并且两者的厚度可相 同也可不同, 例如均可为 50-1000纳米。
需要说明的是, 本发明实施例提供的发光器件可以为 OLED、 无机发光 二极管、 有机太阳能电池、 无机太阳能电池、 有机薄膜晶体管、 无机薄膜晶 体管和光探测器等, 本发明对此不做限定。
相应的, 本发明实施例还提供一种上述发光器件的制作方法, 包括以下 步骤:
步骤 10, 在基板上制备发光部。
此步骤例如可以釆用现有技术中的相关步骤完成, 此处不再赘述。
步骤 11 , 在所述制备有发光部的基板上, 制备半导体热电制冷部。
以图 2所示的实施例的发光器件的制备为例,本步骤 11例如可以包括以 下几个步骤。
首选, 在所述发光部上, 沉积第一绝缘导热层。
例如, 可以釆用真空蒸镀、 磁控溅射、 离子镀、 直流溅射镀膜、 射频溅 射镀膜、 离子束溅射镀膜、 离子束辅助沉积、 等离子增强化学气相沉积、 高 密度电感耦合式等离子体源化学气相沉积、 离子团束沉积、 金属有机化学气 相沉积法、 触媒式化学气相沉积、 激光脉冲沉积法、 脉冲等离子体方法、 脉 冲激光方法、 电子束蒸发、 溶胶-凝胶法、 喷墨打印、 电镀等方式来沉积第一 绝缘导热层, 本发明对此不做限定。
然后, 在所述第一绝缘导热层上, 应用遮罩(shadow mask )制程制备金 属下电极。
遮罩制程通过遮罩露出需要制备金属下电极的位置,而遮挡住其他位置, 从而使得金属下电极仅制备在遮罩所露出的位置上, 遮罩所遮挡住的位置保 持原样。 以下用到的其它遮罩制程的原理与此相同。
例如, 金属下电极可以釆用真空蒸镀、 磁控溅射、 离子镀、 直流溅射镀 膜、 射频溅射镀膜、 离子束溅射镀膜、 离子束辅助沉积、 等离子增强化学气 相沉积、 高密度电感耦合式等离子体源化学气相沉积、 离子团束沉积、 金属 有机化学气相沉积法、 触媒式化学气相沉积、 激光脉冲沉积法、 脉冲等离子 体方法、 脉冲激光方法、 电子束蒸发、 溶胶-凝胶法、 喷墨打印、 电镀等方式 进行制备, 本发明对此不做限定。
接下来, 在所述金属下电极上, 应用遮罩制程分别制备 P型半导体和 N 型半导体。
P型半导体和 N型半导体的制备顺序不限, 可以先行制备 P型半导体, 然后制备 N型半导体, 反之亦可。 例如, 可以釆用金属有机物化学气相沉积 ( MOCVD ) 、 脉冲激光沉积(PLD ) 、 分子束外延生长(MBE ) 、 磁控溅 射(MS )、 离子束溅射(IBS )、共蒸发(Co-evaporation )和瞬间蒸发法(Flash evaporation ) 中的一种或几种方式制备 P型半导体和 N型半导体, 本发明对 此不做限定。
接下来, 在所述 P型半导体和 N型半导体上, 应用遮罩制程制备金属上 电极。 金属上电极的制备方式可与金属下电极的制备方式相同, 这里不再赘 述。
然后, 在金属上电极上, 沉积第二绝缘导热层。 第二绝缘导热层的制备 方式可与第一绝缘导热层的制备方式相同, 这里不再赘述。
需要说明的是, 在本发明的一个实施例中, 为了保证发光器件的电学性 能, 有效避免短路等电学故障, 在制备 P型半导体和 N型半导体之后, 制备 金属上电极之前, 所述制作方法还包括如下步骤。
应用遮罩制程,在同一个半导体制冷单元的 P型半导体和 N型半导体之 间以及相邻半导体制冷单元 304之间沉积绝缘隔离部。
步骤 12, 对所述制备有发光部和半导体热电制冷部的基板进行封装处 理。
可选的, 本步骤中可以使用金属箔、 玻璃封装盖板、 复合薄膜等多种封 装方式, 还可以使用混合封装方式, 混合封装是指同时使用至少两种封装方 式进行封装, 例如, 既使用了金属箔封装, 还在金属箔上应用玻璃盖板进行 封装。
为了更好的说明本发明实施例提供的发光器件及其制作方法, 下面以发 光器件为 OLED为例进行具体说明。以下的各实施例中,发光器件为 OLED, 但是本发明不限于此, 例如也可以为以无机半导体材料制备的 LED
如图 4所示, 该 OLED包括基板 1 , 基板 1上设置有发光部 2, 发光部 2 上设置有半导体热电制冷部 3;发光部 2包括阳极层 20、有机功能层 21和金 属电极层 22, 阳极层 20设置在基板 1上, 有机功能层 21设置在阳极层 20 上, 金属电极层 22设置在有机功能层 21上; 半导体热电制冷部 3的结构与 图 2所示实施例相同, 这里不再赘述, 其中第一绝缘导热层 301设置在金属 电极层 22上。
基板 1在可见光区域有着良好的透光性能, 有一定的防水汽和氧气渗透 的能力, 有较好的表面平整性。 该基板 1可以是玻璃或柔性基片, 柔性基片 釆用聚酯类、 聚酞亚胺化合物中的一种材料或者较薄的金属。
阳极层 20作为有机发光二极管正向电压的连接层,例如釆用无机金属氧 化物 (如氧化铟锡 ITO、 氧化辞 ΖηΟ等)、 有机导电聚合物 (如 PEDOT:PSS, PANI等)或高功函数的金属材料 (如金、 铜、 银、 铂等)。
金属电极层 22作为器件负向电压的连接层, 例如为低功函数金属材料 锂、 镁、 钙、 锶、 铝、 铟等功函数较低的金属或它们与铜、 金、 银的合金, 或者包括一层很薄的緩冲绝缘层 (如 LiF MgF2等)和前面所提到的金属或合 金。
实施例 1
本实施例的 OLED, 如图 4所示, 阳极层 20为 ITO层, 金属电极层 22 为 Mg:Ag合金层,第一绝缘导热层 301和第二绝缘导热层 303为类金刚石层, 厚度均为 500nm, 金属上电极 3044和金属下电极 3041的材料为 A1, 厚度为 1000 P型半导体 3042是 Bi2Te3— Sb2Te3, N型半导体 3043是 Bi2Te3— Bi2Se3, 厚度均为 1500nm
该 OLED的制作方法可以包括以下步骤:
1、在基板 1上依次制备阳极层 20、有机功能层 21和金属电极层 22, 以 完成发光部 2的制备。
2、 釆用真空磁过滤技术, 对制备有阳极层 20、 有机功能层 21和金属电 极层 22的基板 1施加低频率周期性负偏压 , 室温下, 在金属电极层 22上沉 积类金刚石薄膜(第一绝缘导热层 301 )
例如, 制备该类金刚石薄膜的磁过滤等离子体设备中, 釆用高纯石墨作 为阴极, 真空室的基础真空在 l(T3Pa左右, 电弧电流 70A, 电弧电压 20V, 过滤磁场电流 20A, 可产生 40mT的磁场, 使用 99.999%的高纯氩气作为工 作气体, 气体流量控制在 1.5sccm, 周期性偏压为 (0, -50V ) , 沉积时间为 60min, 基板 1与高纯石墨阴极的距离为 30cm
例如, 本步骤制备的类金刚石薄膜的厚度为 500nm, 表面致密光滑, 表 面粗糙度小于 lnm
3、在步骤 2制备的类金刚石薄膜上,应用遮罩制程,通过磁控溅射法在 类金刚石薄膜上制备一层致密的热导率高的 A1金属阵列 (多个金属下电极 3041 )
该 A1金属阵列用于连接每一个半导体制冷单元 304中的 P型半导体与 N 型半导体。
4、 在步骤 3制备的 A1金属阵列上, 应用遮罩制程, 通过射频磁控溅射 法制备 P型半导体阵列 (多个 P型半导体 3042 )
例如, 射频磁控溅射的靶材为二元固溶体合金 Bi2Te3— Sb2Te3, 溅射功 率为 100W, 溅射气压为 3Pa ( Ar气压) , 溅射时间为 60min, 膜层厚度为 1500
5、 在步骤 3制备的 A1金属阵列上, 应用遮罩制程, 通过射频磁控溅射 法制备 N型半导体阵列 (多个 N型半导体 3042 )
例如,射频磁控溅射的靶材为二元固溶体合金 Bi2Te3— Bi2Se3 ,溅射功率 为 120W,溅射气压为 2Pa( Ar气压 ),溅射时间为 40min,膜层厚度为 1500nm.
6、应用遮罩制程制备类金刚石膜矩阵, 以在同一个半导体制冷单元 304 缘隔离部。
本步骤中, 所釆用的工艺参数可以与步骤 2相同, 当然本领域技术人员 也可以选择其它工艺参数, 这里不再赘述。
7、 应用遮罩制程, 通过磁控溅射法在 P型半导体阵列和 N型半导体阵 列上制备 A1金属阵列 (多个金属上电极 3044 ) 该 Al金属阵列用于连接相邻半导体制冷单元 304的相邻的半导体,以使 多个半导体制冷单元 304串联连接、 并联连接或者串并联组合连接。
8、 在步骤 7制备的 A1金属阵列上, 制备类金刚石薄膜(第二绝缘导热 层 303 ) 。
本步骤中, 所釆用的工艺参数与步骤 2相同, 这里不再赘述。
进一步的, 为了增强密封效果, 步骤 7和 8可多次重复进行, 形成多层 复合膜结构密封层, 即可以继续在步骤 8制备的类金刚石膜上再通过磁控溅 射制备一层致密的热导率高的 A1金属层,与类金刚石膜共同形成密封层, 阻 隔水氧对 OLED器件的侵害, 同时还能增加复合密封层的韦刃性。 为了保护制 备的金属层, 在金属层上再制备一层类金刚石膜, 以此循环多次, 形成多层 复合膜结构密封层。
实施例 2
本实施例的 OLED, 如图 4所示, 阳极层 20为 ITO层, 金属电极层 22 为 Mg:Ag合金, 第一绝缘导热层 301和第二绝缘导热层 303为氮化铝层,厚 度均为 500nm, 金属上电极 3044和金属下电极 3041的材料为 A1, 厚度为 1000匪, P型半导体 3042是 Bi2Te3— Sb2Te3, N型半导体 3043是 Bi2Te3— Bi2Se3, 厚度均为 1500nm。
该 OLED的制作方法可以包括以下步骤:
1、在基板 1上依次制备阳极层 20、有机功能层 21和金属电极层 22, 以 完成发光部 2的制备。
2、 釆用射频反应磁控溅射在金属电极层 22上生长氮化铝薄膜(第一绝 缘导热层 301 ) 。
例如, 磁控溅射设备中, 工作腔室内真空为 3 x l04Pa, 溅射靶材为 99.99 %的 A1靶, 工作气体为 99.99 %的 Ar和 99.99 %的 N2, 工艺过程中始 终保持 Ar与 N2分压比为 24:4,靶基距 7.0cm,基板 1的温度 20 °C (室温), 功率为 40W, 溅射时间为 60min。
此外, 优选的, 在溅射沉积薄膜之前, 先以 30W 的功率对靶材预溅射 15min, 以清除 A1靶材表面的氧化物等杂质。
3、应用遮罩制程,通过磁控溅射法在步骤 2制备的氮化铝薄膜上制备一 层致密的热导率高的 A1金属阵列 (多个金属下电极 3041 ) 。 4、 在步骤 3制备的 Al金属阵列上, 应用遮罩制程, 通过射频磁控溅射 法制备 P型半导体阵列 (多个 P型半导体 3042 ) 。
例如, 射频磁控溅射的靶材为二元固溶体合金 Bi2Te3— Sb2Te3, 溅射功 率为 100W, 溅射气压为 3Pa ( Ar气压) , 溅射时间为 60min, 膜层厚度为 1500匪。
5、 在步骤 3制备的 A1金属阵列上, 应用遮罩制程, 通过射频磁控溅射 法制备 N型半导体阵列 (多个 N型半导体 3042 ) 。
例如,射频磁控溅射的靶材为二元固溶体合金 Bi2Te3— Bi2Se3 ,其中溅射 功率为 120W, 溅射气压为 2Pa ( Ar气压) , 溅射时间为 40min, 膜层厚度 为 1500nm。
6、应用遮罩制程制备氮化铝薄膜矩阵, 以在同一个半导体制冷单元 304 缘隔离部。
本步骤中, 所釆用的工艺参数与步骤 2相同, 当然本领域技术人员也可 以选择其它工艺参数, 这里不再赘述。
7、 应用遮罩制程, 通过磁控溅射法在 P型半导体阵列和 N型半导体阵 列上制备 A1金属阵列 (多个金属上电极 3044 ) 。
8、 在步骤 7制备的 A1金属阵列上, 制备氮化铝薄膜(第二绝缘导热层 303 ) 。
本步骤中, 所釆用的工艺参数与步骤 2相同, 这里不再赘述。
同实施例一, 步骤 7和 8可以多次循环重复进行, 以形成多层复合膜结 构密封层。
实施例 3
本实施例的 OLED, 如图 4所示, 阳极层 20为 ITO层, 金属电极层 22 为 Mg:Ag合金层, 第一绝缘导热层 301和第二绝缘导热层 303为氧化铝层, 厚度均为 500nm, 金属上电极 3044和金属下电极 3041的材料为 Al, 厚度为 1000匪, P型半导体 3042是 Bi2Te3— Sb2Te3, N型半导体 3043是 Bi2Te3— Bi2Se3, 厚度均为 1500nm。
该 OLED的制作方法可以包括以下步骤:
1、在基板 1上依次制备阳极层 20、有机功能层 21和金属电极层 22 , 以 完成发光部 2的制备。
2、 在金属电极层 22上, 釆用射频磁控反应溅射制备氧化铝薄膜。
具体的, 以高纯 A1为靶材, 以高纯 02为反应气体, 射频功率为 200W, 溅射气压为 0.5Pa, 靶基距为 70mm, 02气流量为 l.Osccm, Ar 气流量为 lO.Osccm, 基板温度为室温, 沉积薄膜厚度为 500nm。
3、在步骤 2制备的氧化铝膜上再通过磁控溅射制备一层致密的热导率高 的 Ag金属层, 与氧化铝共同形成密封层, 阻隔水氧对 OLED器件的侵害, 同时还能增加复合密封层的韧性。
为了增强密封效果, 步骤 3和 4可多次重复进行, 形成多层复合膜结构 密封层(第一绝缘导热层 301 ) 。
4、 在多层复合膜封装层上通过磁控溅射法应用遮罩 (shadow mask)制程 制备一层致密的热导率高 A1金属的阵列 (多个金属下电极 3041 ) 。
5、 在步骤 4制备的 A1金属阵列上, 应用遮罩制程, 通过射频磁控溅射 法制备 P型半导体阵列 (多个 P型半导体 3042 ) 。
例如, 射频磁控溅射的靶材为二元固溶体合金 Bi2Te3— Sb2Te3, 其中溅 射功率为 100W, 溅射气压为 3Pa ( Ar气压) , 溅射时间为 60min, 膜层厚 度为 1500匪。
6、 在步骤 4制备的 A1金属阵列上, 应用遮罩制程, 通过射频磁控溅射 法制备 N型半导体阵列 (多个 N型半导体 3042 ) 。
靶材为二元固溶体合金 Bi2Te3— Bi2Se3, 其中溅射功率为 120W, 溅射气 压为 2Pa ( Ar气压) , 溅射时间为 40min, 膜层厚度为 1500匪。
7、 应用遮罩制程制备氧化铝膜矩阵, 以在同一个半导体制冷单元 304 缘隔离部。
本步骤中, 所釆用的工艺参数可以与步骤 2相同, 这里不再赘述。
8、 应用遮罩制程, 通过磁控溅射法在 P型半导体阵列和 N型半导体阵 列上制备 A1金属阵列 (多个金属上电极 3044 ) 。
9、 在步骤 8制备的 A1金属阵列上, 制备氧化铝薄膜(第二绝缘导热层 303 ) 。
本步骤中, 所釆用的工艺参数与步骤 2相同, 这里不再赘述。 10、 使用金属箔封装器件。
实施例 4
本实施例的 OLED, 如图 4所示, 阳极层 20为 ITO层, 金属电极层 22 为 Mg:Ag合金层,第一绝缘导热层 301和第二绝缘导热层 303为类金刚石层, 厚度均为 500nm, 金属上电极 3044和金属下电极 3041的材料为 A1, 厚度为 1000 P型半导体 3042是三元固溶体 Bi2Te3 - Sb2Te3 - Sb2Se3, N型半导 体 3043是三元固溶体 Bi2Te3 - Sb2Te3 - Sb2Se3, 厚度均为 1500nm
制备方法类似于实施例 3 , 不同的是制备 P型半导体 3042和 N型半导 体 3043的材料, 这里不再赘述。
对比例 1
未集成有半导体热电制冷部的 OLED, 而发光部釆用与前述实施例 1至 3 相同的方法制备。
性能测试
对实施例 1 2 3 4及对比例 1进行工作温度和寿命测试, 得出的测试 结果如表一所示:
表一:
Figure imgf000013_0001
由表一可以看出, 本发明实施例提供的 OLED的工作温度较低, 寿命较 长, 即能够有效改善发光器件的散热性能, 从而延长发光器件的使用寿命。
以上所述仅是本发明的示范性实施方式, 而非用于限制本发明的保护范 围, 本发明的保护范围由所附的权利要求确定。

Claims

权利要求书
1、 一种发光器件, 包括基板, 所述基板上设置有发光部, 其中, 所述发光器件中还集成有半导体热电制冷部, 所述半导体热电制冷部设 置在所述发光部上;
所述半导体制冷部包括冷端和热端, 所述冷端靠近所述发光部, 所述热 端远离所述发光部。
2、 根据权利要求 1所述的发光器件, 其中,
所述半导体热电制冷部包括第一绝缘导热层、 半导体热电堆层和第二绝 缘导热层, 所述第一绝缘导热层设置在所述发光部上, 所述半导体热电堆层 设置在所述第一绝缘导热层上, 所述第二绝缘导热层设置在所述导体热电堆 层上。
3、 根据权利要求 2所述的发光器件, 其中,
所述半导体热电堆层包括至少一个半导体制冷单元, 每个半导体制冷单 元包括金属下电极、 P型半导体、 N型半导体和金属上电极。
4、 根据权利要求 3所述的发光器件, 其中,
所述金属下电极设置在所述第一绝缘导热层上;
所述 P型半导体和 N型半导体设置在所述金属下电极上,所述 P型半导 体的底部和 N型半导体的底部通过所述金属下电极相连接;
所述金属上电极设置在所述 P型半导体的顶部和所述 N型半导体的顶 部。
5、 根据权利要求 2所述的发光器件, 其中,
所述半导体热电制冷部包括多个半导体制冷单元;
所述多个半导体制冷单元通过所述金属上电极串联连接、 并联连接或串 并联组合连接。
6、根据权利要求 3或 4所述的发光器件, 其中, 同一个所述半导体制冷 单元的 P型半导体和 N型半导体之间,以及相邻的所述半导体制冷单元之间 设置有绝缘隔离部。
7、 根据权利要求 2所述的发光器件, 其中,
所述发光器件为有机电致发光二极管 (OLED ) ; 所述发光部包括阳极层、 有机功能层和金属电极层;
所述阳极层设置在所述基板上, 所述有机功能层设置在所述阳极层上, 所述金属电极层设置在所述有机功能层上;
所述第一绝缘导热层设置在所述金属电极层上。
8、 根据权利要求 2至 7任一项所述的发光器件, 其中,
所述 P型半导体的材料选自以下材料中的一种或几种的组合:
碲化铋二元固溶体 Bi2Te3—Sb2Te3、 碲化铋三元固溶体 Bi2Te3 - Sb2Te3 - Sb2Se3, P型 Ag(1-x)Cu(x)Ti Te, YBaCuO超导材料;
所述 N型半导体的材料选自以下材料中的一种或几种的组合:
碲化铋、二元固溶体 Bi2Te3— Bi2Se3 , 碲化铋、三元固溶体 Bi2Te3 - Sb2Te3 - Sb2Se3, N型 Bi - Sb合金, YBaCuO超导材料。
9、 一种发光器件的制作方法, 其中包括:
在所述基板上制备所述发光部;
在所述制备有所述发光部的基板上, 制备所述半导体热电制冷部; 对所述制备有发光部和半导体热电制冷部的基板进行封装处理。
10、 根据权利要求 9所述的方法, 其中, 在所述制备有所述发光部的基 板上, 制备所述半导体热电制冷部包括:
在所述发光部上, 沉积第一绝缘导热层;
在所述第一绝缘导热层上, 应用遮罩制程制备金属下电极;
在所述金属下电极上,应用遮罩制程分别制备 P型半导体和 N型半导体; 在所述 P型半导体和 N型半导体上, 应用遮罩制程制备金属上电极; 在金属上电极上, 沉积第二绝缘导热层。
11、 根据权利要求 9所述的方法, 其中, 所述对所述制备有发光部和半 导体热电制冷部的基板进行封装处理包括:
使用金属箔、 玻璃封装盖板或复合薄膜对所述制备有发光部和半导体热 电制冷部的基板进行封装处理。
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