WO2014002808A1 - レジストマスクの処理方法 - Google Patents
レジストマスクの処理方法 Download PDFInfo
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- WO2014002808A1 WO2014002808A1 PCT/JP2013/066561 JP2013066561W WO2014002808A1 WO 2014002808 A1 WO2014002808 A1 WO 2014002808A1 JP 2013066561 W JP2013066561 W JP 2013066561W WO 2014002808 A1 WO2014002808 A1 WO 2014002808A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
- H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32192—Microwave generated discharge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32192—Microwave generated discharge
- H01J37/32211—Means for coupling power to the plasma
- H01J37/3222—Antennas
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
Definitions
- Embodiments of the present invention relate to a resist mask processing method.
- an etching target layer is etched along a mask in order to form a desired shape, for example, a groove or a hole, in the etching target layer.
- a resist mask may be used as a mask for etching the etching target layer.
- a hard mask may be formed from the layer having selectivity with respect to the layer to be etched by etching along the resist mask.
- the resist mask used for etching is exposed to an etchant gas and its plasma in order to etch a layer to be etched or a layer to be a mask later. Therefore, the resist mask is required to have resistance to the etchant gas and its plasma, that is, etching resistance.
- Non-Patent Document 1 As a processing method for enhancing the etching resistance of a resist mask, a curing (curing) process using hydrogen gas plasma has been conventionally performed. This processing method is described in Non-Patent Document 1.
- hydrogen gas is supplied into an inductively coupled plasma processing apparatus to generate hydrogen gas plasma, and the resist mask is cured by the plasma.
- Non-Patent Document 1 after a resist mask is processed using hydrogen gas plasma, a hard mask is formed by etching using the resist mask.
- LWR Line Width Roughness
- hard masks reflect variations in resist mask line width. Therefore, when a layer to be etched is etched using such a hard mask, the shape created in the layer to be etched also reflects variations in the line width of the resist mask, and thus includes the layer to be etched. The characteristics of the semiconductor device can be deteriorated.
- the channel length of the design value is 70 nm, whereas the channel length is 79 nm.
- the current I ds between the source and the drain of the MOS transistor has the relationship of the following formula (1).
- ⁇ eff is the effective mass
- C ox is the gate capacitance
- W is the channel width
- L is the channel length
- V g is the gate voltage
- V t is the threshold voltage
- V dt is the source-drain voltage.
- the source-drain current I ds is inversely proportional to the channel length L. Therefore, when the channel length is 79 nm, the current I ds is about 12% lower than the designed channel length of 70 nm. Since the on-current I on needs to be kept constant for the operation of the MOS transistor, the power supply voltage needs to be increased in order to cope with the decrease in the current I ds . For example, in order for the current I ds when the channel length is 79 nm to be the same as the current I ds when the designed channel length is 70 nm, the power supply voltage needs to be increased by about 13%. This leads to an increase in power consumption. Further, when the channel length varies, the on-current / off-current characteristics of the MOS transistor may be deteriorated.
- One aspect of the present invention relates to a method of processing a resist mask.
- a step of preparing a substrate to be processed on which a patterned resist mask is provided in a processing container (a) a step of preparing a substrate to be processed on which a patterned resist mask is provided in a processing container; and (b) supplying a gas containing hydrogen into the processing container, And supplying a microwave into the processing container to generate a plasma of the gas containing hydrogen.
- the gas containing hydrogen may be H 2 gas.
- Non-Patent Document 1 plasma of hydrogen gas is generated using a dielectric coupling type plasma processing apparatus.
- hydrogen radicals are generated.
- the resist mask is cured.
- ultraviolet rays are generated in the processing container of the plasma processing apparatus. This ultraviolet light selectively dissociates the CO bond of the side chain of the constituent material of the resist mask. The dissociation of the CO bond by the ultraviolet rays can cut the side chain of the constituent material of the resist mask and contribute to the improvement of the dimensional accuracy of the resist mask.
- the energy of plasma generated in the inductively coupled plasma processing apparatus for example, the electron temperature is high. Therefore, the CC bond of the main chain of the constituent material of the resist mask can be cut by the high energy plasma. As a result, if the resist mask is processed with hydrogen gas plasma generated in an inductively coupled plasma processing apparatus, it is considered that the dimensional variation of the resist mask increases.
- plasma of hydrogen gas is excited by microwaves.
- the energy of the plasma excited by the microwave is lower than the energy of the plasma excited in the inductively coupled plasma processing apparatus.
- the energy of the plasma excited in the inductively coupled plasma processing apparatus is from 1/4 to 1/5 energy. Therefore, in this method, the resist mask can be modified by hydrogen radicals, and the side chain can be cleaved by dissociating the CO bond of the side chain of the constituent material of the resist mask. It is possible to suppress bond breakage. As a result, according to this method, it is possible to reduce the dimensional variation of the resist mask.
- a fluorine-containing gas is supplied into a processing container containing a substrate to be processed, and the processing container is filled with the gas.
- the method may further include a step of supplying a microwave to generate a plasma of a gas containing fluorine.
- the gas containing fluorine may be, for example, CH 3 F gas. According to this embodiment, for example, a phenomenon in which a pattern extending in one direction, such as a line pattern, contracts in the extending direction can be suppressed.
- a method for reducing dimensional variation of a resist mask in a process for improving the etching resistance of the resist mask is provided.
- FIG. 2 is a plan view showing an example of a slot plate shown in FIG. 1. It is a figure for demonstrating the principle of process S2. It is a figure for demonstrating the principle of process S3. It is a figure which shows an example of the structure of the constituent material of a resist mask. It is a figure for demonstrating process S4. It is a figure for demonstrating the calculation method of LWR and LER. It is a figure for demonstrating the derivation
- FIG. 1 is a flowchart showing a resist mask processing method according to an embodiment.
- a substrate to be processed W is prepared in step S1.
- FIG. 2 is a cross-sectional view showing an example of a substrate to be processed.
- the substrate to be processed W includes an etching target layer EL provided on the substrate Sub.
- the layer to be etched EL is, for example, a polycrystalline silicon layer.
- the stacked body ML includes a first layer ML1, a second layer ML2, and a third layer ML3.
- the first layer ML1 is provided on the etched layer EL, and in this example, has a multilayer structure including three layers ML11, ML12, and ML13. These layers ML11, ML12, and ML13 may be a SiO 2 layer, a SiN layer, and a SiO 2 layer, respectively.
- the second layer ML2 is provided on the first layer ML1, and may be, for example, an SOH layer.
- the third layer ML3 is provided on the second layer ML2, and may be, for example, a SiON layer.
- a resist mask RM used for etching the stacked body ML is provided on the stacked body ML.
- the resist mask RM has, for example, a plurality of lines RL provided so that the space RS is interposed. Such patterning of the resist mask RM is performed by using a lithography technique.
- step S1 a substrate W to be processed on which a patterned resist mask RM is provided is accommodated in a processing container of a plasma processing apparatus.
- step S3 the resist mask RM is processed by plasma of a gas containing hydrogen excited by microwaves. Details of step S3 will be described later.
- the resist mask processing method may further include a step S2 between the step S1 and the step S3.
- the resist mask RM can be processed with plasma of a gas containing fluorine. Details of this step S2 will be described later.
- step S4 the hard mask M is formed on the etching target layer EL by etching the stacked body ML along the resist mask RM processed in the steps S2 and S3.
- the etched layer EL can be etched along the hard mask M.
- FIG. 3 is a cross-sectional view schematically showing a plasma processing apparatus according to an embodiment.
- the plasma processing apparatus 10 illustrated in FIG. 3 includes a processing container 12.
- the processing container 12 defines a processing space S for accommodating the substrate to be processed W.
- the processing container 12 may include a side wall 12a, a bottom portion 12b, and a top portion 12c.
- the side wall 12a has a substantially cylindrical shape extending in a direction in which the axis AZ extends (hereinafter referred to as “axis AZ direction”).
- the bottom 12b is provided on the lower end side of the side wall 12a.
- the bottom 12b is provided with an exhaust hole 12h for exhaust.
- the upper end of the side wall 12a is open.
- the upper end opening of the side wall 12 a is closed by a dielectric window 18.
- the dielectric window 18 is sandwiched between the upper end portion of the side wall 12a and the top portion 12c.
- a sealing member 26 may be interposed between the dielectric window 18 and the upper end of the side wall 12a.
- the sealing member 26 is, for example, an O-ring, and contributes to sealing the processing container 12.
- the plasma processing apparatus 10 further includes a stage 20 provided in the processing container 12.
- the stage 20 is provided below the dielectric window 18.
- the stage 20 includes a table 20a and an electrostatic chuck 20b.
- the base 20a is supported by a cylindrical support 46.
- the cylindrical support portion 46 is made of an insulating material and extends vertically upward from the bottom portion 12b.
- a conductive cylindrical support 48 is provided on the outer periphery of the cylindrical support 46.
- the cylindrical support portion 48 extends vertically upward from the bottom portion 12 b of the processing container 12 along the outer periphery of the cylindrical support portion 46.
- An annular exhaust path 50 is formed between the cylindrical support portion 48 and the side wall 12a.
- An annular baffle plate 52 provided with a plurality of through holes is attached to the upper part of the exhaust passage 50.
- the exhaust passage 50 is connected to an exhaust pipe 54 that provides an exhaust hole 12h, and an exhaust device 56b is connected to the exhaust pipe 54 via a pressure regulator 56a.
- the exhaust device 56b has a vacuum pump such as a turbo molecular pump.
- the pressure adjuster 56a adjusts the pressure in the processing container 12 by adjusting the exhaust amount of the exhaust device 56b.
- the pressure regulator 56a and the exhaust device 56b can reduce the processing space S in the processing container 12 to a desired vacuum level. Further, the processing gas can be exhausted from the outer periphery of the stage 20 via the exhaust path 50 by operating the exhaust device 56b.
- the stand 20a also serves as a high-frequency electrode.
- a high frequency power source 58 for RF bias is electrically connected to the table 20a via a matching unit 60 and a power feeding rod 62.
- the high frequency power supply 58 outputs a predetermined frequency suitable for controlling the energy of ions drawn into the substrate W to be processed, for example, high frequency power of 13.65 MHz at a predetermined power.
- the matching unit 60 accommodates a matching unit for matching between the impedance on the high-frequency power source 58 side and the impedance on the load side such as electrodes, plasma, and the processing container 12.
- This matching unit includes a blocking capacitor for generating a self-bias.
- An electrostatic chuck 20b is provided on the upper surface of the table 20a.
- the upper surface of the electrostatic chuck 20b constitutes a placement area for placing the substrate W to be processed.
- the electrostatic chuck 20b holds the substrate to be processed W with an electrostatic attraction force.
- a focus ring F surrounding the substrate to be processed W in an annular shape is provided on the outer side in the radial direction of the electrostatic chuck 20b.
- the electrostatic chuck 20b includes an electrode 20d, an insulating film 20e, and an insulating film 20f.
- the electrode 20d is made of a conductive film, and is provided between the insulating film 20e and the insulating film 20f.
- a high-voltage DC power supply 64 is electrically connected to the electrode 20 d via a switch 66 and a covered wire 68.
- the electrostatic chuck 20b can attract and hold the substrate W to be processed on its upper surface by a Coulomb force generated by a DC voltage applied from the DC power source 64.
- An annular refrigerant chamber 20g extending in the circumferential direction is provided inside the table 20a.
- a refrigerant having a predetermined temperature for example, cooling water
- the processing temperature of the substrate W to be processed on the electrostatic chuck 20b can be controlled by the temperature of the refrigerant.
- a heat transfer gas from the heat transfer gas supply unit for example, He gas, is supplied between the upper surface of the electrostatic chuck 20 b and the back surface of the substrate W to be processed via the gas supply pipe 74.
- the plasma processing apparatus 10 may further include heaters HT, HS, HCS, and HES as a temperature control mechanism.
- the heater HT is provided in the top portion 12 c and extends in a ring shape so as to surround the antenna 14.
- the heater HS is provided in the side wall 12a and extends in an annular shape.
- the heater HS may be provided at a position corresponding to the middle of the processing space S in the height direction (that is, the axis AZ direction), for example.
- the heater HCS is provided in the table 20a.
- the heater HCS is provided in the base 20a below the central portion of the mounting area described above, that is, in an area crossing the axis AZ.
- the heater HES is provided in the table 20a, and extends in an annular shape so as to surround the heater HCS.
- the heater HES is provided below the outer edge portion of the mounting area described above.
- the plasma processing apparatus 10 may further include an antenna 14, a coaxial waveguide 16, a dielectric window 18, a microwave generator 28, a tuner 30, a waveguide 32, and a mode converter 34.
- the microwave generator 28 generates a microwave having a frequency of 2.45 GHz, for example.
- the microwave generator 28 is connected to the upper portion of the coaxial waveguide 16 via a tuner 30, a waveguide 32, and a mode converter 34.
- the coaxial waveguide 16 extends along the axis AZ that is the central axis thereof.
- the coaxial waveguide 16 includes an outer conductor 16a and an inner conductor 16b.
- the outer conductor 16a has a cylindrical shape extending in the axis AZ direction.
- the lower end of the outer conductor 16a can be electrically connected to the top of the cooling jacket 36 having a conductive surface.
- the inner conductor 16b is provided inside the outer conductor 16a.
- the inner conductor 16b has a cylindrical shape extending along the axis AZ.
- the lower end of the inner conductor 16 b is connected to the slot plate 40 of the antenna 14.
- the antenna 14 may be disposed in an opening formed in the top portion 12c.
- the antenna 14 includes a dielectric plate 38 and a slot plate 40.
- the dielectric plate 38 shortens the wavelength of the microwave and has a substantially disc shape.
- the dielectric plate 38 is made of, for example, quartz or alumina.
- the dielectric plate 38 is sandwiched between the slot plate 40 and the lower surface of the cooling jacket 36.
- the antenna 14 can thus be constituted by the dielectric plate 38, the slot plate 40, and the lower surface of the cooling jacket 36.
- the slot plate 40 is a substantially disc-shaped metal plate in which a plurality of slot pairs are formed.
- the antenna 14 may be a radial line slot antenna.
- FIG. 4 is a plan view showing an example of the slot plate.
- the slot plate 40 is formed with a plurality of slot pairs 40a.
- the plurality of slot pairs 40a are provided at predetermined intervals in the radial direction, and are arranged at predetermined intervals in the circumferential direction.
- Each of the plurality of slot pairs 40a includes two slot holes 40b and 40c.
- the slot hole 40b and the slot hole 40c extend in a direction intersecting or orthogonal to each other.
- the microwave generated by the microwave generator 28 is propagated to the dielectric plate 38 through the coaxial waveguide 16, and given to the dielectric window 18 from the slot hole of the slot plate 40. .
- the dielectric window 18 has a substantially disk shape, and is made of, for example, quartz or alumina.
- the dielectric window 18 is provided immediately below the slot plate 40.
- the dielectric window 18 transmits the microwave received from the antenna 14 and introduces the microwave into the processing space S. As a result, an electric field is generated immediately below the dielectric window 18, and plasma is generated in the processing space.
- it is possible to generate plasma using microwaves without applying a magnetic field.
- the lower surface of the dielectric window 18 may define a recess 18a.
- the recess 18a is provided in an annular shape around the axis AZ and has a tapered shape.
- the recess 18a is provided to promote the generation of a standing wave by the introduced microwave, and can contribute to efficiently generating plasma by the microwave.
- the plasma processing apparatus 10 further includes a central introduction unit 22, a peripheral introduction unit 24, and a gas supply unit GS.
- the central introduction part 22 injects the gas toward the substrate W to be processed along the axis AZ.
- the central introduction part 22 includes a conduit 22a and an injector 22b.
- the conduit 22 a is passed through the inner hole of the inner conductor 16 b of the coaxial waveguide 16. Further, the conduit 22a extends to a space where the dielectric window 18 is defined along the axis AZ. In the space defined by the dielectric window 18, a hole 18 h is continuous, and the hole 18 h opens toward the processing space S.
- An injector 22b is provided in the space defined by the dielectric window 18.
- the injector 22b is provided with a plurality of through holes extending in the direction of the axis AZ.
- the central introduction portion 22 having such a configuration supplies gas to the injector 22b through the conduit 22a, and injects gas into the processing space S through the hole 18h from the injector 22b.
- the peripheral introduction part 24 includes an annular pipe 24a and a pipe 24b.
- the annular tube 24a is provided in the processing container 12 so as to extend annularly about the axis AZ at an intermediate position in the axis AZ direction of the processing space S.
- the annular tube 24a is formed with a plurality of gas injection holes 24h that open toward the axis AZ.
- the plurality of gas injection holes 24h are arranged in an annular shape about the axis AZ.
- a pipe 24b is connected to the annular pipe 24a, and the pipe 24b extends to the outside of the processing container 12.
- the peripheral introduction portion 24 introduces the processing gas into the processing space S toward the axis AZ through the pipe 24b, the annular pipe 24a, and the gas injection hole 24h.
- a gas supply unit GS is connected to the central introduction unit 22 and the peripheral introduction unit 24 via a flow splitter FS.
- the flow splitter FS distributes the gas supplied from the gas supply unit GS to the central introduction unit 22 and the peripheral introduction unit 24 at a distribution ratio set by a control unit described later.
- the gas supply unit GS includes gas sources G10, G12, G14, G16, G18, and G20.
- the gas sources G10, G12, G14, G16, G18, and G20 are gas sources of CH 3 F gas, H 2 gas, Ar gas, CF 4 gas, HBr gas, and O 2 gas, respectively.
- These gas sources G10, G12, G14, G16, G18, and G20 are gas sources configured to be capable of controlling the flow rate, and may include an on-off valve and a mass controller.
- the plasma processing apparatus 10 may further include a control unit Cont.
- the control unit Cont may be a controller such as a programmable computer device.
- the control unit Cont sends a control signal to the gas supply unit GS to control the flow rate of gas from each of the gas sources G10, G12, G14, G16, G18, and G20 and the supply / supply stop of the gas. it can.
- the control unit Cont can send a control signal to the flow splitter FS to control the gas distribution ratio with respect to the central introduction unit 22 and the peripheral introduction unit 24.
- the control unit Cont controls the microwave generator 28, the high frequency power supply 58, and the pressure regulator 56a so as to control the microwave power, the RF bias power and ON / OFF, and the pressure in the processing container 12.
- a signal may be provided.
- the plasma processing apparatus 10 may include another gas supply unit similar to the gas supply unit GS, and may have a configuration in which these gas supply units are connected to the central introduction unit 22 and the peripheral introduction unit 24, respectively. Good.
- step S ⁇ b> 1 the substrate W to be processed on which the patterned resist mask RM is provided is accommodated in the processing container 12 and placed on the stage 20.
- the substrate to be processed W is adsorbed by the electrostatic chuck 20b.
- step S2 in the processing container 12 of the plasma processing apparatus 10, plasma of a gas containing fluorine is excited and the resist mask RM is processed with the plasma.
- step S ⁇ b> 2 a gas containing fluorine is supplied into the processing container 12, and a microwave is supplied from the antenna 14 into the processing container 12. Therefore, in step S2, the gas is supplied to the gas source G10 into the processing container 12 and the microwave is generated in the microwave generator 28 under the control of the control unit Cont.
- the gas source G10 is a gas source of CH 3 F gas, but may be a gas source that supplies other fluorocarbon-based gas.
- FIG. 5 is a diagram for explaining the principle of step S2.
- step S2 plasma of a gas containing fluorine is excited in the processing container 12, and fluorine active species such as fluorine radicals or fluorine ions are generated.
- “F” surrounded by a circle indicates an active species of fluorine.
- the resist mask RM is modified by the active species of fluorine, or a fluorine compound is deposited on the surface of the resist mask RM as a deposit DP. By this step S2, it is possible to prevent the resist mask RM from shrinking until after the hard mask M described later is formed.
- step S3 the resist mask RM is processed with plasma of a gas containing hydrogen excited by microwaves.
- step S ⁇ b> 3 a gas containing hydrogen is supplied to the processing container 12, and a microwave is supplied from the antenna 14 into the processing container 12.
- an inert gas may be supplied into the processing container.
- gas is supplied into processing container 12 by gas source G12 and gas source G14 by control by control part Cont, and a microwave is generated in microwave generator 28.
- HBr gas may be supplied to the gas source G18 instead of supplying the H 2 gas from the gas source G12.
- FIG. 6 is a diagram for explaining the principle of step S3.
- the plasma of the gas containing hydrogen is excited in the processing container 12 to generate hydrogen radicals.
- “H” surrounded by a circle indicates a hydrogen radical.
- the hydrogen radicals are adsorbed on the resist mask RM and react with the resist mask RM, whereby the resist mask RM is modified. As a result, the resist mask RM is cured.
- ultraviolet rays are generated in the processing container 12 by exciting the plasma of the gas containing hydrogen. This ultraviolet light dissociates the CO bond in the side chain of the constituent material of the resist mask, and the side chain of the constituent material is cut.
- FIG. 7 shows an example of the structure of the constituent material of the resist mask.
- x, y and z are integers of 1 or more.
- the resist mask RM may be made from a resist material that is exposed by an ArF excimer laser.
- its main chain in such a resist material, its main chain (indicated by reference numeral MC in FIG. 7) generally contains a CC bond, and its side chain (see FIG. 7).
- FIG. 1) includes a C—O bond.
- the ultraviolet rays generated in the processing container 12 selectively dissociate the CO bond in the side chain and cleave the side chain.
- the CO bond of the side chain is dissociated and the side chain is cut.
- the edge of the line RL of the resist mask RM becomes smooth and has a more linear shape. Therefore, the line width variation in the line RL and the edge linearity are improved.
- step S3 plasma of hydrogen gas is excited in the processing chamber 12 by microwaves.
- the energy of the plasma excited by the microwave is considerably lower than the energy of the plasma excited by the inductively coupled or parallel plate type plasma processing apparatus.
- the energy of the plasma excited by the microwave is about 1/4 to 1/5 of the energy of the plasma excited by the inductively coupled plasma processing apparatus. Since such low energy plasma is used, in step S3, the break of the CC bond of the main chain of the constituent material of the resist mask RM is suppressed. As a result, variation in the dimensions of the resist mask RM is suppressed.
- step S4 in step S4 following step S3, the stacked body ML is etched along the resist mask RM.
- FIG. FIG. 8 is a diagram for explaining the step S4.
- the third layer ML3 is etched.
- the control unit Cont controls the gas source G10 and the gas source G16 to supply gas into the processing container 12, and the antenna 14 generates microwaves.
- a microwave is generated in the microwave generator 28 for supply into the processing container 12.
- step S4 the second layer ML2 is etched.
- the control unit Cont controls the gas source G14, the gas source G18, and the gas source G20 to supply gas into the processing container 12, and from the antenna 14 to the microwave.
- the control unit Cont controls the gas source G14, the gas source G18, and the gas source G20 to supply gas into the processing container 12, and from the antenna 14 to the microwave.
- microwaves in the processing vessel 12. plasma of HBr gas, O 2 gas, and Ar gas is generated, and the active species of Br mainly etch the second layer ML 2 along the resist mask RM.
- a mask portion M2 constituting a part of the hard mask M is formed from the second layer ML2.
- step S4 the first layer ML1 is etched.
- the gas source G10 and the gas source G16 supply gas into the processing container 12 under the control of the control unit Cont, and In order to supply the microwave from the antenna 14 into the processing container 12, the microwave is generated in the microwave generator 28.
- plasma of CH 3 F gas and CF 4 gas that is, fluorocarbon-based gas is generated, and the active species of fluorine etch the first layer ML1 along the resist mask RM.
- a mask portion M1 constituting a part of the hard mask M is formed from the first layer ML1.
- step S4 a hard mask M is formed as shown in FIG.
- the resist mask RM may be removed, and then the etching target layer EL may be etched along the hard mask M.
- the layer to be etched EL is a polycrystalline silicon layer
- the layer to be etched EL can be etched in the plasma processing apparatus 10 by plasma of HBr gas.
- Experimental Examples 1 and 2 of a resist mask processing method using the plasma processing apparatus 10 according to an embodiment will be described.
- steps S1, S3, and S4 were performed. That is, in Experimental Example 1, the stacked body ML was etched after modifying the resist mask RM.
- Steps S1 to S4 that is, Step S2 of treating the resist mask RM with plasma of a gas containing fluorine was performed in addition to the steps of Experimental Example 1.
- the following target substrate W was prepared as the target substrate W.
- ⁇ Substrate W> -Layer to be etched EL Polycrystalline silicon layer (60 nm thick)
- First layer ML1 Three-layer structure of SiO 2 layer (8 nm thickness), SiN layer (40 nm thickness), SiO 2 layer (21 nm thickness)
- Second layer ML2 SOH layer (120 nm thickness)
- Third layer ML3 SiON layer (23 nm thick)
- a resist FiARF-E15B manufactured by FUJIFILM Electronics Materials Co., Ltd. was used as the resist material, and the resist material was applied to the substrate W to be processed with a thickness of 85 nm.
- a PAB (Pre Applied Bake) process at 100 ° C. for 45 seconds was performed before the exposure process.
- PEB (Post Exposure Bake) treatment at 95 ° C. for 45 seconds was performed.
- the substrate to be processed W having the resist mask RM thereon was prepared by developing the resist.
- the resist mask RM was created so as to have a line and space pattern.
- the resist mask RM has a design value of a plurality of lines RL having a line width DW (see FIG. 2) of 54 nm in width in the line width direction (X direction in FIG. 2). It is assumed that they are arranged across a space RS having a width DS (see FIG. 2). Further, the resist mask RM was formed so that the two lines RL had a pattern in which the lines RL were separated from each other on the same straight line (see FIG. 10).
- Step S2 was performed only in Experimental Example 2.
- Step S3 was performed for both Experimental Examples 1 and 2.
- Step S4 was performed for both Experimental Examples 1 and 2.
- an SEM photograph of the resist mask RM is taken, and using the SEM photograph, the width of the space RS, the LWR (Line Width Roughness) of the line RL, and the LER (Line Edge Roughness). ) was calculated.
- LWR is an index that represents the variation in line width in the line RL
- LER is an index that represents the variation in position of the edge in the line width direction in the line RL.
- three line widths LW i in one line RL are set to 11 in the longitudinal direction (Y direction) of the line RL as shown in FIG. Measurements were taken at ⁇ 12 nm intervals.
- LWR was obtained by calculating 3 ⁇ of the obtained line width LW i .
- the three position x i in one of the edges in the line RL line width direction (X-direction), longitudinal direction (Y direction) in the 11 ⁇ of the line RL Measurements were taken at 12 nm intervals. By calculating the 3 ⁇ of the resulting position x i, determine the LER. Furthermore, as shown in FIG. 10, the distance LS between the ends of two lines RL aligned on a straight line was obtained.
- the width of the space RS between the lines in the resist mask line width direction was the same value in any of the initial state, Experimental Example 1, and Experimental Example 2. That is, it was confirmed that the width of the space RS between the lines in the line width direction did not change by the steps S2, S3, and S4.
- Experimental Example 1 it was confirmed that LWR and LER were considerably smaller than those in the initial state by performing Step S3, and were smaller than 2 nm. That is, it was confirmed that the dimensional variation of the resist mask RM is reduced by the step S3.
- the distance LS between the end portions of the line is smaller than the distance LS of Experimental Example 1, and is substantially the same as the distance LS in the initial state.
- step S2 can suppress shrinkage in the longitudinal direction of the resist mask line. Moreover, since LWR and LER of Experimental Example 1 and Experimental Example 2 have substantially equal values, it was also confirmed that Step S2 does not affect LWR and LER.
- DESCRIPTION OF SYMBOLS 10 Plasma processing apparatus, 12 ... Processing container, 14 ... Antenna, 16 ... Coaxial waveguide, 18 ... Dielectric window, 20 ... Stage, 22 center introduction part, 24 ... Periphery introduction part, 28 ... Microwave generator, 38 ... Dielectric plate, 40 ... Slot plate, 58 ... High frequency power supply, 60 ... Matching unit, Cont ... Control unit, GS ... Gas supply unit, G10 to G20 ... Gas source, M ... Hard mask, M ... Hard mask, ML ... Laminated body, ML11 ... first layer, ML12 ... second layer, ML13 ... third layer, RM ... resist mask, EL ... etched layer, W ... substrate to be treated.
Abstract
Description
<被処理基体W>
・被エッチング層EL: 多結晶シリコン層(60nm厚)
・第1層ML1: SiO2層(8nm厚)、SiN層(40nm厚)、SiO2層(21nm厚)の3層構造
・第2層ML2: SOH層(120nm厚)
・第3層ML3: SiON層(23nm厚)
<工程S2の処理条件>
・処理ガス:CH3Fガス(流量58sccm)
・処理容器内圧力:50mT(6.6Pa)
・マイクロ波のパワー:2500W
・RFバイアス電力のパワー:300W
・RFバイアス電力の周波数:13.56MHz
・中央導入部流量:周辺導入部の流量=5:95
<工程S3の処理条件>
・処理ガス:Arガス(流量200sccm)、H2ガス(流量200sccm)
・処理容器内圧力:100mT(13.3Pa)
・マイクロ波のパワー:3000W
・RFバイアス電力のパワー:0W
・RFバイアス電力の周波数:13.56MHz
・中央導入部流量:周辺導入部の流量=5:95
<工程S4の処理条件>
(1)第3層ML3の処理条件
・処理ガス:CF4ガス(流量150sccm)、CH3Fガス(流量170sccm)
・処理容器内圧力:80mT(10.6Pa)
・マイクロ波のパワー:2000W
・RFバイアス電力のパワー:300W
・RFバイアス電力の周波数:13.56MHz
・中央導入部流量:周辺導入部の流量=5:95
(2)第2層ML2の処理条件
・処理ガス:Arガス(流量1000sccm)、HBrガス(流量450sccm)、O2ガス(流量60sccm)
・処理容器内圧力:100mT(13.3Pa)
・マイクロ波のパワー:2500W
・RFバイアス電力のパワー:150W
・RFバイアス電力の周波数:13.56MHz
・中央導入部流量:周辺導入部の流量=5:95
(3)第1層ML1の処理条件
・処理ガス:CF4ガス(流量190sccm)、CH3Fガス(流量170sccm)
・処理容器内圧力:80mT(10.6Pa)
・マイクロ波のパワー:2500W
・RFバイアス電力のパワー:300W
・RFバイアス電力の周波数:13.56MHz
・中央導入部流量:周辺導入部の流量=5:95
Claims (6)
- レジストマスクを処理する方法であって、
処理容器内において、パターニングされたレジストマスクがその上に設けられた被処理基体を準備する工程と、
前記処理容器内に水素を含有するガスを供給し、該処理容器内にマイクロ波を供給して、該水素を含有するガスのプラズマを生成する工程と、
を含む方法。 - 前記水素を含有するガスのプラズマを生成する前記工程の前に、前記被処理基体を収容した前記処理容器内にフッ素を含有するガスを供給し、該処理容器内にマイクロ波を供給して、フッ素を含有するガスのプラズマを生成する工程を更に含む、請求項1に記載の方法。
- 前記フッ素を含有するガスは、CH3Fガスである、請求項2に記載の方法。
- 前記フッ素を含有するガスのプラズマを生成する前記工程は、前記レジストマスクのラインの長手方向における縮みを抑制する、請求項2又は3に記載の方法。
- 前記水素を含有するガスは、H2ガスである、請求項1~4の何れか一項に記載の方法。
- 前記マイクロ波によって励起される前記水素を含有するガスの前記プラズマは、前記レジストマスクの構成材料の主鎖におけるC-C結合の切断を抑制するよう、前記レジストマスクの構成材料の側鎖を切断する、請求項1~5の何れか一項に記載の方法。
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WO2019123842A1 (ja) | 2017-12-22 | 2019-06-27 | 富士フイルム株式会社 | 感活性光線性又は感放射線性樹脂組成物、レジスト膜、パターン形成方法、レジスト膜付きマスクブランクス、フォトマスクの製造方法、電子デバイスの製造方法 |
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Also Published As
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TW201413401A (zh) | 2014-04-01 |
KR20150023288A (ko) | 2015-03-05 |
US9337020B2 (en) | 2016-05-10 |
TWI594087B (zh) | 2017-08-01 |
KR101808380B1 (ko) | 2017-12-12 |
JP2014007281A (ja) | 2014-01-16 |
JP6008608B2 (ja) | 2016-10-19 |
US20150104957A1 (en) | 2015-04-16 |
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