WO2014000372A1 - 阵列基板及显示装置 - Google Patents

阵列基板及显示装置 Download PDF

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Publication number
WO2014000372A1
WO2014000372A1 PCT/CN2012/085372 CN2012085372W WO2014000372A1 WO 2014000372 A1 WO2014000372 A1 WO 2014000372A1 CN 2012085372 W CN2012085372 W CN 2012085372W WO 2014000372 A1 WO2014000372 A1 WO 2014000372A1
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array substrate
pixel units
substrate according
pixel
data lines
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PCT/CN2012/085372
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English (en)
French (fr)
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李成
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北京京东方光电科技有限公司
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Publication of WO2014000372A1 publication Critical patent/WO2014000372A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells

Definitions

  • Embodiments of the present invention relate to an array substrate and a display device including the array substrate. Background technique
  • Advanced Super Dimension Switch which forms a multi-dimensional electric field by the electric field generated by the edge of the slit electrode in the same plane and the electric field generated between the slit electrode layer and the plate electrode layer, so that the inside of the liquid crystal cell All the aligned liquid crystal molecules between the slit electrodes and directly above the electrodes can be rotated, thereby improving the liquid crystal working efficiency and increasing the light transmission efficiency.
  • Advanced super-dimensional field switching technology improves the picture quality of TFT-LCD (Thin Film Field Effect Transistor Liquid Crystal Display) with high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, no extrusion Advantages such as water ripple (push Mura).
  • ADS type display devices usually adopt a single-domain pixel structure.
  • the single-domain pixel structure can improve the viewing angle of the liquid crystal display, color shift phenomenon still occurs at an individual angle, which lowers the display characteristics of the liquid crystal display. Summary of the invention
  • an array is provided.
  • the array substrate includes a plurality of gate lines and a plurality of data lines, the gate lines and the data lines crossing each other to define a plurality of pixel units arranged in a matrix form, each of the pixel units including a thin film transistor and having a dual domain structure, the array substrate It is a Z reverse type array substrate.
  • a display device includes the array substrate as described above.
  • the uniformity of the screen display is effectively improved, so that the display characteristics of the display device can be remarkably improved, and the display characteristics are remarkably lowered.
  • the power consumption by arranging the TFT of the pixel unit at an obtuse angle formed by the intersection of the gate line and the data line, the design can be more convenient and flexible, and the design accuracy and convenience are improved.
  • FIG. 1 is a schematic structural view of an array substrate according to an embodiment of the invention. detailed description
  • the TFTs of the respective pixels are arranged on the same side of the corresponding data lines.
  • dot inversion it is necessary to change the polarity of the signal on the data line, and it is necessary to perform polarity inversion for each line of scanning. Therefore, when the liquid crystal display operates, the signal on the data line undergoes a high-frequency polarity inversion. Since the panel power consumption of the liquid crystal display is proportional to the frequency of the polarity inversion, the power consumption of this inversion method is large.
  • Z inversion is a technical solution for realizing dot inversion by transforming the connection relationship between the TFT and the data line.
  • the data lines connected to the TFTs in any two adjacent pixel units in the column direction are opposed to each other (for example, see Chinese Patent Application No. CN200410075861.2).
  • the Z-reverse display is in operation, the signal on the data line only needs to be reversed once per frame, and the corresponding dot inversion can be realized. Since the polarity inversion is performed once per frame, the inversion frequency of the signal on the data line is lowered, and the power consumption is remarkably lowered.
  • Embodiments of the present invention provide an array substrate in which dual domains are combined with Z inversion.
  • the array substrate includes a plurality of gate lines and a plurality of data lines. These gate lines and data lines cross each other to define a plurality of pixel cells arranged in a matrix form.
  • Each of the pixel units includes a thin film transistor and a pixel electrode and has a dual domain structure.
  • the array substrate operates in a Z reversed manner.
  • any two pixel sheets adjacent in the column direction can be opposed to each other to achieve Z inversion.
  • the structure of the pixel cells in each row may be the same, and the structure of any adjacent two pixel cells in each column may be mirror-symmetrical with respect to the column direction.
  • the TFT of each pixel unit may be disposed at an obtuse angle position where the gate lines and the data lines intersect.
  • the connection of the data lines may be set to have continuity, that is, after the data lines of the two pixel units are extended. Can be coincident, the purpose of this is to try to ensure the continuity of the pixel data line.
  • FIG. 1 is a schematic structural view of an array substrate according to an embodiment of the invention.
  • the array substrate 1 includes a plurality of gate lines 12 and a plurality of data lines 11.
  • the gate line 12 extends in the row direction (i.e., the lateral direction) in the drawing.
  • the data line 11 extends in the column direction (i.e., the longitudinal direction) in the drawing.
  • These gate lines 12 and data lines 11 cross each other to define a plurality of pixel units arranged in a matrix.
  • Each of the pixel units includes a thin film transistor and a pixel electrode (not shown).
  • Each pixel unit has a dual domain structure.
  • the array substrate 1 is operated in a Z reversed manner.
  • the data lines connected to the TFTs in any two pixel units adjacent in the column direction are opposed to each other to realize Z inversion.
  • one row of pixel cells has a structure of " ⁇ ", and the other row of pixel cells has a structure of ">".
  • the TFT of each pixel unit is arranged at an obtuse angle formed by the intersection of the gate line and the data line.
  • the structure of the pixel cells in each row is the same, and the structure of any two adjacent pixel cells in each column is mirror-symmetrical with respect to the column direction.
  • the data lines of each pixel unit maintain the same ⁇ " type or ">” type structure as the pixel unit, and have continuity with the data lines of adjacent pixel units in the same column.
  • the line and the pixel unit have the same structure, which can effectively ensure the aperture ratio of the pixel. This is because if the pixel is " ⁇ " type and the data line is a straight line, the effective display area becomes small.
  • the gate lines of each row of pixel units are straight lines.
  • the TFT of the pixel unit when the TFT of the pixel unit is disposed at an obtuse angle formed by the intersection of the gate line and the data line, the design can be more convenient and flexible. However, in practical applications, the TFT of the pixel unit may also be arranged at an acute angle formed by the intersection of the gate line and the data line. Location.
  • the array substrate structure of the embodiment of the present invention may be changed according to actual conditions.
  • the data line of each pixel unit may not have the same ⁇ ,, type or " ⁇ " type structure as the pixel unit, and use a straight line or other shape.
  • the gate line of each row of pixel units can be a broken line.
  • the embodiments of the present invention are not limited thereto.
  • Embodiments of the present invention also provide a display device including the above array substrate.
  • the display device may be a liquid crystal display device, an organic light emitting diode display device, or other display device.
  • the uniformity of the screen display is effectively improved, so that the display characteristics of the display device can be remarkably improved, and the display characteristics are remarkably lowered.
  • the power consumption by arranging the TFT of the pixel unit at an obtuse angle formed by the intersection of the gate line and the data line, the design can be more convenient and flexible, and the design accuracy and convenience are improved.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

提供了阵列基板（1）和显示装置。该阵列基板（1）包括多条栅线（12）和多条数据线（11），栅线（12）和数据线（11）彼此交叉限定出以矩阵形式排列的多个像素单元，每个像素单元包括薄膜晶体管且具有双畴结构，该阵列基板（1）为Z反转型阵列基板。

Description

阵列基板及显示装置 技术领域
本发明的实施例涉及一种阵列基板及包含该阵列基板的显示装置。 背景技术
高级超维场转换技术（Advanced Super Dimension Switch, ADS ) , 通过 同一平面内的狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产 生的电场形成多维电场， 使液晶盒内狭缝电极间、 电极正上方所有取向液晶 分子都能够产生旋转， 从而提高了液晶工作效率并增大了透光效率。 高级超 维场开关技术可以提高 TFT-LCD (薄膜场效应晶体管液晶显示器）的画面品 质， 具有高分辨率、 高透过率、 低功耗、 宽视角、 高开口率、 低色差、 无挤 压水波紋（push Mura )等优点。
目前， ADS型的显示装置通常釆用单畴像素结构， 单畴像素结构虽然能 改善液晶显示器的视角， 但是在个别角度上， 仍然会出现色偏现象， 这降低 了液晶显示器的显示特性。 发明内容
根据本发明的一个实施例， 提供一种阵列。 该阵列基板包括多条栅线和 多条数据线， 这些栅线和数据线彼此交叉限定出以矩阵形式排列的多个像素 单元， 每个像素单元包括薄膜晶体管且具有双畴结构， 该阵列基板为 Z反转 型的阵列基板。
根据本发明的另一个实施例， 提供一种显示装置。 该显示装置包括如上 所述的阵列基板。
在根据本发明实施例的阵列基板和显示装置中， 通过将双畴像素结构与 Z反转结构相结合， 有效改善了画面显示的均一性， 因而能够显著提升显示 装置的显示特性， 并且显著降低了功耗。 另外， 通过将像素单元的 TFT布置 在栅线和数据线交叉所形成的钝角位置处， 能够使设计更加方便灵活， 提高 了设计的准确度和便利性。 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1为根据本发明实施例的阵列基板的结构示意图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图，对本发明实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。
传统技术中， 各像素的 TFT都会布置在相应数据线的同一侧。 进行点 反转时， 需要通过变换数据线上的信号的极性来实现， 而且是每行扫描时都 要进行极性反转。 因此， 在液晶显示器工作时， 数据线上的信号进行着高频 率的极性反转。 由于液晶显示器的面板功耗跟极性反转的频率成正比， 因此 这种反转方式的功耗较大。
基于以上情况， 可以应用 Z反转 ( Z-inversion Design ) 的方式。 Z反转 是一种通过变换 TFT与数据线的连接关系来实现点反转的技术方案。 例如， 在 Z反转的阵列基板中，在列方向上相邻的任意两个像素单元中的 TFT所连 接的数据线彼此相对（例如， 参见中国专利申请 CN200410075861.2 ) 。 Z反 转的显示器在工作时， 数据线上的信号只需要按照每一帧画面进行一次极性 反转， 即可实现相应的点反转。 由于是每帧进行一次极性反转， 所以数据线 上的信号的反转频率降低， 功耗显著降低。
本发明的实施例提供一种双畴与 Z反转相结合的阵列基板。 该阵列基板 包括多条栅线和多条数据线。 这些栅线和数据线彼此交叉限定出以矩阵形式 排列的多个像素单元。 每个像素单元包括薄膜晶体管和像素电极且具有双畴 结构。该阵列基板以 Z反转的方式操作。通过将双畴像素结构与 Z反转结合， 融合了双畴与 Z反转二者的优势， 可以同时改善画面均一性并降低功耗。
在根据本发明实施例的阵列基板中， 在列方向上相邻的任意两个像素单 元中的 TFT所连接的数据线可以彼此相对， 以实现 Z反转。
在根据本发明实施例的阵列基板中， 每一行中的像素单元的结构可以相 同，每一列中的任意相邻的两个像素单元的结构可以关于列方向成镜像对称。
在根据本发明实施例的阵列基板中， 为了便于布线， 可以将每个像素单 元的 TFT布置在栅线和数据线交叉所形成的钝角位置处。
在根据本发明实施例的阵列基板中， 为了保证显示装置的显示特性， 在 列方向的两个像素单元对接后， 可以设置数据线的连接具有连续性， 即两个 像素单元的数据线延长后可以重合， 这样做的目的是尽量保证像素数据线的 连续性。
图 1为根据本发明实施例的阵列基板的结构示意图。 如图 1所示， 该阵 列基板 1包括多条栅线 12和多条数据线 11。 栅线 12沿图中的行方向 （即， 横向方向）延伸。 数据线 11沿图中的列方向（即， 纵向方向）延伸。 这些栅 线 12和数据线 11彼此交叉限定出以矩阵形式排列的多个像素单元。 每个像 素单元包括薄膜晶体管和像素电极（未示出）。每个像素单元具有双畴结构。 该阵列基板 1以 Z反转的方式操作。
如图 1所示，在列方向上相邻的任意两个像素单元中的 TFT所连接的数 据线彼此相对， 以实现 Z反转。
如图 1所示， 在任意相邻的两行像素单元中， 其中一行像素单元的结构 为 "〈" 型， 另一行像素单元的结构为 "〉 " 型。 每个像素单元的 TFT布置 在栅线和数据线交叉所形成的钝角位置处。 由此， 每一行中的像素单元的结 构相同， 每一列中的任意相邻的两个像素单元的结构相对于列方向成镜像对 称。
如图 1所示， 每个像素单元的数据线与所述像素单元保持相同的 〈" 型 或 "〉 " 型结构， 且与同一列中相邻像素单元的数据线的连接具有连续性。 数据线与像素单元保持一致结构， 可以有效保证像素的开口率。 这是因为如 果像素为 "〉 " 型， 数据线为直线， 则会导致有效显示面积变小。
如图 1所示， 每一行像素单元的栅线为直线。
需要说明的是， 在上述的像素结构中， 将像素单元的 TFT布置在栅线和 数据线交叉所形成的钝角位置处时， 能够使设计更加方便灵活。 然而， 在实 际应用中，也可以将像素单元的 TFT布置在栅线和数据线交叉所形成的锐角 位置处。
需要说明的是， 本发明实施例的阵列基板结构可以根据实际情况进行变 化。 比如， 每一个像素单元的数据线可以不与该像素单元保持相同的 〈，， 型 或 "〉 " 型结构， 而釆用直线形或其他形状。 比如， 每一行像素单元的栅线 可以为折线。 本发明实施例并不对此进行限制。
本发明的实施例还提供一种显示装置， 其包括上述阵列基板。 所述显示 装置可以为液晶显示装置、 有机发光二极管显示装置或者其他显示装置。
在根据本发明实施例的阵列基板和显示装置中， 通过将双畴像素结构与 Z反转结构相结合， 有效改善了画面显示的均一性， 因而能够显著提升显示 装置的显示特性， 并且显著降低了功耗。 另外， 通过将像素单元的 TFT布置 在栅线和数据线交叉所形成的钝角位置处， 能够使设计更加方便灵活， 提高 了设计的准确度和便利性。
以上所述， 仅为本发明的较佳实施例而已， 并非用于限定本发明的保护 范围。

Claims

权利要求书
1、一种阵列基板， 其中该阵列基板包括多条栅线和多条数据线， 这些栅 线和数据线彼此交叉限定出以矩阵形式排列的多个像素单元， 每个像素单元 包括薄膜晶体管且具有双畴结构， 该阵列基板为 Z反转型的阵列基板。
2、根据权利要求 1所述的阵列基板， 其中在所述阵列基板中，每一行中 的像素单元的结构相同， 每一列中的任意相邻的两个像素单元的结构关于列 方向成镜像对称。
3、根据权利要求 1或 2所述的阵列基板，其中在列方向上相邻的任意两 个像素单元中的薄膜晶体管所连接的数据线彼此相对， 以实现 Z反转。
4、根据权利要求 1或 2所述的阵列基板，其中每个像素单元的薄膜晶体 管布置在栅线和数据线交叉所形成的钝角位置处。
5、根据权利要求 1或 2所述的阵列基板，其中同一列中相邻像素单元的 数据线的连接具有连续性。
6、根据权利要求 1或 2所述的阵列基板，其中在任意相邻的两行像素单 元中， 一行像素单元的结构为 "〈" 型， 另一行像素单元的结构为 "〉 " 型。
7、根据权利要求 6所述的阵列基板，其中每个像素单元的薄膜晶体管布 置在栅线和数据线交叉所形成的钝角位置处。
8、根据权利要求 6所述的阵列基板，其中每个像素单元的数据线与所述 像素单元保持相同的 〈" 型或 "〉 " 型结构， 且同一列中相邻像素单元的数 据线的连接具有连续性。
9、根据权利要求 6所述的阵列基板，其中每一行像素单元的栅线为直线。
10、 一种显示装置， 其中该显示装置包括权利要求 1至 9任一项所述的 阵列基板。
PCT/CN2012/085372 2012-06-28 2012-11-27 阵列基板及显示装置 WO2014000372A1 (zh)

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