WO2013156568A3 - Schaltungsanordnung zur thermisch leitfähigen chipmontage und herstellungsverfahren - Google Patents

Schaltungsanordnung zur thermisch leitfähigen chipmontage und herstellungsverfahren Download PDF

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Publication number
WO2013156568A3
WO2013156568A3 PCT/EP2013/058094 EP2013058094W WO2013156568A3 WO 2013156568 A3 WO2013156568 A3 WO 2013156568A3 EP 2013058094 W EP2013058094 W EP 2013058094W WO 2013156568 A3 WO2013156568 A3 WO 2013156568A3
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WIPO (PCT)
Prior art keywords
circuit arrangement
production method
thermally conductive
chip assembly
conductive chip
Prior art date
Application number
PCT/EP2013/058094
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English (en)
French (fr)
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WO2013156568A2 (de
Inventor
Robert Ziegler
Original Assignee
Rohde & Schwarz Gmbh & Co. Kg
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Publication date
Application filed by Rohde & Schwarz Gmbh & Co. Kg filed Critical Rohde & Schwarz Gmbh & Co. Kg
Publication of WO2013156568A2 publication Critical patent/WO2013156568A2/de
Publication of WO2013156568A3 publication Critical patent/WO2013156568A3/de

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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)

Abstract

Eine erfindungsgemäße Schaltungsanordnung weist ein Substrat (10), ein Verbindungselement (18) und einen Chip (16) auf. Das Substrat (10) weist auf seiner Oberfläche eine zumindest teilweise Metallisierung (11) auf. Das Verbindungselement (18) ist auf der Metallisierung (11) aufgebracht. Der Chip (16) ist auf dem Verbindungselement (18) aufgebracht. Das Verbindungselement (18) weist eine elektrisch nichtleitende Glasschicht (14), welche direkt auf der Metallisierung (11) aufgebracht ist, und eine Kleberschicht (15) zwischen dem Chip (16) und der Glasschicht (14) auf.
PCT/EP2013/058094 2012-04-18 2013-04-18 Schaltungsanordnung zur thermisch leitfähigen chipmontage und herstellungsverfahren WO2013156568A2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE102012206362.5 2012-04-18
DE102012206362.5A DE102012206362B4 (de) 2012-04-18 2012-04-18 Schaltungsanordnung zur thermisch leitfähigen Chipmontage und Herstellungsverfahren
US13/466,317 US9224666B2 (en) 2012-04-18 2012-05-08 Circuit arrangement for a thermally conductive chip assembly and a manufacturing method
US13/466,317 2012-05-08

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WO2013156568A3 true WO2013156568A3 (de) 2014-01-30

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US10130302B2 (en) * 2016-06-29 2018-11-20 International Business Machines Corporation Via and trench filling using injection molded soldering
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DE102012206362A1 (de) 2013-10-24
WO2013156568A2 (de) 2013-10-24
DE102012206362B4 (de) 2021-02-25
US9224666B2 (en) 2015-12-29

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