WO2013129260A1 - 表示装置およびその駆動方法 - Google Patents
表示装置およびその駆動方法 Download PDFInfo
- Publication number
- WO2013129260A1 WO2013129260A1 PCT/JP2013/054570 JP2013054570W WO2013129260A1 WO 2013129260 A1 WO2013129260 A1 WO 2013129260A1 JP 2013054570 W JP2013054570 W JP 2013054570W WO 2013129260 A1 WO2013129260 A1 WO 2013129260A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- frame
- image signal
- memory
- scanning
- display device
- Prior art date
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0294—Details of sampling or holding circuits arranged for use in a driver for data electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
- G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
Definitions
- the present invention relates to a display device that performs pause driving and a method for driving the display device.
- liquid crystal display devices are widely installed in various electronic devices. Since the liquid crystal display device has various advantages such as thinness, light weight, and low power consumption, its use is expected to further advance in the future.
- pause driving has been proposed.
- the display device that performs pause driving scans the display panel in each frame frame during the scanning period, and then does not scan the display panel in each subsequent frame during the pause period.
- the voltage applied to the pixels of the display panel in the immediately preceding frame is held, and thereby the display of the image is also maintained. Accordingly, since it is not necessary to output the scanning signal and the image signal to the display panel during the pause period, the power consumption can be reduced accordingly.
- Patent Document 1 discloses a display device that can reduce power consumption for image data transfer during a pause period by stopping transfer of image data from the image memory during the pause period.
- Patent Publication 2002-182619 (published on June 26, 2002)”
- the liquid crystal display device of Patent Document 1 cannot reduce the power consumption related to the writing of image data to the image memory.
- a display device can further reduce power consumption when an externally received image signal is written to a memory. There is an effect that can be done.
- a display device comprising a plurality of scanning lines, a plurality of data lines intersecting with the plurality of scanning lines, and a plurality of pixels individually provided in the vicinity of the intersections of the plurality of scanning lines and the plurality of data lines
- a scanning period constituted by at least one frame that scans all areas on the screen of the display panel and a pause period constituted by at least one frame that does not scan at least a part of the area on the screen are alternately arranged.
- Control signal output means for outputting a control signal instructing to In each of the above frames, receiving means for receiving an image signal input from outside the display device; A memory having an area for storing the image signal received by the receiving means; When the current frame is the frame located immediately before the frame in the scanning period, the image signal received by the receiving unit is written in the memory, and the current frame is in the pause period.
- a writing unit that does not write the image signal received by the receiving unit to the memory; Read means for reading out the image signal stored in the memory from the memory in each frame in the scanning period; Scanning signal output means for outputting a scanning signal to each scanning line in each frame within the scanning period; Each frame in the scanning period includes image signal output means that receives the image signal read by the reading means and outputs the image signal to each data line.
- the display device has an effect of further reducing power consumption when an externally received image signal is written to a memory.
- FIG. 10 is a timing chart illustrating another example of control of the image signal memory area in each frame when the display device according to the embodiment of the present invention performs pause driving. It is a block diagram which shows the principal part structure of the display apparatus which concerns on other embodiment of this invention.
- Embodiment 1 An embodiment of the present invention will be described below with reference to FIGS.
- FIG. 1 is a block diagram showing details of the configuration of the display device 1 according to the present embodiment.
- the display device 1 includes a display panel 2, a gate driver 4 (scanning signal output means), a source driver 6 (image signal output means), a timing controller 8, and a memory 10.
- the timing controller 8 includes a pause drive control unit 14 (control signal output unit) and a memory access unit 16 (writing unit, reading unit, receiving unit).
- the display panel 2 includes a screen having a plurality of pixels arranged in a matrix.
- the display panel 2 also includes N (N is an arbitrary integer) scanning lines G (gate lines) for selecting and scanning the screen line-sequentially.
- the display panel 2 includes M (M is an arbitrary integer) data lines S (source lines) that supply image signals to pixels for one row included in the selected line.
- Each pixel is individually provided in the vicinity of each intersection of the plurality of scanning lines G and the plurality of data lines S.
- Each pixel includes a TFT (Thin Film Transistor) 12 which is a switching element, and a pixel electrode.
- the TFT 12 is an n-channel type.
- the pixel electrode is connected to the drain of the TFT 12.
- the display panel 2 further includes a liquid crystal layer (not shown), and a common electrode and an auxiliary electrode facing the pixel electrode with the liquid crystal layer interposed therebetween. That is, the display device 1 is a so-called liquid crystal display device.
- G (n) shown in FIG. 1 represents the nth scanning line (n is an integer from 1 to N).
- G (1), G (2), and G (3) represent the first, second, and third scanning lines G, respectively.
- S (m) represents the m-th data line S (m is an integer from 1 to M).
- S (1), S (2), and S (3) represent the first, second, and third data lines S, respectively.
- a synchronization signal, a control signal, and an image signal are input to the display device 1 from the outside of the display device 1.
- the timing controller 8 receives these signals.
- At least a clock signal, a horizontal synchronization signal, and a vertical synchronization signal are input to the display device 1 as synchronization signals.
- the timing controller 8 Based on these synchronization signals, the timing controller 8 outputs to each circuit a signal that serves as a reference for each circuit to operate in synchronization. Specifically, various scanning control signals (gate start pulse signal GSP, gate clock signal GCK, and gate output enable signal GOE) are output to the gate driver 4.
- the source driver 6 outputs various synchronization signals (source start pulse signal SSP, source latch strobe signal SLS, and source clock signal SCK).
- the control signal includes information related to pause driving performed by the display device 1. Details of the rest drive will be described later.
- the image signal is a signal representing an image for one screen in a certain frame.
- the image signal is input from the outside to the timing controller 8 in the frame immediately before the frame that actually supplies the image signal to the display panel 2.
- the memory access unit 16 in the timing controller 8 temporarily stores the input image signal in the memory 10.
- the memory 10 is a volatile memory such as eDRAM.
- the memory 10 has at least an image signal memory area for storing image signals for one frame (one screen).
- the memory access unit 16 writes the received image signal in the image signal memory area when writing it into the memory 10.
- the memory access unit 16 reads the image signal from the memory 10 when a frame that requires the image signal stored in the memory 10 is reached.
- the timing controller 8 outputs the image signal read from the memory 10 by the memory access unit 16 to the source driver 6.
- the gate driver 4 starts scanning the display panel 2 in response to the gate start pulse signal GSP received from the timing controller 8.
- the gate driver 4 sequentially scans each scanning line G from the top to the bottom of the screen of the display panel 2.
- GCK which is a signal for shifting the selection state of the scanning line G
- a rectangular wave scanning signal for sequentially turning on the TFT 12 is output to each scanning line G. Thereby, the pixels for one row in the screen are selected.
- the source driver 6 calculates the value of the voltage to be output to each pixel for the selected row from the image signal received from the timing controller 8, and outputs the voltage of that value to each data line S. As a result, an image signal is supplied to each pixel (pixel electrode) on the selected scanning line G. Based on the source start pulse signal SSP received from the timing controller 8, the source driver 6 stores the input image signal of each pixel in a register according to the source clock signal SCK. Then, after storing the image signal, the source driver 6 passes the image signal to the pixel electrode of each pixel in the selected state through each data line S of the display panel 2 in accordance with the next source latch strobe signal SLS. Write. For example, an analog amplifier (not shown) included in the source driver 6 is used for writing the image signal.
- the display device 1 further includes a common electrode (not shown) and an auxiliary electrode (not shown) provided for each pixel in the screen.
- the source driver 6 outputs a predetermined common voltage (VCOM) to the common electrode.
- a predetermined voltage liquid crystal applied voltage
- the transmittance of the liquid crystal is controlled according to the liquid crystal applied voltage.
- an amount of backlight light corresponding to the transmittance is output to the outside of the display panel 2 through the pixels.
- each pixel displays the brightness
- the display panel 2 displays an image corresponding to the image signal on the screen.
- FIG. 2 is a diagram illustrating an equivalent circuit formed in a pixel included in the display device 1 of the present embodiment.
- the gate of the TFT 12 included in a certain pixel is connected to the scanning line Gn.
- the source of the TFT 12 is connected to the signal line Sn.
- the drain of the TFT 12 is connected to a pixel electrode (not shown).
- various capacitors are formed in the pixel.
- capacitance C D-G are formed between the TFT12 the gate and drain.
- a capacitor CD -S1 is formed between the gate and source of the TFT 12.
- a capacitor CLC is formed between the drain of the TFT 12 and the common electrode COM.
- a capacitor C CS is formed between the drain of the TFT 12 and the auxiliary electrode CS.
- a capacitor CD -S2 is formed between the drain of the TFT 12 and the signal line Sm + 1.
- a voltage obtained by subtracting the gate pull-in voltage ⁇ V from the voltage (source voltage) applied to the source of the TFT 12 through the signal line Sm is applied to the drain of the TFT 12.
- This ⁇ V is obtained by the following equation.
- VGH a voltage when the scanning signal is in a high state (on state).
- VGL a voltage when the scanning signal is in a low state (off state).
- ⁇ is determined by the following equation.
- TFT 12 C D ⁇ G / (C LC + C CS + C D ⁇ G + C D ⁇ S1 + C D ⁇ S2 ) (Details of TFT12)
- a TFT in which a so-called oxide semiconductor is used for a semiconductor layer is adopted as each TFT 12 of a plurality of pixels included in the display panel 2.
- TFT 12 in which so-called IGZO (InGaZnOx), which is an oxide composed of indium (In), gallium (Ga), and zinc (Zn), is used for the semiconductor layer is employed.
- IGZO InGaZnOx
- FIG. 3 is a diagram showing characteristics of various TFTs including the TFT 12 using an oxide semiconductor.
- FIG. 6 shows the characteristics of the TFT 12 using an oxide semiconductor, a general TFT using a-Si (amorphous silicon), and a general TFT using LTPS (Low Temperature Poly-Silicon).
- the horizontal axis (Vgh) indicates the voltage value of the on-voltage supplied to the gate in each TFT.
- the vertical axis (Id) indicates the amount of current between the source and drain in each TFT.
- a period indicated as “TFT-on” indicates a period in which the on state is set in accordance with the voltage value of the on voltage.
- a period indicated as “TFT-off” indicates a period in which the transistor is in an OFF state according to the voltage value of the ON voltage.
- a TFT using an oxide semiconductor has higher electron mobility in the on state than a TFT using a-Si.
- a TFT using a-Si has an Id current of 1 uA when the TFT is turned on, whereas a TFT using an oxide semiconductor is used when the TFT is turned on.
- the Id current is about 20 to 50 uA. From this, it can be seen that a TFT using an oxide semiconductor has an electron mobility about 20 to 50 times higher in an on state than a TFT using a-Si, and has an excellent on-characteristic. .
- the display device 1 of the present embodiment employs a TFT 12 using such an oxide semiconductor for each pixel.
- the pixel can be driven by a smaller TFT 12, so that the ratio of the area occupied by the TFT 12 in each pixel is reduced. be able to. That is, the aperture ratio in each pixel can be increased, and the backlight transmittance can be increased. As a result, a backlight with low power consumption can be adopted or the luminance of the backlight can be suppressed, so that power consumption can be reduced.
- the on-characteristics of the TFT 12 are excellent, the writing time of the image signal to each pixel can be shortened, so that the refresh rate of the display panel 2 can be easily increased.
- the TFT 12 using an oxide semiconductor has less leakage current in the off state than the TFT using a-Si.
- a TFT using a-Si has an Id current of 10 pA at the time of TFT-off, whereas a TFT 12 using an oxide semiconductor is at the time of TFT-off.
- the Id current is about 0.1 pA.
- the TFT 12 using an oxide semiconductor has a leakage current in an off state of about 1/100 that of a TFT using a-Si, has almost no leakage current, and has excellent off characteristics.
- the display device 1 of the present embodiment has excellent off characteristics of the TFT 12, it can maintain a state in which the image signals of each of the plurality of pixels of the display panel 2 are written for a long period of time. Therefore, it is possible to execute a pause drive described later while maintaining high display image quality. In addition, the pause period in the pause drive can be made longer.
- the display device 1 performs so-called pause driving in order to reduce power consumption during operation. Below, the rest drive which the display apparatus 1 performs is demonstrated.
- a control signal is input to the display device 1 from the outside.
- the pause drive control unit 14 in the timing controller 8 receives such a control signal from the outside of the display device 1.
- the control signal includes information indicating the number of frames constituting a scanning period for scanning all areas on the screen of the display panel 2 and information indicating the number of frames constituting a pause period during which at least a part of the area is not scanned. It is out.
- the at least part of the area is referred to as a rest area.
- the pause drive control unit 14 calculates the number of frames constituting the scanning period and the number of frames constituting the pause period based on the received control signal. In this case, since the information indicating the number of each frame is included in the control signal, the number of frames indicated by the respective information is directly used as the number of frames constituting the scanning period and the number of frames constituting the pause period. Calculate as a number.
- the pause drive control unit 14 generates a pause drive control signal for alternately instructing the scanning period composed of the calculated number of frames and the pause drive composed of the calculated number of claims, and outputs it to the source driver 6. At this time, for example, a control signal is output that takes an H value in each frame within the scanning period and takes an L value in each frame within the pause period. As a result, in the display device 1, the pause driving of the display device 1 can be controlled from the outside.
- the timing controller 8 does not output a pause drive control signal to the gate driver 4. Instead, information specifying the scanning period and the pause period is included in the gate output enable signal GOE. That is, the gate output enable signal GOE that is turned on during the scanning period and turned off during the pause period is output to the gate driver 4.
- the gate driver 4 operates based on such a gate output enable signal GOE. As a result, the scanning signal is output to each scanning line G during the scanning period and is not output during the pause period. As a result, on / off control of the gate corresponding to pause driving is realized.
- the source driver 6 specifies a scanning period and a pause period based on the received control signal. Then, the source driver 6 outputs an image signal for the entire screen of the display panel 2 to each data line S in each frame within the scanning period. On the other hand, in each frame within the pause period, the source driver 6 may or may not output an image signal to each data line S in the pause area.
- the power consumption necessary for outputting the scanning signal to the resting area can be reduced at least during the resting period, so that the power consumption of the display device 1 during the resting period is much larger than that during the driving period.
- the display device according to one embodiment of the present invention can operate with lower power than a display device that does not perform pause driving. Note that it is preferable not to output an image signal to each data line S during the idle period. As a result, it is possible to reduce the power consumption necessary for outputting the image signal to the resting area during the resting period, so that the power consumption of the display device 1 is further reduced.
- the source driver 6 may output an image signal corresponding to black display to each data line S in the pause area.
- the pause driving is suitable for displaying an image including a region whose contents do not change over a certain number of frames.
- the pause drive control unit 14 can calculate the number of frames constituting the scanning period and the number of frames constituting the pause period based on the image signal read from the memory 10 to the timing controller 8. In this case, no control signal is input to the timing controller 8 from the outside.
- the pause drive control unit 14 analyzes the content of the read image signal, and calculates the number of frames constituting the scanning period and the number of frames constituting the pause period according to the image represented by the image signal. . Therefore, if the content of the image represented by the image signal changes, the number of calculated frames also changes.
- the pause drive control unit 14 generates a pause drive control signal that instructs the scan period and the pause period of the optimum number of frames according to the image signal.
- the display device 1 can execute an optimum pause drive according to the image signal.
- the pause drive control unit 14 can calculate the number of frames constituting the scanning period and the number of frames constituting the pause period based on information stored in a non-illustrated nonvolatile memory (storage unit). . In this case, no control signal is input to the timing controller 8. Further, the pause drive control unit 14 does not need to analyze the image signal.
- the nonvolatile memory stores in advance information indicating the number of frames constituting the scanning period and information indicating the number of frames constituting the pause period.
- the pause drive control unit 14 reads out these pieces of information from the nonvolatile memory, and calculates the number of frames indicated by each piece of information as it is as the number of frames constituting the scanning period and the number of frames constituting the pause period.
- FIG. 4 is a timing chart illustrating an example of control of the image signal memory area in each frame when the display device 1 according to the present embodiment performs pause driving.
- the dotted line indicates the ground level.
- ⁇ V represents the above-described pull-in voltage.
- the number of frames constituting the scanning period and the number of frames constituting the pause period are both one. That is, the scanning period and the pause period are switched every frame.
- the pause area is the entire area on the screen of the display panel 2. Therefore, the display device 1 does not output a scanning signal to all the scanning lines G in the display panel 2 in each frame within the pause period. Thus, the display panel 2 is not scanned at all in each frame within the pause period.
- the pause drive control unit 14 generates a pause drive control signal in which a high level and a low level are alternately repeated every frame, and outputs the pause drive control signal to the source driver 6.
- a high level in the pause drive control signal represents a scanning period
- a low level represents a pause period.
- this relationship may be reversed. That is, a low level in the pause drive control signal may represent a scanning period, and a high level may represent a pause period.
- the source driver 6 outputs an image signal to the display panel 2 in each scanning period. At that time, the polarity of the image signal to be output is inverted every scanning period. As a result, the polarity of the liquid crystal applied voltage is also inverted every scanning period. As a result, charges having the same polarity can be prevented from accumulating in the liquid crystal, so that display quality can be prevented from deteriorating.
- the source driver 6 inverts the polarity of the image signal for each data signal line in each frame. That is, so-called source inversion driving is executed.
- the source driver 6 does not output an image signal to each data line during each pause period.
- the voltage level of each data line may be controlled to the ground level, or may be controlled to the terminal open state (high impedance level). In the example of FIG. 4, the ground level is controlled.
- the scanning signal is turned on at the beginning of each scanning period, and remains off after that.
- a voltage lower than the source voltage of the TFT 12 by the pull-in voltage ⁇ V is applied to the drain of the TFT 12.
- the display device 1 receives an image signal from the outside for each frame.
- the memory access unit 16 in the timing controller 8 receives this image signal.
- the memory access unit 16 writes the received image signal in the memory area for the image signal in the memory 10 in the frame within the pause period.
- an image signal already written in the memory 10 is not read from the memory 10. That is, the memory access unit 16 performs only the image signal writing operation in the frame within the pause period. Therefore, power required for the reading process can be reduced.
- the memory access unit 16 reads the image signal already written in the memory 10 from the memory 10 in the frame within the scanning period.
- the timing controller 8 outputs the image signal read by the memory access unit 16 at this time to the source driver 6.
- the source driver 6 outputs the input image signal to each data line S in the frame within the scanning period.
- the memory access unit 16 does not write the received image signal in the memory area for the image signal in the memory 10 in the frame within the scanning period.
- the frame in the pause period is located after the frame in the scanning period. Therefore, even if the image signal received in the frame within the scanning period is written in the memory 10, the image signal is not used in the next frame. That is, no problem occurs even if the image signal received in the frame within the scanning period is not written in the memory 10.
- the power for writing the image signal to the memory 10 can be reduced by such control in the frame within the scanning period.
- FIG. 5 is a timing chart illustrating another example of the control of the image signal memory area in each frame when the display device according to the embodiment of the present invention performs pause driving.
- the number of frames constituting the scanning period is one.
- the control of the memory area is different between the two frames within the pause period. Specifically, in one frame, the image signal is written but not read, and in the other frame, neither the image signal is written and read. As a result, the power consumption can be further reduced as compared with the case where the pause period is composed of one frame as shown in FIG.
- An image signal is input to the display device 1 from the outside for each frame.
- the memory access unit 16 in the timing controller 8 receives this image signal.
- the memory access unit 16 writes the received image signal in the memory area for the image signal in the memory 10 in the frame located immediately before the frame in the scanning period among the frames in the pause period.
- the image signal written at this time is used when driving the display panel 2 in the next frame.
- image signals already written in the memory 10 are not read from the memory 10 in the same frame. That is, the memory access unit 16 executes only the image signal writing operation in the frame located immediately before the frame in the scanning period among the frames in the pause period. Therefore, power required for the reading process can be reduced.
- the memory access unit 16 does not write the received image signal in the memory area for the image signal in the memory 10 in a frame located immediately before another frame in the pause period among the frames in the pause period. . Further, image signals already written in the memory 10 in the same frame are not read from the memory 10. That is, the memory access unit 16 does not execute both the image signal writing process and the reading process in the frame located immediately before the other frame in the pause period among the frames in the pause period. Therefore, both the power required for the writing process and the power required for the reading process can be reduced.
- the memory access unit 16 reads the image signal already written in the memory 10 from the memory 10 in the frame within the scanning period.
- the timing controller 8 outputs the image signal read by the memory access unit 16 at this time to the source driver 6.
- the source driver 6 outputs the input image signal to each data line S in the frame within the scanning period.
- the memory access unit 16 does not write the received image signal in the memory area for the image signal in the memory 10 in the frame within the scanning period.
- the frame in the pause period is located after the frame in the scanning period. Therefore, even if the image signal received in the frame within the scanning period is written in the memory 10, the image signal is not used in the next frame. That is, no problem occurs even if the image signal received in the frame within the scanning period is not written in the memory 10.
- the power for writing the image signal to the memory 10 can be reduced by such control in the frame within the scanning period.
- the number of image signal writing processes can be reduced as compared with the case where the number of frames constituting the pause period is one. This can be further reduced.
- the number of frames constituting the pause period is three or more, as in the case of two frames, in each frame in the pause period, a frame located immediately before another frame in the pause period is used. Both the image signal writing process and the reading process need not be executed. Therefore, as the number of frames constituting the pause period increases, the number of image signal writing processes can be further reduced, so that power consumption can be further reduced.
- the display device 1 does not write the received image signal in the memory 10 when the current frame is a frame located immediately before the frame in the pause period. Even if this image signal is not written in the memory 10, there is no problem because it is not necessary to output the image signal to each data line S during the pause period. That is, there is no problem with the image display on the screen of the display panel 2. On the other hand, the image signal writing process to the memory 10 becomes unnecessary, so that the power consumption required for this can be reduced.
- FIG. 6 is a block diagram showing a main configuration of the display device 1a according to the second embodiment of the present invention.
- the display device 1a further includes a region control unit 18 in addition to the elements included in the display device 1 shown in FIG.
- the area control unit 18 is provided inside the timing controller 8.
- a pause region that is a partial region on the screen of the display panel is a subject of pause driving.
- the normal scanning area which is an area other than the pause area, is set as a normal drive target instead of the pause drive. Therefore, for the normal scanning area on the screen, the corresponding image signal is always output to the display panel 2 for each frame.
- the corresponding image signal is output to the display panel 2 in the frame within the scanning period, but the corresponding image signal is not output to the display panel 2 in each frame within the pause period.
- the display image is always updated for each frame in the normal scanning area, but the display image is updated only in each frame within the scanning period in the pause area.
- FIG. 7 is a diagram showing an example of the relationship between the area in the screen of the display panel 2 and the area in the memory 10.
- the upper half area of the display panel 2 is a rest area
- the lower half is a normal scanning area.
- the area control unit 18 generates an area control signal for specifying a pause area and a normal scanning area on the screen of the display panel 2 and outputs the area control signal to the source driver 6.
- the source driver 6 specifies a rest area and a normal scanning area on the screen based on the area control signal. As a result, a location corresponding to the normal scanning region in the input image signal is specified, and is output to each data line S when scanning the normal scanning region.
- the area control unit 18 generates an area control signal including coordinate information for specifying the normal scanning area.
- the normal scanning region occupies the n1st to n2nd rows and the m1st to m2th columns on the screen of the display panel 2 (n1, n2, m1 and m3 are any positive integers. Therefore, an area control signal including these row numbers and column numbers is generated.
- the image signal memory area in the memory 10 includes a pause area memory area (first partial area) corresponding to the pause area on the screen and a normal scan area corresponding to the normal scan area on the screen. It is divided into a scanning area memory area (second partial area).
- the relative position of the pause area and the normal scanning area on the screen is equal to the relative position of the pause area memory area and the normal scanning area memory area in the image signal memory area.
- the normal scanning area memory area occupies the n1st to n2nd rows and the m1st to m2th columns in the image signal memory area. .
- the memory access unit 16 When the current frame is a frame immediately before the frame constituting the pause period, the memory access unit 16 does not write the portion corresponding to the pause area in the received image signal in the pause area memory area, and Then, a portion corresponding to the normal scanning area in the received image signal is written into the normal scanning area memory area.
- the pause drive when executed for the pause region, it is not necessary to perform useless writing processing on the normal scan region. Therefore, power consumption can be further reduced when pause driving is performed on a partial area of the display panel screen.
- FIG. 8 is a diagram showing another relationship between the area in the screen of the display panel 2 and the area in the memory 10.
- the area control unit 18 can also generate an area control signal defining each area so that the normal scanning area is arranged inside the pause area.
- the normal scanning region occupies the nth to n + 300th rows and the mth to m + 800th columns on the screen of the display panel 2 (n and m are Both are positive integers). Therefore, an area control signal including these row numbers and column numbers is generated.
- the relative positions of the pause area and the normal scan area on the screen and the relative positions of the pause area memory area and the normal scan area memory area in the image signal memory area are equal to each other. That is, the normal scanning area memory area occupies the nth to n + 300th rows and the mth to m + 800th columns in the image signal memory area.
- the rest area and the normal scanning area can be arranged at arbitrary positions on the screen of the display panel 2.
- the display panel 2 needs to be configured to be able to scan in pixel units.
- a display device comprising a plurality of scanning lines, a plurality of data lines intersecting with the plurality of scanning lines, and a plurality of pixels individually provided in the vicinity of the intersections of the plurality of scanning lines and the plurality of data lines
- a scanning period constituted by at least one frame that scans all areas on the screen of the display panel and a pause period constituted by at least one frame that does not scan at least a part of the area on the screen are alternately arranged.
- Control signal output means for outputting a control signal instructing to In each of the above frames, receiving means for receiving an image signal input from outside the display device; A memory having an area for storing the image signal received by the receiving means; When the current frame is the frame located immediately before the frame in the scanning period, the image signal received by the receiving unit is written in the memory, and the current frame is in the pause period.
- a writing unit that does not write the image signal received by the receiving unit to the memory; Read means for reading out the image signal stored in the memory from the memory in each frame in the scanning period; Scanning signal output means for outputting a scanning signal to each scanning line in each frame within the scanning period; Each frame in the scanning period includes image signal output means that receives the image signal read by the reading means and outputs the image signal to each data line.
- the display device performs so-called pause driving. Specifically, in each frame within the scanning period, the entire area on the screen of the display panel is scanned, but in each frame within the pause period, at least a part of the area on the screen is not scanned. As a result, the power consumption of the display device during the pause period is significantly reduced compared to that during the scanning period. Therefore, the display device according to one embodiment of the present invention can operate with lower power than a display device that does not perform sleep driving.
- the display device receives an image signal input from the outside. If the current frame is a frame located immediately before the frame in the scanning period, the received image signal is written in the memory. At this time, the image signal written in the memory is read from the memory in a frame within the scanning period and output to each data line. Thus, the display panel can be driven normally during the scanning period.
- the display device does not write the received image signal in the memory when the current frame is a frame located immediately before the frame in the pause period. Even if this image signal is not written in the memory, it is not necessary to output the image signal to each data line during the pause period, so that no problem occurs. That is, there is no problem with the image display on the screen of the display panel. On the other hand, it is not necessary to write an image signal to the memory, so that it is possible to reduce power consumption required for that purpose.
- the display device has an effect of further reducing power consumption when an externally received image signal is written to a memory.
- a method for driving a display device comprising a plurality of scanning lines, a plurality of data lines intersecting with the plurality of scanning lines, and a plurality of pixels individually provided in the vicinity of the intersections of the plurality of scanning lines and the plurality of data lines
- a driving method of a display device comprising a memory having an area for storing image signals, A scanning period constituted by at least one frame that scans all areas on the screen of the display panel and a pause period constituted by at least one frame that does not scan at least a part of the area on the screen are alternately arranged.
- a control signal output step for outputting a control signal instructing to In each of the above frames a receiving step of receiving an image signal input from the outside of the display device;
- the current frame is the frame located immediately before the frame in the scanning period
- the image signal received in the reception step is written in the memory, and the current frame is in the pause period.
- a writing step of not writing the image signal received in the reception step into the memory In the case of the frame located immediately before the frame, a writing step of not writing the image signal received in the reception step into the memory; A reading step of reading out the image signal stored in the memory from the memory in each of the frames in the scanning period; A scanning signal output step of outputting a scanning signal to each scanning line in each frame in the scanning period; Each frame in the scanning period includes an image signal output step of receiving the image signal read in the reading step and outputting the image signal to each data line.
- the reading means preferably does not read the image signal stored in the memory from the memory in each of the frames within the pause period.
- the writing means does not write the image signal received by the receiving means to the memory when the current frame is located immediately before the frame in the pause period and is in the scanning period. It is preferable.
- the pause period is composed of a plurality of frames
- the writing means does not write the image signal received by the receiving means to the memory when the current frame is a frame within the pause period located immediately before another frame within the pause period. Is preferred.
- the at least some area is a part area on the screen
- the area in the memory is divided into a first partial area corresponding to the partial area on the screen and a second partial area corresponding to an area other than the partial area on the screen.
- the writing means determines the part corresponding to the partial area in the image signal received by the receiving means. It is preferable that a portion corresponding to a region other than the partial region in the image signal received by the receiving unit is not written in the first partial region, and is written in the second partial region.
- the rest drive can be executed for a part of the area on the screen of the display panel, and the normal drive can be executed for the other areas. Further, even in this case, unnecessary write processing does not have to be performed on the partial area in the memory corresponding to the area on the screen to be paused. Therefore, power consumption can be further reduced when pause driving is performed on a partial area of the screen of the display panel.
- the at least a part of the area is preferably the entire area on the screen.
- the power consumption of the display device can be further reduced.
- an oxide semiconductor is preferably used for a semiconductor layer of each TFT of the plurality of pixels.
- the oxide semiconductor is preferably IGZO.
- the state in which each image signal is written to the plurality of pixels of the display panel can be maintained for a long time.
- pause driving can be performed while maintaining high display image quality. Also, it is possible to take a longer rest period.
- the display device is preferably a liquid crystal display device.
- the display device according to the present invention can be widely used as various display devices such as a liquid crystal display device that performs pause driving.
Abstract
Description
複数の走査線と、上記複数の走査線に交差する複数のデータ線と、当該複数の走査線および当該複数のデータ線の各交差点近傍に個別に設けられた複数の画素とを備えた表示パネルと、
上記表示パネルの画面における全ての領域を走査する、少なくとも1つのフレームによって構成される走査期間と、上記画面における少なくとも一部の領域を走査しない、少なくとも1つのフレームによって構成される休止期間とを交互に指示する制御信号を出力する制御信号出力手段と、
各上記フレームにおいて、表示装置の外部から入力される画像信号を受信する受信手段と、
上記受信手段が受信した上記画像信号を格納するための領域を有するメモリと、
現在のフレームが、上記走査期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信手段が受信した画像信号を上記メモリに書き込むと共に、現在のフレームが、上記休止期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信手段が受信した画像信号を上記メモリに書き込まない書き込み手段と、
上記走査期間内の各上記フレームにおいて、上記メモリに格納されている上記画像信号を上記メモリから読み出す読み出し手段と、
上記走査期間内の各上記フレームにおいて、走査信号を上記各走査線に出力する走査信号出力手段と、
上記走査期間内の各上記フレームにおいて、上記読み出し手段が読み出した上記画像信号を受け取り、上記各データ線に出力する画像信号出力手段とを備えていることを特徴としている。
本発明の一実施形態について、図1~図5を参照して以下に説明する。
図1は、本実施形態に係る表示装置1の構成の詳細を示すブロック図である。図1に示すように、表示装置1は、表示パネル2、ゲートドライバ4(走査信号出力手段)、ソースドライバ6(画像信号出力手段)、タイミングコントローラ8、およびメモリ10を備えている。タイミングコントローラ8は、休止駆動制御部14(制御信号出力手段)およびメモリアクセス部16(書き込み手段、読み出し手段、受信手段)を備えている。
以下に、表示装置1が表示パネル2を駆動して画像を表示する際の、基本的な処理の流れを説明する。
各画素の液晶に印加される電圧の詳細について、図2を参照して以下に説明する。図2は、本実施形態の表示装置1が備える画素に形成される等価回路を示す図である。この図に示す例では、ある画素が備えるTFT12のゲートが、走査線Gnに接続されている。一方、TFT12のソースは、信号線Snに接続されている。また、TFT12のドレインは、図示しない画素電極に接続されている。
ここで、VGHは、走査信号が高状態(オン状態)になる際の電圧である。一方、VGLは、走査信号が低状態(オフ状態)になる際の電圧である。また、αは、次の式によって求められる。
(TFT12の詳細)
本実施形態の表示装置1においては、表示パネル2が備える複数の画素の各々のTFT12として、いわゆる酸化物半導体が半導体層に用いられているTFTを採用しており、特に、上記酸化物半導体として、インジウム(In)、ガリウム(Ga)、および亜鉛(Zn)から構成される酸化物である、いわゆるIGZO(InGaZnOx)が半導体層に用いられているTFT12を採用している。以下、酸化物半導体を用いたTFT12の優位性を説明する。
図3に示すように、酸化物半導体を用いたTFTは、a-Siを用いたTFTよりも、オン状態の時の電子移動度が高い。図示は省略するが、具体的には、a-Siを用いたTFTは、そのTFT-on時のId電流が1uAであるのに対し、酸化物半導体を用いたTFTは、そのTFT-on時のId電流が20~50uA程度である。このことから、酸化物半導体を用いたTFTは、a-Siを用いたTFTよりも、オン状態の時の電子移動度が20~50倍程度高く、オン特性が非常に優れていることが分かる。
図3に示すように、酸化物半導体を用いたTFT12は、オフ状態のときのリーク電流が、a-Siを用いたTFTよりも少ない。図示は省略するが、具体的には、a-Siを用いたTFTは、そのTFT-off時のId電流が10pAであるのに対し、酸化物半導体を用いたTFT12は、そのTFT-off時のId電流が0.1pA程度である。
表示装置1は、動作時に消費電力を減らすために、いわゆる休止駆動を行う。以下に、表示装置1が行う休止駆動について、説明する。
休止駆動制御部14は、走査期間を構成するフレームの数と、休止期間を構成するフレームの数とを、メモリ10からタイミングコントローラ8に読み出された画像信号に基づき算出することができる。この場合、タイミングコントローラ8には外部から制御信号は入力されない。休止駆動制御部14は、読み出された画像信号の内容を解析し、画像信号が表す画像に応じて、走査期間を構成するフレームの数と、休止期間を構成するフレームの数とを算出する。したがって、画像信号が表す画像の中身が変われば、算出されるフレームの数も変動する。これにより、休止駆動制御部14は、画像信号に応じた最適なフレーム数の走査期間および休止期間をそれぞれ指示する休止駆動制御信号を生成する。その結果、表示装置1は、画像信号に応じた最適な休止駆動を実行できる。
休止駆動制御部14は、走査期間を構成するフレームの数と、休止期間を構成するフレームの数とを、図示しない不揮発性のメモリ(記憶部)に格納された情報に基づき算出することができる。この場合、タイミングコントローラ8には制御信号は入力されない。また、休止駆動制御部14は、画像信号を解析する必要もない。
図4は、本実施形態に係る表示装置1が休止駆動を実行する際の、各フレームにおける画像信号用メモリ領域の制御の一例を示すタイミングチャート図である。この図において、点線は接地レベルを示す。また、ΔVは、上述した引き込み電圧を示す。図4に示す例では、走査期間を構成するフレームの数と、休止期間を構成するフレームの数とは、いずれも1つである。すなわち、1フレームごとに、走査期間と休止期間とが入れ替わる。
図5は、本発明の一実施形態に係る表示装置が休止駆動を実行する際の、各フレームにおける画像信号用メモリ領域の制御の他の例を示すタイミングチャート図である。図5に示す例では、走査期間を構成するフレームは1つである。一方、休止期間を構成するフレームは2つである。
以上のように、本実施形態に係る表示装置1は、現在のフレームが、休止期間内のフレームの直前に位置するフレームである場合には、受信した画像信号をメモリ10に書き込まない。この画像信号がメモリ10に書き込まれなくても、休止期間中には各データ線Sに画像信号を出力する必要がないので、何ら問題は生じない。すなわち、表示パネル2の画面における画像表示に何ら支障はない。一方、メモリ10への画像信号の書き込み処理が不要となるので、そのために必要な消費電力を低減することができる。
本発明に係る第2の実施形態について、図6~図8を参照して以下に説明する。なお、上述した第の実施形態と共通する各部材には同じ符号を付し、詳細な説明を省略する。
図8は、表示パネル2の画面内の領域と、メモリ10内の領域との関係の他のを示す図である。この図に示すように、領域制御部18は、通常走査領域が休止領域の内部に配置されるようにそれぞれの領域を定義した領域制御信号を生成することもできる。図8の例では、通常走査領域は、表示パネル2の画面における、第n行目~第n+300行目、かつ、第m列目~第m+800列目の部分を占めている(n,mはいずれも正の整数)。そこで、これらの行番号および列番号を含む領域制御信号を生成する。
本発明の一態様に係る表示装置は、上記の課題を解決するために、
複数の走査線と、上記複数の走査線に交差する複数のデータ線と、当該複数の走査線および当該複数のデータ線の各交差点近傍に個別に設けられた複数の画素とを備えた表示パネルと、
上記表示パネルの画面における全ての領域を走査する、少なくとも1つのフレームによって構成される走査期間と、上記画面における少なくとも一部の領域を走査しない、少なくとも1つのフレームによって構成される休止期間とを交互に指示する制御信号を出力する制御信号出力手段と、
各上記フレームにおいて、表示装置の外部から入力される画像信号を受信する受信手段と、
上記受信手段が受信した上記画像信号を格納するための領域を有するメモリと、
現在のフレームが、上記走査期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信手段が受信した画像信号を上記メモリに書き込むと共に、現在のフレームが、上記休止期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信手段が受信した画像信号を上記メモリに書き込まない書き込み手段と、
上記走査期間内の各上記フレームにおいて、上記メモリに格納されている上記画像信号を上記メモリから読み出す読み出し手段と、
上記走査期間内の各上記フレームにおいて、走査信号を上記各走査線に出力する走査信号出力手段と、
上記走査期間内の各上記フレームにおいて、上記読み出し手段が読み出した上記画像信号を受け取り、上記各データ線に出力する画像信号出力手段とを備えていることを特徴としている。
複数の走査線と、上記複数の走査線に交差する複数のデータ線と、当該複数の走査線および当該複数のデータ線の各交差点近傍に個別に設けられた複数の画素とを備えた表示パネルと、画像信号を格納するための領域を有するメモリとを備えた表示装置の駆動方法であって、
上記表示パネルの画面における全ての領域を走査する、少なくとも1つのフレームによって構成される走査期間と、上記画面における少なくとも一部の領域を走査しない、少なくとも1つのフレームによって構成される休止期間とを交互に指示する制御信号を出力する制御信号出力工程と、
各上記フレームにおいて、表示装置の外部から入力される画像信号を受信する受信工程と、
現在のフレームが、上記走査期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信工程において受信した画像信号を上記メモリに書き込むと共に、現在のフレームが、上記休止期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信工程において受信した画像信号を上記メモリに書き込まない書き込み工程と、
上記走査期間内の各上記フレームにおいて、上記メモリに格納されている上記画像信号を上記メモリから読み出す読み出し工程と、
上記走査期間内の各上記フレームにおいて、走査信号を上記各走査線に出力する走査信号出力工程と、
上記走査期間内の各上記フレームにおいて、上記読み出し工程において読み出した上記画像信号を受け取り、上記各データ線に出力する画像信号出力工程とを備えていることを特徴としている。
上記読み出し手段は、上記休止期間内の各上記フレームにおいて、上記メモリに格納されている上記画像信号を上記メモリから読み出さないことが好ましい。
上記書き込み手段は、現在のフレームが、上記休止期間内の他のフレームの直前に位置する、当該休止期間内のフレームである場合に、上記受信手段が受信した画像信号を上記メモリに書き込まないことが好ましい。
上記少なくとも一部の領域は、上記画面における一部の領域であり、
上記メモリ内の上記領域は、上記画面における上記一部の領域に対応した第1の部分領域と、上記画面における上記一部の領域以外の領域に対応した第2の部分領域とに分かれており、
上記書き込み手段は、現在のフレームが、上記休止期間を構成するフレームの直前のフレームである場合には、上記受信手段が受信した画像信号における、上記一部の領域に対応する部分を、上記第1の部分領域に書き込まず、かつ、上記受信手段が受信した画像信号における、上記一部の領域以外の領域に対応する部分を、上記第2の部分領域に書き込むことが好ましい。
上記少なくとも一部の領域は、上記画面における全ての領域であることが好ましい。
2 表示パネル
4 ゲートドライバ(走査信号出力手段)
6 ソースドライバ(画像信号出力手段)
8 タイミングコントローラ
10 メモリ
12 TFT
14 休止駆動制御部(制御信号出力手段)
16 メモリアクセス部(書き込み手段、読み出し手段、受信手段)
18 領域制御部
Claims (10)
- 複数の走査線と、上記複数の走査線に交差する複数のデータ線と、当該複数の走査線および当該複数のデータ線の各交差点近傍に個別に設けられた複数の画素とを備えた表示パネルと、
上記表示パネルの画面における全ての領域を走査する、少なくとも1つのフレームによって構成される走査期間と、上記画面における少なくとも一部の領域を走査しない、少なくとも1つのフレームによって構成される休止期間とを交互に指示する制御信号を出力する制御信号出力手段と、
各上記フレームにおいて、表示装置の外部から入力される画像信号を受信する受信手段と、
上記受信手段が受信した上記画像信号を格納するための領域を有するメモリと、
現在のフレームが、上記走査期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信手段が受信した画像信号を上記メモリに書き込むと共に、現在のフレームが、上記休止期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信手段が受信した画像信号を上記メモリに書き込まない書き込み手段と、
上記走査期間内の各上記フレームにおいて、上記メモリに格納されている上記画像信号を上記メモリから読み出す読み出し手段と、
上記走査期間内の各上記フレームにおいて、走査信号を上記各走査線に出力する走査信号出力手段と、
上記走査期間内の各上記フレームにおいて、上記読み出し手段が読み出した上記画像信号を受け取り、上記各データ線に出力する画像信号出力手段とを備えていることを特徴とする表示装置。 - 上記書き込み手段は、現在のフレームが、上記休止期間内のフレームの直前に位置し、かつ、上記走査期間内にあるフレームである場合に、上記受信手段が受信した画像信号を上記メモリに書き込まないことを特徴とする請求項1に記載の表示装置。
- 上記休止期間は、複数のフレームによって構成されており、
上記書き込み手段は、現在のフレームが、上記休止期間内の他のフレームの直前に位置する、当該休止期間内のフレームである場合に、上記受信手段が受信した画像信号を上記メモリに書き込まないことを特徴とする請求項1または2に記載の表示装置。 - 上記読み出し手段は、上記休止期間内の各上記フレームにおいて、上記メモリに格納されている上記画像信号を上記メモリから読み出さないことを特徴とする請求項1~3のいずれか1項に記載の表示装置。
- 上記少なくとも一部の領域は、上記画面における一部の領域であり、
上記メモリ内の上記領域は、上記画面における上記一部の領域に対応した第1の部分領域と、上記画面における上記一部の領域以外の領域に対応した第2の部分領域とに分かれており、
上記書き込み手段は、現在のフレームが、上記休止期間を構成するフレームの直前のフレームである場合には、上記受信手段が受信した画像信号における、上記一部の領域に対応する部分を、上記第1の部分領域に書き込まず、かつ、上記受信手段が受信した画像信号における、上記一部の領域以外の領域に対応する部分を、上記第2の部分領域に書き込むことを特徴とする請求項1~4のいずれか1項に記載の表示装置。 - 上記少なくとも一部の領域は、上記画面における全ての領域であることを特徴とする請求項1~4のいずれか1項に記載の表示装置。
- 前記複数の画素の各々のTFTの半導体層には、酸化物半導体が用いられていることを特徴とする請求項1~6のいずれか1項に記載の表示装置。
- 上記酸化物半導体は、IGZOであることを特徴とする請求項7に記載の表示装置。
- 液晶表示装置であることを特徴とする請求項1~8のいずれか1項に記載の表示装置。
- 複数の走査線と、上記複数の走査線に交差する複数のデータ線と、当該複数の走査線および当該複数のデータ線の各交差点近傍に個別に設けられた複数の画素とを備えた表示パネルと、画像信号を格納するための領域を有するメモリとを備えた表示装置の駆動方法であって、
上記表示パネルの画面における全ての領域を走査する、少なくとも1つのフレームによって構成される走査期間と、上記画面における少なくとも一部の領域を走査しない、少なくとも1つのフレームによって構成される休止期間とを交互に指示する制御信号を出力する制御信号出力工程と、
各上記フレームにおいて、表示装置の外部から入力される画像信号を受信する受信工程と、
現在のフレームが、上記走査期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信工程において受信した画像信号を上記メモリに書き込むと共に、現在のフレームが、上記休止期間内の上記フレームの直前に位置する上記フレームである場合には、上記受信工程において受信した画像信号を上記メモリに書き込まない書き込み工程と、
上記走査期間内の各上記フレームにおいて、上記メモリに格納されている上記画像信号を上記メモリから読み出す読み出し工程と、
上記走査期間内の各上記フレームにおいて、走査信号を上記各走査線に出力する走査信号出力工程と、
上記走査期間内の各上記フレームにおいて、上記読み出し工程において読み出した上記画像信号を受け取り、上記各データ線に出力する画像信号出力工程とを備えていることを特徴とする表示装置の駆動方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201380009710.4A CN104115217B (zh) | 2012-03-01 | 2013-02-22 | 显示装置及其驱动方法 |
US14/378,653 US9349338B2 (en) | 2012-03-01 | 2013-02-22 | Display device and method for driving same |
JP2014502181A JP5759613B2 (ja) | 2012-03-01 | 2013-02-22 | 表示装置およびその駆動方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012-045696 | 2012-03-01 | ||
JP2012045696 | 2012-03-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2013129260A1 true WO2013129260A1 (ja) | 2013-09-06 |
Family
ID=49082460
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2013/054570 WO2013129260A1 (ja) | 2012-03-01 | 2013-02-22 | 表示装置およびその駆動方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9349338B2 (ja) |
JP (1) | JP5759613B2 (ja) |
CN (1) | CN104115217B (ja) |
TW (1) | TWI550585B (ja) |
WO (1) | WO2013129260A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017183081A1 (ja) * | 2016-04-18 | 2017-10-26 | 堺ディスプレイプロダクト株式会社 | 液晶表示装置及び液晶表示装置の駆動方法 |
WO2019187062A1 (ja) * | 2018-03-30 | 2019-10-03 | シャープ株式会社 | 表示装置の駆動方法、及び表示装置 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9349160B1 (en) * | 2013-12-20 | 2016-05-24 | Google Inc. | Method, apparatus and system for enhancing a display of video data |
CN110139154B (zh) * | 2019-05-15 | 2021-08-31 | 京东方科技集团股份有限公司 | 一种显示设备控制方法及装置、系统 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002182619A (ja) * | 2000-10-05 | 2002-06-26 | Sharp Corp | 表示装置の駆動方法およびそれを用いた表示装置 |
JP2004151222A (ja) * | 2002-10-29 | 2004-05-27 | Sharp Corp | 液晶表示制御装置および液晶表示装置 |
JP2004348142A (ja) * | 2003-05-22 | 2004-12-09 | Toppoly Optoelectronics Corp | 部分表示モードモニタ装置用の動作装置および方法 |
WO2005088726A1 (ja) * | 2004-03-12 | 2005-09-22 | Japan Science And Technology Agency | アモルファス酸化物及び薄膜トランジスタ |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69228929T2 (de) * | 1992-02-25 | 1999-12-02 | Citizen Watch Co Ltd | Flüssigkristallanzeige |
EP1296174B1 (en) * | 2000-04-28 | 2016-03-09 | Sharp Kabushiki Kaisha | Display unit, drive method for display unit, electronic apparatus mounting display unit thereon |
CN100507646C (zh) * | 2000-04-28 | 2009-07-01 | 夏普株式会社 | 显示器件、显示器件驱动方法和装有显示器件的电子设备 |
JP3730159B2 (ja) | 2001-01-12 | 2005-12-21 | シャープ株式会社 | 表示装置の駆動方法および表示装置 |
JP3862994B2 (ja) * | 2001-10-26 | 2006-12-27 | シャープ株式会社 | 表示装置の駆動方法およびそれを用いた表示装置 |
JP4744074B2 (ja) | 2003-12-01 | 2011-08-10 | ルネサスエレクトロニクス株式会社 | 表示メモリ回路および表示コントローラ |
KR101252090B1 (ko) * | 2008-09-17 | 2013-04-12 | 엘지디스플레이 주식회사 | 액정표시장치 |
US8872836B2 (en) * | 2011-01-25 | 2014-10-28 | Qualcomm Incorporated | Detecting static images and reducing resource usage on an electronic device |
-
2013
- 2013-02-22 WO PCT/JP2013/054570 patent/WO2013129260A1/ja active Application Filing
- 2013-02-22 CN CN201380009710.4A patent/CN104115217B/zh not_active Expired - Fee Related
- 2013-02-22 JP JP2014502181A patent/JP5759613B2/ja active Active
- 2013-02-22 US US14/378,653 patent/US9349338B2/en not_active Expired - Fee Related
- 2013-02-27 TW TW102107114A patent/TWI550585B/zh active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002182619A (ja) * | 2000-10-05 | 2002-06-26 | Sharp Corp | 表示装置の駆動方法およびそれを用いた表示装置 |
JP2004151222A (ja) * | 2002-10-29 | 2004-05-27 | Sharp Corp | 液晶表示制御装置および液晶表示装置 |
JP2004348142A (ja) * | 2003-05-22 | 2004-12-09 | Toppoly Optoelectronics Corp | 部分表示モードモニタ装置用の動作装置および方法 |
WO2005088726A1 (ja) * | 2004-03-12 | 2005-09-22 | Japan Science And Technology Agency | アモルファス酸化物及び薄膜トランジスタ |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017183081A1 (ja) * | 2016-04-18 | 2017-10-26 | 堺ディスプレイプロダクト株式会社 | 液晶表示装置及び液晶表示装置の駆動方法 |
CN109313877A (zh) * | 2016-04-18 | 2019-02-05 | 堺显示器制品株式会社 | 液晶显示装置及液晶显示装置的驱动方法 |
US10665188B2 (en) | 2016-04-18 | 2020-05-26 | Sakai Display Products Corporation | Liquid crystal display device, and drive method for liquid crystal display device with discharge capacitor connected to signal line |
CN109313877B (zh) * | 2016-04-18 | 2021-07-27 | 堺显示器制品株式会社 | 液晶显示装置及液晶显示装置的驱动方法 |
WO2019187062A1 (ja) * | 2018-03-30 | 2019-10-03 | シャープ株式会社 | 表示装置の駆動方法、及び表示装置 |
Also Published As
Publication number | Publication date |
---|---|
TWI550585B (zh) | 2016-09-21 |
JPWO2013129260A1 (ja) | 2015-07-30 |
US20150029175A1 (en) | 2015-01-29 |
TW201342351A (zh) | 2013-10-16 |
JP5759613B2 (ja) | 2015-08-05 |
CN104115217A (zh) | 2014-10-22 |
CN104115217B (zh) | 2017-09-19 |
US9349338B2 (en) | 2016-05-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2014002607A1 (ja) | 表示装置の駆動方法、表示装置、および液晶表示装置 | |
US9601074B2 (en) | Drive device and display device | |
JP5801423B2 (ja) | 表示装置およびその駆動方法 | |
US9390686B2 (en) | Display device and method for driving the same | |
JP5805795B2 (ja) | 表示装置およびその駆動方法 | |
WO2013047456A1 (ja) | 表示装置およびその駆動方法、ならびに該表示装置を備えた表示システム | |
WO2014162791A1 (ja) | 駆動装置及び駆動方法並びに表示装置及び表示方法 | |
JP5759613B2 (ja) | 表示装置およびその駆動方法 | |
US9147372B2 (en) | Display device | |
JP5823603B2 (ja) | 駆動装置および表示装置 | |
US9165516B2 (en) | Display device and drive method therefor | |
JP2009069562A (ja) | 液晶表示装置 | |
WO2013118685A1 (ja) | 表示装置およびその駆動方法 | |
WO2013024776A1 (ja) | 表示装置およびその駆動方法 | |
JP4605199B2 (ja) | 液晶表示装置及びその駆動方法 | |
WO2013031552A1 (ja) | 液晶表示装置およびその駆動方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 13755321 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2014502181 Country of ref document: JP Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 14378653 Country of ref document: US |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 13755321 Country of ref document: EP Kind code of ref document: A1 |