WO2013075551A1 - 电子纸有源基板及其制造方法和电子纸显示屏 - Google Patents
电子纸有源基板及其制造方法和电子纸显示屏 Download PDFInfo
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- WO2013075551A1 WO2013075551A1 PCT/CN2012/082361 CN2012082361W WO2013075551A1 WO 2013075551 A1 WO2013075551 A1 WO 2013075551A1 CN 2012082361 W CN2012082361 W CN 2012082361W WO 2013075551 A1 WO2013075551 A1 WO 2013075551A1
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- passivation layer
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field
- G02F1/1675—Constructional details
- G02F1/1676—Electrodes
- G02F1/16766—Electrodes for active matrices
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field
- G02F1/166—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect
- G02F1/167—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect by electrophoresis
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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- G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field
- G02F1/1675—Constructional details
- G02F1/16756—Insulating layers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
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- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Definitions
- Embodiments of the present invention relate to an electronic paper active substrate, a method of fabricating the same, and an electronic paper display. Background technique
- Electrophoresis type electronic paper is one of which realizes image display by using charged particles containing black particles and white particles to move up and down in an applied electric field.
- active matrix drive technology is required for electronic paper to display text information.
- TFT Thin Film Transistor
- Electrophoresis type electronic paper is generally formed by pairing an active substrate and an electrophoretic substrate.
- the electrophoretic substrate is provided with a common electrode and is coated with an electrophoretic particle layer;
- the active substrate is responsible for inputting a data signal to perform real-time control on the displayed image, and is composed of a plurality of pixel units arranged in a matrix form.
- electrophoresis type electronic paper The advantages of electrophoresis type electronic paper are better performance in contrast, brightness and other aspects, low power consumption, light weight and easy to be thinned, and many shapes can be prepared.
- the disadvantage is that the electrophoresis type electronic paper display screen needs to be higher. The voltage, high voltage, and large leakage current. Therefore, in order to maintain charge stability, it is generally necessary to design a large storage capacitor.
- FIG. 1 A cross-sectional structural view of an active substrate in a conventional electronic paper pixel (sub-pixel) structure is shown in FIG.
- the larger the ⁇ the larger the capacitance; the larger the area, the larger the capacitance; the closer the distance, the larger the capacitance.
- the source/drain 5 and the common electrode 3 correspond to the two plates of the capacitor, and the gate insulating layer 4 is an insulating layer.
- ⁇ is related to the insulating material filled between the two plates of the capacitor, when the insulating material is selected, ⁇ is basically a constant value.
- one method is to increase the area where the source drain and the common electrode face each other, but the pixel area itself is limited, so the effect of the method is limited; another method is to reduce the gate The thickness of the insulating layer, but the gate insulating layer is too thin, may cause short-circuit or breakdown of the gate edge and the source and drain, and may affect the performance of the TFT (Thin Film Field Effect Transistor).
- TFT Thin Film Field Effect Transistor
- One of the technical problems to be solved by the embodiments of the present invention is to provide the above-mentioned defects in the prior art, and to provide an electronic paper active substrate capable of effectively improving the storage capacitance without affecting the performance of the TFT device and using the electronic device.
- An embodiment of the present invention provides an electronic paper active substrate, including: a base substrate, a gate, a first common electrode, a second common electrode, a gate insulating layer, an active layer, a source and a drain, and a passivation a layer, a resin passivation layer, and a pixel electrode layer; the gate electrode and the first common electrode are disposed on the base substrate, and the gate insulating layer and the active layer are sequentially disposed on the gate a source drain, a passivation layer, a resin passivation layer, and a pixel electrode layer; the gate electrode layer, the source and drain electrodes, the passivation layer, the second common electrode, and the resin passivation layer are sequentially disposed on the first common electrode And a pixel electrode layer, and the first common electrode and the second common electrode are electrically connected.
- the first common electrode and the second common electrode are arranged in parallel by passing through the gate insulating layer and the second via of the passivation layer Electrically connected to each other.
- the material of the second common electrode is metal or indium tin oxide, or a combination of metal or indium tin oxide.
- the second common electrode contains a metal.
- the area of the first common electrode is The ratio of the area of the pixel electrode in the corresponding pixel unit of the pixel electrode layer is not less than 30%.
- the ratio of the area of the second common electrode to the area of the pixel electrode in the corresponding pixel unit of the pixel electrode layer is not less than 30%.
- a first via hole is formed in the resin passivation layer and the passivation layer above the source drains of the first common electrode and the second common electrode, So that the pixel electrode layer is connected to the source and drain through the first via.
- a second common electrode is added between the passivation layer and the resin passivation layer, and the second common electrode is passed through the second via A common electrode is connected, so that the capacitance originally formed by the source drain and the single common electrode becomes a capacitance formed by the source and drain electrodes and the first and second common electrodes, so that the storage capacitance is greatly increased (nearly increases) Doubled, the storage capacitor limit of electronic paper is greatly expanded.
- Another embodiment of the present invention provides an electronic paper active substrate manufacturing method, including: a gate and a first common electrode forming step for forming a gate and a first common electrode on a base substrate; a layer forming step of forming a gate insulating layer on the gate, the first common electrode, and the surface of the base substrate; an active layer forming step of forming an active layer on the gate insulating layer; and a source/drain forming step for Forming a source drain on the active layer, wherein the source and drain electrodes are at least partially disposed on the gate insulating layer on the first common electrode, and the source and drain electrodes do not completely cover the first common electrode; and the passivation layer forming step is performed Forming a passivation layer on the structure obtained in the source-drain formation step; a second via forming step of forming a second via hole penetrating the passivation layer and the gate insulating layer, thereby Exposing a portion of the first common electrode through the second via hole; a second common electrode
- the electronic paper active substrate manufacturing method further includes: a resin passivation layer forming step of forming a resin passivation layer on the surface of the structure obtained by the second common electrode forming step; the first via formation a step of forming a first via hole over the source drain of the first common electrode and the second common electrode to pass through the resin passivation layer and the passivation layer to expose a portion of the source and drain; and And an electrode layer forming step of forming a pixel electrode layer on the surface of the structure obtained after the first via forming step, wherein the pixel electrode layer is connected to the exposed portion of the source and drain through the first via hole.
- the electronic paper active substrate manufacturing method further includes: a first via first shape And a step of forming a first via lower portion in the passivation layer after the passivation layer forming step.
- the resin passivation layer forming step causes the resin passivation layer to fill the first via lower portion; and the first via formation step further a first via second forming step for forming the first via in the resin passivation layer, the first via including the first via lower portion, thereby the first via And exposing a portion of the source and drain electrodes; and the pixel electrode layer forming step is configured to form a pixel electrode layer on the surface of the structure obtained by the first via first forming step, wherein the pixel electrode layer passes the first pass A hole is connected to the exposed portion of the source drain.
- a second common electrode is added between the passivation layer and the resin passivation layer, and the second common electrode can be connected to the first common electrode through the second via hole.
- the capacitance originally formed by the source drain and the single common electrode becomes a capacitance formed by the source and drain electrodes and the first and second common electrodes, so that the storage capacitance is greatly increased (approximately doubled).
- the storage capacitor limit of electronic paper is greatly expanded.
- Another embodiment of the present invention provides an electronic paper display screen comprising the above described electronic paper active substrate.
- the electronic paper display can also achieve the beneficial technical effects that the electronic paper active substrate can achieve. That is, by adding a second common electrode between the passivation layer and the resin passivation layer, and electrically connecting the second common electrode to the first common electrode through the second via, so that the source and drain are originally
- the capacitance formed by a single common electrode becomes a capacitance formed by the source and drain electrodes and the first and second common electrodes, which nearly doubles the area of the capacitor plate, so that the storage capacitance is greatly increased (nearly doubled) ), the storage capacitor limit of electronic paper is greatly expanded without affecting the performance of the TFT device.
- FIG. 1 is a cross-sectional structural view of a prior art electronic paper active substrate.
- FIG. 2 is a schematic cross-sectional view showing a gate electrode and a first common electrode in an electronic paper active substrate according to a first embodiment of the present invention.
- 3 is a schematic cross-sectional view showing the formation of a gate insulating layer in an electronic paper active substrate according to a first embodiment of the present invention.
- Fig. 4 is a cross-sectional view showing the formation of source and drain electrodes in the electronic paper active substrate of the first embodiment of the present invention.
- Fig. 5 is a cross-sectional view showing the formation of a passivation layer in the electronic paper active substrate of the first embodiment of the present invention.
- Fig. 6 is a schematic cross-sectional view showing the second via hole in the electronic paper active substrate of the first embodiment of the present invention.
- Fig. 7 is a schematic cross-sectional view showing the second common electrode in the electronic paper active substrate of the first embodiment of the present invention.
- Fig. 8 is a schematic cross-sectional view showing the formation of a resin passivation layer in the electronic paper active substrate of the first embodiment of the present invention.
- Fig. 9 is a schematic cross-sectional view showing the first via hole in the electronic paper active substrate of the first embodiment of the present invention.
- Figure 10 is a schematic cross-sectional view showing the formation of a pixel electrode layer in an electronic paper active substrate according to a first embodiment of the present invention.
- Figure 11 is a plan view of one possible electronic paper active substrate of Figure 10.
- Figure 12 is a flow chart showing a method of manufacturing an electronic paper active substrate according to a first embodiment of the present invention.
- Figure 13 is a cross-sectional view showing the second via hole and the first via lower portion simultaneously formed in the electronic paper active substrate according to the second embodiment of the present invention.
- the electronic paper active substrate of the embodiment of the invention includes: a base substrate, a gate, a first common electrode, a gate insulating layer, an active layer, a source and a drain, a passivation layer, a second common electrode, and a resin passivation layer And a pixel electrode layer.
- the active substrate includes a plurality of gate lines 12 and a plurality of data lines 13 which cross each other to define a plurality of pixel units arranged in an array.
- each pixel unit includes a thin film transistor as a switching element, and a gate of the thin film transistor is connected or integrally formed with a corresponding gate line, and one of the source and the drain is connected or integrated with a corresponding data line, and the other source and drain are The pixel electrode is connected.
- the following description is for a single pixel unit, but other pixel units are equally applicable.
- the gate electrode and the first common electrode are directly disposed on the base substrate.
- a gate insulating layer covers the gate and the first common electrode, and covers a portion of the surface of the base substrate that is not covered by the gate and the first common electrode.
- a portion of the source drain is disposed on a portion of the gate insulating layer on the first common electrode (ie, the gate insulating layer over the first common electrode is not completely covered by the source and drain), and the source and drain are further A portion may also be disposed on a portion of the gate insulating layer on the base substrate.
- An active layer (not shown) is disposed between the gate insulating layer and the source and drain electrodes.
- a portion of the passivation layer is disposed on a portion of the gate insulating layer on the first common electrode, and a portion of the passivation layer covers the source drain, the gate insulating layer over the gate, and a nearby region.
- a second common electrode is disposed on the passivation layer.
- first common electrode and the second common electrode are connected to each other through a second via hole that passes through the gate insulating layer and the passivation layer.
- the resin passivation layer covers the second common electrode, and the resin passivation layer also covers a portion of the gate insulating layer.
- the pixel electrode layer covers the resin passivation layer.
- a gate insulating layer, an active layer, a source and a drain, a passivation layer, a resin passivation layer, and a pixel electrode layer are sequentially disposed on the gate; and a gate insulating layer is sequentially disposed on the first common electrode.
- a source drain, a passivation layer, a second common electrode, a resin passivation layer, and a pixel electrode layer are sequentially disposed on the first common electrode.
- the surface of the electronic paper active substrate is formed with a first via hole.
- the gate electrode, the gate insulating layer, the active layer, and the source and drain electrodes constitute a thin film field effect transistor (TFT).
- the pixel electrode layer includes a pixel electrode of each pixel unit for display of the corresponding pixel.
- a resin passivation layer can be used to reduce parasitic capacitance to increase the aperture ratio.
- the thin film field effect transistor is used as a switching element for controlling whether or not the pixel electrode is powered.
- the first common electrode and the second common electrode are common electrodes for forming a storage capacitor in the corresponding pixel unit on the active substrate. It can be seen that a conductive layer (second common electrode) is added between the passivation layer and the resin passivation layer, and the conductive layer is conducted through the first common electrode through a via (second via). Therefore, the area of one capacitor plate of the capacitor is expanded from a single common electrode to two common electrodes, so that the area of the capacitor plate is nearly doubled, so that the first common electrode and the second common electrode together with the source and drain electrodes A larger capacitance is formed, which greatly increases the storage capacitance of the pixel.
- first common electrode and the second common electrode are arranged in parallel so that the effect of increasing the storage capacitance is better.
- the materials of the first common electrode and the second common electrode may be selected from the same materials or different materials.
- the second common electrode may be a metal such as Mo, MO/Al/Mo, Mo/Al/Nd/Mo, or the like, or indium tin oxide (ITO), or a combination of metal or indium tin oxide.
- the second common electrode is, for example, a metal.
- the ratio of the area of the first common electrode to the area of the pixel electrode in the corresponding pixel unit is not less than 30%.
- the ratio of the area of the second common electrode to the area of the pixel electrode in the corresponding pixel unit is not less than 30%.
- Figure 12 is a flow chart showing a method of manufacturing an electronic paper active substrate according to a first embodiment of the present invention. As shown in FIG. 12, the electronic paper active substrate manufacturing method of this embodiment includes the following steps.
- the gate electrode and the first common electrode are formed in step S1 for forming the gate electrode 2 and the first common electrode 3 on the substrate by, for example, a photolithography process.
- 2 is a schematic cross-sectional view showing the formation of the gate electrode 2 and the first common electrode 3 in the active substrate. It can be seen from the figure that the first common three electrode occupies almost the pixel list. Most areas of the yuan. For example, the ratio of the area of the first common electrode 3 to the area of the pixel electrode in the corresponding pixel unit is, for example, not less than 30%.
- the gate electrode 2 and the first common electrode 3 may be formed of the same conductive material such as a metal material or a conductive oxide material, or may be formed of different conductive materials.
- gate lines can also be formed at the same time, and the gate electrodes 2 are electrically connected to the corresponding gate lines.
- the gate insulating layer forming step S2 is for forming a gate insulating layer 4 on the gate 2, the first common electrode 3, and the surface of the substrate (for example, a material for the gate insulating layer is made of silicon dioxide).
- Fig. 3 is a schematic cross-sectional view showing the formation of the gate insulating layer 4 in the active substrate, and it can be seen from the figure that the gate insulating layer covers almost the entire area above the pixel unit.
- the active layer processing step S3 is for performing processing such as deposition, activation, etch patterning on the active layer (not shown).
- processing such as deposition, activation, etch patterning on the active layer (not shown).
- the structure and processing of the active layer (or active area) can be performed using the prior art and will not be described herein.
- the source and drain forming step S4 is for forming the source and drain electrodes 5 on the gate insulating layer.
- the source drain 5 is at least partially disposed on the gate insulating layer 4 on the first common electrode 3, and the source drain 5 does not completely cover the gate insulating layer 4 on the first common electrode 3, but leaves a
- the small block area is prepared for forming a via hole (for example, the second via hole 11 shown in Fig. 6) in the subsequent step, and the area left in Fig. 5 is the right side portion in the drawing.
- the source drain 5 is also used as a self-aligned mask and a channel (not shown) of the active layer is formed by, for example, an etching process.
- Fig. 4 shows a schematic cross-sectional view after the source and drain electrodes 5 are formed in the active substrate.
- a plurality of data lines can be simultaneously formed, one of the source and drain 5 of the same thin film transistor is electrically connected to the corresponding data line, and the other source drain 5 is connected to the corresponding pixel electrode formed later.
- the passivation layer is formed in step S5 for depositing the passivation layer 6 on the resulting structure with, for example, plasma enhanced chemical vapor deposition (PECVD) with SiO 2 or SiNx or other suitable material.
- PECVD plasma enhanced chemical vapor deposition
- a passivation layer 6 is formed on the source and drain electrodes 5 and the gate insulating layer 4 on the first common electrode 3, and on the gate insulating layer 4 over the gate electrode 2 and its vicinity, and FIG. 5 shows A schematic cross-sectional view of the passivation layer 6 in the active substrate after formation.
- the second via forming step S6 is for forming a second via 11 by, for example, a photolithography process, while simultaneously penetrating the passivation layer 6 and the gate insulating layer 4. Thus, a portion of the first common electrode 3 can be exposed through the second via 11, and FIG. 6 shows a schematic cross-sectional view after the formation of the second via 11 in the active substrate.
- the second common electrode forming step S7 is for forming a second common electrode 9, which is connected to the first common electrode 3 through the second via hole 11 formed in the previous step.
- Fig. 7 is a schematic cross-sectional view showing the formation of the second common electrode 9 in the active substrate. In the horizontal direction as shown in FIG.
- the second common electrode 9 and the source and drain electrodes 5 have a large overlapping coverage, and the ratio of the area of the second common electrode 9 to the area of the pixel electrode in the corresponding pixel unit formed later is proportional to If not less than 30%, to form a large storage capacitor. Also, the second common electrode 9 does not cover the first via hole connected between the resin passivation layer 7 and the source and drain electrodes 5 formed in the subsequent step (as shown in FIGS. 9 and 10).
- the second common electrode 9 is, for example, a metal such as Mo, Al, Cu, Al, Nd, or the like, and an alloy thereof, and may be a material such as indium tin oxide.
- the resin passivation layer forming step S8 is for forming a resin passivation layer 7 on the surface of the structure obtained in the step S7.
- the basic requirements for material selection of the resin passivation layer 7 are: low dielectric constant, that is, £ ⁇ 5, Such as JSR's PC403, PC405G, PC411B, PC415G, PC542, DA-2009 of Dongjin Company.
- Fig. 8 is a schematic cross-sectional view showing the formation of the resin passivation layer 7 in the active substrate.
- the first via forming step S9 is for forming a first via 10 to pass through the resin passivation layer 7 and the passivation layer 6 so that a portion of the source drain 5 is exposed so that the source drain 5 is exposed. A portion is in contact connection with a pixel electrode in the subsequently formed pixel electrode layer 8.
- FIG. 9 is a schematic cross-sectional view showing the formation of the first via hole 10 in the active substrate.
- an etching process (such as wet etching or dry etching) may be selected according to the specific resin passivation layer 7, which can be performed by using a known technique, and is no longer used here. Narration.
- Fig. 10 is a schematic cross-sectional view showing the formation of a pixel electrode layer in an active substrate.
- FIGS. 10 and 11 are schematic plan views showing an example of an active substrate of the electronic paper active substrate shown in FIG. 10, and FIG. 11 is a schematic diagram of an active substrate including six pixel unit structures, but the present embodiment The pixel unit in the example is not limited thereto.
- FIG. 10 is a schematic cross-sectional view of an electronic paper active substrate taken along line AA shown in FIG. 10 and 11 clearly show the position of the second via hole 11 in the electronic paper active substrate.
- the difference between this embodiment and the first embodiment is that the electronic paper active substrate manufacturing method of the first embodiment needs to etch both the resin passivation layer 7 and the passivation layer 6 in the first via forming step S9.
- a first forming step of forming the first via hole 10 in the passivation layer 6 (for example, by etching) is convenient to obtain a structure in which the second via hole 11 and the lower portion of the first via hole 10 are formed.
- the second via forming step and the first via first forming step can be performed in the same etching step, that is, the formation of both is completed in one time using a mask, as shown in Fig. 13, thereby saving the formation process.
- the resin passivation layer forming step S8 fills the lower portion of the first via hole. Subsequently, in the first via forming step S9, only the material of the resin passivation layer is etched once to form the structure shown in Fig. 9.
- the electronic paper active substrate of the embodiment of the present invention has a second common electrode structure, and therefore, the single common electrode is expanded into two common electrodes, thereby increasing the area of the capacitor plate by nearly double, and the storage capacitance of the pixel It is nearly doubled without affecting the performance of the formed thin film transistor (TFT) device.
- TFT thin film transistor
- an embodiment of the present invention provides an electronic paper display screen comprising the electronic paper active substrate and the electrophoretic substrate according to the first embodiment or the second embodiment.
- a common electrode is provided on the electrophoretic substrate, and an electrophoretic particle layer is also coated.
- the active substrate is responsible for inputting the data signal to control the image in real time, including a plurality of pixel units arranged in a matrix form.
- Electronic paper active due to an embodiment of the present invention
- the substrate has a large storage capacitor, so the ability of the electronic paper display to withstand high voltage and large leakage current can be effectively improved.
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Abstract
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KR1020127031145A KR101431655B1 (ko) | 2011-11-23 | 2012-09-28 | 전자 종이 능동 기판 및 전자 종이 능동 기판을 형성하는 방법 그리고 전자 종이 디스플레이 패널 |
US13/703,469 US8861065B2 (en) | 2011-11-23 | 2012-09-28 | Electronic paper active substrate and method of forming the same and electronic paper display panel |
EP12788101.9A EP2784575B1 (en) | 2011-11-23 | 2012-09-28 | Manufacturing method for electronic paper active substrate |
JP2014542686A JP6280042B2 (ja) | 2011-11-23 | 2012-09-28 | 電子ペーパー能動基板とその製造方法及び電子ペーパーディスプレイスクリーン |
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CN201110375687.3A CN102645811B (zh) | 2011-11-23 | 2011-11-23 | 电子纸有源基板及其制造方法和电子纸显示屏 |
CN201110375687.3 | 2011-11-23 |
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US (1) | US8861065B2 (zh) |
EP (1) | EP2784575B1 (zh) |
JP (1) | JP6280042B2 (zh) |
KR (1) | KR101431655B1 (zh) |
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CN102645811B (zh) | 2011-11-23 | 2014-07-02 | 京东方科技集团股份有限公司 | 电子纸有源基板及其制造方法和电子纸显示屏 |
CN105914212B (zh) * | 2016-05-09 | 2019-02-05 | 京东方科技集团股份有限公司 | 阵列基板及其制作方法、以及显示装置 |
CN107978612B (zh) | 2017-11-30 | 2021-01-26 | 京东方科技集团股份有限公司 | 柔性显示基板及其制备方法、柔性显示面板及显示装置 |
CN108598093B (zh) | 2018-05-24 | 2021-01-15 | 京东方科技集团股份有限公司 | 阵列基板的制造方法、阵列基板和显示面板 |
CN116256907A (zh) * | 2022-12-30 | 2023-06-13 | 惠科股份有限公司 | 混排产品的制备方法及电子纸面板 |
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Publication number | Publication date |
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EP2784575A1 (en) | 2014-10-01 |
EP2784575A4 (en) | 2015-07-08 |
US8861065B2 (en) | 2014-10-14 |
KR20130070606A (ko) | 2013-06-27 |
US20140071514A1 (en) | 2014-03-13 |
CN102645811B (zh) | 2014-07-02 |
CN102645811A (zh) | 2012-08-22 |
EP2784575B1 (en) | 2020-02-26 |
KR101431655B1 (ko) | 2014-08-20 |
JP6280042B2 (ja) | 2018-02-14 |
JP2014534478A (ja) | 2014-12-18 |
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