WO2013013443A1 - 液晶显示装置及其插黑方法 - Google Patents

液晶显示装置及其插黑方法 Download PDF

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WO2013013443A1
WO2013013443A1 PCT/CN2011/079983 CN2011079983W WO2013013443A1 WO 2013013443 A1 WO2013013443 A1 WO 2013013443A1 CN 2011079983 W CN2011079983 W CN 2011079983W WO 2013013443 A1 WO2013013443 A1 WO 2013013443A1
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row
pixel
pixel units
liquid crystal
crystal display
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English (en)
French (fr)
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侯鸿龙
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US13/375,632 priority Critical patent/US20130021385A1/en
Publication of WO2013013443A1 publication Critical patent/WO2013013443A1/zh
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G09G2310/062—Waveforms for resetting a plurality of scan lines at a time

Definitions

  • the present invention relates to a display device, and more particularly to a liquid crystal display device and a method of inserting the same.
  • the liquid crystal display uses the rotation of the liquid crystal to control the amount of light penetration to display different brightness gray levels.
  • the CRT uses an impulse-type display mode, and the liquid crystal display uses a voltage-continuous-hold drive mode. Since the liquid crystal rotation is continuously changed, the liquid crystal display is reflected in the dynamic picture performance. It is slower than the cathode ray tube display, so the liquid crystal display will produce smear when displaying the moving object picture.
  • a black screen is added between each play picture to generate a pulse display mode like a cathode ray (CRT) display, thereby eliminating the user's motion picture by this method.
  • the smear caused by the persistence of vision, the above solution is called black insertion. Insertion) technology.
  • using black insertion technology to display a picture generally requires twice the frame rate to change the picture speed, that is, the scanning frequency is from 60. Hz becomes 120 Hz. That is to say, the correct display voltage of the pixel is given to the pixel during the period of one frame, and the black level voltage (ie, the black screen) of the pixel is given during the period of the other frame. It can be seen from the above that the conversion of the gray scale of the pixel is started from the black level voltage, which ensures that the rotation of the liquid crystal is more stable.
  • the liquid crystal display device of the present invention adopts the following technical solution: a liquid crystal display device including N scan lines, first and second pixel units in which N rows are alternately arranged, N/2 auxiliary scan lines, and a plurality of switches .
  • Each of the first pixel units of each row and the plurality of second pixel units of each row respectively correspond to one scan line, and each of the first pixel unit and the second pixel unit includes a pixel electrode and a common electrode.
  • the N/2 auxiliary scan lines are respectively disposed between the first pixel unit of the i-th row and the plurality of second pixel units of the i+1th row, wherein N is a positive integer greater than 1, and i is an odd number And 1 ⁇ i ⁇ N.
  • the plurality of switches are disposed on the N/2 auxiliary scan lines for controlling the plurality of second pixel units located in the first pixel unit and the i+1th row of the i-th row,
  • the common electrode is electrically connected to the pixel electrode.
  • the plurality of switches are a plurality of thin film transistors.
  • Each of the thin film transistors has a gate, a source, a first drain, and a second drain, wherein the gate is the auxiliary scan line, the source, the first drain And the second drain is disposed above the auxiliary scan line.
  • the source is electrically connected to the first common electrode of the first pixel unit located in the i-th row and the second common electrode of the second pixel unit located in the (i+1)-th row.
  • the first drain is electrically connected to the first pixel electrode of the first pixel unit located in the ith row
  • the second drain is electrically connected to the second pixel located in the i+1th row a second pixel electrode of the pixel unit.
  • signals of the first common electrode and the second common electrode are simultaneously introduced into the first pixel electrode and the second pixel electrode.
  • the pixel unit corresponding to the first pixel electrode and the second pixel electrode appears black.
  • the black insertion method of the liquid crystal display device of the present invention adopts the following technical solution: a black insertion method of a liquid crystal display device, wherein the liquid crystal display device includes N scanning lines and first pixels in which N rows are alternately arranged. a unit and a second pixel unit, N/2 auxiliary scan lines respectively disposed between the plurality of first pixel units of the i-th row and the plurality of second pixel units of the i+1th row, and Each of the first and second pixel units includes a pixel electrode and a common electrode, N is a positive integer greater than 1, and i is an odd number and 1 ⁇ i ⁇ N.
  • the black insertion method includes sequentially passing the first pixel unit and the second pixel unit alternately arranged in the N rows such that the first pixel unit and the second pixel are alternately arranged corresponding to the N rows of the N scan lines
  • the pixel unit displays its predetermined picture; and sequentially drives the plurality of switches through the N/2 auxiliary scan lines when driving to the plurality of first pixel units and the i+1th line located in the i-th row
  • the auxiliary scan lines are between the plurality of second pixel units, the plurality of switches located thereon are turned on by the plurality of first pixel units in the i-th row and the plurality of (i+1)th rows
  • the timing of driving the auxiliary scan line between the plurality of first pixel units of the i-th row and the plurality of second pixel units of the i+1th row is driving the i-th or the The scan lines of i+1 are after a half frame period.
  • the liquid crystal display device of the present invention has the plurality of auxiliary scanning lines, so that signals at the common electrodes can be introduced into the pixel electrodes to achieve the effect of black insertion.
  • the auxiliary scanning lines corresponding to the i-th line may be delayed by half a frame period to simultaneously simultaneously the ith line.
  • a plurality of first pixel units and a plurality of second pixel units of the i+1th row are blacked out.
  • the black insertion method of the present invention does not need to increase the update frequency of the picture, and the conversion of the gray scale of the pixel starts from the black level voltage, thereby ensuring that the rotation of the liquid crystal is more stable.
  • FIG. 1 is a schematic view showing the structure of a pixel of a liquid crystal display device according to a preferred embodiment of the present invention.
  • FIG. 2 is a schematic diagram of an active area of a liquid crystal display device according to a preferred embodiment of the present invention.
  • FIG. 3 is a flow chart of a black insertion method according to a preferred embodiment of the present invention.
  • FIG. 4 is a schematic diagram of black insertion of an active area according to a preferred embodiment of the present invention.
  • FIG. 5 is a schematic diagram of black insertion of an active area according to a preferred embodiment of the present invention.
  • FIG. 6 is a schematic diagram of black insertion of an active area according to a preferred embodiment of the present invention.
  • FIG. 7 is a schematic diagram of black insertion of an active area according to a preferred embodiment of the present invention.
  • FIG. 1 is a schematic diagram of a pixel structure of a liquid crystal display device according to a preferred embodiment of the present invention
  • FIG. 2 is a schematic diagram of an active area of a liquid crystal display device according to a preferred embodiment of the present invention.
  • the liquid crystal display device includes N scan lines 120, first pixel units 102 and second pixel units 104 alternately arranged in N rows, N/2 auxiliary scan lines 125, and a plurality of switches 150.
  • the first pixel unit 102 and the second pixel unit 104 in which the N rows are alternately arranged form an active region 10 of the liquid crystal display device.
  • Each row of first pixel unit 102 includes a plurality of first pixel units 102
  • each row of second pixel units 104 includes a plurality of second pixel units 104.
  • the first pixel unit 102 of the first row corresponds to the first scanning line 120
  • the second pixel units 104 of the second row correspond to the second scanning line 120
  • the first pixel units 102 of the third row correspond to the fourth scan line 120, and so on.
  • the first pixel unit 102 and the second pixel unit 104 are between the first scan line 120 and the second scan line 120, such as the i-th scan line and the i+1th scan in FIG. As shown by the line, where i is an odd number.
  • N is a positive integer greater than 1
  • i is an odd number and 1 ⁇ i ⁇ N.
  • the first pixel unit 102 and the second pixel unit 104 are similar to each other in a mirror structure.
  • Each of the first pixel unit 102 and the second pixel unit 104 includes a pixel electrode 160 and a common electrode 170.
  • the pixel electrode 160 is insulatively disposed on the common electrode 170.
  • the common electrode 170 is not limited to a cross shape as shown in the drawing, and other shapes may be implemented.
  • the pixel electrode 160 is electrically connected to the data line 140 through a thin film transistor 110 well known to those skilled in the art, and details thereof will not be described herein.
  • the N/2 auxiliary scan lines 125 are respectively disposed between the i-th row first pixel unit 102 and the i+1-th row second pixel unit 104. As shown in FIG. 2, specifically, an auxiliary scan line 125, a third row of the first pixel unit 102, and a fourth row are disposed between the first row of the first pixel unit 102 and the second row of the second pixel unit 104. An auxiliary scan line 125 is disposed between the second pixel units 104, and so on. It is worth mentioning that the auxiliary scan lines 125 are in the same layer as the scan lines 120 and are insulatively staggered to the plurality of data lines 140.
  • the plurality of switches 150 are disposed on the N/2 auxiliary scan lines 125 for controlling the plurality of first pixel units 102 and the second pixel units 104 of the i+1th row located in the i-th row.
  • the common electrode 170 is electrically connected to the pixel electrode 160.
  • the plurality of switches 150 are a plurality of thin film transistors. Each of the thin film transistors has a gate 152, a source 154, a first drain 156, and a second drain 158.
  • the gate 152 is implemented by the auxiliary scan line 125.
  • the source 154, the first drain 156, and the second drain 158 are disposed on the auxiliary scan line 125.
  • the source 154 is electrically connected to the common electrode 170 of the first pixel unit 102 in the i-th row (specifically distinguished by the first common electrode 172) and the second pixel unit 104 located in the (i+1)th row.
  • the common electrode 170 (specifically distinguished by the second common electrode 174).
  • the first drain 156 is electrically connected to the pixel electrode 160 of the first pixel unit 102 in the i-th row (specifically distinguished by the first pixel electrode 162)
  • the second drain 158 is electrically connected to the second drain 158.
  • the pixel electrode 160 of the second pixel unit 104 of the i+1th row specifically distinguished by the second pixel electrode 164).
  • the auxiliary scanning line 125 of the present embodiment will be described as black insertion of the first pixel unit 102 and the second pixel unit 104: when the gate 152 is at a high level, the switch 150 is turned on.
  • the signals of the first common electrode 172 and the second common electrode 174 are simultaneously introduced into the first pixel electrode 162 and the second pixel electrode 164. Therefore, the first pixel unit 102 and the second pixel unit 104 corresponding to the first pixel electrode 162 and the second pixel electrode 164 simultaneously exhibit black color to achieve black insertion.
  • the liquid crystal display device includes N scan lines 120 and first pixel units 102 in which N rows are alternately arranged. And the second pixel unit 104, N/2 auxiliary scan lines 125 respectively disposed between the first pixel unit 102 of the i-th row and the second pixel unit 104 of the i+1th row, and the N/
  • Each of the first pixel unit 102 and the second pixel unit 104 includes a pixel electrode 160 and a common electrode 170, wherein N is a positive integer greater than 1, i It is odd and 1 ⁇ i ⁇ N.
  • FIG. 3 is a flow chart of a black insertion method according to a preferred embodiment of the present invention, which begins in step S10.
  • step S10 the first pixel unit 102 and the second pixel unit 104 that are alternately arranged in the N rows are sequentially driven through the N scan lines 120 such that the N rows corresponding to the N scan lines 120 are alternated.
  • the arranged first pixel unit 102 and second pixel unit 104 display their predetermined pictures.
  • FIG. 4 and FIG. 5 are schematic diagrams showing the black insertion of the active area according to the preferred embodiment of the present invention.
  • the scan line 120 is driven from the first pixel unit 102 of the first row, so that the first pixel units 102 of the first row display their predetermined pictures, wherein the driving position is dotted.
  • the arrow indicates.
  • the scan line 120 drives the second pixel unit 104 of the second row such that the plurality of second pixel units 104 of the second row display their predetermined pictures. And so on, the first pixel unit 102 and the second pixel unit 104 which are alternately arranged in N rows are sequentially scanned.
  • step S20 the plurality of switches 150 are sequentially driven by the N/2 auxiliary scan lines 125, as shown in FIG. 1, when driven to the plurality of first pixel units 102 and the first row located in the i-th row.
  • the auxiliary scan lines 125 between the plurality of second pixel units 104 of the i+1 row the plurality of switches 150 located thereon are turned on by the plurality of first pixel units 102 and the first row located in the i-th row
  • the timing of driving the auxiliary scan line 125 between the plurality of first pixel units 102 of the i-th row and the plurality of second pixel units 104 of the i+1th row is driven. It is after driving the scan line 120 of the ith strip to pass a half frame period.
  • FIG. 4 and FIG. 5 are schematic diagrams showing the black insertion of the active area according to a preferred embodiment of the present invention.
  • the active region 10 immediately before the half-frame period is as shown in FIG. )
  • Several pixel units of +1 line are driven before they are completed.
  • the auxiliary scan lines 125 between the plurality of first pixel units 102 of the first row and the plurality of second pixel units 104 of the second row are driven such that the plurality of rows of the first row
  • the first pixel unit 102 and the plurality of second pixel units 104 of the second row simultaneously become black screens, as shown in FIG.
  • the auxiliary scan lines 125 between the plurality of first pixel units 102 in the third row and the plurality of second pixel units 104 in the fourth row are driven. It can be seen from the above that the active area of the preferred embodiment has substantially half of the frame as a black picture to achieve the effect of black insertion.
  • driving the auxiliary scan lines 125 between the plurality of first pixel units 102 of the i-th row and the plurality of second pixel units 104 of the i+1th row The time is after driving the scan line 120 of the (i+1)th to pass the half frame period.
  • the liquid crystal display device of the present invention has the N/2 auxiliary scanning lines 125, so that the signal at the common electrode 170 can be introduced into the pixel electrode 160 to achieve the effect of black insertion.
  • the auxiliary scanning lines 150 corresponding to the ith row may be delayed by half a frame period to At the same time, the plurality of first pixel units 102 of the i-th row and the plurality of second pixel units 104 of the i+1th row are blackened.
  • the black insertion method of the present invention does not need to increase the update frequency of the picture, and the conversion of the gray scale of the pixel is started from the black level voltage, which ensures that the rotation of the liquid crystal is more stable, and solves the above problem.

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Abstract

一种液晶显示装置及其插黑方法。液晶显示装置包括N条扫描线（120）、N行交替排列的第一像素单元（102）和第二像素单元（104）、N/2条辅助扫描线（125）及若干开关（150）。N/2条辅助扫描线（125）分别设置于第i行所述若干第一像素单元（102）和第i+1行所述若干第二像素单元（104）之间，其中N为大于1的正整数，i为奇数且1≤i<N。若干开关（150）设置于若干辅助扫描线（125）上，用于控制第i行及第i+1行的若干第一像素单元（102）及第二像素单元（104）的导通。液晶显示装置的插黑方法中，驱动辅助扫描线的时刻是在驱动扫描线之后。液晶显示装置不需提高画面的更新频率，而使液晶的转动更加稳定。

Description

液晶显示装置及其插黑方法 技术领域
本发明是有关于一种显示装置，且特别是有关于一种液晶显示装置及其插黑方法。
 背景技术
液晶显示器是利用液晶的旋转来控制光线的穿透量，以显示不同的亮度灰阶。相较于阴极射线管(Cathode Ray Tube, CRT)显示器使用脉冲式(impulse-type)的显示方式，液晶显示器则是使用电压连续保持(hold-type)的驱动方式，由于液晶旋转为连续变化，使得液晶显示器在动态画面表现的反应速度上较阴极射线管显示器慢，所以液晶显示器在显示移动之物体画面时会产生拖影现象。
为了解决拖影的问题，在播放动态画面时，利用每一播放画面间加入全黑画面，使其产生如同阴极射线(CRT)显示器的脉冲式显示方式，通过这种方法消除使用者对动态影像所产生视觉暂留而产生的拖影，上述解决方法称为插黑(Black Insertion)技术。现有技术中利用插黑技术显示画面，一般而言需要两倍的画面传输率(frame rate)来改变画面速度，亦即将扫描频率从60 Hz变为120Hz。也就是说，在一帧画面的期间内，给予像素正确的显示电压，在另一帧画面的期间内，给予像素黑阶电压(亦即黑画面)。由上可知，像素灰阶的转换皆从黑阶电压出发，可确保液晶的转动更加稳定。
然而，在大尺寸的液晶显示器或是在3D显示时，需要再提高的画面更新频率，使得像素在灰阶转换的时间很短，此则造成由于液晶分子的反应时间不足，无法达到预定的状态，而造成影像品质劣化。
 技术问题
本发明的目的在于提供一种液晶显示装置及其插黑方法 。
技术解决方案
本发明的液晶显示装置采取以下技术方案：一种液晶显示装置，其包括N条扫描线、N行交替排列的第一像素单元和第二像素单元、N/2条辅助扫描线、及若干开关。每一行的所述若干第一像素单元和每一行所述若干第二像素单元分别对应一条扫描线，每一所述第一像素单元和第二像素单元均包括一像素电极及一共通电极。所述N/2条辅助扫描线分别设置于第i行所述若干第一像素单元和第i+1行所述若干第二像素单元之间，其中N为大于1的正整数，i为奇数且1≤i＜N。所述若干开关设置于所述N/2条辅助扫描线上，其用于控制位于第i行所述若干第一像素单元和第i+1行的所述若干第二像素单元中，所述共通电极与所述像素电极的导通。
优选地，所述若干开关是若干薄膜晶体管。每一所述薄膜晶体管具有一闸极、一源极、一第一漏极、及一第二漏极，其中所述闸极为所述辅助扫描线，所述源极、所述第一漏极、及所述第二漏极设置于所述辅助扫描线之上。具体来说，所述源极电性连接于位于第i行的所述第一像素单元的第一共通电极以及位于第i+1行的所述第二像素单元的第二共通电极。另外，所述第一漏极电性连接于位于第i行的所述第一像素单元的第一像素电极，所述第二漏极电性连接于位于第i+1行的所述第二像素单元的第二像素电极。
在一较佳实施例中，所述闸极在高电平时，所述第一共通电极及所述第二共通电极的信号同时导入所述第一像素电极及所述第二像素电极。对应所述第一像素电极及所述第二像素电极的像素单元呈现黑色。
为达上述的目的，本发明的液晶显示装置的插黑方法采取以下技术方案：一种液晶显示装置的插黑方法，所述液晶显示装置包括N条扫描线、N行交替排列的第一像素单元和第二像素单元、分别设置于第i行的所述若干第一像素单元及第i+1行的所述若干第二像素单元之间的N/2条辅助扫描线、及设置于所述N/2条辅助扫描线上的若干开关，每一所述第一像素单元和第二像素单元均包括一像素电极及一共通电极，N为大于1的正整数，i为奇数且1≤i＜N。
所述插黑方法包括：依序通过所述N行交替排列的第一像素单元和第二像素单元，使得对应所述N条扫描线的所述N行交替排列的第一像素单元和第二像素单元显示其预定的画面；以及依序通过所述N/2条辅助扫描线驱动所述若干开关，当驱动到位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的辅助扫描线时，位于其上的所述若干开关导通位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元的所述共通电极与所述像素电极，其中驱动所述辅助扫描线的时刻是在驱动所述扫描线之后。
优选地，驱动位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的所述辅助扫描线的时刻是在驱动第i条或者第i+1条所述扫描线经过半个帧周期之后。
 有益效果
本发明的液晶显示装置具有所述若干辅助扫描线，使得在共通电极的信号可导入像素电极，达到插黑的效果。另外，根据本发明的插黑方法，在第i行的若干第一像素单元显示其预定的画面之后，可延迟半个帧周期在驱动对应第i行的辅助扫描线，以同时对第i行的若干第一像素单元及第i+1行的若干第二像素单元进行插黑。由上可知，本发明的插黑方法不需提高画面的更新频率，而且像素灰阶的转换皆从黑阶电压出发，可确保液晶的转动更加稳定。
 附图说明
图1为本发明较佳实施例的液晶显示装置的像素结构示意图。
图2为本发明较佳实施例的液晶显示装置的主动区域示意图。
图3为本发明较佳实施例的插黑方法流程图。
图4为本发明较佳实施例的主动区域插黑示意图。
图5为本发明较佳实施例的主动区域插黑示意图。
图6为本发明较佳实施例的主动区域插黑示意图。
图7为本发明较佳实施例的主动区域插黑示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附图，用以例示本发明可用以实施的优选实施例。
请参照图1及图2，图1为本发明较佳实施例的液晶显示装置的像素结构示意图，图2为本发明较佳实施例的液晶显示装置的主动区域示意图。所述液晶显示装置包括N条扫描线120、N行交替排列的第一像素单元102和第二像素单元104、N/2条辅助扫描线125、及若干开关150。如图2所示，所述N行交替排列的第一像素单元102和第二像素单元104形成液晶显示装置的主动区域10。每一行第一像素单元102包括若干个第一像素单元102，每一行第二像素单元104包括若干个第二像素单元104。
具体而言，第1行的若干第一像素单元102对应第1条扫描线120，第2行的若干第二像素单元104对应第2条扫描线120，第3行的若干第一像素单元102对应第3条扫描线120，第4行的若干第二像素单元104对应第4条扫描线120，依此类推。需注意的是，第一条扫描线120与第二条扫描线120之间有第一像素单元102及第二像素单元104，如图1中的第i条扫描线及第i+1条扫描线所示，其中i为奇数。另外，第二条扫描线120与第三条扫描线120之间则没有像素单元，即第i+1条扫描线及第i+2条扫描线之间没有像素单元。其中， N为大于1的正整数，i为奇数且1≤i＜N。
如图1所示，第一像素单元102与第二像素单元104是类似互为镜射的结构。每一所述第一像素单元102与第二像素单元104均包括一像素电极160及一共通电极170。所述像素电极160绝缘地设置于所述共通电极170之上，其中共通电极170并不限于如图中所示的十字形形状，其他形状亦可实施之。所述像素电极160是通过本领域技术人员所熟知的薄膜晶体管110与资料线140电性连接，其细节在此不再赘述。
所述N/2条辅助扫描线125分别设置于第i行第一像素单元102及第i+1行第二像素单元104之间。如图2所示，具体来说，即第1行第一像素单元102及第2行第二像素单元104之间设置有一条辅助扫描线125、第3行第一像素单元102及第4行第二像素单元104之间设置有一条辅助扫描线125，依此类推。值得一提的是，辅助扫描线125与扫描线120位于同一层，且绝缘地交错于所述若干资料线140。
所述若干开关150设置于所述N/2条辅助扫描线125上，其用于控制位于第i行的若干第一像素单元102及第i+1行的若干第二像素单元104中，所述共通电极170与所述像素电极160的导通。在此较佳实施例中，所述若干开关150是若干薄膜晶体管。每一所述薄膜晶体管具有一闸极152、一源极154、一第一漏极156、及一第二漏极158。所述闸极152为由所述辅助扫描线125来实施。所述源极154、所述第一漏极156、及所述第二漏极158设置于所述辅助扫描线125之上。进一步来说，所述源极154电性连接位于第i行的第一像素单元102的共通电极170（特以第一共通电极172来区分）以及位于第i+1行的第二像素单元104的共通电极170（特以第二共通电极174来区分）。另外，所述第一漏极156电性连接位于第i行的第一像素单元102的像素电极160（特以第一像素电极162来区分），所述第二漏极158电性连接于位于第i+1行的第二像素单元104的像素电极160（特以第二像素电极164来区分）。
以下说明本实施例的辅助扫描线125对第一像素单元102与第二像素单元104进行插黑：所述闸极152在高电平时，开关150导通。所述第一共通电极172及所述第二共通电极174的信号同时导入所述第一像素电极162及所述第二像素电极164。因此，对应所述第一像素电极162及所述第二像素电极164的第一像素单元102及第二像素单元104同时呈现黑色，以达成插黑。
以下将详细说明采用此较佳实施例的液晶显示装置的插黑方法：请再参照图1及图2，所述液晶显示装置包括N条扫描线120、N行交替排列的第一像素单元102和第二像素单元104、分别设置于第i行的第一像素单元102和第i+1行的第二像素单元104之间的N/2条辅助扫描线125、及设置于所述N/2条辅助扫描线125上的若干开关150，每一所述第一像素单元102与第二像素单元104均包括一像素电极160及一共通电极170，其中，N为大于1的正整数，i为奇数且1≤i＜N。上述元件之说明请参考前述，其细节在此不在赘述。
请参照图3，图3为本发明较佳实施例的插黑方法流程图，其开始于步骤S10。
在步骤S10中，依序通过所述N条扫描线120驱动所述N行交替排列的第一像素单元102和第二像素单元104，使得对应所述N条扫描线120的所述N行交替排列的第一像素单元102和第二像素单元104显示其预定的画面。请参照图4及图5，图4及图5为本发明较佳实施例的主动区域插黑示意图。举例而言，如图4所示，所述扫描线120从第1行的第一像素单元102开始驱动，使得第1行的若干第一像素单元102显示其预定的画面，其中驱动位置以虚线箭头表示。接着，如图5所示，所述扫描线120驱动第2行的第二像素单元104，使得第2行的若干第二像素单元104显示其预定的画面。依此类推，依序扫描驱动N行交替排列的第一像素单元102和第二像素单元104。
在步骤S20中，依序通过所述N/2条辅助扫描线125驱动所述若干开关150，如图1所示，当驱动到位于第i行的所述若干个第一像素单元102及第i+1行的所述若干个第二像素单元104之间的辅助扫描线125时，位于其上的所述若干开关150导通位于第i行的所述若干个第一像素单元102及第i+1行的所述若干个第二像素单元104的所述共通电极170与所述像素电极160，其中驱动所述辅助扫描线125的时刻是在驱动所述扫描线120之后。
在此较佳实施例中，驱动位于第i行的所述若干个第一像素单元102及第i+1行的所述若干个第二像素单元104之间的所述辅助扫描线125的时刻是在驱动第i条所述扫描线120经过半个帧(frame)周期之后。
请参照图4至图7，其中图4及图5为本发明较佳实施例的主动区域插黑示意图。举第i行为第1行为例，在驱动第1行的所述若干个第一像素单元102后，即将经过半个帧周期之前的主动区域10如图6所示，即为第(N/2)+1行的若干像素单元被驱动完成之前。接下来，驱动位于第1行的所述若干个第一像素单元102及第2行的所述若干个第二像素单元104之间的所述辅助扫描线125，使得第1行的所述若干个第一像素单元102及第2行的所述若干个第二像素单元104同时变成黑画面，如图7所示。以此类推，皆下来驱动位于第3行的所述若干个第一像素单元102及第4行的所述若干个第二像素单元104之间的所述辅助扫描线125。由上可知，此较佳实施例的主动区域大致上皆有半个帧为黑画面，以达到插黑的效果。
在另一较佳实施例中，驱动位于第i行的所述若干个第一像素单元102及第i+1行的所述若干个第二像素单元104之间的所述辅助扫描线125的时刻是在驱动第i+1条所述扫描线120经过半个帧周期之后。可参考前述类推，其细节不再赘述。
综上所述，本发明的液晶显示装置具有所述N/2条辅助扫描线125，使得在共通电极170的信号可导入像素电极160，而达到插黑的效果。另外，根据本发明的插黑方法，在第i行的所述若干个第一像素单元102显示其预定的画面之后，可延迟半个帧周期再驱动对应第i行的辅助扫描线150，以同时对第i行的所述若干个第一像素单元102及第i+1行的所述若干个第二像素单元104进行插黑。由上可知，本发明的插黑方法不需提高画面的更新频率，而且像素灰阶的转换皆从黑阶电压出发，可确保液晶的转动更加稳定，解决了上述问题。
虽然本发明已用优选实施例揭露如上，然其并非用以限定本发明，本发明所属技术领域的技术人员，在不脱离本发明的精神和范围内，当可作各种的更动与润饰，因此本发明的保护范围当视后附的权利要求书所界定的为准。
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Claims (15)

  1. 一种液晶显示装置的插黑方法，所述液晶显示装置包括N条扫描线、N行交替排列的第一像素单元和第二像素单元、分别设置于第i行的所述若干第一像素单元及第i+1行的所述若干第二像素单元之间的N/2条辅助扫描线、及设置于所述N/2条辅助扫描线上的若干开关，每一所述第一像素单元和第二像素单元均包括一像素电极及一共通电极，N为大于1的正整数，i为奇数且1≤i＜N，其特征在于，所述插黑方法包括：
    依序通过所述N条扫描线驱动所述N行交替排列的第一像素单元和第二像素单元，使得对应所述N条扫描线的所述N行交替排列的第一像素单元和第二像素单元显示其预定的画面；以及
    依序通过所述N/2条辅助扫描线驱动所述若干开关，当驱动到位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的辅助扫描线时，位于其上的所述若干开关导通位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元的所述共通电极与所述像素电极，使得第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元同时呈现黑色，其中驱动位於第i条及第i+1条之间的所述辅助扫描线的时刻是在驱动所述第i条扫描线之后。
  2. 根据权利要求1所述的液晶显示装置的插黑方法，其特征在于，驱动位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的所述辅助扫描线的时刻是在驱动第i条所述扫描线经过半个帧周期之后。
  3. 根据权利要求1所述的液晶显示装置的插黑方法，其特征在于，驱动位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的所述辅助扫描线的时刻是在驱动第i+1条所述扫描线经过半个帧周期之后。
  4. 根据权利要求1所述的液晶显示装置的插黑方法，其特征在于：所述若干开关是若干薄膜晶体管。
  5. 根据权利要求4所述的液晶显示装置的插黑方法，其特征在于，每一所述薄膜晶体管具有一闸极、一源极、一第一漏极、及一第二漏极，其中所述闸极为所述辅助扫描线，所述源极、所述第一漏极、及所述第二漏极设置于所述辅助扫描线之上。
  6. 一种液晶显示装置，其特征在于，包括：
    N条扫描线，N为大于1的正整数；
    N行交替排列的第一像素单元和第二像素单元，每一行所述若干第一像素单元和每一行所述若干第二像素单元分别对应一条扫描线，每一所述第一像素单元和第二像素单元均包括一像素电极及一共通电极；
    N/2条辅助扫描线，分别设置于第i行所述若干第一像素单元和第i+1行所述若干第二像素单元之间，其中i为奇数且1≤i＜N；以及
    若干开关，设置于所述N/2条辅助扫描线上，用于控制位于第i行所述若干第一像素单元和第i+1行所述若干第二像素单元中，所述共通电极与所述像素电极的导通。
  7. 根据权利要求6所述的液晶显示装置，其特征在于：所述若干开关是若干薄膜晶体管。
  8. 根据权利要求7所述的液晶显示装置，其特征在于，每一所述薄膜晶体管具有一闸极、一源极、一第一漏极、及一第二漏极，其中所述闸极为所述辅助扫描线，所述源极、所述第一漏极、及所述第二漏极设置于所述辅助扫描线之上。
  9. 根据权利要求8所述的液晶显示装置，其特征在于，所述源极电性连接于位于第i行的所述第一像素单元的第一共通电极以及位于第i+1行的所述第二像素单元的第二共通电极。
  10. 根据权利要求9所述的液晶显示装置，其特征在于，所述第一漏极电性连接于位于第i行的所述第一像素单元的第一像素电极，所述第二漏极电性连接于位于第i+1行的所述第二像素单元的第二像素电极。
  11. 根据权利要求10所述的液晶显示装置，其特征在于，所述闸极在高电平时，所述第一共通电极及所述第二共通电极的信号同时导入所述第一像素电极及所述第二像素电极。
  12. 根据权利要求11所述的液晶显示装置，其特征在于，对应所述第一像素电极及所述第二像素电极的像素单元呈现黑色。
  13. 一种液晶显示装置的插黑方法，所述液晶显示装置包括N条扫描线、N行交替排列的第一像素单元和第二像素单元、分别设置于第i行的所述若干第一像素单元及第i+1行的所述若干第二像素单元之间的N/2条辅助扫描线、及设置于所述N/2条辅助扫描线上的若干开关，每一所述第一像素单元和第二像素单元均包括一像素电极及一共通电极，N为大于1的正整数，i为奇数且1≤i＜N，其特征在于，所述插黑方法包括：
    依序通过所述N条扫描线驱动所述N行交替排列的第一像素单元和第二像素单元，使得对应所述N条扫描线的所述N行交替排列的第一像素单元和第二像素单元显示其预定的画面；以及
    依序通过所述N/2条辅助扫描线驱动所述若干开关，当驱动到位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的辅助扫描线时，位于其上的所述若干开关导通位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元的所述共通电极与所述像素电极，其中驱动所述辅助扫描线的时刻是在驱动所述扫描线之后。
  14. 根据权利要求13所述的液晶显示装置的插黑方法，其特征在于，驱动位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的所述辅助扫描线的时刻是在驱动第i条所述扫描线经过半个帧周期之后。
  15. 根据权利要求13所述的液晶显示装置的插黑方法，其特征在于，驱动位于第i行的所述若干个第一像素单元及第i+1行的所述若干个第二像素单元之间的所述辅助扫描线的时刻是在驱动第i+1条所述扫描线经过半个帧周期之后。
PCT/CN2011/079983 2011-07-22 2011-09-22 液晶显示装置及其插黑方法 Ceased WO2013013443A1 (zh)

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