Classifications

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  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/40—Optical elements or arrangements
  • H10F77/413—Optical elements or arrangements directly associated or integrated with the devices, e.g. back reflectors
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
  • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
  • H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
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  • H10F10/00—Individual photovoltaic cells, e.g. solar cells
  • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
  • H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
  • H10F10/142—Photovoltaic cells having only PN homojunction potential barriers comprising multiple PN homojunctions, e.g. tandem cells
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  • H10F10/00—Individual photovoltaic cells, e.g. solar cells
  • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
  • H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
  • H10F10/144—Photovoltaic cells having only PN homojunction potential barriers comprising only Group III-V materials, e.g. GaAs,AlGaAs, or InP photovoltaic cells
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  • H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
  • H10F19/30—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells
• • H—ELECTRICITY
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  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F71/00—Manufacture or treatment of devices covered by this subclass
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F71/00—Manufacture or treatment of devices covered by this subclass
  • H10F71/127—The active layers comprising only Group III-V materials, e.g. GaAs or InP
  • H10F71/1272—The active layers comprising only Group III-V materials, e.g. GaAs or InP comprising at least three elements, e.g. GaAlAs or InGaAsP
• • H—ELECTRICITY
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  • H10F71/00—Manufacture or treatment of devices covered by this subclass
  • H10F71/139—Manufacture or treatment of devices covered by this subclass using temporary substrates
  • H10F71/1395—Manufacture or treatment of devices covered by this subclass using temporary substrates for thin-film devices
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/10—Semiconductor bodies
  • H10F77/12—Active materials
  • H10F77/124—Active materials comprising only Group III-V materials, e.g. GaAs
• • H—ELECTRICITY
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  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/10—Semiconductor bodies
  • H10F77/12—Active materials
  • H10F77/124—Active materials comprising only Group III-V materials, e.g. GaAs
  • H10F77/1248—Active materials comprising only Group III-V materials, e.g. GaAs having three or more elements, e.g. GaAlAs, InGaAs or InGaAsP
• • H—ELECTRICITY
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  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/10—Semiconductor bodies
  • H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
  • H10F77/169—Thin semiconductor films on metallic or insulating substrates
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  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/10—Semiconductor bodies
  • H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
  • H10F77/169—Thin semiconductor films on metallic or insulating substrates
  • H10F77/1698—Thin semiconductor films on metallic or insulating substrates the metallic or insulating substrates being flexible
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/52—PV systems with concentrators
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/544—Solar cells from Group III-V materials

Definitions

• the claimed invention was made by, on behalf of, and/or in connection with one or more of the following parties to a joint university-corporation research agreement: University of Michigan and Global Photonic Energy Corporation. The agreement was in effect on and before the date the invention was made, and the claimed invention was made as a result of activities undertaken within the scope of the agreement.
• This disclosure is directed to a ultrahigh-efficiency single- and multi- junction thin-film solar cells.
• This disclosure is also directed to a substrate-damage-free epitaxial lift-off (“ELO") process that employs adhesive-free, reliable and lightweight cold-weld bonding to a substrate, such as bonding to plastic or metal foils shaped into compound parabolic metal foil concentrators.
• ELO epitaxial lift-off
• Optoelectronic devices rely on the optical and electronic properties of materials to either produce or detect electromagnetic radiation electronically or to generate electricity from ambient electromagnetic radiation.
• Photosensitive optoelectronic devices convert electromagnetic radiation into electricity.
• Solar cells also called photovoltaic (PV) devices
• PV devices which may generate electrical energy from light sources other than sunlight, can be used to drive power consuming loads to provide, for example, lighting, heating, or to power electronic circuitry or devices such as calculators, radios, computers or remote monitoring or communications equipment.
• power generation applications also often involve the charging of batteries or other energy storage devices so that operation may continue when direct illumination from the sun or other light sources is not available, or to balance the power output of the PV device with a specific application's requirements.
• the term "resistive load” refers to any power consuming or storing circuit, device, equipment or system.
• Another type of photosensitive optoelectronic device is a photoconductor cell.
• signal detection circuitry monitors the resistance of the device to detect changes due to the absorption of light.
• photosensitive optoelectronic device is a photodetector.
• a photodetector is used in conjunction with a current detecting circuit which measures the current generated when the photodetector is exposed to electromagnetic radiation and may have an applied bias voltage.
• a detecting circuit as described herein is capable of providing a bias voltage to a photodetector and measuring the electronic response of the photodetector to electromagnetic radiation.
• These three classes of photosensitive optoelectronic devices may be characterized according to whether a rectifying junction as defined below is present and also according to whether the device is operated with an external applied voltage, also known as a bias or bias voltage.
• a photoconductor cell does not have a rectifying junction and is normally operated with a bias.
• a PV device has at least one rectifying junction and is operated with no bias.
• a photodetector has at least one rectifying junction and is usually but not always operated with a bias.
• a photovoltaic cell provides power to a circuit, device or equipment, but does not provide a signal or current to control detection circuitry, or the output of information from the detection circuitry.
• a photodetector or photoconductor provides a signal or current to control detection circuitry, or the output of information from the detection circuitry but does not provide power to the circuitry, device or equipment.
• semiconductor denotes materials which can conduct electricity when charge carriers are induced by thermal or electromagnetic excitation.
• photoconductive generally relates to the process in which electromagnetic radiant energy is absorbed and thereby converted to excitation energy of electric charge carriers so that the carriers can conduct, i.e., transport, electric charge in a material.
• photoconductor and photoconductive material are used herein to refer to semiconductor materials which are chosen for their property of absorbing electromagnetic radiation to generate electric charge carriers.
• PV devices may be characterized by the efficiency with which they can convert incident solar power to useful electric power.
• Devices utilizing crystalline or amorphous silicon dominate commercial applications, and some have achieved efficiencies of 23% or greater.
• efficient crystalline-based devices, especially of large surface area are difficult and expensive to produce due to the problems inherent in producing large crystals without significant efficiency-degrading defects.
• high efficiency amorphous silicon devices still suffer from problems with stability.
• Present commercially available amorphous silicon cells have stabilized efficiencies between 4 and 8%. More recent efforts have focused on the use of organic photovoltaic cells to achieve acceptable photovoltaic conversion efficiencies with economical production costs.
• PV devices may be optimized for maximum electrical power generation under standard illumination conditions (i.e., Standard Test Conditions which are 1000 W/m2, AM1.5 spectral illumination), for the maximum product of photocurrent times photovoltage.
• standard illumination conditions i.e., Standard Test Conditions which are 1000 W/m2, AM1.5 spectral illumination
• illumination conditions depends on the following three parameters: (1) the current under zero bias, i.e., the short-circuit current /sc, in Amperes (2) the photovoltage under open circuit conditions, i.e., the open circuit voltage Voc, in Volts and (3) the fill factor, ff.
• PV devices produce a photo-generated current when they are
• PV device When irradiated under infinite load, a PV device generates its maximum possible voltage, V open-circuit, or Voc- When irradiated with its electrical contacts shorted, a PV device generates its maximum possible current, I short-circuit, or Isc- When actually used to generate power, a PV device is connected to a finite resistive load and the power output is given by the product of the current and voltage, I *V. The maximum total power generated by a PV device is inherently incapable of exceeding the product, Isc x V 0 c- When the load value is optimized for maximum power extraction, the current and voltage have the values, l max and V max , respectively. [013] A figure of merit for PV devices is the fill factor, ff, defined as:
• ff ⁇ lmax V max ⁇ / ⁇ l SC Voc ⁇ (1 )
• ff is always less than 1 , as Isc and Voc are never obtained simultaneously in actual use. Nonetheless, as ff approaches 1 , the device has less series or internal resistance and thus delivers a greater percentage of the product of Isc and Voc to the load under optimal conditions.
• P inc is the power incident on a device
• the power efficiency of the device, ⁇ may be calculated by:
• OMC organic chemical vapor deposition
• the generated molecular state is generally believed to be an exciton, i.e., an electron-hole pair in a bound state which is transported as a quasi-particle.
• the excitons can have an appreciable life-time before geminate recombination, which refers to the process of the original electron and hole recombining with each other, as opposed to recombination with holes or electrons from other pairs.
• the electron-hole pair becomes separated, typically at a donor-acceptor interface between two dissimilar contacting organic thin films.
• the charges do not separate, they can recombine in a geminant recombination process, also known as quenching, either radiatively, by the emission of light of a lower energy than the incident light, or non-radiatively, by the production of heat. Either of these outcomes is undesirable in a photosensitive optoelectronic device.
• the usual method is to juxtapose two layers of material with appropriately selected conductive properties, especially with respect to their distribution of molecular quantum energy states.
• the interface of these two materials is called a photovoltaic heterojunction.
• materials for forming PV heterojunctions have been denoted as generally being of either n or p type.
• n- type denotes that the majority carrier type is the electron. This could be viewed as the material having many electrons in relatively free energy states.
• the p-type denotes that the majority carrier type is the hole. Such material has many holes in relatively free energy states.
• the type of the background, i.e., not photo-generated, majority carrier concentration depends primarily on unintentional doping by defects or impurities.
• the type and concentration of impurities determine the value of the Fermi energy, or level, within the gap between the highest occupied molecular orbital (HOMO) energy level and the lowest unoccupied molecular orbital (LUMO) energy level, called the HOMO-LUMO gap.
• the Fermi energy characterizes the statistical occupation of molecular quantum energy states denoted by the value of energy for which the probability of occupation is equal to 1 ⁇ 2.
• a Fermi energy near the LUMO energy level indicates that electrons are the predominant carrier.
• a Fermi energy near the HOMO energy level indicates that holes are the predominant carrier. Accordingly, the Fermi energy is a primary characterizing property of traditional semiconductors and the prototypical PV
• heterojunction has traditionally been the p-n interface.
• rectifying denotes, inter alia, that an interface has an asymmetric conduction characteristic, i.e., the interface supports electronic charge transport preferably in one direction. Rectification is associated normally with a built-in electric field which occurs at the heterojunction between appropriately selected materials.
• a first "Highest Occupied Molecular Orbital” (HOMO) or “Lowest Unoccupied Molecular Orbital” (LUMO) energy level is "greater than” or "higher than” a second HOMO or LUMO energy level if the first energy level is closer to the vacuum energy level.
• IP ionization potentials
• a higher HOMO energy level corresponds to an IP having a smaller absolute value (an IP that is less negative).
• a higher LUMO energy level corresponds to an electron affinity (EA) having a smaller absolute value (an EA that is less negative).
• the LUMO energy level of a material is higher than the HOMO energy level of the same material.
• a "higher” HOMO or LUMO energy level appears closer to the top of such a diagram than a "lower” HOMO or LUMO energy level.
• the terms “donor” and “acceptor” refer to the relative positions of the HOMO and LUMO energy levels of two contacting but different organic materials. This is in contrast to the use of these terms in the inorganic context, where “donor” and “acceptor” may refer to types of dopants that may be used to create inorganic n- and p- types layers, respectively.
• donor and “acceptor” may refer to types of dopants that may be used to create inorganic n- and p- types layers, respectively.
• the LUMO energy level of one material in contact with another is lower, then that material is an acceptor. Otherwise it is a donor. It is energetically favorable, in the absence of an external bias, for electrons at a donor-acceptor junction to move into the acceptor material, and for holes to move into the donor material.
• a significant property in organic semiconductors is carrier mobility.
• Mobility measures the ease with which a charge carrier can move through a conducting material in response to an electric field.
• a layer including a material that conducts preferentially by electrons due to a high electron mobility may be referred to as an electron transport layer, or ETL.
• a layer including a material that conducts preferentially by holes due to a high hole mobility may be referred to as a hole transport layer, or HTL.
• an acceptor material is an ETL and a donor material is a HTL.
• the energy level offset at the organic D-A heterojunction is believed to be important to the operation of organic PV devices due to the fundamental nature of the photogeneration process in organic materials.
• Upon optical excitation of an organic material localized Frenkel or charge-transfer excitons are generated.
• the bound excitons must be dissociated into their constituent electrons and holes.
• Such a process can be induced by the built-in electric field, but the efficiency at the electric fields typically found in organic devices (F ⁇ 10 6 V/cm) is low.
• the most efficient exciton dissociation in organic materials occurs at a donor-acceptor (D-A) interface.
• the donor material with a low ionization potential forms a heterojunction with an acceptor material with a high electron affinity.
• the dissociation of the exciton can become energetically favorable at such an interface, leading to a free electron polaron in the acceptor material and a free hole polaron in the donor material.
• Organic PV cells have many potential advantages when compared to traditional silicon-based devices.
• Organic PV cells are light weight, economical in materials use, and can be deposited on low cost substrates, such as flexible plastic foils.
• organic PV devices typically have relatively low quantum yield (the ratio of photons absorbed to carrier pairs generated, or electromagnetic radiation to electricity conversion efficiency), being on the order of 1 % or less. This is, in part, thought to be due to the second order nature of the intrinsic photoconductive process. That is, carrier generation requires exciton generation, diffusion and ionization or collection. There is an efficiency ⁇ associated with each of these processes. Subscripts may be used as follows: P for power efficiency, EXT for external quantum efficiency, A for photon absorption , ED for diffusion, CC for collection, and INT for internal quantum efficiency. Using this notation:
• ⁇ ⁇ TEXT YA * YED * Ycc
• the diffusion length (L D ) of an exciton is typically much less (L D ⁇ 50 ⁇ ) than the optical absorption length (-500 ⁇ ), requiring a trade-off between using a thick, and therefore resistive, cell with multiple or highly folded interfaces, or a thin cell with a low optical absorption efficiency.
• the intensity decreases exponentially as the flux progresses through the medium. Accordingly, more light is absorbed with a greater thickness of absorbent media or if the absorption constant can be increased.
• the absorption constant for a given photoconductive medium is not adjustable.
• photoconductive materials e.g., 3,4,9,10 perylenetetracarboxylic-bis-benzimidazole (PTCBI), or copper phthalocyanine (CuPc)
• PTCBI perylenetetracarboxylic-bis-benzimidazole
• CuPc copper phthalocyanine
• photosensitive layers absorb a small fraction of incident radiation thus keeping down external quantum efficiency.
• PM tubes operate on an entirely different principle, i.e., the photoelectric effect, from solid state detectors such as the OPVs of the present invention.
• solid state detectors such as the OPVs of the present invention.
• OPVs photomultiplier
• MBE molecular beam epitaxy
• the surface of the processed wafer can be made smoother than the starting wafer, and its surface chemistry also remains unchanged, hence removing the need for wafer re-polishing prior to reuse for growth of additional, and also ultimately removable, epitaxial layers.
• the parent wafer can be reused indefinitely, as none of the original parent wafer is consumed or altered during the process. Indeed, only the epitaxial active layers that comprise the thin-film, single-crystal, high-efficiency solar cell active region are removed from the entire wafer surface, and subsequently cold-welded (without adhesives that add cost, weight and potential for failure) to a second, thin-film "host" substrate.
• the multiple-reuse strategy removes the wafer as a material's cost, and transforms its acquisition into a capital expense, fundamentally changing the cost structure of single crystal lll-V-based solar cells. If the very thin, active epitaxial layers of the solar cell are also bonded to a metal or metalized plastic foil without using adhesives, the cost, weight and form factor of the resulting module is also favorably impacted.
• an ultrahigh-efficiency single- and multi-junction thin-film solar cell is also directed to a substrate-damage-free epitaxial lift-off (“ELO") process that employs adhesive-free, reliable and lightweight cold-weld bonding to a substrate, such as bonding to plastic or metal foils shaped into compound parabolic metal foil concentrators.
• ELO epitaxial lift-off
• the Inventors have discovered that combining low-cost solar cell production and ultrahigh-efficiency of solar intensity-concentrated thin-film solar cells on foil substrates shaped into an integrated collector, can result not only in lower cost of the module itself, but also in significant cost reductions in the infrastructure by replacing heavy modules with ultra-lightweight cells on foils (including low-cost integrated concentrators), with power densities exceeding 6 W/gm.
• the present disclosure is directed to a thin-film solar cell comprising a first substrate; a metal contact bonded to said first substrate; an active photovoltaic region bonded to said metal contact; one or more first protection layers; an AIAs layer; one or more second protection layers; and a second substrate, wherein said second substrate.
• the present disclosure is directed to a thin-film solar cell comprising a first substrate; a metal contact bonded to said first substrate; an active photovoltaic region bonded to said metal contact; one or more first protection layers, wherein at least one of said first protection layers comprise at least one compound chosen from InGaP, GaAs, InGaAs, InP, and InAIP; an AIAs layer; one or more second protection layers, wherein at least one of said second protection layers comprise at least one compound chosen from InGaP, GaAs, InGaAs, InP, and InAIP; and a second substrate, wherein said second substrate comprises at least one compound chosen from GaAs and InP.
• the present disclosure is directed to a method for performing an epitaxial lift-off process, comprising growing one or more first protection layers on a first substrate; growing an AIAs layer; growing one or more second protection layers; depositing at least one active photovoltaic cell layers on top of the second protection layer; coating the top active photovoltaic cell layer with a metal; coating a second substrate with a metal; pressing together the two metal surfaces to form a cold-weld bond; and removing the AIAs layer with a selective chemical etchant.
• the present disclosure is directed to a method for performing an epitaxial lift-off process, comprising growing one or more first protection layers on a first substrate, wherein at least one of said protection layers comprise a compound chosen from InGaP, GaAs, InGaAs, InP, and InAIP; growing an AIAs layer; growing one or more second protection layers, wherein at least one of said protection layers comprise a compound chosen from InGaP, GaAs, InGaAs, InP, and InAIP; depositing at least one active photovoltaic cell layers on top of the second protection layer; coating the top active photovoltaic cell layer with a metal; coating a second substrate with a metal; pressing together the two metal surfaces to form a cold- weld bond; and removing the AIAs layer with a selective chemical etchant.
• Fig. 1. Is a schematic showing the ELO process according to the present disclosure for InP based solar cells.
• Fig. 2. Is a photograph of a two inch InP epitaxial layer lifted off and bonded to a Au-coated Kaption sheet. ITO contacts form the Schotty solar cells.
• Fig. 3. Is an atomic force microscope image of the original epi-ready InP substrate and recovered surfaces after the first and second ELO processes, with and without the use of protection layers.
• Fig. 4. Is test data and a representative GaAs PV cell layer structure showing cell parameters.
• Fig. 5 Is test data showing fourth quadrant current voltage and external quantum efficiency (inset) of a 23.9% efficient first-growth cell and a 22.8% efficient cell grown on a reused wafer.
• Fig. 6. Is a schematic showing the ELO process as applied to an InP material according to the present disclosure.
• Fig. 7. Is a schematic of a trilayer protection scheme with AIAs layer and AIAs lift-off layer.
• Fig. 8. Is a schematic of a proposed multi-junction cell structure according to the present disclosure.
• FIG. 9. Is a schematic of (a) conventional N/P tunnel junctions, and (b) N/ErP/P junction showing the reduced tunneling barriers.
• Fig. 10 Is a schematic of an integrated reflector with cold-welded bonded ELO multi-junction cell.
• FIG. 1 One embodiment of the ELO process is shown schematically in Fig. 1. It begins with the epitaxial growth of the chemically distinct, thin "protection layers" consisting of InGaAs and InP, a sacrificial layer of AIAs, a second set of protection layers of InP and InGaAs, and finally the active photovoltaic cell layers. Next, the top epitaxial layer is coated with Au, as is a very thin plastic (e.g. KaptonTM, a polyimide film marked by DuPont) host substrate. By pressing the two clean Au surfaces together at only a few kPa pressure, they form an electronically continuous and permanent, adhesive-free cold-weld bond whose properties are indistinguishable from a single, bulk Au film.
• a very thin plastic e.g. KaptonTM, a polyimide film marked by DuPont
• the wafer is ready for ELO.
• the cold- weld bond is used not only for the ELO process (the epi-layer is attached permanently to the foil substrate prior to the liftoff, peeling away the parent substrate for eventual reuse) but also as the adhesive to the new host substrate on which the solar cells are eventually fabricated.
• protection layer nearest the AIAs ELO layer is to provide an etch selectivity >10 8 :1 and is removed from both the substrate and the parted epitaxial layers with a second wet etch (HCI:H 3 PO 4 , 3:1) that stops at the InGaAs protection layer surface.
• HCI:H 3 PO 4 , 3:1 a wet etch that stops at the InGaAs protection layer surface.
• the requirements of the second protection layer are that it can be removed with a wet etchant that stops abruptly at the InP substrate.
• the InGaAs layer is removed from the wafer using (1 :1:10), followed by (20:1), both of which have high selectivity to the InP substrate, InP buffer, and epitaxial layers, and assist in the removal of any debris or asperities remaining after the previous etch.
• Solar cells are fabricated on the epitaxial layers that are attached to the KaptonTM handle by sputtering indium tin oxide (ITO) Schottky contacts.
• ITO indium tin oxide
• the substrate is solvent cleaned, an intentional oxide is grown via exposure to UV/Ozone, and then returned to the growth chamber.
• the process has been employed multiple times with a single substrate to demonstrate degradation-free reuse of InP wafers, and as shown in Fig. 3, the smoothness of the surface can be improved over that of the commercial epi-ready wafers that are initially used, in principle allowing for indefinite reuse.
• Fig. 4 is a schematic representation of such a cell.
• the lift-off process is similar to that used for the InP cells, although the two- protection-layer scheme used for InP is replaced by a three-layer (InGaP/GaAs/lnGaP), fully lattice-matched (to the AIAs sacrificial layer) system. This allows for improved etch- selectivity between layers while eliminating debris or surface roughening incurred in the ELO process.
• the AIAs layer is removed in HF, followed by removal of the InGaP and GaAs protection layers with HCI:H 3 P0 4 (1 :1 ) and ⁇ 3 ⁇ 0 4 : ⁇ 2 ⁇ 2 : ⁇ 2 ⁇ (3:1 :25),
• efficiencies for example greater than 25%, are expected when the coating thickness is optimized.
• a protection layer scheme based on the fully lattice- matched InGaP/GaAs/lnGaP trilayer can be used. This tri-layer affords etch chemistries with sufficient rate selectivity between layers required to reproducibly remove the protection layers and to expose a pristine (physically and chemically undamaged) surface.
• both the parent wafer and the lifted off epitaxial layers can be thoroughly studied for damage or subtle degradation.
• These methods include x-ray photoelectron spectroscopy (XPS) to determine chemical changes to the growth and regrowth surfaces, atomic force microscopy, scanning electron microscopy, and surface profilometry to determine surface morphological changes, cross-sectional transmission electron microscopy to examine defects that are incurred within the bulk of the epitaxy, and compositional depth profiling using secondary ion mass spectroscopy (SIMS).
• Completed cells, including anti-reflection coating, can also be electrically tested using standard illumination conditions (1 sun, AM1.5G spectrum). Parameters to be measured include PCE, fill factor (FF), open circuit voltage (Voc), short circuit current (Jsc), series and parallel resistance.
• PCE fill factor
• FF fill factor
• Voc open circuit voltage
• Jsc short circuit current
• Ga-containing compounds i.e. GaAs, and to a lesser degree InGaP
• the thickness of the InP is limited to prevent strain relaxation, which can degrade the subsequently grown PV layer quality.
• the critical thickness of InP on GaAs is between 5 and 6 monolayers, corresponding to ⁇ 1.7 nm.
• the protection layer scheme would comprise InGaP/GaAs/lnP or InGaP/GaAs/lnGaP/lnP, where the additional InGaP layer in the latter structure provides improved protection above the GaAs.
• the etch selectivity and preservation of the as- purchased wafer quality is carried out by using additional materials combinations, for example by replacing the InGaP layer adjacent to the InAIP.
• InAIP/lnGaP/GaAs/lnAIP structure may be advantageous since InAIP can be etched with HCLh ⁇ O (1 :5), which stops abruptly at GaAs (>400:1 etch ratio), whereas
• HCI:H 3 P0 4 (1 :1) used to etch InGaP slowly attacks the GaAs which results in
• InAIP By placing the InAIP adjacent to the AIAs layer, the InAIP is attacked by the HF and reduces the buildup of arsenic oxide which can slow the liftoff process. Also, InGaP may be used as an etch stop for the GaAs etch ( ⁇ 3 ⁇ 4: ⁇ 2 ⁇ 2: ⁇ 2 0, 3:1 :25) to ensure that the lower InAIP layer is only removed in the final etch step.
• Additional cost reduction may be possible by bonding to metal-foil substrates such as Au-coated Cu foils, use of less expensive metals for cold-welding (e.g. Ag instead of Au), reduced consumption of HF, reduced protection layer thicknesses, and accelerating the lift-off process.
• metal-foil substrates such as Au-coated Cu foils
• use of less expensive metals for cold-welding e.g. Ag instead of Au
• reduced consumption of HF e.g. Ag instead of Au
• reduced protection layer thicknesses e.g. Ag instead of Au
• the extended exposure to HF used to dissolve the AIAs sacrificial layer limits the choice of metal host substrates that can be employed.
• Cu foils which can be used for cold-welding, are used to increase resistance upon exposure to HF, as their use may be simpler than coating the foil with a noble metal such as Au.
• An additional benefit to using Cu foil is its high thermal conductivity ( ⁇ 4W cm "r C "1 ) that can
• the design is inverted relative to a conventional multi-junction cell growth sequence to accommodate the "upside down" bonding geometry used in the adhesive-free cold-weld process; the structure includes a 25% GaAs cell architecture.
• the GaAs cell thickness is reduced to 2 pm (50% of the conventional substrate-based cell) since the reflective, full-coverage ohmic contact allows for two passes of the incident light through the device active region.
• the primary focus will be on optimizing the tandem PV structure for maximum efficiency, including InGaP cell design (layer thickness, window layer, layer composition, etc.), improving the wide-gap tunnel junctions (TJ) between elements in the stack, and perfecting the multiple lift-off process over large areas for this multi-junction cell.
• Solar cells will be grown with n-type material on top of p-type layers, whereas the tunnel junctions must be grown with the opposite polarity.
• the cells may employ carbon-doping in all or several of the p-type layers, since carbon does not readily migrate to the growth surface as does the conventional p-dopant, Be.
• the tandem cells are generally limited by the current in the GaAs cell, the InGaP cell thickness needs to be adjusted to current-match the InGaP and GaAs cells; the thickness of the InGaP layer is expected to range from 0.55 to 0.80 ⁇ .
• TJ tunnel junctions
• a conventional TJ is an abrupt P+/N+ junction where the electron can tunnel directly from the conduction band on the /i-type side to the valence band on the p-type side (Fig.9(a)). Little work has been performed on MBE grown wide gap TJs, although doping levels that are sufficiently high to transport currents generated at 1 sun illumination have been reported using MBE.
• One embodiment is directed to InGaP tunnel junctions that have a voltage drop of several tens of mV at 1 sun. Research suggests that Be and Si are suitable dopants (attaining densities of 3.7x10 19 and 1.8x10 19 cm “3 , respectively).
• the use of engineered defects at the ⁇ +/ ⁇ /+ interface can be done, such as by adding ErAs to a GaAs tunnel junction.
• ErP or LuP may be used as shown in Fig. 9b.
• the ErP or LuP form epitaxial islands on the semiconductor surface that are ⁇ 4 monolayers thick, are metallic, and split the tunneling process into two steps with significantly higher tunneling probabilities.
• the multi-junction cell can be microscopically and chemically examined after each iteration of the growth-ELO-reuse cycle.
• Completed cells, including anti-reflection coating, can be electrically tested using standard illumination conditions (AM1.5G spectrum), but over a range of intensities up to 10 suns.
• Parameters to be measured include PCE, fill factor, open circuit voltage, short circuit current, series and parallel resistance, as in the case of the single junction cells.
• Fig. 10 shows that a strip consisting of the ELO multi-junction cell is bonded to the center of a larger, flexible, reflective film. The film is then molded (by placement in a thermally conductive or actively cooled preform) into the shape of a compound parabolic collector (e.g. a CPC, or Winston collector). This geometry concentrates parallel solar rays onto the cell strip at its focus, as well as collects diffuse light within the acceptance cone.
• a compound parabolic collector e.g. a CPC, or Winston collector
• ELO cell technology can also be applied to systems with large concentration factors; however, here the present disclosure focused only on smaller concentrations that lead to simple and economical designs that are applicable to residential systems.
• the cost reductions in this integrated solar collector + ELO multi- junction concentrator cell assembly is expected to radically reduce the cost of concentrated systems, as well as their footprint (owing to the high PCE).

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