WO2012165111A1 - Method for producing multi-layer substrate and multi-layer substrate - Google Patents

Method for producing multi-layer substrate and multi-layer substrate Download PDF

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Publication number
WO2012165111A1
WO2012165111A1 PCT/JP2012/061871 JP2012061871W WO2012165111A1 WO 2012165111 A1 WO2012165111 A1 WO 2012165111A1 JP 2012061871 W JP2012061871 W JP 2012061871W WO 2012165111 A1 WO2012165111 A1 WO 2012165111A1
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Prior art keywords
core
substrate
resin layer
main
suppressing member
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PCT/JP2012/061871
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French (fr)
Japanese (ja)
Inventor
大坪喜人
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株式会社村田製作所
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Publication of WO2012165111A1 publication Critical patent/WO2012165111A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components

Definitions

  • the present invention relates to a multilayer substrate manufacturing method and a multilayer substrate manufactured by the multilayer substrate manufacturing method, and more specifically, a predetermined main surface of a core substrate on which a surface mount component is mounted is sealed with a sealing resin layer.
  • the present invention relates to a method for manufacturing a multilayer substrate having the above structure and a multilayer substrate including a sealing resin layer manufactured by the manufacturing method.
  • a multilayer board having a configuration as shown in FIG. 16 has been proposed as one of the multilayer boards.
  • this multilayer substrate has a core substrate (ceramic multilayer substrate) 110 composed of a plurality of laminated ceramic layers, and an active chip component 140 such as a semiconductor device is arranged on one main surface.
  • a passive chip component 150 such as a capacitor is disposed on the other main surface.
  • resin layers 120 and 130 for sealing are formed on both main surfaces of the core substrate (ceramic multilayer substrate) 110, and surface electrodes 121 and via conductors 122 are formed on the resin layer 130 on the lower surface side. ing.
  • the resin is cured when the resin layers 120 and 130 are formed.
  • warpage occurs in the core substrate 110 due to the difference in expansion and contraction rate between the core substrate 110 and the resin layers 120 and 130, and the mounting reliability when the multilayer substrate is mounted on a module substrate or the like is reduced.
  • the conductor disposed on the multilayer substrate may be disconnected.
  • peeling may occur between the core substrate 110 and the resin layers 120 and 130 due to thermal stress between the core substrate 110 and the resin layers 120 and 130.
  • This invention solves the said subject, and suppresses that a curvature arises in the hardening process of a resin layer, when manufacturing the multilayer substrate provided with the resin layer for sealing in at least one main surface. It is an object to provide a multilayer substrate manufacturing method capable of reliably manufacturing a highly reliable multilayer substrate, and a highly reliable multilayer substrate without warping manufactured by the method .
  • a method for producing a multilayer substrate of the present invention includes: A mounting step of mounting a surface mounting component on at least one main surface of the core parent substrate to be divided into a plurality of core individual substrates constituting individual multi-layer substrates; and the surface on both main surfaces of the core parent substrate
  • a mounting component is mounted on at least one main surface, and when a surface mounting component is mounted on one main surface of the core mother board, on the main surface on which the surface mounting component is mounted,
  • a resin layer forming step of forming a semi-cured resin layer A warpage suppressing member for suppressing the occurrence of warpage of each core substrate included in the core parent substrate in the step of curing the resin layer in the semi-cured state, wherein a main part is divided into the following core parent substrate Covering at least part of the upper surface and side surfaces of the resin layer provided in the core unit substrate obtained by dividing the core parent substrate in the process, and connecting to each core unit substrate included in the core parent substrate at least in one place;
  • covering at least part of the upper surface and side surfaces of the resin layer included in the core substrate means that the warpage suppressing member is disposed so as to be in contact with the upper surface and side surfaces of the resin layer, It is a concept including a case where it is arranged so as to bite into the upper surface and side surface of the layer.
  • the warpage suppressing member covers at least a part of an upper surface and side surfaces of a resin layer included in a core substrate obtained by dividing the core mother substrate in the core mother substrate dividing step. And at least two locations that are in a positional relationship such that the main part is interposed therebetween, and is configured to be connected and fixed to each core individual substrate included in the core parent substrate.
  • the core substrate can be reliably fixed via the resin layer, and the occurrence of warpage can be more reliably prevented.
  • the surface-mounted component is mounted on both main surfaces of the core mother board, and the semi-cured resin layer is formed on both main faces of the core mother board.
  • the warpage suppressing member may be disposed on one main surface side of the core parent substrate, or may be disposed on both sides of one main surface and the other main surface. Good.
  • the core master substrate reaches the core master substrate from the semi-cured resin layer side as a dividing groove for dividing the core master substrate into the core individual substrates.
  • a groove is formed, and the at least one portion of the warp suppressing member is connected and fixed to a predetermined portion of each core substrate of the core parent substrate through the dividing groove. Is preferred.
  • the groove reaching the core mother board from the semi-cured resin layer side penetrates the semi-cured resin layer and reaches the surface of the core mother board, but the core mother board has a groove.
  • the groove penetrates the semi-cured resin layer and further reaches the middle position in the thickness direction of the core mother board. This includes the case where a groove is formed in the core parent substrate.
  • the warp suppressing member when the semi-cured resin layer is fully cured in a state where the warp suppressing member is not disposed, the warp such that one of the main surfaces of the core parent substrate is a concave surface and the other is a convex surface. When this occurs, it is preferable to dispose the warp suppressing member on the main surface side which is the concave surface of the core mother board. By providing such a configuration, it is possible to efficiently prevent the occurrence of warpage.
  • the semi-cured resin layer is formed on both main surfaces of the core parent substrate, and there is a difference in thickness between the resin layers on both main surfaces, the semi-cured resin layer is thick. It is preferable to arrange the warpage suppressing member on the main surface side on which is disposed. By providing this configuration, it is possible to efficiently prevent warping.
  • the multilayer substrate of the present invention is Core substrate, A surface mount component mounted on at least one main surface of the core substrate; When the surface mount components are mounted on both main surfaces of the core substrate, at least one main surface of the core substrate and the surface mount components mounted on the main surface are sealed, and When the surface mount component is mounted on one main surface of the core substrate, the main surface and the resin layer disposed so as to seal the surface mount component mounted on the main surface
  • a warpage suppressing member having a main portion covering at least a part of the upper surface and side surfaces of the resin layer, and arranged to bite into the resin layer, and connected and fixed to the core substrate at at least one place; It is characterized by comprising.
  • the warpage suppressing member is disposed so that the main portion covers at least a part of the upper surface and the side surface of the resin layer, and at least two positions in which the main portion is interposed therebetween It is preferable to be connected and fixed to the core substrate.
  • the core substrate can be reliably fixed via the resin layer, and the occurrence of warpage can be more reliably prevented.
  • the warp suppressing member is made of a metal material.
  • the warp suppressing member covers a large area of the resin layer.
  • the improvement of heat dissipation performance can be anticipated by using what was formed from the metal material as a curvature suppression member.
  • the warpage suppressing member is made of a resin material harder than the resin constituting the resin layer.
  • the present invention can be more effectively realized by using a warp suppressing member suitable for use conditions by widening the choice of the constituent material of the warp suppressing member.
  • the method for producing a multilayer substrate of the present invention includes forming a semi-cured resin layer on a predetermined main surface on which surface-mounted components are mounted, and including the semi-cured resin layer in the core parent substrate in a step of curing the semi-cured resin layer.
  • the multilayer substrate of the present invention includes a core substrate, a surface mount component mounted on the core substrate, a resin layer disposed on a predetermined main surface on which the surface mount component of the core substrate is mounted,
  • the warpage suppressing member is arranged such that the main portion covers at least a part of the upper surface (main surface) and the side surface of the resin layer, and is inserted into the resin layer, and is connected and fixed to the core substrate at least at one place. Therefore, it is possible to provide a highly reliable multilayer substrate with less warpage.
  • FIG. 1 It is a front sectional view showing the composition of the multilayer substrate concerning one example (example 1) of the present invention. It is a perspective view which shows the multilayer substrate concerning Example 1 of this invention. It is principal part sectional drawing explaining the arrangement
  • FIG. 1 is a front sectional view showing the structure of a multilayer substrate according to one embodiment (Example 1) of the present invention
  • FIG. 2 is a perspective view
  • FIG. 3 is a cross-sectional view of an essential part for explaining the arrangement of the warp suppressing member.
  • the multilayer substrate A includes a core substrate 1 and a surface mount component (for example, a semiconductor device) that is flip-chip mounted on one main surface 1a of the core substrate.
  • Active chip component for example, a semiconductor device
  • a surface-mounted component for example, a passive chip component such as a capacitor
  • solder 4 solder 4 to the main surface 1b of the core substrate 1
  • the terminal 5 is disposed so as to seal the one and the other main surfaces 1a and 1b of the core substrate 1 and the surface-mounted components 2a and 2b disposed on both the main surfaces 1a and 1b.
  • the resin layers 11 and 12 intersect with the central portion of the main surface 11a of the resin layer 11 on the upper surface side, and the four tip portions 3b of the portion that wraps around the side surface 11b from the main surface 11a of the resin layer are the core substrate 1 Connected and fixed to the warpage suppressing member It is provided with a door. Note that the end face of the straight terminal 5 is exposed so that it can be connected to the outside.
  • the warp suppressing member 3 is made of a long and thin metal plate material, has a cross-shaped planar shape, and has a structure in which the tip side is bent downward.
  • the main portion 3a is positioned so as to cover the main surface 11a and the side surface 11b of the resin layer 11, and the main portion 3a is interposed therebetween.
  • Four locations (tip portions) 3b are connected and fixed to the core substrate 1.
  • it is bonded to a ground electrode, a warp suppressing member fixing electrode or the like formed on the core substrate 1 by a bonding material such as solder.
  • the warp suppressing member 3 is disposed so as to bite into the resin layer 11, and the surface of the resin layer 11 is formed flat even at a portion where the warp suppressing member 3 is disposed. Has been. Therefore, the multilayer substrate A can be chucked (held) from the upper surface side by a vacuum suction method.
  • the core parent substrate 10 is prepared.
  • a plurality of ceramic layers are laminated, and a ceramic substrate (via hole conductor for interlayer connection of internal conductors and internal conductors for forming necessary circuits) A multilayer ceramic substrate) is used.
  • This ceramic substrate is, for example, a ceramic green sheet having an inner conductor pattern formed on the surface by a method such as screen printing, or a via hole conductor for interlayer connection by filling a conductor after forming a through hole.
  • a ceramic green sheet having a conductive layer, a ceramic green sheet for an outer layer in which no conductor pattern is formed, and the like are appropriately combined, laminated in a predetermined order, pressed, and then fired.
  • the surface electrode for mounting the surface mount component or connecting the straight terminal may be formed after firing.
  • the conductor pattern is previously formed on the ceramic green sheet for the outer layer constituting the ceramic substrate. It is also possible to form the surface electrode at the same time in the step of firing the whole.
  • LTCC Low Temperature Co-fired Ceramic
  • the substrate that can be used as the core parent substrate 10 is not limited to a ceramic substrate, and a resin substrate or the like can also be used.
  • a surface mount component (in this embodiment, for example, for example, on one main surface 10a and the other main surface 10b of the core mother board 10).
  • a passive chip component such as a capacitor 2b is mounted by a method such as solder mounting.
  • the straight terminal 5 is connected to the other main surface 10b of the core parent substrate 10 by the solder 4 (see FIG. 5).
  • the resin layer 12 is disposed on the other main surface 10 b side of the core parent substrate 10 and is semi-cured.
  • the material for forming the resin layer for example, a liquid epoxy resin in which an inorganic filler such as Al 2 O 3 , SiO 2 , or TiO 2 is mixed is used.
  • the resin layer is fully cured at 150 ° for 60 minutes.
  • a phenol resin, a cyanate resin, or the like can be used as the resin for forming the resin layer, in addition to the epoxy resin. Further, a solid resin may be used instead of the liquid epoxy resin.
  • a surface mount component (an active chip component such as a semiconductor device in this embodiment) 2a is provided on the main surface (one main surface) 10a on the opposite side of the core mother substrate 10. Flip chip mounting.
  • the resin layer 11 is disposed on one main surface 10a side of the core mother substrate 10 and semi-cured.
  • the material for forming the resin layer the same material as that used for forming the resin layer 12 described above is used, and the resin layer 11 is formed by the same method and semi-cured.
  • the dividing grooves 6 for dividing the core parent substrate 10 into the core individual substrates 1 are formed.
  • the dividing grooves 6 are formed by laser processing so as to reach the surface of the core mother substrate 10 from the semi-cured resin layer 11 side, and also reach the surface of the core mother substrate 10 from the resin layer 12 side.
  • the tip 3b of the warpage suppressing member 3 is connected to the surface of the core parent substrate (core individual substrate) exposed at the bottom surface of the dividing groove 6 by a bonding material such as solder.
  • a joint such as an electrode to be fixed (a ground electrode or a warp suppressing member fixing electrode) is disposed.
  • the dividing groove 6 extends to the surface of the core parent substrate 10 in order to prevent the core parent substrate 10 from being divided during the manufacturing process.
  • the core parent substrate 10 is thick and difficult to divide, it is desirable to prevent the core parent substrate 10 from entering the core parent substrate 10 in the thickness direction. It is desirable to form the dividing grooves 6 so as to reach a certain depth halfway.
  • a warp suppressing member 3 for suppressing the occurrence of warpage is provided.
  • a warpage suppressing member 3 made of a metal material, which has a structure in which the planar shape is a cross shape and the front end side of each side is bent downward is provided.
  • the main portion 3a is obtained by dividing the core mother board 10 in the core mother board dividing step described later.
  • (Tip portion) 3b (see FIGS. 1, 2, and 4) is connected to a ground electrode or a warp suppressing member fixing electrode provided on the core mother substrate 10 via a bonding material such as solder or conductive adhesive. , Fix.
  • the metal warpage suppressing member 3 is electrically and mechanically connected and fixed to the ground electrode provided on the core parent substrate 10 using a conductive bonding material such as solder or conductive adhesive. In this case, the warp suppressing member 3 can exert a shielding effect. In addition, when it is not necessary to expect a shielding effect, it is also possible to use a bonding material having no conductivity as a bonding material for connecting and fixing the warpage suppressing member 3 to the core substrate 1.
  • tip part 3b of the curvature suppression member 3 using joining materials, such as a solder and a conductive adhesive it is necessary to use a metal material having a melting point higher than the thermosetting temperature when the resin layers 11 and 12 of (9) are fully cured (in this embodiment, the resin layers 11 and 12 are fully cured by thermosetting). It is. Therefore, although depending on specific conditions in the manufacturing process, it is usually desirable to use copper, aluminum, iron, or an alloy containing at least one of them as the metal material. It is also possible to use a material having the above material as a base material and a plating film on the surface.
  • the metal wire with a circular cross-sectional shape which consists of said material as a constituent material of the curvature suppression member 3, it is usually desirable to use a thing with a diameter of 0.05 mm or more.
  • a soft metal material having a low melting point, such as Sn, Pb, Zn, or the like used for the solder material is not preferable as a constituent material of the warp suppressing member 3.
  • the core parent substrate 10 is placed in an oven and heated to a predetermined temperature, whereby the semi-cured resin layers 11 and 12 are fully cured.
  • the main curing of the resin layers 11 and 12 is performed at 150 ° for 60 minutes.
  • the core parent substrate 10 is divided into individual core substrates 1 along the dividing grooves 6. As a result, a multilayer substrate A having the structure shown in FIGS. 1 to 3 is obtained.
  • the specific steps that is, the steps (1) to (9) may be switched in order.
  • the steps (1) to (9) above are performed.
  • Simultaneous progression, (7), (8), (9) (1), (2), (3), (5), (8), (4) and (6) can be performed simultaneously, and (7) and (9) in this order.
  • this multilayer substrate A is manufactured through the manufacturing process as described above and has the above-described configuration, it is possible to efficiently suppress and prevent warping from occurring in the curing process of the resin layers 11 and 12. Can do.
  • the warp suppressing member 3 is made of a metal material, it is possible to improve the shielding performance and improve the heat dissipation performance.
  • the warp suppressing member is disposed only on one main surface side of the core parent substrate (core substrate), but the warp suppressing member is disposed on both main surface sides.
  • the warp suppressing member is disposed on both main surface sides.
  • the warp of the core parent substrate depends on the thickness of the resin layers on both main surfaces.
  • the main surface side of the thicker resin layer (when the warp suppressing member is not provided) From the standpoint of suppressing warpage, it is preferable to dispose a warpage suppressing member on the side where the warpage occurs and becomes a concave surface.
  • the main surface side on which a resin layer having a larger shrinkage is formed (if the warp suppressing member is not provided, warpage occurs). It is desirable to arrange a warp suppressing member on the side that is generated and becomes a concave surface.
  • a cross-shaped warpage suppressing member is used, but the warpage suppressing member has a special restriction on its structure within a range in which the function of suppressing the warpage of the core substrate can be achieved.
  • the warp suppressing member 3 having a wide single band-like structure
  • the warp suppressing member 3 having two parallel belt-like structures
  • the warp suppressing member 3 having a structure in which four thin strip members are arranged in parallel to the four sides of the core substrate.
  • the warp suppressing member 3 having a lattice structure as shown in FIG.
  • a warpage suppressing member 3 having a structure in which a plurality of slender thin belt-like members are crossed as shown in FIG. Etc. can be used.
  • a cross-shaped warp suppressing member in a rectangular core board, since each side is often warped so as to be pulled either up or down, as the warp suppressing member 3, a cross-shaped warp suppressing member, FIG. 13, FIG. 14, or FIG.
  • side like the curvature suppression member as shown in 15 is preferable. However, it may warp in a specific direction depending on the arrangement state of the surface-mounted components in the resin layer. In that case, it is effective to use a warp suppressing member having a shape as shown in FIGS. That is, the shape and arrangement position of the warpage suppressing member may be adjusted in accordance with the direction of warpage.
  • these warpage suppressing members 3 are processed into a predetermined shape in advance, arranged at predetermined positions before the resin layer is fully cured, and bonded to predetermined positions on each core substrate. After fixing, the resin layer is fully cured, whereby a multilayer substrate having the same effect as in the above embodiment can be efficiently manufactured.
  • the metal curvature suppression member is used as the curvature suppression member 3, it is also possible to use the curvature suppression member made from resin.
  • the resin constituting the warpage suppressing member must be harder than the resin layer at the stage of being placed on the semi-cured resin layer. is there.
  • the warpage suppressing member (resin constituting) is harder than the resin layer, and the warpage suppressing member (resin constituting) is lower in curing temperature than the resin layer, and warpage suppression. It is necessary for the resin constituting the member to cure before the resin layer in order to exhibit the function as a warp suppressing member.
  • the present invention is not limited to the above-described embodiment in other points as well.
  • Specific configurations of the core parent substrate and the core individual substrate, types and mounting modes of surface-mounted components to be mounted, resin layers Of the material constituting the core, the connection of the warp suppressing member to the core parent substrate (core individual substrate), the specific method of fixing, the conditions for the main curing of the semi-cured resin, the core parent substrate for each core Various applications and modifications can be made within the scope of the invention with respect to specific methods for dividing into individual substrates.
  • Core single substrate 1a One main surface of core single substrate 1b
  • the other main surface of core single substrate 2a, 2b Surface mount component 3
  • Warpage suppressing member 3a Main portion of warpage suppressing member 3b
  • Tip portion of warpage suppressing member 4 Solder 5
  • Straight terminal 6 Dividing groove 10
  • Core parent substrate 10a One main surface of core parent substrate 10b
  • Core parent substrate The other principal surface 11, 12
  • Resin layer 11a Resin layer principal surface 11b Resin layer side surface A, A1, A2, A3 Multilayer substrate

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Abstract

Provided are: a method for producing a multi-layer substrate that is highly reliable and is capable of suppressing the occurrence of warping during a resin layer curing step when producing a multi-layer substrate provided with a resin layer; and a multi-layer substrate with no warping and high reliability. Resin layers (11, 12) in a semi-cured state are formed on a predetermined primary surface of a core parent substrate (10) to which surface-mounted components (2a, 2b) have been mounted. In the state of a warping suppression member (3), which is for suppressing the occurrence of warping at each core individual substrate (1) contained in the core parent substrate during a step for curing the resin layers, and of which the primary portion covers at least a portion of the upper surface (primary surface (11a)) and the lateral surfaces (11b) of the resin layer (11) that the core individual substrates obtained by splitting the core parent substrate in a core parent substrate splitting step are provided with, and, at at least one location, is connected/affixed to the core individual substrates contained in the core parent substrate, being provided to each core individual substrate, after subjecting the resin layer that is in the semi-cured state to main curing, the core parent substrate (10) is split into individual core individual substrates (1).

Description

多層基板の製造方法および多層基板Multilayer substrate manufacturing method and multilayer substrate
　本発明は、多層基板の製造方法および該多層基板の製造方法により製造される多層基板に関し、詳しくは、表面実装部品が実装されたコア基板の所定の主面が封止樹脂層により封止された構造を有する多層基板の製造方法および該製造法により製造される封止樹脂層を備えた多層基板に関する。 The present invention relates to a multilayer substrate manufacturing method and a multilayer substrate manufactured by the multilayer substrate manufacturing method, and more specifically, a predetermined main surface of a core substrate on which a surface mount component is mounted is sealed with a sealing resin layer. The present invention relates to a method for manufacturing a multilayer substrate having the above structure and a multilayer substrate including a sealing resin layer manufactured by the manufacturing method.
　多層基板の１つに、図１６に示すような構成を備えた多層基板が提案されている。この多層基板は、図１６に示すように、積層された複数のセラミック層からなるコア基板（セラミック多層基板）１１０を有し、一方の主面には、半導体装置などの能動チップ部品１４０が配設され、他方の主面にはコンデンサなどの受動チップ部品１５０が配設されている。 A multilayer board having a configuration as shown in FIG. 16 has been proposed as one of the multilayer boards. As shown in FIG. 16, this multilayer substrate has a core substrate (ceramic multilayer substrate) 110 composed of a plurality of laminated ceramic layers, and an active chip component 140 such as a semiconductor device is arranged on one main surface. A passive chip component 150 such as a capacitor is disposed on the other main surface.
　そして、コア基板（セラミック多層基板）１１０の両主面には、封止用の樹脂層１２０，１３０が形成され、下面側の樹脂層１３０には、表面電極１２１や、ビア導体１２２が形成されている。 Then, resin layers 120 and 130 for sealing are formed on both main surfaces of the core substrate (ceramic multilayer substrate) 110, and surface electrodes 121 and via conductors 122 are formed on the resin layer 130 on the lower surface side. ing.
　この多層基板のように、コア基板（セラミック多層基板）１１０の両主面を樹脂層１２０，１３０により封止した構造を有する多層基板の場合、樹脂層１２０，１３０を形成する際における樹脂の硬化工程で、コア基板１１０と樹脂層１２０，１３０の間の膨張収縮率の差から、コア基板１１０に反りが発生し、多層基板をモジュール基板などに実装する際の実装信頼性が低下したり、場合によっては多層基板に配設された導体に断線が発生したりするという問題点がある。
　また、コア基板１１０と樹脂層１２０，１３０の間の熱応力により、コア基板１１０と樹脂層１２０，１３０間に剥がれが生じる場合がある。 In the case of a multilayer substrate having a structure in which both main surfaces of the core substrate (ceramic multilayer substrate) 110 are sealed with the resin layers 120 and 130 like this multilayer substrate, the resin is cured when the resin layers 120 and 130 are formed. In the process, warpage occurs in the core substrate 110 due to the difference in expansion and contraction rate between the core substrate 110 and the resin layers 120 and 130, and the mounting reliability when the multilayer substrate is mounted on a module substrate or the like is reduced. In some cases, there is a problem that the conductor disposed on the multilayer substrate may be disconnected.
In addition, peeling may occur between the core substrate 110 and the resin layers 120 and 130 due to thermal stress between the core substrate 110 and the resin layers 120 and 130.
特開２００９－１８８２１８号公報JP 2009-188218 A
　本発明は、上記課題を解決するものであり、少なくとも一方の主面に封止用の樹脂層を備えた多層基板を製造する場合に、樹脂層の硬化工程で反りが生じることを抑制することが可能で、信頼性の高い多層基板を確実に製造することが可能な多層基板の製造方法、および該方法により製造される、反りがなく信頼性の高い多層基板を提供することを目的とする。 This invention solves the said subject, and suppresses that a curvature arises in the hardening process of a resin layer, when manufacturing the multilayer substrate provided with the resin layer for sealing in at least one main surface. It is an object to provide a multilayer substrate manufacturing method capable of reliably manufacturing a highly reliable multilayer substrate, and a highly reliable multilayer substrate without warping manufactured by the method .
　上記の課題を解決するため、本発明の多層基板の製造方法は、
　個々の多層基板を構成する複数のコア個基板に分割されることになるコア親基板の少なくとも一方の主面に表面実装部品を実装する実装工程と、　前記コア親基板の両主面に前記表面実装部品が実装されている場合には少なくとも一方の主面に、前記コア親基板の一方の主面に表面実装部品が実装されている場合には前記表面実装部品が実装された主面に、半硬化状態の樹脂層を形成する樹脂層形成工程と、
　前記半硬化状態の樹脂層を硬化させる工程で前記コア親基板に含まれる各コア個基板に反りが発生することを抑制するための反り抑制部材であって、主要部が、下記コア親基板分割工程で前記コア親基板を分割することにより得られるコア個基板が備える樹脂層の上面および側面の少なくとも一部を覆うとともに、少なくとも一箇所で前記コア親基板に含まれる各コア個基板に接続、固定される反り抑制部材を、前記コア親基板に含まれる各コア個基板ごとに配設する反り抑制部材配設工程と、
　前記反り抑制部材が配設された状態で、前記半硬化状態の樹脂層を本硬化させる樹脂層硬化工程と、
　前記樹脂層硬化工程で硬化させた樹脂層を備えた前記コア親基板を所定の位置で分割して、個々のコア個基板に分けるコア親基板分割工程と
　を具備することを特徴としている。 In order to solve the above problems, a method for producing a multilayer substrate of the present invention includes:
A mounting step of mounting a surface mounting component on at least one main surface of the core parent substrate to be divided into a plurality of core individual substrates constituting individual multi-layer substrates; and the surface on both main surfaces of the core parent substrate When a mounting component is mounted on at least one main surface, and when a surface mounting component is mounted on one main surface of the core mother board, on the main surface on which the surface mounting component is mounted, A resin layer forming step of forming a semi-cured resin layer;
A warpage suppressing member for suppressing the occurrence of warpage of each core substrate included in the core parent substrate in the step of curing the resin layer in the semi-cured state, wherein a main part is divided into the following core parent substrate Covering at least part of the upper surface and side surfaces of the resin layer provided in the core unit substrate obtained by dividing the core parent substrate in the process, and connecting to each core unit substrate included in the core parent substrate at least in one place; A warp suppressing member disposing step of disposing a warp suppressing member to be fixed for each core unit substrate included in the core parent substrate;
In the state where the warp suppressing member is disposed, a resin layer curing step of permanently curing the semi-cured resin layer;
A core parent substrate dividing step of dividing the core parent substrate including the resin layer cured in the resin layer curing step into predetermined core positions and dividing the core mother substrate into individual core substrates.
　なお、コア個基板が備える樹脂層の上面および側面の少なくとも一部を覆うとは、反り抑制部材が樹脂層の上面および側面と接するように配設されている場合や、反り抑制部材が、樹脂層の上面および側面に食い込むように配設されている場合などを含む概念である。 Note that covering at least part of the upper surface and side surfaces of the resin layer included in the core substrate means that the warpage suppressing member is disposed so as to be in contact with the upper surface and side surfaces of the resin layer, It is a concept including a case where it is arranged so as to bite into the upper surface and side surface of the layer.
　本発明において、前記反り抑制部材は、主要部が、前記コア親基板分割工程で前記コア親基板を分割することにより得られるコア個基板が備える樹脂層の上面および側面の少なくとも一部を覆うことになり、かつ、前記主要部を間に介在させるような位置関係にある少なくとも２箇所で前記コア親基板に含まれる各コア個基板に接続、固定されるように構成されたものであることが好ましい。このような構成を備えることにより、樹脂層を介してコア個基板を確実に固定することが可能になり、反りの発生をより確実に防止することができる。 In the present invention, the warpage suppressing member covers at least a part of an upper surface and side surfaces of a resin layer included in a core substrate obtained by dividing the core mother substrate in the core mother substrate dividing step. And at least two locations that are in a positional relationship such that the main part is interposed therebetween, and is configured to be connected and fixed to each core individual substrate included in the core parent substrate. preferable. By providing such a configuration, the core substrate can be reliably fixed via the resin layer, and the occurrence of warpage can be more reliably prevented.
　本発明は、前記コア親基板の両主面のいずれにも前記表面実装部品を実装し、かつ、前記コア親基板の両主面のいずれにも前記半硬化状態の樹脂層を形成するように構成することができる。このような構成とした場合に、反り抑制部材は、コア親基板の一方の主面側に配設してもよく、また、一方の主面と他方の主面の両側に配設してもよい。 In the present invention, the surface-mounted component is mounted on both main surfaces of the core mother board, and the semi-cured resin layer is formed on both main faces of the core mother board. Can be configured. In such a configuration, the warpage suppressing member may be disposed on one main surface side of the core parent substrate, or may be disposed on both sides of one main surface and the other main surface. Good.
　また、前記半硬化状態の樹脂層が形成された状態で、前記コア親基板を前記コア個基板に分割するための分割用溝として、前記半硬化状態の樹脂層側から前記コア親基板に達する溝を形成するとともに、前記分割用溝を経て前記反り抑制部材の前記少なくとも一箇所を、前記コア親基板の各コア個基板となる領域の所定箇所に接続、固定するように構成されていることが好ましい。このような構成を備えることにより、コア親基板に形成された分割用溝を利用して反り抑制部材の各コア個基板への接続を行うことが可能になり、生産性を向上させることができる。 In addition, with the semi-cured resin layer formed, the core master substrate reaches the core master substrate from the semi-cured resin layer side as a dividing groove for dividing the core master substrate into the core individual substrates. A groove is formed, and the at least one portion of the warp suppressing member is connected and fixed to a predetermined portion of each core substrate of the core parent substrate through the dividing groove. Is preferred. By providing such a configuration, it becomes possible to connect the warp suppressing member to each core substrate using the dividing grooves formed in the core parent substrate, and to improve productivity. .
　なお、半硬化状態の樹脂層側からコア親基板に達する溝とは、半硬化状態の樹脂層を貫通して、コア親基板の表面にまで達してはいるが、コア親基板には溝が形成されていない場合（溝の底面がコア親基板の表面となっている場合）と、溝が、半硬化状態の樹脂層を貫通し、さらに、コア親基板の厚み方向の途中の位置にまで達しており、コア親基板にも溝が形成されている場合を含む。 The groove reaching the core mother board from the semi-cured resin layer side penetrates the semi-cured resin layer and reaches the surface of the core mother board, but the core mother board has a groove. When not formed (when the bottom surface of the groove is the surface of the core mother board), the groove penetrates the semi-cured resin layer and further reaches the middle position in the thickness direction of the core mother board. This includes the case where a groove is formed in the core parent substrate.
　また、前記反り抑制部材が配設されていない状態で前記半硬化状態の樹脂層を本硬化させた場合に、前記コア親基板の両主面の一方が凹面、他方が凸面となるような反りが発生する場合において、前記コア親基板の凹面となる方の主面側に、前記反り抑制部材を配設することが好ましい。このような構成を備えることにより、反りの発生を効率よく防止することが可能になる。 Further, when the semi-cured resin layer is fully cured in a state where the warp suppressing member is not disposed, the warp such that one of the main surfaces of the core parent substrate is a concave surface and the other is a convex surface. When this occurs, it is preferable to dispose the warp suppressing member on the main surface side which is the concave surface of the core mother board. By providing such a configuration, it is possible to efficiently prevent the occurrence of warpage.
　また、前記コア親基板の両主面のいずれにも前記半硬化状態の樹脂層が形成され、両主面の前記樹脂層に厚みの差がある場合において、厚みが厚い半硬化状態の樹脂層が配設されている方の主面側に前記反り抑制部材を配設することが好ましい。この構成を備えることにより、反りの発生を効率よく防止することが可能になる。 Further, when the semi-cured resin layer is formed on both main surfaces of the core parent substrate, and there is a difference in thickness between the resin layers on both main surfaces, the semi-cured resin layer is thick. It is preferable to arrange the warpage suppressing member on the main surface side on which is disposed. By providing this configuration, it is possible to efficiently prevent warping.
　また、本発明の多層基板は、
　コア個基板と、
　コア個基板の少なくとも一方の主面に実装された表面実装部品と、
　前記コア個基板の両主面に前記表面実装部品が実装されている場合には少なくとも前記コア個基板の一方の主面および該主面に実装された表面実装部品を封止するように、また、前記コア個基板の一方の主面に表面実装部品が実装されている場合には、当該主面および当該主面に実装された前記表面実装部品を封止するように配設された樹脂層と、
　主要部が前記樹脂層の上面および側面の少なくとも一部を覆うとともに、前記樹脂層に食い込むように配設され、かつ、少なくとも一箇所で前記コア個基板に接続、固定されている反り抑制部材と
　を具備することを特徴としている。 The multilayer substrate of the present invention is
Core substrate,
A surface mount component mounted on at least one main surface of the core substrate;
When the surface mount components are mounted on both main surfaces of the core substrate, at least one main surface of the core substrate and the surface mount components mounted on the main surface are sealed, and When the surface mount component is mounted on one main surface of the core substrate, the main surface and the resin layer disposed so as to seal the surface mount component mounted on the main surface When,
A warpage suppressing member having a main portion covering at least a part of the upper surface and side surfaces of the resin layer, and arranged to bite into the resin layer, and connected and fixed to the core substrate at at least one place; It is characterized by comprising.
　また、反り抑制部材は、主要部が前記樹脂層の上面および側面の少なくとも一部を覆うように配設されているとともに、前記主要部を間に介在させるような位置関係にある少なくとも２箇所で前記コア個基板に接続、固定されていることが好ましい。このような構成を備えることにより、樹脂層を介してコア個基板を確実に固定することが可能になり、反りの発生をより確実に防止することが可能になる。 Further, the warpage suppressing member is disposed so that the main portion covers at least a part of the upper surface and the side surface of the resin layer, and at least two positions in which the main portion is interposed therebetween It is preferable to be connected and fixed to the core substrate. By providing such a configuration, the core substrate can be reliably fixed via the resin layer, and the occurrence of warpage can be more reliably prevented.
　また、前記反り抑制部材は、金属材料から形成されたものを用いることが好ましい。このような構成とすることにより、反りを確実に防止することが可能になるとともに、シールド性を向上させることが可能になる。なお、シールド性を向上させる見地からは、反り抑制部材が樹脂層の広い面積を覆うようにすることが望ましい。また、反り抑制部材として、金属材料から形成されたものを用いることにより、放熱性能の向上を期待することができる。 Further, it is preferable that the warp suppressing member is made of a metal material. By adopting such a configuration, it is possible to reliably prevent warping and improve shielding properties. From the standpoint of improving the shielding property, it is desirable that the warp suppressing member covers a large area of the resin layer. Moreover, the improvement of heat dissipation performance can be anticipated by using what was formed from the metal material as a curvature suppression member.
　また、前記反り抑制部材は、前記樹脂層を構成する樹脂よりも硬い樹脂材料から形成されたものを用いることが好ましい。このような構成として、反り抑制部材の構成材料の選択肢を広くすることにより、使用条件に適合した反り抑制部材を用いて、本発明をより実効あらしめることができる。 Further, it is preferable that the warpage suppressing member is made of a resin material harder than the resin constituting the resin layer. As such a configuration, the present invention can be more effectively realized by using a warp suppressing member suitable for use conditions by widening the choice of the constituent material of the warp suppressing member.
　本発明の多層基板の製造方法は、表面実装部品が実装されている所定の主面に半硬化状態の樹脂層を形成し、この半硬化状態の樹脂層を硬化させる工程でコア親基板に含まれる各コア個基板に反りが発生することを抑制するための反り抑制部材として、主要部が、コア親基板分割工程でコア親基板を分割することにより得られるコア個基板が備える樹脂層の上面（主面）および側面の少なくとも一部を覆うとともに、少なくとも１箇所で、コア親基板に含まれる各コア個基板に接続、固定される反り抑制部材を、各コア個基板ごとに配設した状態で、半硬化状態の樹脂層を本硬化させた後、コア親基板を個々のコア個基板に分割するようにしているので、樹脂層の硬化工程で反りが生じることを抑制して、信頼性の高い多層基板を効率よく製造することができる。
　さらに、コア個基板の反りが抑制、防止されることから、多層基板に形成された回路配線などの断線を防止することが可能になる。 The method for producing a multilayer substrate of the present invention includes forming a semi-cured resin layer on a predetermined main surface on which surface-mounted components are mounted, and including the semi-cured resin layer in the core parent substrate in a step of curing the semi-cured resin layer. The upper surface of the resin layer provided in the core substrate obtained by dividing the core parent substrate in the core parent substrate dividing step as a warp suppressing member for suppressing the occurrence of warpage in each core individual substrate (Main surface) and a state in which at least one part of the side surface is covered and a warp suppressing member that is connected to and fixed to each core unit substrate included in the core parent substrate is disposed for each core unit substrate in at least one place Since the core parent substrate is divided into individual core individual substrates after the semi-cured resin layer is fully cured, it is possible to suppress the occurrence of warpage in the resin layer curing process and to improve reliability. Efficient multilayer board It can be.
Furthermore, since the warpage of the individual core substrate is suppressed and prevented, it is possible to prevent disconnection of the circuit wiring formed on the multilayer substrate.
　また、本発明の多層基板は、コア個基板と、コア個基板に実装された表面実装部品と、コア個基板の表面実装部品が実装されている所定の主面に配設された樹脂層と、主要部が樹脂層の上面（主面）および側面の少なくとも一部を覆うとともに、樹脂層に食い込むように配設され、かつ、少なくとも一箇所でコア個基板に接続、固定された反り抑制部材とを備えているので、反りが少なく、信頼性の高い多層基板を提供することができる。 The multilayer substrate of the present invention includes a core substrate, a surface mount component mounted on the core substrate, a resin layer disposed on a predetermined main surface on which the surface mount component of the core substrate is mounted, The warpage suppressing member is arranged such that the main portion covers at least a part of the upper surface (main surface) and the side surface of the resin layer, and is inserted into the resin layer, and is connected and fixed to the core substrate at least at one place. Therefore, it is possible to provide a highly reliable multilayer substrate with less warpage.
本発明の一実施例（実施例１）にかかる多層基板の構成を示す正面断面図である。It is a front sectional view showing the composition of the multilayer substrate concerning one example (example 1) of the present invention. 本発明の実施例１にかかる多層基板を示す斜視図である。It is a perspective view which shows the multilayer substrate concerning Example 1 of this invention. 本発明の実施例１にかかる多層基板における反り抑制部材の配設態様を説明する要部断面図である。It is principal part sectional drawing explaining the arrangement | positioning aspect of the curvature suppression member in the multilayer substrate concerning Example 1 of this invention. 本発明の実施例１にかかる多層基板において用いられている反り抑制部材の構成を示す斜視図である。It is a perspective view which shows the structure of the curvature suppression member used in the multilayer substrate concerning Example 1 of this invention. 本発明の実施例１にかかる多層基板の製造方法の一工程を示す図であって、コア親基板の他方の主面に表面実装部品を実装し、ストレート端子を配設した状態を示す図である。It is a figure which shows 1 process of the manufacturing method of the multilayer board | substrate concerning Example 1 of this invention, Comprising: It is a figure which shows the state which mounted the surface mounting components in the other main surface of the core parent board, and has arrange | positioned the straight terminal. is there. 本発明の実施例１にかかる多層基板の製造方法の他の一工程を示す図であって、コア親基板の他方の主面に樹脂層を形成した状態を示す断面図である。It is a figure which shows another process of the manufacturing method of the multilayer board | substrate concerning Example 1 of this invention, Comprising: It is sectional drawing which shows the state which formed the resin layer in the other main surface of a core parent board | substrate. 本発明の実施例１にかかる多層基板の製造方法のさらに他の一工程を示す図であって、コア親基板の一方の主面に表面実装部品を実装した状態を示す断面図である。It is a figure which shows another 1 process of the manufacturing method of the multilayer board | substrate concerning Example 1 of this invention, Comprising: It is sectional drawing which shows the state which mounted the surface mounting components in one main surface of a core parent substrate. 本発明の実施例１にかかる多層基板の製造方法のさらに他の一工程を示す図であって、コア親基板の一方の主面に樹脂層を形成した状態を示す断面図である。It is a figure which shows another one process of the manufacturing method of the multilayer substrate concerning Example 1 of this invention, Comprising: It is sectional drawing which shows the state in which the resin layer was formed in one main surface of a core parent substrate. 本発明の実施例１にかかる多層基板の製造方法のさらに他の一工程を示す図であって、樹脂層に分割用溝を形成した状態を示す断面図である。It is a figure which shows another one process of the manufacturing method of the multilayer substrate concerning Example 1 of this invention, Comprising: It is sectional drawing which shows the state which formed the groove | channel for division | segmentation in the resin layer. 本発明の実施例１にかかる多層基板の製造方法のさらに他の一工程を示す図であって、コア親基板の一方の主面側に反り抑制部材を配設した状態を示す断面図である。It is a figure which shows another one process of the manufacturing method of the multilayer board | substrate concerning Example 1 of this invention, Comprising: It is sectional drawing which shows the state which arrange | positioned the curvature suppression member in the one main surface side of a core parent board | substrate. . 本発明において用いられる反り抑制部材の変形例を示す平面図である。It is a top view which shows the modification of the curvature suppression member used in this invention. 本発明において用いられる反り抑制部材の他の変形例を示す平面図である。It is a top view which shows the other modification of the curvature suppression member used in this invention. 本発明において用いられる反り抑制部材のさらに他の変形例を示す平面図である。It is a top view which shows the further another modification of the curvature suppression member used in this invention. 本発明において用いられる反り抑制部材のさらに他の変形例を示す平面図である。It is a top view which shows the further another modification of the curvature suppression member used in this invention. 本発明において用いられる反り抑制部材のさらに他の変形例を示す平面図である。It is a top view which shows the further another modification of the curvature suppression member used in this invention. 従来の多層基板の構成を示す正面断面図である。It is front sectional drawing which shows the structure of the conventional multilayer substrate.
　以下に本発明の実施例を示して、本発明の特徴とするところをさらに詳しく説明する。 Hereinafter, the features of the present invention will be described in more detail with reference to examples of the present invention.
　図１は本発明の一実施例（実施例１）にかかる多層基板の構成を示す正面断面図、図２は斜視図である。図３は反り抑制部材の配設態様を説明する要部断面図である。 FIG. 1 is a front sectional view showing the structure of a multilayer substrate according to one embodiment (Example 1) of the present invention, and FIG. 2 is a perspective view. FIG. 3 is a cross-sectional view of an essential part for explaining the arrangement of the warp suppressing member.
　この実施例１の多層基板Ａは、図１～３に示すように、コア個基板１と、コア個基板の一方の主面１ａにフリップチップ実装された表面実装部品（例えば、半導体装置などの能動チップ部品）２ａと、他方の主面１ｂにはんだ付け実装された表面実装部品（例えば、コンデンサなどの受動チップ部品）２ｂと、コア個基板１の主面１ｂにはんだ４により接続されたストレート端子５と、コア個基板１の一方および他方の両主面１ａ，１ｂ、および、両主面１ａ，１ｂ上に配設された表面実装部品２ａ，２ｂなどを封止するように配設された樹脂層１１，１２と、上面側の樹脂層１１の主面１１ａの中央部で交差し、樹脂層の主面１１ａから側面１１ｂに回り込んだ部分の４つの先端部３ｂがコア個基板１に接続、固定された、反り抑制部材３とを具備している。なお、ストレート端子５は外部に接続することができるように端面が露出している。 As shown in FIGS. 1 to 3, the multilayer substrate A according to the first embodiment includes a core substrate 1 and a surface mount component (for example, a semiconductor device) that is flip-chip mounted on one main surface 1a of the core substrate. Active chip component) 2a, a surface-mounted component (for example, a passive chip component such as a capacitor) 2b soldered and mounted on the other main surface 1b, and a straight connected by solder 4 to the main surface 1b of the core substrate 1 The terminal 5 is disposed so as to seal the one and the other main surfaces 1a and 1b of the core substrate 1 and the surface-mounted components 2a and 2b disposed on both the main surfaces 1a and 1b. The resin layers 11 and 12 intersect with the central portion of the main surface 11a of the resin layer 11 on the upper surface side, and the four tip portions 3b of the portion that wraps around the side surface 11b from the main surface 11a of the resin layer are the core substrate 1 Connected and fixed to the warpage suppressing member It is provided with a door. Note that the end face of the straight terminal 5 is exposed so that it can be connected to the outside.
　この実施例では、上記反り抑制部材３として、図４に示すように、金属製の細長い板状材料からなり、平面形状が十字状で、先端側が下方に曲折した構造を有する反り抑制部材３が用いられており、図１～３に示すように、主要部３ａが樹脂層１１の主面１１ａおよび側面１１ｂを覆うように位置し、かつ、主要部３ａを間に介在させるような位置関係にある４つの箇所（先端部）３ｂ（図１，２および４参照）が、コア個基板１に接続、固定されている。特に図示していないが、具体的には、コア個基板１に形成されたグランド電極や反り抑制部材固定用電極などに、はんだなどの接合材により接合されている。 In this embodiment, as shown in FIG. 4, the warp suppressing member 3 is made of a long and thin metal plate material, has a cross-shaped planar shape, and has a structure in which the tip side is bent downward. As shown in FIGS. 1 to 3, the main portion 3a is positioned so as to cover the main surface 11a and the side surface 11b of the resin layer 11, and the main portion 3a is interposed therebetween. Four locations (tip portions) 3b (see FIGS. 1, 2 and 4) are connected and fixed to the core substrate 1. Although not specifically shown, specifically, it is bonded to a ground electrode, a warp suppressing member fixing electrode or the like formed on the core substrate 1 by a bonding material such as solder.
　また、反り抑制部材３は、図３に示すように、樹脂層１１に食い込むように配設されており、樹脂層１１の表面は、反り抑制部材３が配設されている部分でも平坦に形成されている。したがって、この多層基板Ａは上面側から真空吸引による方法でチャック（保持）することが可能である。 Further, as shown in FIG. 3, the warp suppressing member 3 is disposed so as to bite into the resin layer 11, and the surface of the resin layer 11 is formed flat even at a portion where the warp suppressing member 3 is disposed. Has been. Therefore, the multilayer substrate A can be chucked (held) from the upper surface side by a vacuum suction method.
　次に、多層基板Ａの製造方法（図５～図１０参照）について説明する。
　(１)まず、コア親基板１０を用意する。この実施例では、コア親基板１０として、複数のセラミック層が積層され、内部に、必要な回路を形成するための内部導体や内部導体を層間接続するためのビアホール導体などを備えたセラミック基板（多層セラミック基板）が用られている。 Next, a method for manufacturing the multilayer substrate A (see FIGS. 5 to 10) will be described.
(1) First, the core parent substrate 10 is prepared. In this embodiment, as the core parent substrate 10, a plurality of ceramic layers are laminated, and a ceramic substrate (via hole conductor for interlayer connection of internal conductors and internal conductors for forming necessary circuits) A multilayer ceramic substrate) is used.
　このセラミック基板（多層セラミック基板）は、例えば、スクリーン印刷などの方法で、表面に内部導体パターンを形成したセラミックグリーンシートや、さらに貫通孔を形成した後に導体を充填して層間接続用のビアホール導体を形成したセラミックグリーンシート、導体パターンの形成されていない外層用のセラミックグリーンシートなどを適宜組み合わせて所定の順序で積層し、圧着した後、焼成する方法などによって製造される。 This ceramic substrate (multilayer ceramic substrate) is, for example, a ceramic green sheet having an inner conductor pattern formed on the surface by a method such as screen printing, or a via hole conductor for interlayer connection by filling a conductor after forming a through hole. A ceramic green sheet having a conductive layer, a ceramic green sheet for an outer layer in which no conductor pattern is formed, and the like are appropriately combined, laminated in a predetermined order, pressed, and then fired.
　なお、表面実装部品を搭載したり、ストレート端子を接続したりするための表面電極は、焼成後に形成してもよく、場合によっては、セラミック基板を構成する外層用のセラミックグリーンシートに予め導体パターンを形成しておいて、全体を焼成する工程で同時に表面電極が形成されるようにすることも可能である。 The surface electrode for mounting the surface mount component or connecting the straight terminal may be formed after firing. In some cases, the conductor pattern is previously formed on the ceramic green sheet for the outer layer constituting the ceramic substrate. It is also possible to form the surface electrode at the same time in the step of firing the whole.
　ただし、セラミック基板の製造方法や具体的な構成には特別の制約はなく、公知の種々の方法で製造された、種々の構成を有するセラミック基板を用いることができる。 However, there are no particular restrictions on the manufacturing method and specific configuration of the ceramic substrate, and ceramic substrates having various configurations manufactured by various known methods can be used.
　また、セラミック基板を用いる場合、特に焼成低温の低い、ＬＴＣＣ（低温同時焼成セラミックス：Low Temperature Co-fired Ceramics）基板を用いることも可能である。 In addition, when using a ceramic substrate, it is also possible to use an LTCC (Low Temperature Co-fired Ceramic) substrate having a low firing temperature.
　また、コア親基板１０として用いることが可能な基板は、セラミック基板に限られるものではなく、樹脂基板などを用いることも可能である。 The substrate that can be used as the core parent substrate 10 is not limited to a ceramic substrate, and a resin substrate or the like can also be used.
　(２)それから、図５に示すように、コア親基板１０の一方の主面１０ａと他方の主面１０ｂのうち、他方の主面１０ｂ上に、表面実装部品（この実施例では、例えば、コンデンサなどの受動チップ部品）２ｂをはんだ付け実装などの方法で実装する。 (2) Then, as shown in FIG. 5, a surface mount component (in this embodiment, for example, for example, on one main surface 10a and the other main surface 10b of the core mother board 10). A passive chip component such as a capacitor 2b is mounted by a method such as solder mounting.
　(３)次いで、ストレート端子５をはんだ４によりコア親基板１０の他方の主面１０ｂに接続する（図５参照）。 (3) Next, the straight terminal 5 is connected to the other main surface 10b of the core parent substrate 10 by the solder 4 (see FIG. 5).
　(４)そして、図６に示すように、コア親基板１０の他方の主面１０ｂ側に、樹脂層１２を配設し、半硬化させる。このとき、樹脂層形成用の材料として、例えば、Ａｌ2Ｏ3、ＳｉＯ2、ＴｉＯ2など無機フィラーが混合された液状エポキシ樹脂を用いる。そして、これをコア親基板１０の他方の主面１０ｂ側に配設した後、１００℃で９０分熱処理することにより半硬化させる。なお、後述のように、樹脂層の本硬化は１５０°、６０分の条件で行う。
　本発明においては、樹脂層形成用の樹脂として、エポキシ樹脂以外にも、フェノール樹脂、シアネート樹脂などを用いることができる。また、液状エポキシ樹脂に替えて、固形樹脂を用いてもよい。 (4) Then, as shown in FIG. 6, the resin layer 12 is disposed on the other main surface 10 b side of the core parent substrate 10 and is semi-cured. At this time, as the material for forming the resin layer, for example, a liquid epoxy resin in which an inorganic filler such as Al 2 O 3 , SiO 2 , or TiO 2 is mixed is used. And after arrange | positioning this to the other main surface 10b side of the core mother board | substrate 10, it semi-hardens by heat-processing at 100 degreeC for 90 minutes. As will be described later, the resin layer is fully cured at 150 ° for 60 minutes.
In the present invention, a phenol resin, a cyanate resin, or the like can be used as the resin for forming the resin layer, in addition to the epoxy resin. Further, a solid resin may be used instead of the liquid epoxy resin.
　(５)次に、図７に示すように、コア親基板１０の反対側の主面（一方の主面）１０ａに表面実装部品（この実施例では、半導体装置などの能動チップ部品）２ａをフリップチップ実装する。 (5) Next, as shown in FIG. 7, a surface mount component (an active chip component such as a semiconductor device in this embodiment) 2a is provided on the main surface (one main surface) 10a on the opposite side of the core mother substrate 10. Flip chip mounting.
　(６)それから、図８に示すように、コア親基板１０の一方の主面１０ａ側に、樹脂層１１を配設し、半硬化させる。このとき、樹脂層形成用の材料として、上述の樹脂層１２を形成するのに用いた材料と同じ材料を用いて、同様の方法で樹脂層１１を形成し、半硬化させる。 (6) Then, as shown in FIG. 8, the resin layer 11 is disposed on one main surface 10a side of the core mother substrate 10 and semi-cured. At this time, as the material for forming the resin layer, the same material as that used for forming the resin layer 12 described above is used, and the resin layer 11 is formed by the same method and semi-cured.
　(７)その後、図９に示すように、コア親基板１０をコア個基板１に分割するための分割用溝６を形成する。
　分割用溝６は、レーザ加工法により、半硬化状態の樹脂層１１側から、コア親基板１０の表面に達するように形成するとともに、樹脂層１２側からも、コア親基板１０の表面に達するように形成する。
　この実施例においては、コア親基板（コア個基板）の表面の、分割用溝６の底面に露出することになる領域には、反り抑制部材３の先端部３ｂがはんだなどの接合材により接続、固定されるべき電極（グランド電極や反り抑制部材固定用電極）などの接合部が配設されている。
　なお、コア親基板１０が薄い場合や脆い材料の場合は、製造工程の途中でコア親基板１０が分割されてしまうことを防止するため、分割用溝６は、コア親基板１０の表面にまでは達してはいるが、コア親基板１０の内部には入り込まないようにすることが望ましく、また、コア親基板１０が厚くて分割しにくいような場合には、コア親基板１０の厚み方向の途中まで、ある程度の深さに達するように分割用溝６を形成することが望ましい。 (7) After that, as shown in FIG. 9, the dividing grooves 6 for dividing the core parent substrate 10 into the core individual substrates 1 are formed.
The dividing grooves 6 are formed by laser processing so as to reach the surface of the core mother substrate 10 from the semi-cured resin layer 11 side, and also reach the surface of the core mother substrate 10 from the resin layer 12 side. To form.
In this embodiment, the tip 3b of the warpage suppressing member 3 is connected to the surface of the core parent substrate (core individual substrate) exposed at the bottom surface of the dividing groove 6 by a bonding material such as solder. In addition, a joint such as an electrode to be fixed (a ground electrode or a warp suppressing member fixing electrode) is disposed.
When the core parent substrate 10 is thin or a fragile material, the dividing groove 6 extends to the surface of the core parent substrate 10 in order to prevent the core parent substrate 10 from being divided during the manufacturing process. However, when the core parent substrate 10 is thick and difficult to divide, it is desirable to prevent the core parent substrate 10 from entering the core parent substrate 10 in the thickness direction. It is desirable to form the dividing grooves 6 so as to reach a certain depth halfway.
　(８)次に、図１０に示すように、半硬化状態の樹脂層１１が配設された側に、樹脂層１１，１２を硬化させる工程でコア親基板１０に含まれる各コア個基板１に反りが発生することを抑制するための反り抑制部材３を配設する。具体的には、予め形成しておいた、金属材料からなり、平面形状が十字状で、各辺の先端側が下方に曲折した構造を有する反り抑制部材３（図４参照）を配設する。 (8) Next, as shown in FIG. 10, each core substrate 1 included in the core parent substrate 10 in the step of curing the resin layers 11, 12 on the side where the semi-cured resin layer 11 is disposed. A warp suppressing member 3 for suppressing the occurrence of warpage is provided. Specifically, a warpage suppressing member 3 (see FIG. 4) made of a metal material, which has a structure in which the planar shape is a cross shape and the front end side of each side is bent downward is provided.
　そして、この反り抑制部材３を配設するにあたっては、図１～３、図１０に示すように、主要部３ａが、後述のコア親基板分割工程でコア親基板１０を分割することにより得られるコア個基板１が備える樹脂層１１の上面（主面）１１ａおよび側面１１ｂに位置して、樹脂層１１を把持した状態で、主要部３ａを間に介在させるような位置関係にある４つの箇所（先端部）３ｂ（図１，２および４参照）を、コア親基板１０に設けられたグランド電極や反り抑制部材固定用電極などに、はんだや導電性接着剤などの接合材を介して接続、固定する。 When the warp suppressing member 3 is disposed, as shown in FIGS. 1 to 3 and FIG. 10, the main portion 3a is obtained by dividing the core mother board 10 in the core mother board dividing step described later. Four locations that are positioned on the upper surface (main surface) 11a and the side surface 11b of the resin layer 11 included in the core substrate 1 and have a positional relationship such that the main portion 3a is interposed between the resin layer 11 and the resin layer 11. (Tip portion) 3b (see FIGS. 1, 2, and 4) is connected to a ground electrode or a warp suppressing member fixing electrode provided on the core mother substrate 10 via a bonding material such as solder or conductive adhesive. , Fix.
　なお、金属製の反り抑制部材３を、はんだや導電接着剤などのように導電性を有する接合材を用いて、コア親基板１０に設けたグランド電極に電気的、機械的に接続、固定するようにした場合、反り抑制部材３にシールド効果を発揮させることができる。なお、シールド効果を期待する必要がない場合には、反り抑制部材３をコア個基板１に接続、固定するための接合材として、特に導電性を有しない接合材を用いることも可能である。 The metal warpage suppressing member 3 is electrically and mechanically connected and fixed to the ground electrode provided on the core parent substrate 10 using a conductive bonding material such as solder or conductive adhesive. In this case, the warp suppressing member 3 can exert a shielding effect. In addition, when it is not necessary to expect a shielding effect, it is also possible to use a bonding material having no conductivity as a bonding material for connecting and fixing the warpage suppressing member 3 to the core substrate 1.
　また、金属材料からなる反り抑制部材３を用いる場合、金属材料としては、反り抑制部材３の先端部３ｂをはんだや導電性接着剤などの接合材を用いて接合する際の温度や、下記の(９)の樹脂層１１，１２を本硬化させる（この実施例では熱硬化により樹脂層１１，１２を本硬化させる）際の熱硬化温度などよりも高い融点を有する金属材料を用いることが必要である。
　したがって、製造工程における具体的な条件などにもよるが、金属材料としては、通常、銅、アルミニウム、鉄、あるいはそれらの少なくとも１種を含む合金などを用いることが望ましい。また、上記材料を母材とし、表面にめっき膜を備えた材料を用いることも可能である。
　なお、反り抑制部材３の構成材料として、上記の材料からなる断面形状が円形の金属線を用いる場合には、通常、直径が０．０５ｍｍ以上のものを用いることが望ましい。
　ただし、はんだ材料に使うような、融点が低く柔らかい金属材料、例えば、Ｓｎ，Ｐｂ，Ｚｎなどは反り抑制部材３の構成材料として好ましくない。 Moreover, when using the curvature suppression member 3 which consists of metal materials, as a metal material, the temperature at the time of joining the front-end | tip part 3b of the curvature suppression member 3 using joining materials, such as a solder and a conductive adhesive, It is necessary to use a metal material having a melting point higher than the thermosetting temperature when the resin layers 11 and 12 of (9) are fully cured (in this embodiment, the resin layers 11 and 12 are fully cured by thermosetting). It is.
Therefore, although depending on specific conditions in the manufacturing process, it is usually desirable to use copper, aluminum, iron, or an alloy containing at least one of them as the metal material. It is also possible to use a material having the above material as a base material and a plating film on the surface.
In addition, when using the metal wire with a circular cross-sectional shape which consists of said material as a constituent material of the curvature suppression member 3, it is usually desirable to use a thing with a diameter of 0.05 mm or more.
However, a soft metal material having a low melting point, such as Sn, Pb, Zn, or the like used for the solder material is not preferable as a constituent material of the warp suppressing member 3.
　(９)それから、コア親基板１０をオーブンに入れて所定の温度に加熱することにより、半硬化状態の樹脂層１１，１２を本硬化させる。なお、樹脂層１１，１２の本硬化は１５０°、６０分の条件で行う。
　それから、コア親基板１０を分割用溝６に沿って個々のコア個基板１に分割する。これにより、図１～３にその構成を示すような構造を有する多層基板Ａが得られる。 (9) Then, the core parent substrate 10 is placed in an oven and heated to a predetermined temperature, whereby the semi-cured resin layers 11 and 12 are fully cured. The main curing of the resin layers 11 and 12 is performed at 150 ° for 60 minutes.
Then, the core parent substrate 10 is divided into individual core substrates 1 along the dividing grooves 6. As a result, a multilayer substrate A having the structure shown in FIGS. 1 to 3 is obtained.
　なお、上述の多層基板Ａを製造する場合においては、具体的な工程、すなわち、上記(１)～(９)の工程はその順序が入れ替わる場合もある。
　例えば、上記(１)～(９)の工程を、
　(１)，(２)，(５)，(３)，(４)，(６)，(７)，(８)，(９)の順としたり、
　(１)，(２)，(３)，(５)，(４)と(６)同時進行，(７)，(８)，(９)の順としたり、
　(１)，(２)，(３)，(５)，(８)，(４)と(６)同時進行，(７)，(９)の順としたりすることが可能である。さらに、上述の例と異なる態様で上記(１)～(９)の各工程を実施することも可能である。 In the case of manufacturing the multilayer substrate A, the specific steps, that is, the steps (1) to (9) may be switched in order.
For example, the steps (1) to (9) above are performed.
(1), (2), (5), (3), (4), (6), (7), (8), (9)
(1), (2), (3), (5), (4) and (6) Simultaneous progression, (7), (8), (9)
(1), (2), (3), (5), (8), (4) and (6) can be performed simultaneously, and (7) and (9) in this order. Further, it is possible to carry out the steps (1) to (9) in a manner different from the above example.
　この多層基板Ａは、上述のような製造工程を経て製造され、かつ上述のような構成を備えているので、樹脂層１１，１２の硬化工程で反りが生じることを効率よく抑制、防止することができる。 Since this multilayer substrate A is manufactured through the manufacturing process as described above and has the above-described configuration, it is possible to efficiently suppress and prevent warping from occurring in the curing process of the resin layers 11 and 12. Can do.
　また、コア個基板１の反りが抑制、防止されることから、多層基板Ａに形成された回路配線などの断線を防止することが可能になる。 Also, since the warpage of the core substrate 1 is suppressed and prevented, it is possible to prevent disconnection of the circuit wiring formed on the multilayer substrate A.
　さらに、反り抑制部材３として、金属材料から形成されたものを用いているので、シールド性を向上させることが可能になるとともに、放熱性能を向上させることができる。 Furthermore, since the warp suppressing member 3 is made of a metal material, it is possible to improve the shielding performance and improve the heat dissipation performance.
　なお、上記実施例では、コア親基板（コア個基板）の一方の主面側にのみ反り抑制部材を配設するようにしているが、両主面側に反り抑制部材を配設するようにして、より確実にコア親基板（コア個基板）の反りを抑制できるように構成することも可能である。 In the above-described embodiment, the warp suppressing member is disposed only on one main surface side of the core parent substrate (core substrate), but the warp suppressing member is disposed on both main surface sides. Thus, it is possible to configure so that the warpage of the core parent substrate (core substrate) can be more reliably suppressed.
　また、コア親基板（コア個基板）の両主面側に樹脂層が配設されている場合には、両主面側の樹脂層の厚さ次第でコア親基板（コア個基板）の反りの状態が異なってくるので、両主面側の樹脂層が同じ樹脂から形成されている場合においては、樹脂層の厚みが厚い方の主面側（反り抑制部材が配設されていない場合には反りが発生して凹面となる側）に反り抑制部材を配設することが、反りを抑制する見地からは好ましい。
　また、両主面側の樹脂層に異なる樹脂が用いられている場合には、収縮のより大きい樹脂層が形成されている主面側（反り抑制部材が配設されていない場合には反りが発生して凹面となる側）に反り抑制部材を配設することが望ましい。 Further, when resin layers are disposed on both main surfaces of the core parent substrate (core individual substrate), the warp of the core parent substrate (core individual substrate) depends on the thickness of the resin layers on both main surfaces. When the resin layers on both main surfaces are made of the same resin, the main surface side of the thicker resin layer (when the warp suppressing member is not provided) From the standpoint of suppressing warpage, it is preferable to dispose a warpage suppressing member on the side where the warpage occurs and becomes a concave surface.
In addition, when different resins are used for the resin layers on both main surfaces, the main surface side on which a resin layer having a larger shrinkage is formed (if the warp suppressing member is not provided, warpage occurs). It is desirable to arrange a warp suppressing member on the side that is generated and becomes a concave surface.
　上記実施例では、平面形状が十字状の反り抑制部材を用いているが、反り抑制部材は、コア個基板の反りを抑制する機能を果たすことが可能である範囲において、その構造に特別の制約はなく、例えば、
　(１)図１１に示すように、幅広い一本の帯状の構造の反り抑制部材３、
　(２)図１２に示すように、平行な二本の帯状の構造の反り抑制部材３、
　(３)図１３に示すように、コア個基板の四辺の平行に細い帯状部材を４本配設した構造の反り抑制部材３，
　(４)図１４に示すような、格子状の構造の反り抑制部材３、
　(５)図１５に示すような、斜めの細い帯状部材を複数交差させた構造の反り抑制部材３　
　などを用いることが可能である。 In the above embodiment, a cross-shaped warpage suppressing member is used, but the warpage suppressing member has a special restriction on its structure within a range in which the function of suppressing the warpage of the core substrate can be achieved. For example,
(1) As shown in FIG. 11, the warp suppressing member 3 having a wide single band-like structure,
(2) As shown in FIG. 12, the warp suppressing member 3 having two parallel belt-like structures,
(3) As shown in FIG. 13, the warp suppressing member 3 having a structure in which four thin strip members are arranged in parallel to the four sides of the core substrate.
(4) The warp suppressing member 3 having a lattice structure as shown in FIG.
(5) A warpage suppressing member 3 having a structure in which a plurality of slender thin belt-like members are crossed as shown in FIG.
Etc. can be used.
　なお、矩形のコア個基板においては、各辺が上下のいずれかに引っ張られるように反ることが多いため、反り抑制部材３として、十字状の反り抑制部材や、図１３、図１４、図１５に示すような反り抑制部材のように、各辺を抑えることができる構造のものが好ましい。ただし、樹脂層内の表面実装部品の配置状態などにより、特定の方向に反る場合もある。その場合には、図１１や図１２のような形状の反り抑制部材を用いることが効果的である。すなわち、反りの方向に合わせて反り抑制部材の形状や配置位置を調整すればよい。 In addition, in a rectangular core board, since each side is often warped so as to be pulled either up or down, as the warp suppressing member 3, a cross-shaped warp suppressing member, FIG. 13, FIG. 14, or FIG. The thing of the structure which can suppress each edge | side like the curvature suppression member as shown in 15 is preferable. However, it may warp in a specific direction depending on the arrangement state of the surface-mounted components in the resin layer. In that case, it is effective to use a warp suppressing member having a shape as shown in FIGS. That is, the shape and arrangement position of the warpage suppressing member may be adjusted in accordance with the direction of warpage.
　なお、これらの反り抑制部材３は、予め所定の形状に加工しておき、樹脂層を本硬化させる前の段階で、所定の位置に配設し、各コア個基板の所定の位置に接合、固定した後、樹脂層を本硬化させることにより、上記実施例の場合と同様の効果を奏する多層基板を効率よく製造することができる。 In addition, these warpage suppressing members 3 are processed into a predetermined shape in advance, arranged at predetermined positions before the resin layer is fully cured, and bonded to predetermined positions on each core substrate. After fixing, the resin layer is fully cured, whereby a multilayer substrate having the same effect as in the above embodiment can be efficiently manufactured.
　なお、上記実施例では、反り抑制部材３として、金属製の反り抑制部材を用いているが、樹脂製の反り抑制部材を用いることも可能である。そして、樹脂製の反り抑制部材として、予めモールド成型したものを用いる場合、半硬化状態の樹脂層上に配置する段階で、反り抑制部材を構成する樹脂が、樹脂層よりも硬いことが必要である。
　また、樹脂製で半硬化状態の反り抑制部材を用い、樹脂層を硬化させる工程で樹脂層とともに硬化させるように構成することも可能であるが、その場合、反り抑制部材を配設した状態において、反り抑制部材（を構成する樹脂）の方が樹脂層よりも硬く、かつ、反り抑制部材（を構成する樹脂）の硬化温度の方が樹脂層の硬化温度よりも低いこと、および、反り抑制部材を構成する樹脂の方が樹脂層よりも先に硬化することが、反り抑制部材としての機能を発揮するためには必要である。 In addition, in the said Example, although the metal curvature suppression member is used as the curvature suppression member 3, it is also possible to use the curvature suppression member made from resin. And when using what was previously mold-molded as a resin-made warpage suppressing member, the resin constituting the warpage suppressing member must be harder than the resin layer at the stage of being placed on the semi-cured resin layer. is there.
In addition, it is possible to use a resin-made semi-cured warpage suppressing member and to cure the resin layer together with the resin layer in the step of curing the resin layer. The warpage suppressing member (resin constituting) is harder than the resin layer, and the warpage suppressing member (resin constituting) is lower in curing temperature than the resin layer, and warpage suppression. It is necessary for the resin constituting the member to cure before the resin layer in order to exhibit the function as a warp suppressing member.
　なお、本発明は、さらにその他の点においても上記実施例に限定されるものではなく、コア親基板やコア個基板の具体的な構成、実装される表面実装部品の種類や実装態様、樹脂層を構成する材料の種類、反り抑制部材のコア親基板（コア個基板）への接続、固定の具体的な方法、半硬化状態の樹脂を本硬化させる場合の条件、コア親基板を個々のコア個基板に分割する際の具体的な方法などに関し、発明の範囲内において、種々の応用、変形を加えることができる。 In addition, the present invention is not limited to the above-described embodiment in other points as well. Specific configurations of the core parent substrate and the core individual substrate, types and mounting modes of surface-mounted components to be mounted, resin layers Of the material constituting the core, the connection of the warp suppressing member to the core parent substrate (core individual substrate), the specific method of fixing, the conditions for the main curing of the semi-cured resin, the core parent substrate for each core Various applications and modifications can be made within the scope of the invention with respect to specific methods for dividing into individual substrates.
　１　　　　　コア個基板
　１ａ　　　　コア個基板の一方の主面
　１ｂ　　　　コア個基板の他方の主面　
　２ａ，２ｂ　表面実装部品
　３　　　　　反り抑制部材
　３ａ　　　　反り抑制部材の主要部
　３ｂ　　　　反り抑制部材の先端部
　４　　　　　はんだ
　５　　　　　ストレート端子
　６　　　　　分割用溝
　１０　　　　コア親基板
　１０ａ　　　コア親基板の一方の主面
　１０ｂ　　　コア親基板の他方の主面
　１１，１２　樹脂層
　１１ａ　　　樹脂層の主面
　１１ｂ　　　樹脂層の側面
　Ａ，Ａ１，Ａ２，Ａ３　　　　　多層基板 1 Core single substrate 1a One main surface of core single substrate 1b The other main surface of core single substrate
2a, 2b Surface mount component 3 Warpage suppressing member 3a Main portion of warpage suppressing member 3b Tip portion of warpage suppressing member 4 Solder 5 Straight terminal 6 Dividing groove 10 Core parent substrate 10a One main surface of core parent substrate 10b Core parent substrate The other principal surface 11, 12 Resin layer 11a Resin layer principal surface 11b Resin layer side surface A, A1, A2, A3 Multilayer substrate

Claims (10)

  1. 　個々の多層基板を構成する複数のコア個基板に分割されることになるコア親基板の少なくとも一方の主面に表面実装部品を実装する実装工程と、　前記コア親基板の両主面に前記表面実装部品が実装されている場合には少なくとも一方の主面に、前記コア親基板の一方の主面に表面実装部品が実装されている場合には前記表面実装部品が実装された主面に、半硬化状態の樹脂層を形成する樹脂層形成工程と、
    　前記半硬化状態の樹脂層を硬化させる工程で前記コア親基板に含まれる各コア個基板に反りが発生することを抑制するための反り抑制部材であって、主要部が、下記コア親基板分割工程で前記コア親基板を分割することにより得られるコア個基板が備える樹脂層の上面および側面の少なくとも一部を覆うとともに、少なくとも一箇所で前記コア親基板に含まれる各コア個基板に接続、固定される反り抑制部材を、前記コア親基板に含まれる各コア個基板ごとに配設する反り抑制部材配設工程と、
    　前記反り抑制部材が配設された状態で、前記半硬化状態の樹脂層を本硬化させる樹脂層硬化工程と、
    　前記樹脂層硬化工程で硬化させた樹脂層を備えた前記コア親基板を所定の位置で分割して、個々のコア個基板に分けるコア親基板分割工程と
    　を具備することを特徴とする多層基板の製造方法。     A mounting step of mounting a surface mounting component on at least one main surface of the core parent substrate to be divided into a plurality of core individual substrates constituting individual multi-layer substrates; and the surface on both main surfaces of the core parent substrate When a mounting component is mounted on at least one main surface, and when a surface mounting component is mounted on one main surface of the core mother board, on the main surface on which the surface mounting component is mounted, A resin layer forming step of forming a semi-cured resin layer;
    A warpage suppressing member for suppressing the occurrence of warpage of each core substrate included in the core parent substrate in the step of curing the resin layer in the semi-cured state, wherein a main part is divided into the following core parent substrate Covering at least part of the upper surface and side surfaces of the resin layer provided in the core unit substrate obtained by dividing the core parent substrate in the process, and connecting to each core unit substrate included in the core parent substrate at least in one place; A warp suppressing member disposing step of disposing a warp suppressing member to be fixed for each core unit substrate included in the core parent substrate;
    In the state where the warp suppressing member is disposed, a resin layer curing step of permanently curing the semi-cured resin layer;
    A core mother board dividing step of dividing the core mother board having the resin layer cured in the resin layer hardening process at a predetermined position and dividing the core mother board into individual core substrates. Manufacturing method.
  2. 　前記反り抑制部材は、主要部が、前記コア親基板分割工程で前記コア親基板を分割することにより得られるコア個基板が備える樹脂層の上面および側面の少なくとも一部を覆うことになり、かつ、前記主要部を間に介在させるような位置関係にある少なくとも２箇所で前記コア親基板に含まれる各コア個基板に接続、固定されるように構成されたものであることを特徴とする請求項１記載の多層基板の製造方法。 The warpage suppressing member has a main portion that covers at least a part of the upper surface and the side surface of the resin layer provided in the core substrate obtained by dividing the core mother substrate in the core mother substrate dividing step; and The core is configured to be connected and fixed to each core board included in the core parent board at at least two positions having a positional relationship such that the main part is interposed therebetween. Item 8. A method for producing a multilayer substrate according to Item 1.
  3. 　前記コア親基板の両主面のいずれにも前記表面実装部品を実装し、かつ、前記コア親基板の両主面のいずれにも前記半硬化状態の樹脂層を形成することを特徴とする請求項１または２記載の多層基板の製造方法。 The surface-mounted component is mounted on both main surfaces of the core mother board, and the semi-cured resin layer is formed on both main faces of the core mother board. Item 3. A method for producing a multilayer substrate according to Item 1 or 2.
  4. 　前記半硬化状態の樹脂層が形成された状態で、前記コア親基板を前記コア個基板に分割するための分割用溝として、前記半硬化状態の樹脂層側から前記コア親基板に達する溝を形成するとともに、前記分割用溝を経て前記反り抑制部材の前記少なくとも一箇所を、前記コア親基板の各コア個基板となる領域の所定箇所に接続、固定するように構成されていることを特徴とする請求項１～３のいずれかに記載の多層基板の製造方法。 In the state where the semi-cured resin layer is formed, a groove reaching the core parent substrate from the semi-cured resin layer side is used as a dividing groove for dividing the core parent substrate into the core individual substrates. The at least one location of the warp suppressing member is connected to and fixed to a predetermined location in each core substrate of the core parent substrate through the dividing groove. The method for producing a multilayer substrate according to any one of claims 1 to 3.
  5. 　前記反り抑制部材が配設されていない状態で前記半硬化状態の樹脂層を本硬化させた場合に、前記コア親基板の両主面の一方が凹面、他方が凸面となるような反りが発生する場合において、前記コア親基板の凹面となる方の主面側に、前記反り抑制部材を配設することを特徴とする請求項１～４のいずれかに記載の多層基板の製造方法。 When the semi-cured resin layer is fully cured in a state where the warp suppressing member is not provided, warpage occurs such that one of the main surfaces of the core parent substrate is concave and the other is convex. 5. The method of manufacturing a multilayer board according to claim 1, wherein the warpage suppressing member is disposed on a main surface side which is a concave surface of the core mother board.
  6. 　前記コア親基板の両主面のいずれにも前記半硬化状態の樹脂層が形成され、両主面の前記樹脂層に厚みの差がある場合において、厚みが厚い半硬化状態の樹脂層が配設されている方の主面側に前記反り抑制部材を配設することを特徴とする請求項１～５のいずれかに記載の多層基板の製造方法。 When the semi-cured resin layer is formed on both of the main surfaces of the core main substrate and the resin layers on both main surfaces have a difference in thickness, a thick semi-cured resin layer is disposed. The method for producing a multilayer substrate according to any one of claims 1 to 5, wherein the warp suppressing member is disposed on a main surface side of the multilayer substrate.
  7. 　コア個基板と、
    　コア個基板の少なくとも一方の主面に実装された表面実装部品と、
    　前記コア個基板の両主面に前記表面実装部品が実装されている場合には少なくとも前記コア個基板の一方の主面および該主面に実装された表面実装部品を封止するように、また、前記コア個基板の一方の主面に表面実装部品が実装されている場合には、当該主面および当該主面に実装された前記表面実装部品を封止するように配設された樹脂層と、
    　主要部が前記樹脂層の上面および側面の少なくとも一部を覆うとともに、前記樹脂層に食い込むように配設され、かつ、少なくとも一箇所で前記コア個基板に接続、固定されている反り抑制部材と
    　を具備することを特徴とする多層基板。     Core substrate,
    A surface mount component mounted on at least one main surface of the core substrate;
    When the surface mount components are mounted on both main surfaces of the core substrate, at least one main surface of the core substrate and the surface mount components mounted on the main surface are sealed, and When the surface mount component is mounted on one main surface of the core substrate, the main surface and the resin layer disposed so as to seal the surface mount component mounted on the main surface When,
    A warpage suppressing member having a main portion covering at least a part of the upper surface and side surfaces of the resin layer, and arranged to bite into the resin layer, and connected and fixed to the core substrate at at least one place; A multilayer substrate comprising:
  8. 　反り抑制部材は、主要部が前記樹脂層の上面および側面の少なくとも一部を覆うように配設されているとともに、前記主要部を間に介在させるような位置関係にある少なくとも二箇所で前記コア個基板に接続、固定されていることを特徴とする請求項７記載の多層基板。 The warpage suppressing member is disposed so that the main portion covers at least a part of the upper surface and the side surface of the resin layer, and the core is disposed in at least two positions having a positional relationship such that the main portion is interposed therebetween. The multilayer substrate according to claim 7, wherein the multilayer substrate is connected and fixed to a single substrate.
  9. 　前記反り抑制部材は、金属材料から形成されたものであることを特徴とする請求項７または８記載の多層基板。 The multilayer substrate according to claim 7 or 8, wherein the warp suppressing member is made of a metal material.
  10. 　前記反り抑制部材は、前記樹脂層を構成する樹脂よりも硬い樹脂材料から形成されたものであることを特徴とする請求項７または８記載の多層基板。 The multilayer substrate according to claim 7 or 8, wherein the warp suppressing member is formed of a resin material harder than a resin constituting the resin layer.
PCT/JP2012/061871 2011-05-31 2012-05-09 Method for producing multi-layer substrate and multi-layer substrate WO2012165111A1 (en)

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