JP4752612B2 - Manufacturing method of circuit board with protruding electrode - Google Patents

Manufacturing method of circuit board with protruding electrode Download PDF

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JP4752612B2
JP4752612B2 JP2006139815A JP2006139815A JP4752612B2 JP 4752612 B2 JP4752612 B2 JP 4752612B2 JP 2006139815 A JP2006139815 A JP 2006139815A JP 2006139815 A JP2006139815 A JP 2006139815A JP 4752612 B2 JP4752612 B2 JP 4752612B2
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circuit board
protruding
protruding electrodes
electrode
unfired
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JP2007311596A (en
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修 近川
哲也 池田
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a circuit board having protruding electrodes, whereby the buildups of its resin which are generated on the end surfaces of its plurality of protruding electrodes are so eliminated as to be able to connect it surely electrically with a mounting board, by utilizing the whole of the end surface of each protruding electrode as a solder joining surface and as to be able to improve its connecting reliability. <P>SOLUTION: A circuit board 10 having protruding electrodes has a circuit board 11 having a predetermined circuit pattern 11B, and has a plurality of protruding electrodes 12 arrayed in the peripheral edges of the first principal surface of the circuit board 11 and extended in the vertical direction from the first principal surface. The manufacturing method of a circuit board having protruding electrodes has a first process for creating the circuit board 10 having protruding electrodes, a second process for forming a liquid repellent coating 18 on at least the end surface of each protruding electrode 12, and a third process for applying to the first principal surface of the circuit board 11 a liquid resin 114 having a low wettability to the liquid repellent coating 18. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

本発明は、突起電極付き回路基板の製造方法に関し、更に詳しくは、マザーボード等の実装基板との接続信頼性を高めることができる突起電極付き回路基板の製造方法に関する。 The present invention relates to a method of manufacturing a protruding electrode with the circuit board, more particularly relates to the production how the bump electrode with the circuit board can increase the reliability of connection between the mounting board such as a motherboard.

従来の突起電極付き回路基板としては、例えば特許文献１に記載された回路基板がある。この回路基板は対向する実装基板との接続構造に特徴がある。この接続構造は、互いに対向する実装基板、回路基板それぞれの表面電極を電気的に接続する構造で、柱状の接続部材とその周囲の半田とから構成されている。柱状の接続部材の周囲に形成された半田は、リフロー加熱時に表面張力によって断面形状が鼓状に形成されている。このような接続構造により、熱応力に起因する接続構造におけるクラックを抑制し、接続信頼性を高めている。   As a conventional circuit board with protruding electrodes, for example, there is a circuit board described in Patent Document 1. This circuit board is characterized by a connection structure with an opposing mounting board. This connection structure is a structure for electrically connecting the surface electrodes of the mounting board and circuit board facing each other, and is composed of a columnar connection member and surrounding solder. The solder formed around the columnar connection member has a drum shape in cross section due to surface tension during reflow heating. With such a connection structure, cracks in the connection structure due to thermal stress are suppressed, and connection reliability is improved.

回路基板には複数の接続部材が形成され、それぞれの内側にはワイヤーボンド等の手法により半導体素子等の表面実装部品が搭載されている。そして、この回路基板はマザーボード等の実装基板と上述の接続構造によって接続されて、半導体モジュール基板を構成している。
この半導体モジュール基板では表面実装部品が露出した構造であるが、表面実装部品を外部環境から保護するために表面実装部品は例えば図８の（ａ）に示すように樹脂によって封止されていることが好ましい。この場合、半導体モジュール基板は、同図に示すように、回路基板１と、回路基板１の表面の周縁部に配列された複数の接続部材（突起電極）２と、これらの突起電極２の内側に搭載され、ボンディングワイヤー３Ａによって回路基板１と電気的に接続された表面実装部品３と、表面実装部品３を封止する樹脂部４と、を備えている。ここで、樹脂部４は、液状樹脂を回路基板１に塗布し、熱硬化することによって形成される。
特開２００４−０１４６４８ A plurality of connection members are formed on the circuit board, and surface-mounted components such as semiconductor elements are mounted on the inner side of each of the circuit boards by a technique such as wire bonding. The circuit board is connected to a mounting board such as a mother board by the connection structure described above to constitute a semiconductor module board.
In this semiconductor module substrate, the surface mount component is exposed, but in order to protect the surface mount component from the external environment, the surface mount component must be sealed with resin as shown in FIG. 8A, for example. Is preferred. In this case, the semiconductor module substrate includes a circuit board 1, a plurality of connection members (projection electrodes) 2 arranged on the peripheral edge of the surface of the circuit board 1, and inner sides of these projection electrodes 2, as shown in FIG. The surface mounting component 3 is mounted on the surface and electrically connected to the circuit board 1 by the bonding wire 3 </ b> A, and the resin portion 4 that seals the surface mounting component 3 is provided. Here, the resin portion 4 is formed by applying a liquid resin to the circuit board 1 and thermosetting it.
JP2004-014648

しかしながら、液状樹脂を回路基板１に塗布して表面実装部品３を封止する際に、図８の（ｂ）に拡大して示すように、液状樹脂が表面張力によって突起電極２の外周面に沿って這い上がり、尚かつ、突起電極２の先端面の外周から盛り上がって外周縁部を覆うように濡れ広がる、いわゆるブリードが生じる。この結果、突起電極２の先端面の盛り上がり部４Ａが突起電極２の先端面における半田濡れ性を悪化させ、最悪の場合には突起電極２とマザーボード（図示せず）の表面電極とを十分に半田接合することができず、接続不良を起こす可能性がある。   However, when the liquid resin is applied to the circuit board 1 and the surface-mounted component 3 is sealed, the liquid resin is applied to the outer peripheral surface of the protruding electrode 2 by surface tension as shown in FIG. A so-called bleed is generated which crawls up along the surface and rises from the outer periphery of the tip end surface of the protruding electrode 2 and spreads so as to cover the outer peripheral edge. As a result, the raised portion 4A on the tip surface of the bump electrode 2 deteriorates the solder wettability on the tip surface of the bump electrode 2, and in the worst case, the bump electrode 2 and the surface electrode of the mother board (not shown) are sufficiently connected. Solder bonding cannot be performed, and connection failure may occur.

また、半導体モジュール基板をマザーボードに接続できたとしても、突起電極２の先端面の外周縁部が盛り上がり部４Ａによって覆われているため、有効な電極面積が縮小し、半田との接合面積が小さくなって、接合強度が弱く、落下等の衝撃が受けた場合に半導体モジュール基板がマザーボードから落下する可能性が高くなる。そこで、突起電極２を樹脂部４の最小限の高さよりも十分に高くすれば、このような弊害を防止することができるが、この場合には製品としての低背化の妨げになる。また、樹脂部４の盛り上がり部４Ａを研磨することも考えられるが、完全に盛り上がり部４Ａを除去できるとは限らない。   Even if the semiconductor module substrate can be connected to the motherboard, the outer peripheral edge portion of the tip surface of the protruding electrode 2 is covered with the raised portion 4A, so that the effective electrode area is reduced and the bonding area with the solder is reduced. Thus, the bonding strength is weak, and the possibility of the semiconductor module substrate falling from the motherboard increases when an impact such as dropping is received. Thus, if the protruding electrode 2 is made sufficiently higher than the minimum height of the resin portion 4, such an adverse effect can be prevented, but in this case, the height reduction of the product is hindered. Further, it is conceivable to polish the raised portion 4A of the resin portion 4, but the raised portion 4A cannot be completely removed.

本発明は、上記課題を解決するためになされたもので、複数の突起電極の先端面における樹脂部の盛り上がりをなくし、突起電極の先端面全面を半田等との接合材料との接合に利用して実装基板との接合強度を高めることができる突起電極付き回路基板の製造方法を提供することを目的としている。 The present invention has been made to solve the above problems, eliminates the swelling of the resin portion on the tip surfaces of the plurality of protruding electrodes, and uses the entire tip surface of the protruding electrodes for bonding with a bonding material such as solder. and its object is to provide a manufacturing how the bump electrode with the circuit board bonding strength can be enhanced with the mounting substrate Te.

本発明の請求項１に記載の突起電極付き回路基板の製造方法は、所定の回路パターンを有する回路基板と、上記回路基板の第１主面に設けられ、上記第１主面から垂直方向に延びた突起電極と、を有する突起電極付き回路基板を作製する第１工程と、上記突起電極の先端面に撥液性皮膜を形成する第２工程と、上記回路基板の上記第１主面に、上記撥液性皮膜に対して濡れ性の低い液状樹脂を塗布する第３工程と、を有し、上記第１工程では、未焼成セラミック素体の第１主面に、上記未焼成セラミック素体の焼成温度では実質的に焼結しない基材に上記未焼成セラミック素体の焼成温度で焼結する金属材料によって形成された未焼成突起電極用パターンを有する拘束層を付与して、未焼成複合積層体を作製し、然る後、上記拘束層の上記基材は、実質的に焼結せず、上記未焼成セラミック素体及び上記未焼成突起電極用パターンの上記金属材料が焼結し得る温度下で、上記未焼成複合積層体を焼成することによって、上記突起電極付き回路基板を作製することを特徴とするものである。 According to a first aspect of the present invention, there is provided a method of manufacturing a circuit board with protruding electrodes, comprising: a circuit board having a predetermined circuit pattern; a first main surface of the circuit board; and a vertical direction from the first main surface. A first step of producing a circuit board with a protruding electrode having an extended protruding electrode; a second step of forming a liquid-repellent film on a tip surface of the protruding electrode; and a first step of forming the circuit board on the first main surface of the circuit board. a third step of applying a low liquid resin wettability against the liquid-repellent film, was closed, in the first step, the first main surface of the unfired ceramic body, the unfired ceramic element A constraining layer having a pattern for an unfired protruding electrode formed by a metal material sintered at the firing temperature of the unfired ceramic body is applied to a substrate that is not substantially sintered at the body firing temperature, and unfired A composite laminate is prepared and then the base of the constraining layer is prepared. Is obtained by firing the unfired composite laminate at a temperature at which the unfired ceramic body and the metal material of the unfired bump electrode pattern can be sintered without substantially sintering. A circuit board with protruding electrodes is produced .

また、本発明の請求項２に記載の突起電極付き回路基板の製造方法は、請求項１に記載の発明において、上記回路基板の上記第１主面の周縁部に複数の上記突起電極が配列されていることを特徴とするものである。   According to a second aspect of the present invention, there is provided the method for manufacturing a circuit board with protruding electrodes according to the first aspect, wherein the plurality of protruding electrodes are arranged on the peripheral edge of the first main surface of the circuit board. It is characterized by being.

また、本発明の請求項３に記載の突起電極付き回路基板の製造方法は、請求項１または請求項２に記載の発明において、上記突起電極の高さをｔ０とした時、上記突起電極の先端面からの高さｔ１（但し、ｔ１＜ｔ０）までの範囲において、上記突起電極の側面周面にも撥液性皮膜を形成することを特徴とするものである。   According to a third aspect of the present invention, there is provided a method of manufacturing a circuit board with a protruding electrode according to the first or second aspect of the invention, wherein the height of the protruding electrode is t0. A liquid-repellent film is also formed on the side surface of the protruding electrode in a range up to a height t1 (however, t1 <t0) from the tip surface.

また、本発明の請求項４に記載の突起電極付き回路基板の製造方法は、請求項１〜請求項３のいずれか１項に記載の発明において、上記突起電極の外側の側面にも上記撥液性皮膜を形成することを特徴とするものである。   According to a fourth aspect of the present invention, there is provided a method of manufacturing a circuit board with a protruding electrode according to the invention described in any one of the first to third aspects. It is characterized by forming a liquid film.

また、本発明の請求項５に記載の突起電極付き回路基板の製造方法は、請求項２〜請求項４のいずれか１項に記載の発明において、上記複数の突起電極のうち、隣接する突起電極間で互いに対向する側面にも撥液性皮膜を形成することを特徴とするものである。   According to a fifth aspect of the present invention, there is provided a method for manufacturing a circuit board with a protruding electrode, wherein, in the invention according to any one of the second to fourth aspects, an adjacent protrusion among the plurality of protruding electrodes. A liquid-repellent film is also formed on the side surfaces facing each other between the electrodes.

また、本発明の請求項６に記載の突起電極付き回路基板の製造方法は、請求項２〜請求項５のいずれか１項に記載の発明において、上記第２工程の後段で上記第３工程の前段において、上記複数の突起電極に囲まれた領域に表面実装部品を搭載する工程を有することを特徴とするものである。   According to a sixth aspect of the present invention, there is provided a method for manufacturing a circuit board with a protruding electrode according to any one of the second to fifth aspects, wherein the third step is performed after the second step. In the preceding stage, the method includes a step of mounting a surface-mounted component in a region surrounded by the plurality of protruding electrodes.

また、本発明の請求項７に記載の突起電極付き回路基板の製造方法は、請求項１〜請求項６のいずれか１項に記載の発明において、上記未焼成セラミック素体は、複数の未焼成セラミック層を積層してなる未焼成セラミック多層素体であり、その表層及び内層に上記未焼成セラミック素体の焼成温度で焼結する金属材料によって上記回路パターンとなる未焼成の回路パターンが形成されていることを特徴とするものである。 According to a seventh aspect of the present invention, there is provided a method for manufacturing a circuit board with protruding electrodes according to any one of the first to sixth aspects. An unsintered ceramic multilayer body formed by laminating fired ceramic layers, and an unsintered circuit pattern to be the above circuit pattern is formed on the surface layer and inner layer by a metal material sintered at the firing temperature of the unsintered ceramic body. It is characterized by being.

本発明によれば、複数の突起電極の先端面における樹脂部の盛り上がりをなくし、突起電極の先端面全面を半田等との接合材料との接合に利用して実装基板との接合強度を高めることができる突起電極付き回路基板の製造方法を提供することができる。 According to the present invention, it is possible to eliminate the swelling of the resin portion on the front end surfaces of the plurality of protruding electrodes, and to increase the bonding strength with the mounting substrate by utilizing the entire front end surface of the protruding electrodes for bonding with a bonding material such as solder. it is possible to provide a manufacturing how the bump electrode with the circuit board can.

以下、図１〜図８に示す実施形態に基づいて本発明を説明する。   Hereinafter, the present invention will be described based on the embodiment shown in FIGS.

第１の実施形態
まず、図１及び図２を参照しながら本実施形態の突起電極付き回路基板について説明する。 First Embodiment First, a circuit board with protruding electrodes according to this embodiment will be described with reference to FIGS. 1 and 2.

本実施形態の突起電極付き回路基板１０は、図１の（ａ）の断面図に示すように、回路基板１１と、回路基板１１の第１主面（下面）の周縁部に沿って配列され、下面から垂直方向に延びた複数の突起電極１２と、を備えている。回路基板１１の下面には第１表面実装部品１３が複数の突起電極１２の内側に配置して搭載され、第１表面実装部品１３は樹脂部１４によって封止されている。そして、同図の（ａ）及び（ｂ）の斜視図に示すように、樹脂部１４の表面では複数の突起電極１２それぞれの先端面全面が露出し、マザーボード２０の表面電極２０Ａとの半田接合に供される。また、回路基板１１の第２主面（上面）には第２、第３表面実装部品１５、１６が搭載されている。この突起電極付き回路基板１０は、同図の（ａ）に示すように複数の突起電極１２が半田Ｓを介してマザーボード２０の表面電極２０Ａに電気的に接続され、第１、第２、第３表面実装部品１３、１５、１６がそれぞれの機能を発現するように構成されている。   As shown in the cross-sectional view of FIG. 1A, the circuit board 10 with protruding electrodes of the present embodiment is arranged along the peripheral edge of the circuit board 11 and the first main surface (lower surface) of the circuit board 11. A plurality of protruding electrodes 12 extending vertically from the lower surface. On the lower surface of the circuit board 11, a first surface mounting component 13 is arranged and mounted inside the plurality of protruding electrodes 12, and the first surface mounting component 13 is sealed with a resin portion 14. Then, as shown in the perspective views of FIGS. 5A and 5B, the entire front end surface of each of the plurality of protruding electrodes 12 is exposed on the surface of the resin portion 14 and is soldered to the surface electrode 20A of the mother board 20. To be served. Further, second and third surface mount components 15 and 16 are mounted on the second main surface (upper surface) of the circuit board 11. In the circuit board 10 with protruding electrodes, a plurality of protruding electrodes 12 are electrically connected to the surface electrode 20A of the mother board 20 via solder S as shown in FIG. The three surface mount components 13, 15, 16 are configured to exhibit their respective functions.

また、回路基板１１は、図１の（ａ）に示すように、複数のセラミック層１１Ａが積層して形成されたセラミック積層体と、積層体に所定のパターンで形成された回路パターン１１Ｂと、を備えている。回路パターン１１Ｂは、同図に示すように、セラミック積層体内で上下のセラミック層１１Ａの界面に形成された面内導体１１Ｃと、上下の面内導体１１Ｃ、１１Ｃを電気的に接続するように所定のパターンでセラミック層１１Ａを貫通するビアホール導体１１Ｄと、セラミック積層体の上下両面にそれぞれ所定のパターンで形成された第１、第２表面電極１１Ｅ、１１Ｆと、を有している。   Further, as shown in FIG. 1A, the circuit board 11 includes a ceramic laminate formed by laminating a plurality of ceramic layers 11A, a circuit pattern 11B formed in a predetermined pattern on the laminate, It has. As shown in the figure, the circuit pattern 11B is predetermined so as to electrically connect the in-plane conductor 11C formed at the interface between the upper and lower ceramic layers 11A and the upper and lower in-plane conductors 11C and 11C in the ceramic laminate. Via holes 11D penetrating the ceramic layer 11A and first and second surface electrodes 11E, 11F formed in a predetermined pattern on both upper and lower surfaces of the ceramic laminate.

第１表面実装部品１３は、例えばシリコン半導体素子、ガリウム砒素半導体素子等の能動素子によって構成され、図１の（ａ）に示すようにＡｕ、Ａｌ、Ｃｕ等のボンディングワイヤー１３Ａを介して第１表面電極１１Ｅに接続されている。第１表面実装部品１３は、目的に応じて、コンデンサ、インダクタ、抵抗等の受動素子によって構成されたものでも良く、また、能動素子と受動素子の双方を混在させて構成されたものであっても良い。また、第２表面実装部品１５は、第１表面実装部品１３と同様に能動素子によって構成され、半田ボールを介して第２表面電極１１Ｆに電気的に接続されている。第３表面実装部品１６は、受動素子によって構成され、半田や導電性樹脂を介して第２表面電極１１Ｆに接続されている。第２、第３表面実装部品１５、１６は、目的に即して双方とも能動素子で構成されたものであっても良く、双方とも受動素子で構成されたものであっても良い。   The first surface mount component 13 is composed of an active element such as a silicon semiconductor element or a gallium arsenide semiconductor element, for example. As shown in FIG. 1A, the first surface mount component 13 is connected to the first surface mount via a bonding wire 13A such as Au, Al, or Cu. It is connected to the surface electrode 11E. The first surface mount component 13 may be configured by passive elements such as capacitors, inductors, resistors, etc., depending on the purpose, and may be configured by mixing both active elements and passive elements. Also good. Similarly to the first surface mount component 13, the second surface mount component 15 is composed of an active element, and is electrically connected to the second surface electrode 11F via a solder ball. The third surface mount component 16 is composed of a passive element, and is connected to the second surface electrode 11F via solder or conductive resin. Both the second and third surface mount components 15 and 16 may be composed of active elements according to the purpose, or both may be composed of passive elements.

樹脂部１４は、例えば耐熱性、耐湿性に優れたエポキシ樹脂、フェノール樹脂、シアネート樹脂等の液状の熱硬化性樹脂を塗布して形成されている。この樹脂部１４は、図１の（ａ）、（ｂ）に示すように実質的に突起電極１２の高さと同一の高さに形成され、しかも突起電極１２の先端面の周縁部まで濡れ広がることがなく、突起電極１２の先端面全面を露出させている。従って、突起電極付き回路基板１０は、同図に示すように突起電極１２の先端面全面がマザーボード２０の表面電極２０Ａとの半田接合に利用されている。   The resin portion 14 is formed by applying a liquid thermosetting resin such as an epoxy resin, a phenol resin, or a cyanate resin excellent in heat resistance and moisture resistance, for example. As shown in FIGS. 1A and 1B, the resin portion 14 is formed at a height substantially the same as the height of the protruding electrode 12, and further spreads wet to the peripheral portion of the tip surface of the protruding electrode 12. The entire tip surface of the bump electrode 12 is exposed. Therefore, in the circuit board 10 with protruding electrodes, the entire front end surface of the protruding electrode 12 is used for solder bonding with the surface electrode 20A of the mother board 20 as shown in FIG.

樹脂部４が突起電極１２の先端面の外周縁部まで盛り上がることがないのは、回路基板１１に液状樹脂を塗布する前の段階で、図２の（ａ）の要部断面図に示すように突起電極１２の先端面全面に液状樹脂との濡れ性が低く液状樹脂をはじく薬剤、例えばフッ素系燐酸エステルのアンモニウム塩等の撥液性薬剤を含有する水溶液が塗布、乾燥されて撥液性皮膜１８が形成されているからである。そのため、液状樹脂を突起電極１２の先端面と実質的に同一の高さまで回路基板１１に塗布しても、液状樹脂が撥液性皮膜１８によってはじかれて、図２の（ａ）に示すように突起電極１２の先端面の撥液性皮膜１８まで這い上がることがなく、突起電極１２の先端面全面が露出した状態になる。この撥液性皮膜１８は、そのまま残しても、半田との導電性に劣るわけではないので、突起電極１２とマザーボード２０の表面電極２０Ａとの半田接合性を損なうことがない。   The resin part 4 does not swell up to the outer peripheral edge part of the tip end surface of the protruding electrode 12 as shown in the cross-sectional view of the main part in FIG. An aqueous solution containing a liquid repellent agent having low wettability with the liquid resin, such as an ammonium salt of a fluorinated phosphate, is applied to the entire tip surface of the bump electrode 12 and dried to make the liquid repellent This is because the film 18 is formed. Therefore, even if the liquid resin is applied to the circuit board 11 up to substantially the same height as the tip surface of the protruding electrode 12, the liquid resin is repelled by the liquid-repellent film 18, as shown in FIG. In other words, the entire surface of the tip end surface of the bump electrode 12 is exposed without being crawled up to the liquid-repellent film 18 on the tip surface of the bump electrode 12. Even if the liquid repellent film 18 is left as it is, it does not impair the conductivity with the solder, so that the solder bonding property between the protruding electrode 12 and the surface electrode 20A of the mother board 20 is not impaired.

また、撥液性皮膜１８は、図２の（ｂ）に示すように突起電極１２の先端面から高さｔ１まで形成されていても良い。これにより、樹脂部１４の下面とマザーボード２０の表面との間に高さｔ１の隙間を形成することができ、マザーボード２０が熱変形しても、マザーボード２０と樹脂部１４との接触を防止し、突起電極１２と表面電極２０Ａとの半田接合部におけるクラックを防止し、接続信頼性を更に高めることができる。   Further, the liquid repellent film 18 may be formed from the tip surface of the protruding electrode 12 to a height t1 as shown in FIG. As a result, a gap of height t1 can be formed between the lower surface of the resin portion 14 and the surface of the motherboard 20, and even when the motherboard 20 is thermally deformed, contact between the motherboard 20 and the resin portion 14 is prevented. Further, it is possible to prevent cracks at the solder joint between the protruding electrode 12 and the surface electrode 20A, and to further improve the connection reliability.

而して、回路基板１１は、例えばセラミック材料によって形成することができる。セラミック材料としては、例えば低温焼結セラミック（ＬＴＣＣ：Low Temperature Co-fired Ceramic）材料を使用することができる。低温焼結セラミック材料とは、１０５０℃以下の温度で焼結可能であって、比抵抗の小さなＡｇやＣｕ等と同時焼成が可能なセラミック材料である。低温焼結セラミック材料としては、具体的には、アルミナやジルコニア、マグネシア、フォルステライト等のセラミック粉末にホウ珪酸系ガラスを混合してなるガラス複合系ＬＴＣＣ材料、ＺｎＯ−ＭｇＯ−Ａｌ２Ｏ３−ＳｉＯ２系の結晶化ガラスを用いた結晶化ガラス系ＬＴＣＣ材料、ＢａＯ−Ａｌ２Ｏ３−ＳｉＯ２系セラミック粉末やＡｌ２Ｏ３−ＣａＯ−ＳｉＯ２−ＭｇＯ−Ｂ２Ｏ３系セラミック粉末等を用いた非ガラス系ＬＴＣＣ材料等が挙げられる。 Thus, the circuit board 11 can be formed of, for example, a ceramic material. As the ceramic material, for example, a low temperature co-fired ceramic (LTCC) material can be used. The low-temperature sintered ceramic material is a ceramic material that can be sintered at a temperature of 1050 ° C. or less and can be simultaneously fired with Ag, Cu, or the like having a small specific resistance. Specifically, as the low-temperature sintered ceramic material, a glass composite LTCC material obtained by mixing borosilicate glass with ceramic powder such as alumina, zirconia, magnesia, and forsterite, ZnO—MgO—Al 2 O 3 — Crystallized glass-based LTCC material using crystallized glass of SiO 2 , BaO—Al 2 O 3 —SiO 2 ceramic powder, Al 2 O 3 —CaO—SiO 2 —MgO—B 2 O 3 ceramic powder, etc. Non-glass type LTCC materials using

回路パターン１１Ｂ及び突起電極１２は、それぞれ導電性金属によって形成することができる。導電性金属としては、Ａｇ、Ａｇ−Ｐｔ合金、Ｃｕ、Ｐｔ、Ｐｄ、Ｗ、Ｍｏ及びＡｕの少なくとも一種を主成分とする金属を用いることができる。これらの導電性金属のうち、Ａｇ、Ａｇ−Ｐｔ合金、Ａｇ−Ｐｄ合金及びＣｕは、比抵抗が小さいため、好ましく用いることができる。また、回路基板１１の材料として低温焼結セラミック材料を用いる場合には、ＮｉまたはＡｕ等の低抵抗で１０００℃以下の低融点をもつ金属を用いることができる。回路基板１１は、配線パターン１１Ｂ及び突起電極１２と１０００℃以下の低温で共焼成することができる。尚、回路基板１１の金属材料と突起電極１２の金属材料は、同じものであることが好ましいが、回路パターン１１ＢをＣｕ、突起電極１２をＡｇのように異なる金属材料を使用しても良い。   The circuit pattern 11B and the protruding electrode 12 can each be formed of a conductive metal. As the conductive metal, a metal containing at least one of Ag, Ag—Pt alloy, Cu, Pt, Pd, W, Mo, and Au as a main component can be used. Among these conductive metals, Ag, Ag—Pt alloy, Ag—Pd alloy, and Cu can be preferably used because of their low specific resistance. When a low-temperature sintered ceramic material is used as the material for the circuit board 11, a metal having a low melting point of 1000 ° C. or lower with a low resistance such as Ni or Au can be used. The circuit board 11 can be co-fired with the wiring pattern 11B and the protruding electrode 12 at a low temperature of 1000 ° C. or lower. The metal material of the circuit board 11 and the metal material of the bump electrode 12 are preferably the same, but different metal materials such as Cu for the circuit pattern 11B and Ag for the bump electrode 12 may be used.

次いで、本発明の突起電極付き回路基板の製造方法の一実施形態について図３、図４の各断面図を参照しながら説明する。本実施形態では無収縮工法を用いて突起電極付き回路基板１０を作製する。無収縮工法とは、セラミック基板の焼成前後でセラミック基板の平面方向の寸法が実質的に変化しない工法のことを云う。この無収縮工法では後述する収縮抑制用セラミックグリーンシートを用いる。   Next, an embodiment of a method for producing a circuit board with protruding electrodes according to the present invention will be described with reference to the cross-sectional views of FIGS. In the present embodiment, the circuit board 10 with protruding electrodes is produced using a non-shrinkage method. The non-shrink method is a method in which the dimension in the plane direction of the ceramic substrate does not substantially change before and after firing the ceramic substrate. In this non-shrinkage construction method, a ceramic green sheet for shrinkage suppression described later is used.

１．突起電極付き回路基板の作製
１）未焼成セラミック素体（回路基板用グリーンシート）の作製
まず、低温焼結セラミック粉末として例えばアルミナ粉末及びホウ珪酸ガラスからなる混合粉末を調製する。この混合粉末を有機ビヒクル中に分散させてスラリーを調製し、これをキャスティング法によってシート状に成形することによって、図３の（ａ）に示す回路基板用セラミックグリーンシート１１１Ａを、例えば２０μｍの厚みで所定枚数を作製する。次いで、例えばレーザー光や金型を用いて回路基板用セラミックグリーンシート１１１Ａに所定のパターンでビアホールを形成した後、このビアホールに導電性ペーストを充填して未焼成ビアホール導体１１１Ｄを形成する。導電性ペーストとしては、例えばＡｇを主成分とするものを用いる。その後、例えばスクリーン印刷法によってビアホール導体で使用したものと同一の導電性ペーストを回路基板用セラミックグリーンシート１１１Ａ上に所定のパターンで印刷して未焼成面内導体１１１Ｃを形成する。また、同様にして他の一枚の回路基板用セラミックグリーンシート１１１Ａに未焼成ビアホール導体１１１Ｅ及び未焼成表面電極１１１Ｅを形成し、更に他の一枚の回路基板用セラミックグリーンシート１１１Ａに未焼成ビアホール導体１１１Ｅ及び未焼成表面電極１１１Ｆを形成する。 1. Production of circuit board with protruding electrodes 1) Production of unsintered ceramic body (green sheet for circuit board) First, a mixed powder made of, for example, alumina powder and borosilicate glass is prepared as a low-temperature sintered ceramic powder. The mixed powder is dispersed in an organic vehicle to prepare a slurry, and this is formed into a sheet by a casting method, whereby a ceramic green sheet 111A for a circuit board shown in FIG. A predetermined number of sheets are prepared. Next, for example, via holes are formed in a predetermined pattern in the ceramic green sheet for circuit board 111A using a laser beam or a mold, and then the via holes are filled with a conductive paste to form an unfired via-hole conductor 111D. As the conductive paste, for example, a paste containing Ag as a main component is used. Thereafter, the same conductive paste used for the via-hole conductor is printed in a predetermined pattern on the circuit board ceramic green sheet 111A by, for example, a screen printing method to form an unfired in-plane conductor 111C. Similarly, an unfired via-hole conductor 111E and an unfired surface electrode 111E are formed on another ceramic green sheet for circuit board 111A, and an unfired via hole is formed on another ceramic green sheet for circuit board 111A. A conductor 111E and an unfired surface electrode 111F are formed.

２）収縮抑制用セラミックグリーンシート（拘束層）の作製
収縮抑制用セラミックグリーンシートは、基材として低温焼結セラミックの焼成温度では焼結しない難焼結性セラミックを主成分として含んでいる。難焼結性セラミック粉末として例えばアルミナ粉末を準備し、このアルミナ粉末を有機ビヒクル中に分散させてスラリーを調製し、これをキャスティング法によってシート状に成形することによって、図３の（ａ）に示す収縮抑制用セラミックグリーンシート１００を所定枚数作製する。この収縮抑制用セラミックグリーンシート１００の焼結温度は１５００〜１６００℃で、低温焼結セラミックからなる回路基板用セラミックグリーンシート１１１Ａの焼結温度（例えば、９００℃）より格段に高い焼結温度を有するため、回路基板用セラミックグリーンシート１１１Ａの焼成温度では実質的には焼結しない。この収縮抑制用セラミックグリーンシート１００にレーザー光や金型を用いて所定のパターンで突起電極用の孔（例えば、０．５ｍｍ×０．５ｍｍ）を形成した後、この孔内にＡｇを主成分とする導電性ペーストを充填して未焼成突起電極１１２を形成する。この収縮抑制用セラミックグリーンシート１００を例えば図３に示すように３枚作製する。また、未焼成突起電極１１２を含まない、抑制収縮用セラミックグリーンシート１００Ａも例えば同図に示すように３枚作製する。難焼結性セラミック粉末としては、例えば、アルミナの他、ジルコニア、マグネシア等のセラミック粉末を用いることもできる。収縮抑制用セラミックグリーンシート１００としては、回路基板用セラミックグリーンシート１１１Ａに含まれるセラミック成分と共通のものを含むことが好ましい。 2) Production of Shrinkage Suppressing Ceramic Green Sheet (Constrained Layer) The shrinkage suppressing ceramic green sheet contains, as a main component, a hardly sinterable ceramic that does not sinter at the firing temperature of the low temperature sintered ceramic as a base material. For example, alumina powder is prepared as the hardly sinterable ceramic powder, and the alumina powder is dispersed in an organic vehicle to prepare a slurry, which is formed into a sheet by a casting method. A predetermined number of shrinkage-suppressing ceramic green sheets 100 are produced. The sintering temperature of the ceramic green sheet 100 for suppressing shrinkage is 1500 to 1600 ° C., which is much higher than the sintering temperature (for example, 900 ° C.) of the ceramic green sheet 111A for circuit boards made of low-temperature sintered ceramic. Therefore, it is not substantially sintered at the firing temperature of the ceramic green sheet for circuit board 111A. After forming a hole for a protruding electrode (for example, 0.5 mm × 0.5 mm) in a predetermined pattern in the ceramic green sheet 100 for suppressing shrinkage using a laser beam or a mold, Ag is a main component in the hole. An unfired bump electrode 112 is formed by filling the conductive paste. Three ceramic green sheets 100 for suppressing shrinkage are produced, for example, as shown in FIG. In addition, three ceramic green sheets 100A for suppressing shrinkage that do not include the unfired protruding electrodes 112 are produced as shown in FIG. As the hardly sinterable ceramic powder, for example, ceramic powder such as zirconia and magnesia can be used in addition to alumina. The ceramic green sheet 100 for suppressing shrinkage preferably includes the same ceramic component as that contained in the ceramic green sheet 111A for circuit board.

３）未焼成セラミック素体の作製
図３の（ｂ）に示すように、未焼成突起電極１１２を含まない収縮抑制用セラミックグリーンシート１００Ａを３枚積層し、この上に未焼成表面電極１１１Ｅを有する回路基板用セラミックグリーンシート１１１Ａをその未焼成表面電極１１１Ｅを下向きにして積層し、更にこの上に未焼成面内導体１１１Ｃ及び未焼成ビアホール導体１１１Ｄを有する回路基板用セラミックグリーンシート１１１Ａを積層し、更にその上に未焼成表面電極１１１Ｆを有する回路基板用セラミックグリーンシート１１１Ａをその未焼成表面電極１１１Ｆを上向きにして積層する。次いで、これらの上に未焼成突起電極１１２を有する収縮抑制用セラミックグリーンシート１００を３枚積層した後、積層方向（上下方向）から２００〜１５００ｋｇ／ｃｍ２の圧力で各層をプレスして圧着しこれらの層が一体化された、図３の（ｂ）に示す、回路パターン１１１Ｂを有する未焼成複合積層体２００を得ることができる。 3) Production of Unfired Ceramic Element Body As shown in FIG. 3B, three ceramic green sheets 100A for shrinkage suppression not including the unfired protruding electrodes 112 are stacked, and the unfired surface electrode 111E is formed thereon. The circuit board ceramic green sheet 111A is laminated with the unfired surface electrode 111E facing downward, and the circuit board ceramic green sheet 111A having the unfired in-plane conductor 111C and the unfired via-hole conductor 111D is further laminated thereon. Further, a ceramic green sheet 111A for a circuit board having an unfired surface electrode 111F thereon is laminated with the unfired surface electrode 111F facing upward. Next, after laminating three ceramic green sheets 100 for suppressing shrinkage having unfired protruding electrodes 112 thereon, each layer is pressed and pressure-bonded at a pressure of 200 to 1500 kg / cm 2 from the laminating direction (vertical direction). An unfired composite laminate 200 having a circuit pattern 111B shown in FIG. 3B in which these layers are integrated can be obtained.

４）未焼成セラミック素体の焼成
未焼成複合積層体２００を例えば９００℃以下の所定温度で焼成すると、収縮抑制用セラミックグリーンシート１００、１００Ａは実質的に焼結せず、実質的に面方向に収縮することがないため、回路基板用セラミックグリーンシート１１１Ａ、未焼成面内導体１１１Ｃ等の未焼成回路パターン１１１Ｂが焼結して一体化しても、収縮抑制用セラミックグリーンシート１００、１００Ａの働きで、実質的に面方向に収縮することなく、高さ方向にのみ収縮して高精度な回路パターン１１Ｂ及び突起電極１２を有する、図３の（ｃ）に示す突起電極付き回路基板１０を作製することができる。この焼成で、収縮抑制用セラミックグリーンシート１００、１００Ａは、有機ビヒクルが焼失してアルミナ粉末の集合体になる。アルミナ粉末の集合体はブラスト処理等により簡単に除去することができ、アルミナ粉末を除去することにより複数の突起電極（０．５ｍｍ×０．５ｍｍ×０．５ｍｍ）が周縁部に形成された回路基板１１を得ることができる。尚、図３では複数の突起電極付き回路基板１０を同時に作製された集合基板として示してある。 4) Firing of the unfired ceramic body When the unfired composite laminate 200 is fired at a predetermined temperature of, for example, 900 ° C. or less, the ceramic green sheets 100 and 100A for shrinkage suppression are not substantially sintered and are substantially in the plane direction. Therefore, even if the unfired circuit pattern 111B such as the ceramic green sheet 111A for the circuit board and the unfired in-plane conductor 111C is sintered and integrated, the ceramic green sheets 100 and 100A for suppressing shrinkage work. Thus, the circuit board 10 with protruding electrodes shown in FIG. 3C having the high-precision circuit pattern 11B and the protruding electrodes 12 is contracted only in the height direction without substantially contracting in the surface direction. can do. By this firing, the ceramic green sheets 100 and 100A for shrinkage suppression are burned off by the organic vehicle to become an aggregate of alumina powder. The aggregate of alumina powder can be easily removed by blasting or the like, and a circuit in which a plurality of protruding electrodes (0.5 mm × 0.5 mm × 0.5 mm) are formed on the peripheral edge by removing the alumina powder. The substrate 11 can be obtained. In FIG. 3, a plurality of circuit boards 10 with protruding electrodes are shown as a collective board manufactured simultaneously.

５）メッキ処理
突起電極付き回路基板１０を作製した後、第１、第２表面電極１１Ｅ、１１Ｆ及び突起電極１２に例えば金メッキ等のメッキ処理を施し、半田等の接合部材との濡れ性を高める。 5) Plating treatment After the circuit board 10 with protruding electrodes is manufactured, the first and second surface electrodes 11E and 11F and the protruding electrodes 12 are plated with, for example, gold plating to improve wettability with a joining member such as solder. .

２．第１表面実装部品の搭載
回路基板１１上に第１表面実装部品１３を実装する場合には、図４の断面図の（ａ）に示すように突起電極１２及び第１表面電極１１Ｅを上向きにし、同図の（ｂ）に示すように第１表面電極１１Ｅが形成されていな部分にディスペンサー３０によって熱硬化性接着剤１１９を塗布した後、同図の（ｃ）に示すようにマウンターを用いて第１表面実装部品１３としてベアチップを搭載して熱硬化性接着剤１１９を介して固定し、熱処理する。次いで、同図の（ｄ）に示すようにワイヤーボンダー４０を用いて第１表面実装部品１３の端子電極（図示せず）と第１表面電極１１Ｅとをボンディングワイヤー１３Ａによって電気的に接続する。この際、突起電極付き回路基板１０の低背化を図るために、例えば突起電極１２の先端面より０．０５ｍｍ低くなるようにボンディングワイヤー１３Ａを設ける。 2. Mounting of First Surface Mount Component When mounting the first surface mount component 13 on the circuit board 11, the protruding electrode 12 and the first surface electrode 11E are faced upward as shown in FIG. After applying the thermosetting adhesive 119 by the dispenser 30 to the portion where the first surface electrode 11E is not formed as shown in FIG. 5B, the mounter is used as shown in FIG. Then, a bare chip is mounted as the first surface mount component 13 and fixed through a thermosetting adhesive 119, and heat treatment is performed. Next, as shown in (d) of the figure, a wire bonder 40 is used to electrically connect the terminal electrode (not shown) of the first surface mount component 13 and the first surface electrode 11E by the bonding wire 13A. At this time, in order to reduce the height of the circuit board 10 with the protruding electrodes, for example, the bonding wires 13A are provided so as to be 0.05 mm lower than the front end surface of the protruding electrodes 12.

３．突起電極への撥液性皮膜及び樹脂部の形成
第１表面実装部品１３を実装した後、図４の（ｅ）に示すように撥液性薬剤１１８を含有する水溶液をスタンパー５０に塗布し、スタンパー５０の撥液性薬剤１１８を突起電極１２の先端面に転写した後、オーブン（図示せず）中で例えば６０℃の温度で１０分間乾燥させて突起電極１２の先端面に撥液性皮膜１８（図２の（ｂ）参照）を形成する。その後、同図の（ｆ）に示すようにディスペンサー６０を用いて、図中の矢印方向に移動させながら液状樹脂１１４として例えばエポキシ樹脂を塗布して第１表面実装部品１３を封止する。 3. Formation of Liquid Repellent Film and Resin Portion on Projection Electrode After mounting the first surface mount component 13, an aqueous solution containing a liquid repellent agent 118 is applied to the stamper 50 as shown in FIG. After the liquid repellent agent 118 of the stamper 50 is transferred to the tip surface of the bump electrode 12, it is dried in an oven (not shown) at a temperature of, for example, 60 ° C. for 10 minutes to form a liquid repellent film on the tip surface of the bump electrode 12. 18 (see FIG. 2B). Thereafter, as shown in (f) of the figure, using the dispenser 60, for example, an epoxy resin is applied as the liquid resin 114 while being moved in the direction of the arrow in the figure to seal the first surface mount component 13.

この際、突起電極１２の先端面に撥液性皮膜１８が形成されているため、液状樹脂１１４を実質的に突起電極１２と同一高さだけ塗布して液状樹脂１１４が突起電極１２の先端面に達しても撥液性皮膜１８において液状樹脂１１４の表面張力が大きくなって撥液性皮膜１８に濡れ広がるブリード現象を生じることがない。そして、液状樹脂１１４を熱処理等によって硬化させると、突起電極１２の先端面全面が樹脂部１４の表面から露出したままで突起電極１２と実質的に同一の高さでボンディングワイヤー１３Ａの高さより０．０５ｍｍ高い、最小限の高さの樹脂部１４が形成され、然る後、この集合基板を分割することによって、図１の（ａ）、（ｂ）に示す突起電極付き回路基板１０を得ることができる。   At this time, since the liquid repellent film 18 is formed on the tip surface of the protruding electrode 12, the liquid resin 114 is applied to substantially the same height as the protruding electrode 12, and the liquid resin 114 is applied to the tip surface of the protruding electrode 12. However, the surface tension of the liquid resin 114 in the liquid repellent film 18 does not increase and the bleeding phenomenon that spreads wet on the liquid repellent film 18 does not occur. Then, when the liquid resin 114 is cured by heat treatment or the like, the entire front end surface of the bump electrode 12 is exposed from the surface of the resin portion 14 and is substantially the same height as the bump electrode 12 from the height of the bonding wire 13A. A resin portion 14 having a height of 0.05 mm and a minimum height is formed. After that, the circuit board 10 with protruding electrodes shown in FIGS. 1A and 1B is obtained by dividing the aggregate substrate. be able to.

以上説明したように本実施形態によれば、所定の回路パターン１１Ｂを有する回路基板１１と、回路基板１１の下面の周縁部に配列され、下面から垂直方向に延びた複数の突起電極１２と、を有する突起電極付き回路基板１０を作製する第１工程と、突起電極１２の先端面に撥液性皮膜１８を形成する第２工程と、回路基板１１の下面に、撥液性皮膜１８に対して濡れ性の低い液状樹脂を塗布する第３工程と、を有するため、突起電極付き回路基板１０の下面の樹脂部１４を複数の突起電極１２と実質的に同じ高さに形成しても、複数の突起電極１２の先端面まで樹脂部１４が盛り上がることがなく、突起電極１２の先端面全面を半田接合面として無駄なく利用してマザーボード２０の表面電極２０Ａに対する接続信頼性を従来よりも格段に高めることができる。   As described above, according to the present embodiment, the circuit board 11 having the predetermined circuit pattern 11B, the plurality of protruding electrodes 12 arranged in the peripheral portion of the lower surface of the circuit board 11 and extending in the vertical direction from the lower surface, A first step of manufacturing the circuit board 10 with protruding electrodes having a second step, a second step of forming the liquid-repellent film 18 on the tip surface of the protruding electrode 12, and a liquid-repellent film 18 on the lower surface of the circuit board 11. And a third step of applying a liquid resin having low wettability, and even if the resin portion 14 on the lower surface of the circuit board 10 with the protruding electrodes is formed at substantially the same height as the plurality of protruding electrodes 12, The resin portion 14 does not rise to the tip surfaces of the plurality of protruding electrodes 12, and the entire tip surface of the protruding electrode 12 is used as a solder joint surface without waste, so that the reliability of connection to the surface electrode 20A of the motherboard 20 is markedly higher than before. In It is Mel possible.

また、本実施形態では、突起電極１２の高さをｔ０とした時、突起電極１２の先端面から高さｔ１（但し、ｔ１＜ｔ０）までの範囲において、突起電極１２の側面周面にも撥液性皮膜１８を形成することにより、樹脂部１４とマザーボード２０との間に高さｔ１だけ隙間を余分に形成することができ、高温環境下でマザーボード２０が湾曲してもマザーボード２０と樹脂部１４との接触を防止し、もって突起電極１２と表面電極２０Ａとの半田接合部にクラックを生じることがなく、接続信頼性を更に高めることができる。   Further, in the present embodiment, when the height of the protruding electrode 12 is t0, the surface of the protruding electrode 12 is also in the range from the tip surface of the protruding electrode 12 to the height t1 (where t1 <t0). By forming the liquid repellent film 18, an extra gap can be formed between the resin portion 14 and the mother board 20 by a height t1, and even if the mother board 20 is curved in a high temperature environment, the mother board 20 and the resin are formed. The contact with the portion 14 is prevented, so that no crack is generated in the solder joint between the protruding electrode 12 and the surface electrode 20A, and the connection reliability can be further improved.

第２の実施形態
本実施形態の突起電極付き回路基板１０Ａについて図５及び図６の（ａ）〜（ｃ）を参照しながら第１の実施形態と同一または相当部分には同一符号を附して説明する。本実施形態の突起電極付き回路基板１０Ａは、例えば図５の断面図に示すように、回路基板１１、複数の突起電極１２、第１、第２、第３表面実装部品１３、１５、１６及び樹脂部１４を備え、突起電極１２の回路基板１１の四辺に沿う側面が側面電極として形成されて、半田接合により半田フィレットＦが形成されている以外は、実質的に第１の実施形態と同様に構成されている。 Second Embodiment A circuit board 10A with a protruding electrode according to the present embodiment is denoted by the same reference numerals as those in the first embodiment with reference to FIGS. 5 and 6A to 6C. I will explain. As shown in the cross-sectional view of FIG. 5, for example, the circuit board 10 </ b> A with protruding electrodes of the present embodiment includes a circuit board 11, a plurality of protruding electrodes 12, first, second, and third surface mount components 13, 15, 16 Substantially the same as in the first embodiment, except that the resin portion 14 is provided, the side surfaces of the protruding electrode 12 along the four sides of the circuit board 11 are formed as side electrodes, and the solder fillet F is formed by solder bonding. It is configured.

本実施形態の突起電極付き回路基板の製造方法は、突起電極１２の撥液性皮膜の形成領域を第１の実施形態の場合より拡張した以外は、第１の実施形態に準じて実施される。そこで、撥液性皮膜を形成する段階から説明する。即ち、図６の（ａ）の斜視図に示すように突起電極付き回路基板１０Ａの集合基板の突起電極１２を上向きにし、各突起電極１２の先端面に第１の実施形態と同一の撥液性薬剤を含有する水溶液をそれぞれ塗布し、更に本実施形態では各突起電極１２の回路基板１１の四辺に沿う側面にも撥液性薬剤を含有する水溶液をそれぞれ塗布する。その後、この集合基板に熱処理を施すことにより、各突起電極１２の該当部位に撥液性皮膜１８、１８Ａを形成することができる。   The manufacturing method of the circuit board with protruding electrodes according to the present embodiment is carried out in accordance with the first embodiment except that the liquid-repellent film forming region of the protruding electrodes 12 is expanded from the case of the first embodiment. . Therefore, the step of forming the liquid repellent film will be described. That is, as shown in the perspective view of FIG. 6A, the bump electrodes 12 of the collective substrate of the circuit board 10A with bump electrodes are faced upward, and the same liquid repellent property as that of the first embodiment is formed on the tip surface of each bump electrode 12. In the present embodiment, an aqueous solution containing a liquid repellent agent is also applied to the side surfaces along the four sides of the circuit board 11 of each protruding electrode 12. Thereafter, the aggregate substrate is subjected to heat treatment, whereby the liquid repellent films 18 and 18A can be formed on the corresponding portions of the protruding electrodes 12.

次いで、図６の（ｂ）の平面図、（ｃ）の要部斜視図に示すように、複数の突起電極１２の内側に液状樹脂１１４を塗布すると、各突起電極１２の先端面及び該当側面に撥液性皮膜１８、１８Ａが形成されているため、突起状電極１２の該当側面において液状樹脂が撥液性皮膜１８Ａではじかれる。これにより、液状樹脂が複数の突起電極１２内に堰き止められ、液状樹脂がその表面張力によって隣接する突起電極１２、１２の隙間で外方へ膨らむ側面を形成する。また、複数の突起状電極１２の先端部では第１の実施形態と同様に各突起電極１２の先端面へ濡れ広がることがなく、それぞれの先端面を露出した状態で複数の突起電極１２の内側に液状樹脂が満たされる。このまま熱処理すると複数の突起電極１２で囲まれた領域内に樹脂部１４が形成され、隣接する突起電極付き回路基板１０Ａの間に樹脂部のない溝が形成される。尚、図６の（ｂ）、（ｃ）では、集合基板のうち、一つの突起電極付き回路基板１０Ａのみを示してある。   Next, as shown in the plan view of FIG. 6B and the perspective view of the main part of FIG. 6C, when the liquid resin 114 is applied to the inside of the plurality of protruding electrodes 12, the front end surface and the corresponding side surface of each protruding electrode 12 are applied. Since the liquid repellent coatings 18 and 18A are formed on the corresponding side surfaces of the protruding electrodes 12, the liquid resin is repelled by the liquid repellent coating 18A. As a result, the liquid resin is dammed in the plurality of protruding electrodes 12, and the liquid resin forms a side surface that swells outward in the gap between the adjacent protruding electrodes 12, 12 due to the surface tension. Further, the tip portions of the plurality of projecting electrodes 12 do not wet and spread to the tip surfaces of the respective projecting electrodes 12 as in the first embodiment, and the insides of the plurality of projecting electrodes 12 with the respective tip surfaces exposed. Is filled with liquid resin. If the heat treatment is performed as it is, the resin portion 14 is formed in the region surrounded by the plurality of protruding electrodes 12, and a groove without the resin portion is formed between the adjacent circuit boards 10A with the protruding electrodes. 6B and 6C, only one circuit board 10A with protruding electrodes is shown among the collective boards.

その後、集合基板を所定の切断線（図６の（ａ）における破線）に従って切断することにより、本実施形態の突起電極付き回路基板１０Ａを得ることができる。この際、個々の回路基板１１の間には溝が形成されているため、集合基板を切断線に沿って簡単に切断することができる。尚、液状樹脂１１４が熱硬化してもその形態は変わらないため、図６の（ｂ）、（ｃ）では硬化前後の液状樹脂１１４及び樹脂部１４を一緒に示してある。   Thereafter, the collective substrate is cut according to a predetermined cutting line (broken line in FIG. 6A), whereby the circuit board 10A with protruding electrodes of the present embodiment can be obtained. At this time, since the grooves are formed between the individual circuit boards 11, the assembly board can be easily cut along the cutting line. In addition, since the form does not change even if the liquid resin 114 is thermally cured, in FIGS. 6B and 6C, the liquid resin 114 and the resin portion 14 before and after curing are shown together.

上述のようにして得られた突起電極付き回路基板１０Ａは、各突起電極１２の回路基板１１の四辺に沿う側面が樹脂部１４の湾曲側面の間で露出しているため、それぞれの突起電極１２の該当側面を先端面と同様に半田接合面として利用することができる。従って、この突起電極付き回路基板１０Ａをマザーボード２０に実装すると、図５に示すように各突起電極１２の該当側面に半田が這い上がって半田フィレットＦが形成されて、半田との接合面積が大きくなってマザーボード２０との接続信頼性が更に向上する。また、各突起電極１２の先端面から高さｔ１だけ残余の側面において撥液性皮膜１８Ａの形成領域を拡張すると、突起電極１２の残余の側面でも半田フィレットＦ１が形成され、更に接続信頼性を向上させることができる。しかも、半田フィレットＦが形成されているため、接合部の外観検査を行うことができる。   In the circuit board 10A with protruding electrodes obtained as described above, the side surfaces along the four sides of the circuit board 11 of each protruding electrode 12 are exposed between the curved side surfaces of the resin portion 14. This side surface can be used as a solder joint surface in the same manner as the tip surface. Therefore, when the circuit board 10A with protruding electrodes is mounted on the mother board 20, the solder crawls up to the corresponding side surface of each protruding electrode 12 to form the solder fillet F as shown in FIG. Thus, the connection reliability with the mother board 20 is further improved. Further, when the formation region of the liquid repellent film 18A is expanded on the remaining side surface by the height t1 from the front end surface of each protruding electrode 12, a solder fillet F1 is formed on the remaining side surface of the protruding electrode 12, and connection reliability is further improved. Can be improved. And since the solder fillet F is formed, the external appearance test | inspection of a junction part can be performed.

以上説明したように本実施形態によれば、複数の突起電極１２の外側の側面（該当側面）にも撥液性皮膜１８Ａを形成したため、その後に形成される樹脂部１４の側面は、隣接する突起電極１２、１２それぞれの外側の垂直辺、つまり隣接する突起電極１２の外面間を結ぶ仮想面から外方へ湾曲して形成され、各突起電極１２の撥液性皮膜１８Ａが施された側面が露出したままであり、これらの側面を側面電極として利用して半田接合することができ、接合強度が高くなって接続信頼性が第１の実施形態の場合よりも更に高くなる。更に、半田接合部が半田フィレットＦとして形成されるため、半田接合部の外観検査を行うことができる。   As described above, according to the present embodiment, since the liquid repellent film 18A is also formed on the outer side surfaces (corresponding side surfaces) of the plurality of protruding electrodes 12, the side surfaces of the resin portion 14 formed thereafter are adjacent to each other. Each of the protruding electrodes 12, 12 is formed by curving outward from a vertical side on the outer side of each of the protruding electrodes 12, that is, a virtual plane connecting the outer surfaces of the adjacent protruding electrodes 12. Are exposed and can be soldered using these side surfaces as side electrodes, resulting in higher bonding strength and higher connection reliability than in the first embodiment. Furthermore, since the solder joint portion is formed as the solder fillet F, the appearance inspection of the solder joint portion can be performed.

第３の実施形態
本実施形態の突起電極付き回路基板１０Ｂについて図７の（ａ）〜（ｃ）を参照しながら第１の実施形態と同一または相当部分には同一符号を附して説明する。本実施形態の突起電極付き回路基板１０Ｂは、第１、第２の実施形態と樹脂部１４の形態が異なる以外は、実質的に第１、第２の実施形態と同様に構成されている。そこで、第１、第２の相違点を中心に説明する。 Third Embodiment A circuit board 10B with protruding electrodes according to the present embodiment will be described with reference to FIGS. 7A to 7C with the same or corresponding parts as those in the first embodiment. . The circuit board 10B with protruding electrodes of the present embodiment is configured substantially in the same manner as the first and second embodiments except that the first and second embodiments and the resin portion 14 are different. Therefore, the first and second differences will be mainly described.

本実施形態の突起電極付き回路基板の製造方法は、突起電極１２の撥液性皮膜の形成領域を第２の実施形態の場合より更に拡張した以外は、第２の実施形態に準じて実施される。そこで、撥液性皮膜を形成する段階から説明する。即ち、本実施形態では、図７の（ａ）の斜視図に示すように突起電極付き回路基板１０Ｂの突起電極１２を上向きにし、各突起電極１２の先端面に第１の実施形態と同一の撥液性薬剤を含有する水溶液を塗布し、更に各突起電極１２の回路基板１１の四辺に沿う側面、及び隣接する突起電極１２の対向する側面にも撥液性薬剤を含有する水溶液をそれぞれ塗布する。その後、熱処理してこれらの突起電極１２の先端面及び該当側面それぞれに撥液性皮膜１８、１８Ａを形成する。この結果、同図からも明らかなように、四隅にある突起電極１２にはその全側面に撥液性皮膜１８Ａが形成される。   The manufacturing method of the circuit board with protruding electrodes of the present embodiment is performed according to the second embodiment, except that the liquid repellent film forming region of the protruding electrodes 12 is further expanded as compared with the second embodiment. The Therefore, the step of forming the liquid repellent film will be described. That is, in this embodiment, as shown in the perspective view of FIG. 7A, the protruding electrode 12 of the circuit board 10B with protruding electrodes faces upward, and the tip surface of each protruding electrode 12 is the same as that of the first embodiment. An aqueous solution containing a liquid repellent agent is applied, and an aqueous solution containing the liquid repellent agent is also applied to the side surfaces of each protruding electrode 12 along the four sides of the circuit board 11 and the opposite side surfaces of the adjacent protruding electrodes 12. To do. Thereafter, heat treatment is performed to form the liquid-repellent coatings 18 and 18A on the tip surfaces and the corresponding side surfaces of the protruding electrodes 12, respectively. As a result, as is clear from the figure, the liquid-repellent coating 18A is formed on all side surfaces of the protruding electrodes 12 at the four corners.

次いで、図７の（ｂ）の平面図、（ｃ）の要部斜視図に示すように複数の突起電極１２の内側に液状樹脂１１４を塗布すると、液状樹脂１１４は各突起電極１２の内側の側面のみを濡らし、その他の側面（該当側面）では撥液性皮膜１８Ａによってはじかれて表面張力が大きくなる。この結果、液状樹脂１１４は複数の突起電極１２の内側の側面内に堰き止められて隣接する突起電極１２、１２の隙間に流れ出すことなく、隣接する突起電極１２それぞれの内側の垂直辺、つまり隣接する突起電極１２の内面を結ぶ仮想面から外方へ膨らむ側面を形成すると共に、第１の実施形態と同様に各突起電極１２の先端面へ濡れ広がることなく、複数の突起電極１２の内側に液状樹脂が満たされる。この状態で熱処理を施すと複数の突起電極１２で囲まれた領域に樹脂部１４が形成され、隣接する突起電極付き回路基板１０Ｂの間に樹脂部のない溝が形成される。その後、集合基板を切断することにより個々の突起電極付き回路基板１０Ｂを得ることができる。   Next, as shown in the plan view of FIG. 7B and the perspective view of the main part of FIG. 7C, when the liquid resin 114 is applied to the inside of the plurality of protruding electrodes 12, the liquid resin 114 is placed inside the protruding electrodes 12. Only the side surface is wetted, and the other side surface (corresponding side surface) is repelled by the liquid repellent coating 18A to increase the surface tension. As a result, the liquid resin 114 is dammed in the inner side surfaces of the plurality of protruding electrodes 12 and does not flow into the gaps between the adjacent protruding electrodes 12, 12, but the inner vertical sides of the adjacent protruding electrodes 12, that is, adjacent to each other. In addition to forming a side surface that swells outward from a virtual surface that connects the inner surfaces of the protruding electrodes 12 to be formed, the inner surfaces of the protruding electrodes 12 are not wetted and spread to the tip surfaces of the protruding electrodes 12 as in the first embodiment. Filled with liquid resin. When heat treatment is performed in this state, a resin portion 14 is formed in a region surrounded by the plurality of protruding electrodes 12, and a groove having no resin portion is formed between adjacent circuit substrates 10B with protruding electrodes. Then, each circuit board 10B with a protruding electrode can be obtained by cutting the aggregate substrate.

上述のようにして得られた突起電極付き回路基板１０Ｂは、四隅の突起電極１２の４つの側面が樹脂部１４から露出すると共にその他の突起電極１２の３つの側面が樹脂部１４から露出しているため、露出した側面が全て側面電極となり、これらの側面で半田フィレットが形成されて、半田との接合強度が第２の実施形態の場合より更に大きくなってマザーボード２０との接続信頼性を更に高めることができる。   In the circuit board 10B with protruding electrodes obtained as described above, the four side surfaces of the protruding electrodes 12 at the four corners are exposed from the resin portion 14 and the three side surfaces of the other protruding electrodes 12 are exposed from the resin portion 14. Therefore, all exposed side surfaces become side electrodes, solder fillets are formed on these side surfaces, and the bonding strength with the solder is further increased compared to the case of the second embodiment, thereby further improving the connection reliability with the motherboard 20. Can be increased.

以上説明したように本実施形態によれば、複数の突起電極１２それぞれの先端面に撥液性皮膜１８を形成すると共に複数の突起電極１２のうち、互いに隣接する突起電極１２、１２の対向する側面にも撥液性皮膜１８Ａを形成したため、その後に形成される樹脂部１４の側面は、隣り合う突起電極１２、１２の内側の垂直辺から外方へ膨らむように湾曲して形成されて、各突起電極１２の該当側面が露出したままであり、これらの該当側面を側面電極として半田との接合に利用することができ、接続信頼性を第２の実施形態の場合よりも更に向上させることができる。   As described above, according to the present embodiment, the liquid-repellent film 18 is formed on the front end surface of each of the plurality of protruding electrodes 12, and among the plurality of protruding electrodes 12, the adjacent protruding electrodes 12, 12 face each other. Since the liquid repellent film 18A is also formed on the side surface, the side surface of the resin portion 14 formed thereafter is curved and formed so as to bulge outward from the vertical side inside the adjacent protruding electrodes 12, 12. The corresponding side surface of each protruding electrode 12 remains exposed, and the corresponding side surface can be used as a side electrode for joining with solder, and connection reliability can be further improved compared to the case of the second embodiment. Can do.

尚、本発明は、上記各実施形態に何等制限されるものではなく、必要に応じて各構成要素を適宜設計変更することができる。例えば、突起電極付き回路基板の第２主面（突起電極とは反対側に面）に少なくとも一つの表面実装部品を搭載した場合、回路基板の第２主面上の表面実装部品を樹脂によって封止しても良く、また、樹脂に代えて金属ケースを被せて表面実装部品を保護しても良い。要は、複数の突起電極の少なくとも先端面に撥液性皮膜を形成した後、複数の突起電極の先端面以外を樹脂部で封止した構造の突起電極付き回路基板であれば、本発明に包含される。   The present invention is not limited to the above-described embodiments, and the design of each component can be appropriately changed as necessary. For example, when at least one surface-mounted component is mounted on the second main surface (surface opposite to the protruding electrode) of the circuit board with protruding electrodes, the surface-mounted component on the second main surface of the circuit board is sealed with resin. Alternatively, the surface mount component may be protected by covering with a metal case instead of resin. In short, any circuit board with protruding electrodes having a structure in which a liquid-repellent film is formed on at least the tip surfaces of the plurality of protruding electrodes and then the portions other than the tip surfaces of the plurality of protruding electrodes are sealed with a resin portion. Is included.

本発明は、種々の電子機器等に使用される突起電極付き回路基板に対して好適に利用することができる。   The present invention can be suitably used for circuit boards with protruding electrodes used in various electronic devices and the like.

（ａ）、（ｂ）はそれぞれ本発明の突起電極付き回路基板の一実施形態を示す図で、（ａ）はマザーボードに実装した状態を示す断面図、（ｂ）はマザーボードに実装する前の突起電極を上向きにした斜視図である。(A), (b) is a figure which shows one Embodiment of the circuit board with a protruding electrode of this invention, respectively, (a) is sectional drawing which shows the state mounted in the motherboard, (b) is before mounting on a motherboard It is the perspective view which made the protruding electrode face up. （ａ）は図１に示す突起電極付き回路基板の実装前の突起電極の要部を示す断面図、（ｂ）は他の突起電極の要部を示す断面図である。(A) is sectional drawing which shows the principal part of the protruding electrode before mounting of the circuit board with a protruding electrode shown in FIG. 1, (b) is sectional drawing which shows the principal part of another protruding electrode. （ａ）〜（ｃ）はそれぞれ本発明の突起電極付き回路基板の製造方法の一実施形態で、図１の（ａ）に示す回路基板を製造する方法の要部を示す概略図である。(A)-(c) is one Embodiment of the manufacturing method of the circuit board with a protruding electrode of this invention, respectively, It is the schematic which shows the principal part of the method of manufacturing the circuit board shown to (a) of FIG. （ａ）〜（ｆ）はそれぞれ図１に示す突起電極付き回路基板の製造方法で図３の工程に続く要部を示す概略図である。(A)-(f) is the schematic which shows the principal part following the process of FIG. 3 with the manufacturing method of the circuit board with a protruding electrode shown in FIG. 1, respectively. 図１の（ｃ）に示す突起電極を備えた回路基板をマザーボードに実装した状態を示す断面図である。It is sectional drawing which shows the state which mounted the circuit board provided with the protruding electrode shown to (c) of FIG. 1 on the motherboard. 本発明の突起電極付き回路基板の製造方法の他の実施形態の要部を示す概略図である。It is the schematic which shows the principal part of other embodiment of the manufacturing method of the circuit board with a protruding electrode of this invention. 本発明の突起電極付き回路基板の製造方法の更に他の実施形態の要部を示す概略図である。It is the schematic which shows the principal part of other embodiment of the manufacturing method of the circuit board with a protruding electrode of this invention. 従来の突起電極付き回路基板の一例を示す断面図である。It is sectional drawing which shows an example of the conventional circuit board with a protruding electrode.

符号の説明Explanation of symbols

１０、１０Ａ、１０９Ｂ 突起電極付き回路基板
１１ 回路基板
１１Ｂ 回路パターン
１２ 突起電極
１３ 第１表面実装部品（表面実装部品）
１４ 樹脂部
１８、１８Ａ 撥液性皮膜
１００、１００Ａ 収縮抑制用セラミックグリーンシート（拘束層）
１１１ 未焼成セラミック素体
１１１Ａ 回路基板用セラミックグリーンシート（未焼成セラミック層）
１１４ 液状樹脂
１１１Ｂ 未焼成回路パターン
２００ 未焼成複合積層体 10, 10A, 109B Circuit board with bump electrode 11 Circuit board 11B Circuit pattern 12 Projection electrode 13 First surface mount component (surface mount component)
14 Resin portion 18, 18A Liquid repellent coating 100, 100A Ceramic green sheet for restraining shrinkage (restraint layer)
111 Unfired Ceramic Element 111A Ceramic Green Sheet for Circuit Board (Unfired Ceramic Layer)
114 Liquid resin 111B Unfired circuit pattern 200 Unfired composite laminate

Claims (7)

所定の回路パターンを有する回路基板と、上記回路基板の第１主面に設けられ、上記第１主面から垂直方向に延びた突起電極と、を有する突起電極付き回路基板を作製する第１工程と、
上記突起電極の先端面に撥液性皮膜を形成する第２工程と、
上記回路基板の上記第１主面に、上記撥液性皮膜に対して濡れ性の低い液状樹脂を塗布する第３工程と、
を有し、
上記第１工程では、未焼成セラミック素体の第１主面に、上記未焼成セラミック素体の焼成温度では実質的に焼結しない基材に上記未焼成セラミック素体の焼成温度で焼結する金属材料によって形成された未焼成突起電極用パターンを有する拘束層を付与して、未焼成複合積層体を作製し、然る後、上記拘束層の上記基材は、実質的に焼結せず、上記未焼成セラミック素体及び上記未焼成突起電極用パターンの上記金属材料が焼結し得る温度下で、上記未焼成複合積層体を焼成することによって、上記突起電極付き回路基板を作製する
ことを特徴とする突起電極付き回路基板の製造方法。 A first step of producing a circuit board with protruding electrodes, comprising: a circuit board having a predetermined circuit pattern; and a protruding electrode provided on the first main surface of the circuit board and extending vertically from the first main surface. When,
A second step of forming a liquid repellent film on the tip surface of the protruding electrode;
A third step of applying a liquid resin having low wettability to the liquid repellent coating on the first main surface of the circuit board;
I have a,
In the first step, sintering is performed on the first main surface of the unfired ceramic body at a firing temperature of the unfired ceramic body on a base material that is not substantially sintered at the firing temperature of the unfired ceramic body. A constraining layer having a pattern for an unfired protruding electrode formed of a metal material is applied to produce an unfired composite laminate, and then the base material of the constraining layer is not substantially sintered. And firing the unfired composite laminate at a temperature at which the metal material of the unfired ceramic body and the unfired bump electrode pattern can be sintered to produce the circuit board with the projecting electrodes. A method of manufacturing a circuit board with protruding electrodes, characterized in that: 上記回路基板の上記第１主面の周縁部に複数の上記突起電極が配列されていることを特徴とする請求項１に記載の突起電極付き回路基板の製造方法。   The method for manufacturing a circuit board with protruding electrodes according to claim 1, wherein a plurality of the protruding electrodes are arranged on a peripheral edge portion of the first main surface of the circuit board. 上記突起電極の高さをｔ０とした時、上記突起電極の先端面からの高さｔ１（但し、ｔ１＜ｔ０）までの範囲において、上記突起電極の側面周面にも撥液性皮膜を形成することを特徴とする請求項１または請求項２に記載の突起電極付き回路基板の製造方法。   When the height of the protruding electrode is t0, a liquid-repellent film is also formed on the peripheral surface of the protruding electrode in the range from the tip surface of the protruding electrode to the height t1 (however, t1 <t0). The method for manufacturing a circuit board with protruding electrodes according to claim 1 or 2, wherein: 上記突起電極の外側の側面にも上記撥液性皮膜を形成することを特徴とする請求項１〜請求項３のいずれか１項に記載の突起電極付き回路基板の製造方法。   The method for producing a circuit board with protruding electrodes according to any one of claims 1 to 3, wherein the liquid-repellent film is also formed on an outer side surface of the protruding electrode. 上記複数の突起電極のうち、隣接する突起電極間で互いに対向する側面にも撥液性皮膜を形成することを特徴とする請求項２〜請求項４のいずれか１項に記載の突起電極付き回路基板の製造方法。   5. The bump electrode according to claim 2, wherein a liquid-repellent film is also formed on side surfaces of the plurality of bump electrodes facing each other between adjacent bump electrodes. 6. A method of manufacturing a circuit board. 上記第２工程の後段で上記第３工程の前段において、上記複数の突起電極に囲まれた領域に表面実装部品を搭載する工程を有することを特徴とする請求項２〜請求項５のいずれか１項に記載の突起電極付き回路基板の製造方法。   6. The method according to claim 2, further comprising a step of mounting a surface-mounted component in a region surrounded by the plurality of protruding electrodes, after the second step and before the third step. 2. A method for producing a circuit board with protruding electrodes according to item 1. 上記未焼成セラミック素体は、複数の未焼成セラミック層を積層してなる未焼成セラミック多層素体であり、その表層及び内層に上記未焼成セラミック素体の焼成温度で焼結する金属材料によって上記回路パターンとなる未焼成の回路パターンが形成されていることを特徴とする請求項１〜請求項６のいずれか１項に記載の突起電極付き回路基板の製造方法。 The unsintered ceramic body is an unsintered ceramic multilayer body formed by laminating a plurality of unfired ceramic layers, and the surface layer and the inner layer are formed by a metal material that is sintered at the firing temperature of the unsintered ceramic body. The method for producing a circuit board with protruding electrodes according to claim 1 , wherein an unfired circuit pattern to be a circuit pattern is formed.
JP2006139815A 2006-05-19 2006-05-19 Manufacturing method of circuit board with protruding electrode Expired - Fee Related JP4752612B2 (en)

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