JP2007067364A - Ceramic substrate with chip-type electronic part mounted thereon and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a ceramic substrate on which a chip-type electronic part is mounted capable of definitely mounting the chip-type electronic part on the ceramic substrate, and realizing a high-density mounting without using bonding materials such as solder and conductive adhesive; and to provide a method for manufacturing the same. <P>SOLUTION: For the chip-mounted type substrate 10, the chip-type electronic part 12 comprising a ceramic sintered body as an element assembly and having external terminal electrodes 12D, 12E is mounted on the outermost surface of the ceramic substrate 11 having a surface electrode 11C, at least a part of the part 12 is embedded in the surface of the substrate 11, and the electrode 11C of the substrate 11 and the electrodes 12D, 12E of the part 12 are integrated by sintering them. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a ceramic substrate on which a chip-type electronic component is mounted and a method for manufacturing the same. More specifically, the chip-type electronic component can be mounted on a ceramic substrate without using a bonding material such as solder or a conductive adhesive. The present invention relates to a ceramic substrate on which chip-type electronic components are mounted and a method for manufacturing the same.

  When mounting an electronic component on a ceramic substrate, for example, as proposed in Patent Document 1, for example, a solder paste is applied to a surface electrode portion of a fired ceramic substrate, and the electronic component is formed on the surface electrode portion. Is mounted by the mounter, and then the reflow process is performed on the ceramic substrate on which the electronic component is mounted, thereby joining and fixing the electronic component on the ceramic substrate via solder.

JP-A 61-263297

  However, in the case of the conventional method of manufacturing a ceramic substrate, since solder is used when mounting electronic components on the ceramic substrate, the height of the ceramic substrate including the electronic components is increased by the amount of solder applied, This is not preferable in reducing the height of electronic components. In addition, it may be possible to embed electronic components in the ceramic substrate to promote a reduction in height, but it is necessary to provide a cavity in the ceramic substrate.

  In addition, it is necessary to apply a plating process to the ceramic substrate as a precondition for solder mounting. However, the cost associated with the plating process is high, and some of the electrode components and ceramic components are eluted into the plating bath, resulting in an increase in electrode strength and substrate. There was a risk of lowering the strength.

  In addition, since the ceramic substrate shrinks when fired, it is necessary to prepare a plurality of masks to be used for applying the solder paste in accordance with the variation in shrinkage rate. In addition, the pitch between components is limited due to misalignment between the mask and the ceramic substrate, variation in the amount of paste applied, etc., which in turn limits the board design rules, which also contributes to hindering downsizing of the board. . In addition, the solder may explode during a reflow process such as when electronic parts are mounted, causing a short pass at a narrow pitch. This is because both the external terminal electrode of the electronic component and the surface electrode of the substrate are formed by sintering treatment, so that a minute gap remains in each electrode, and the gap is generated during wet plating of the electrode. It is considered that moisture is trapped in the inside, and this moisture is vaporized and expanded by heat during reflow treatment. In addition, solder mounting also had problems such as solder flash.

  Furthermore, there is a demand for the smoothness of the substrate as another problem when mounting electronic components. In recent years, there has been an increasing demand for reducing the height of electronic components and reducing the substrate thickness. In general, the thinner the substrate, the greater the warpage and undulation during firing. If the substrate is warped or undulated, the substrate may be cracked when the electronic component is mounted, and the tendency becomes higher as the substrate becomes thinner.

  The present invention has been made to solve the above-described problems, and can reliably mount a chip-type electronic component on a ceramic substrate without using a bonding material such as solder or a conductive adhesive. An object of the present invention is to provide a ceramic substrate on which chip-type electronic components capable of realizing density mounting are mounted and a method for manufacturing the same.

  According to a first aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which a chip-type electronic component is mounted. A chip type having a ceramic sintered body as a base and a terminal electrode on a ceramic green body having a conductor portion on the surface. A step of mounting the electronic component such that the terminal electrode is in contact with the conductor portion, sintering the ceramic green body, and the conductor portion on the ceramic green body and the terminal electrode of the chip-type electronic component; Firing the ceramic green body on which the chip-type electronic component is mounted so that the ceramic green body is integrated by sintering and the dimension in the planar direction of the ceramic green body is not substantially changed. It is characterized by this.

  According to a second aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. In the first aspect of the invention, the ceramic green body is a ceramic green sheet, and the chip-type electronic component is An unfired ceramic laminate that is laminated with other ceramic green sheets is fired so that the mounted ceramic green sheet becomes the outermost layer.

  According to a third aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. In the second aspect of the present invention, the outermost layer and / or the inner layer of the unfired ceramic laminate may include: The method includes a step of providing a constraining layer mainly composed of a hardly sinterable powder that does not substantially sinter at the sintering temperature of the ceramic green sheet.

  According to a fourth aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. In the third aspect of the present invention, the constraining layer includes the hardly sinterable powder and an organic binder. It is a sheet-like constraining layer.

  According to a fifth aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. In the fourth aspect of the present invention, the sheet-like restraint is formed on the outermost layer of the unfired ceramic laminate. The method includes a step of applying the layer and press-bonding the layer to indent the chip-type electronic component into the ceramic green sheet.

  According to a sixth aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. It is characterized by firing while applying a pressure of 1 to 10 MPa.

  According to a seventh aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. The constraining layer is formed on the outermost surface of the unfired ceramic laminate.

  According to claim 8 of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. In the invention according to claim 1, the ceramic green body is subjected to the sintering temperature of the ceramic green body. A sheet-like constraining layer containing a hard-sintering powder that does not substantially sinter and an organic binder and having a via conductor portion corresponding to the terminal electrode of the chip-type electronic component is provided, The method includes a step of forming a conductor portion.

  Moreover, the manufacturing method of the ceramic substrate which mounts the chip-type electronic component of Claim 9 of this invention WHEREIN: In the invention of any one of Claims 1-8, the said chip-type electronic component is It mounts on the conductor part on the said ceramic green body through an organic adhesive.

  According to a tenth aspect of the present invention, there is provided a method for manufacturing a ceramic substrate on which the chip-type electronic component is mounted. The method according to any one of the first to ninth aspects, wherein the ceramic green body is cooled at a low temperature. A ceramic green sheet mainly composed of sintered ceramic powder is used, and the terminal electrode of the chip-type electronic component and the conductor portion on the ceramic green sheet are each formed of an electrode material mainly composed of silver, copper, or gold. It is characterized by.

  A ceramic substrate on which the chip-type electronic component according to claim 11 of the present invention is mounted is a chip-type electronic having a ceramic sintered body as a base and a terminal electrode on the outermost surface of the ceramic substrate having a surface electrode. A component is mounted, at least a part of the chip-type electronic component is embedded in the ceramic substrate, and the surface electrode of the ceramic substrate and the terminal electrode of the chip-type electronic component are sintered. It is characterized by being integrated.

  According to a twelfth aspect of the present invention, there is provided a ceramic substrate on which the chip-type electronic component is mounted. The ceramic substrate according to the eleventh aspect of the present invention, wherein the ceramic substrate is formed by laminating a plurality of low-temperature sintered ceramic layers. The terminal electrode of the chip-type electronic component and the surface electrode of the ceramic multilayer substrate are each composed mainly of silver, copper, or gold.

  According to the first to twelfth aspects of the present invention, chip-type electronic components can be reliably mounted on a ceramic substrate without using a bonding material such as solder or conductive adhesive. It is possible to provide a ceramic substrate on which chip-type electronic components capable of realizing high-density mounting are mounted and a method for manufacturing the same.

  Hereinafter, the present invention will be described based on the embodiment shown in FIGS.

  A ceramic substrate (hereinafter simply referred to as “chip mounting type substrate”) 10 on which the chip-type electronic component of the present embodiment is mounted includes, for example, a ceramic substrate 11 and the ceramic substrate as shown in FIG. 11 and a chip-type electronic component 12 mounted on the surface of the ceramic substrate 11. As will be described later, the surface electrode of the ceramic substrate 11 and the external terminal electrode of the chip-type electronic component 12 are substantially connected without any solder or conductive adhesive. It is characterized in that it is connected with a filletless.

  As shown in FIG. 1A, the ceramic substrate 11 includes a multilayer body in which a plurality of ceramic layers 11A are laminated, and a wiring pattern 11B formed in a predetermined pattern on the multilayer body. It is formed as. The ceramic substrate 11 may be a ceramic multilayer substrate or a ceramic substrate composed of a single ceramic layer. Therefore, hereinafter, the ceramic substrate 11 is also described as the ceramic multilayer substrate 11. The wiring pattern 11B of the ceramic multilayer substrate 11 includes an in-plane conductor 11C formed in a predetermined pattern on a predetermined ceramic layer 11A, and via conductors 11D that electrically connect the upper and lower in-plane conductors 11C. Yes. The in-plane conductors 11 </ b> C formed on both main surfaces (upper and lower surfaces) of the ceramic multilayer substrate 11 serve as surface electrodes of the ceramic substrate 11. Therefore, hereinafter, the in-plane conductors 11C on the upper and lower surfaces of the ceramic multilayer substrate 11 will be described as the surface electrodes 11C.

As the ceramic material forming the ceramic layer 11A, a low temperature co-fired ceramic (LTCC) material is preferably used. A low-temperature sintered ceramic material refers to a ceramic material that can be fired at a temperature of 1050 ° C. or lower. Examples of the low-temperature sintered ceramic material include a glass composite material obtained by mixing borosilicate glass with ceramic powder such as alumina, forsterite, and cordierite, and a crystallized glass based on ZnO-MgO-Al ₂ O ₃ -SiO _2. Crystallized glass based material using non-glass based material such as BaO—Al ₂ O ₃ —SiO ₂ based ceramic powder or Al ₂ O ₃ —CaO—SiO ₂ —MgO—B ₂ O ₃ based ceramic powder Can be mentioned. By using a low-temperature sintered ceramic material for the ceramic multilayer substrate 11, a metal having a low resistance and a low melting point, such as silver (Ag), copper (Cu), gold (Au), etc. with respect to the in-plane conductor 11C and the via conductor 11D And can be integrated with the ceramic layer by simultaneous sintering at a low temperature.

  As the chip-type electronic component 12, there can be used, for example, a multilayer ceramic capacitor, an inductor, a filter, a balun, a coupler, or the like whose characteristics are not deteriorated at the firing temperature of the ceramic multilayer substrate 11, and these chip-type electronic components can be used individually. Or it can be used in combination.

  A chip-type electronic component 12 shown in FIG. 1A is formed as a multilayer ceramic capacitor. As shown in the figure, the chip-type electronic component 12 is positioned between a laminated body in which a plurality of dielectric ceramic layers 12A are laminated, and upper and lower dielectric ceramic layers 12A from the left and right end faces of the laminated body. A plurality of internal electrode layers 12B, 12C that are alternately extended toward the opposing end surfaces, and a pair of left and right external terminals that are connected to the end surfaces of these internal electrode layers 12B, 12C and cover both end surfaces of the laminate Electrodes 12D and 12E. As the dielectric ceramic material, a conventionally known dielectric ceramic material such as a barium titanate-based material can be used. That is, the element body of the chip-type electronic component 12 is formed of a ceramic sintered body that does not substantially change characteristics at the firing temperature of the ceramic multilayer substrate 11. Further, as the internal electrodes 12B and 12C and the external terminal electrodes 12D and 12E, for example, the same or different conductive metal material as the wiring pattern 11B of the ceramic multilayer substrate 11 can be used.

  Thus, the surface electrode 11C of the ceramic multilayer substrate 11 and the external terminal electrodes 12D and 12E of the chip-type electronic component 12 are each sintered by Ag, Cu or Au as shown in FIG. And the like are grown and integrated with each other during firing, and are firmly connected to each other without forming an interface between the surface electrode 11C and the external terminal electrodes 12D and 12E. That is, the surface electrode 11C of the ceramic multilayer substrate 11 and the external terminal electrodes 12D and 12E of the chip-type electronic component 12 are connected in a filletless manner without using solder or a conductive adhesive.

  Details of the method for manufacturing the chip-mounted substrate 10 shown in FIG. 1A will be described later, but the chip-mounted substrate 10 can be manufactured generally as follows. That is, as shown in FIG. 1B, on the ceramic green body 111 having the in-plane conductor portion 111C to be a surface electrode, ceramic firing having external terminal electrode portions 112D and 112E to be a pair of left and right external terminal electrodes. The in-plane conductor portion 111C and the external terminal electrode portions 112D and 112E are aligned, bonded and fixed via the organic adhesive layer 113, and then fired at a predetermined temperature, and then the bonded body 112 is chip mounted. A substrate 10 is obtained. By this firing, the surface electrode 11C of the ceramic multilayer substrate 11 and the external terminal electrodes 12D and 12E of the chip-type electronic component 12 are sintered and integrated as described above, and are securely connected. At this time, the external terminal electrode portions 112D and 112E of the ceramic sintered body 112 may be unfired or fired, and it is necessary that a plating film be formed on the surface thereof. Not particularly. The ceramic green body may be a single ceramic green sheet 111A or a laminated body in which a plurality of ceramic green sheets 111A are laminated as shown in FIG. Further, the ceramic green body may have a wiring pattern portion formed of an in-plane conductor portion or a via conductor portion, or may not have a wiring pattern portion.

  In the present embodiment, a chip mounting type substrate is manufactured by a non-shrinkage method. The non-shrink method is a method in which the dimension in the plane direction of the ceramic substrate does not substantially change before and after firing the ceramic substrate. In order to realize a non-shrinkage construction method, in this embodiment, a constraining layer that suppresses shrinkage in the surface direction of the ceramic green sheet and mainly promotes shrinkage in the stacking direction (vertical direction) of the ceramic green sheet is prepared. A constraining layer is disposed on at least one main surface (upper surface and / or lower surface) of the laminated body, or a constraining layer is interposed inside the laminated body of ceramic green sheets to produce a chip mounting type substrate.

  Hereinafter, a method for manufacturing a chip-mounted substrate according to the present invention will be described based on a specific example using a non-shrinkage method.

Example 1
In this embodiment, first, for example, a predetermined number of ceramic green sheets 111A are prepared as shown in FIG. 2A using a slurry containing a low-temperature sintered ceramic material, and then a predetermined number of ceramic green sheets 111A are formed on one ceramic green sheet 111A. Via holes were formed in a pattern. The via conductor portion 111D was formed by filling these via holes with a conductive paste mainly composed of Ag, Cu, Au, or the like. Further, the same kind of conductive paste is applied in a predetermined pattern on the ceramic green sheet 111A using a screen printing method to form an in-plane conductor portion 111C to be a surface electrode, and the in-plane conductor portion 111C and the via conductor portion. 111D was connected as appropriate. In addition, for the other ceramic green sheets 111A, the in-plane conductor portion 111C and the via conductor portion 111D were formed in the same pattern in the same manner. Hereinafter, the in-plane conductor portion 111C located on the upper surface of the ceramic green sheet 111A located in the uppermost layer will be described as the surface electrode portion 111C.

  Next, an organic adhesive is applied to the surface (upper surface) on the surface electrode portion 111C side of the ceramic green sheet 111A shown in FIG. 2A using a spray or the like, and the organic adhesive layer 113 (FIG. 1 ( b)) was formed. Subsequently, as shown in FIG. 2 (b), the external terminal electrode portions 112D and 112E of the ceramic sintered body 112 prepared in advance are aligned with the surface electrode portion 111C of the ceramic green sheet 111, and FIG. ), The ceramic sintered body 112 was mounted as an element body on the ceramic green sheet 111A, and was bonded and fixed via an organic adhesive layer. Thus, a ceramic green sheet 111A on which the ceramic sintered body 112 was mounted was obtained. As the ceramic sintered body 112, for example, a barium titanate-based multilayer ceramic capacitor was used. As the ceramic sintered body 112, for example, one having a size of 1 mm × 0.5 mm × 0.2 mm and a capacity standard of 80 pF was used. Also in the following examples, the same multilayer ceramic capacitor was used as the ceramic sintered body 112 of the chip-type electronic component.

Thereafter, another ceramic green sheet 111A having the in-plane conductor portion 111C and the via conductor portion 111D is laminated in a predetermined order, and the ceramic green sheet 111A having the ceramic sintered body 112 mounted on the uppermost layer is laminated, An unfired ceramic laminate 111 shown in FIG. 2D was obtained. And as shown to (e) in the same figure, the constrained layer 114 was made to oppose both the main surfaces (upper and lower both surfaces) of the ceramic laminated body 111. FIG. As the constraining layer 114, sintering-resistant powder not sintered at the sintering temperature of the ceramic stack 111 (, for example, a ceramic powder with high sintering temperatures as such Al ₂ O _3), in particular Al ₂ A slurry formed from a slurry containing O ₃ as a main component and an organic binder as a sub component as shown in FIG.

  Next, the unfired ceramic laminate 111 was pressure-bonded at a predetermined pressure and temperature via the upper and lower constraining layers 114 to obtain an unfired composite laminate 120 shown in FIG. An unfired chip mounting type substrate 110 is formed between the upper and lower constraining layers 114, 114. By this crimping operation, at least a part of the ceramic sintered body 112 sinks into the uppermost ceramic green sheet 111A, and the unfired composite laminate 120 is lowered in height. The pressure during pressure bonding is preferably in the range of 1 to 250 MPa, for example. If the pressure is less than 1 MPa, the surface electrode portion 111C of the ceramic green sheet 111A and the external terminal electrode portions 112D and 112E of the ceramic sintered body 112 may be insufficiently bonded, resulting in poor bonding. The in-plane conductor portion 111C and the via conductor portion 111D may be cut. The uppermost ceramic green sheet 111A is preferably thicker than the other ceramic green sheets. This is to prevent the wiring pattern provided on another ceramic green sheet from being deformed due to the volume exclusion effect. Alternatively, a buffering ceramic green sheet having no wiring pattern constituting a functional element such as a capacitor or an inductor may be disposed between the uppermost ceramic green sheet 111A and another ceramic green sheet.

  Thereafter, the unfired composite laminate 120 was fired at 870 ° C. to obtain a sintered body 120 ′ shown in FIG. By this firing, the unsintered chip mounting substrate 110 is sintered, and the chip mounting substrate 10 composed of the ceramic multilayer substrate 11 and the chip electronic component 12 is obtained between the upper and lower constraining layers 114. Then, the surface electrode portion 111C of the unfired ceramic laminate 111 and the external terminal electrode portions 112D and 112E of the ceramic sintered body 112 are integrated by the growth of the respective metal particles. The firing temperature is preferably a temperature at which the low-temperature sintered ceramic material is sintered, for example, in the range of 800 to 1050 ° C. If the firing temperature is less than 800 ° C., the ceramic laminate 110 may not be sufficiently sintered, and if it exceeds 1050 ° C., the metal particles of the electrode portions 111C, 112D, and 112E may melt and diffuse into the ceramic layer.

  After firing, the constraining layer 114 was removed by blasting or ultrasonic cleaning to obtain a chip-mounted substrate 10 shown in FIG. As a result of measuring the adhering force of the chip-type electronic component 12 to the ceramic multilayer substrate 11 by a chip lateral pressing test, a value of 3N or more was obtained. Further, as a result of measuring the capacity of the chip-type electronic component (multilayer ceramic capacitor) 12, a capacitance value within the component standard equivalent to that before firing was obtained.

  As described above, according to the embodiment, the surface electrode 11C of the ceramic multilayer substrate 11 and the external terminal electrodes 12D and 12E of the chip-type electronic component 12 are baked without fillet without using solder or conductive adhesive. As a result, it is possible to obtain the chip-mounted substrate 10 that is integrally connected. In addition, the chip-type electronic component 12 is partially embedded in the ceramic multilayer substrate 11, and the chip-mounted substrate 10 with a reduced height can be obtained. Furthermore, since no solder is used, the plating process for the surface electrode 11C of the ceramic multilayer substrate 11 and the external terminal electrodes 12D and 12E of the chip-type electronic component 12 becomes unnecessary, and the manufacturing cost can be reduced. In the present embodiment, since the unfired ceramic laminate 110 is fired in a state where the unfired ceramic laminate 110 is restrained by the constraining layer 114, the lateral shrinkage of the unfired ceramic laminate 110 is remarkably suppressed and the lamination direction (vertical direction) is mainly suppressed. Therefore, even if fired at the same time as a chip-type electronic component whose dimensions do not change before and after firing, the chip-type electronic component will not be cracked or chipped, resulting in significant variation in dimensions before and after firing. It is possible to obtain the chip mounting type substrate 10 with high dimensional accuracy by suppressing the above.

Example 2
In the present example, the chip-mounted substrate 10 was subjected to the same procedure as in Example 1 except that the unfired composite laminate 120 shown in FIG. Was made.

  That is, in this embodiment, as shown in Table 1, the pressing force is applied in the range of 0 to 15 MPa, the unfired composite laminate 120 is pressed and fired, and the pressing force and the ceramic multilayer of the chip-type electronic component 12 are measured. The bonding strength with the substrate 11 and the amount embedded in the ceramic multilayer substrate 11 were verified. As a method for verifying the burying amount and the bonding strength, a side press test of the chip was performed. In the lateral pressing test, a load jig (tip diameter: 0.3 mm, material: hardened steel (hardness HB183)) is formed on the side surface in the direction orthogonal to the line connecting both external terminal electrodes 12D and 12E of the chip-type electronic component 12. And a load was applied at a load speed of 0.5 ± 0.1 mm / second, and the load when the part was taken was measured. Further, as a method for verifying the embedment amount, the chip-mounted substrate 10 was cut and polished, and the length obtained by subtracting the height from the bottom surface of the chip-type electronic component 12 to the upper surface of the ceramic multilayer substrate 11 was obtained as the embedment amount. As a reference example, a similar test was performed for solder mounting, and the results are shown in Table 1. In the lateral pressing test of Table 1, “impossible to measure” means that the chip-type electronic component 12 cannot be removed from the ceramic multilayer substrate 11 with the load of the lateral pressing test and is firmly bonded.

  According to the results shown in Table 1, when the applied pressure is less than 0.1 MPa, the result of the lateral pressing test is the same as that in the case of solder mounting, and when the applied pressure is more than 10 MPa, cracks occur in the ceramic multilayer substrate 11. I found out. Accordingly, it has been found that a pressure in the range of 0.1 to 10 MPa is preferable in that the chip-type electronic component 12 is firmly connected to the ceramic multilayer substrate 11 and the chip-mounted substrate 10 is reduced in height. . In particular, when the applied pressure is 1 MPa or more, the chip-type electronic component 12 is completely embedded in the ceramic multilayer substrate 11, and the upper surface of the chip-type electronic component 12 is flush with the upper surface of the ceramic multilayer substrate 11. It was found that no low profile can be realized. In addition, the same effect as Example 1 can be expected.

Example 3
In this example, instead of providing the constraining layers on the upper and lower surfaces of the unfired ceramic laminate, the constraining layer was provided in the unfired ceramic laminate and left in the ceramic multilayer substrate in the same manner as in Example 1. A chip-mounted substrate was produced. In the present embodiment, the same or corresponding parts as those in the first embodiment will be described with the same reference numerals.

  For example, as shown in FIG. 4, the chip-mounted substrate 10 </ b> A of the present embodiment is configured in the same manner as in the first embodiment except for the laminated structure of the ceramic multilayer substrate 11. As shown in the figure, the ceramic multilayer substrate 11 in the present embodiment is configured as a laminated body in which a plurality of ceramic layers 11A and a plurality of constraining layers 11E are alternately laminated. The constraining layer 11E is formed in a sheet shape using the same material as the constraining layer 114 of the first embodiment. The constraining layer 11E is disposed between the upper and lower ceramic layers 11A.

Next, the characteristic part of the manufacturing method of the chip mounting type substrate 10A of the present embodiment will be described. In this example, a ceramic green sheet was prepared in the same manner as in Example 1, and then a slurry containing Al ₂ O ₃ as a main component and an organic binder as a subcomponent was applied on the ceramic green sheet. A predetermined number of composite sheets made of ceramic green sheets and constraining layers are produced by coating. The thickness of the ceramic green sheet in the composite sheet is preferably larger than the thickness of the constraining layer, for example, in the range of 5 to 20 times the thickness of the constraining layer.

  Subsequently, via holes were formed in a single composite sheet with a predetermined pattern, and via conductor portions were formed by filling the via holes with a conductive paste mainly composed of Ag, Cu, Au, or the like. Further, the same type of conductive paste is applied in a predetermined pattern on the surface of the composite sheet on the ceramic green sheet side using a screen printing method to form a surface electrode, and the surface electrode portion and the via conductor portion are appropriately connected. . In addition, for other composite sheets, in-plane conductor portions and via conductor portions were formed in the respective patterns in the same manner as necessary. Then, as in Example 1, the ceramic sintered body was mounted as an element body on the uppermost composite sheet, and was fixed via an organic adhesive layer.

  Next, the ceramic green sheet having the in-plane conductor portion and the via conductor portion is used as the lowermost layer, and another composite sheet is laminated thereon in a predetermined order so that the ceramic green sheet and the constraining layer are in contact with each other. A composite sheet having a ceramic sintered body mounted thereon was laminated to obtain an unfired ceramic laminate. This unfired ceramic laminate has the same layer configuration as the chip-mounted substrate 10A shown in FIG. This unfired ceramic laminate was pressed in the same manner as in Example 1 and fired to obtain a chip-mounted substrate 10A shown in FIG.

In this example, the hard-to-sinter powder (specifically, Al ₂ O ₃ ) of the constrained layer present in the unfired ceramic laminate is not sintered at the firing temperature of the ceramic green sheet, but the ceramic green glass component of the sheet to flow to melt as a result of diffusion in the entire area of the Al ₂ O ₃ powder to form a constraining layer, anchoring the Al ₂ O ₃ powder of the constraining layer 11E by the glass components after cooling, integrated At the same time, the constraining layer 11 </ b> E and the ceramic layer 11 </ b> A are firmly joined to be integrated as the ceramic multilayer substrate 11. At this time, as in the case of Example 1, the constraining layer can suppress the shrinkage in the surface direction (lateral shrinkage) of the unfired ceramic laminate and obtain the ceramic multilayer substrate 11 having almost no dimensional difference before and after firing. . If all the ceramic green sheets are formed to have substantially the same thickness, warpage of the ceramic multilayer substrate 11 can be prevented.

  As described above, according to the present embodiment, it is possible to suppress lateral shrinkage and dimensional variation due to firing, and thus it is possible to obtain a chip-mounted substrate 10A having excellent dimensional accuracy and no warpage. Therefore, according to the manufacturing method of the present embodiment, it is possible to manufacture a chip mounting substrate in which the dimensional accuracy is improved as the chip mounting substrate becomes larger and warpage is remarkably suppressed. Also in this embodiment, the chip-type electronic component 12 can be firmly fixed to the ceramic multilayer substrate 11 by performing pressure firing in the same manner as in the second embodiment.

Example 4
In this example, a chip-mounted substrate was produced in the same manner as in Example 1 except that the green compact was used as the constraining layer in Example 1. Here, the green compact means, for example, a ceramic powder mixed with a powdery organic binder and pressed and hardened in a powdery state at a predetermined pressure. In the present embodiment, the same or corresponding parts as those in the first embodiment will be described with the same reference numerals.

  In this example, first, an unfired ceramic laminate 111 (see FIG. 5) was produced in the same manner as in Example 1. Next, after the green compact 114A is applied to the upper and lower surfaces of the ceramic laminate 111, the unfired ceramic laminate 111 is passed through the upper and lower green compacts 114A at a predetermined pressure and temperature in the same manner as in the first embodiment. The composite laminate 120B shown in FIG. 5 was obtained by pressure bonding. An unfired chip mounting substrate 110B is formed between the upper and lower constraining layers 114, 114. In the present embodiment, unlike the sheet-like constraining layer in the first embodiment, the ceramic powder remains in a powder form. Therefore, when the green compact 114A is pressed against the upper surface of the ceramic laminate 111, the green compact 114A is formed. The ceramic powder to flow flows into the stepped portion between the upper surface of the ceramic sintered body 112 and the uppermost ceramic green sheet 111A, and fills the stepped portion with the ceramic powder. For this reason, when the interval between the ceramic sintered bodies 112 is narrow, for example, the ceramic powder can enter a gap that cannot be wrapped around by a sheet-like material. Can be covered.

  The composite laminate 120B was fired in the same manner as in Example 1, and then the green compact 114A was removed to obtain a chip-mounted substrate (not shown). By this firing, the surface electrode of the ceramic multilayer substrate and the external terminal electrode of the chip-type electronic component are integrated and firmly connected in the same manner as in the first embodiment, and the same effect as in the first embodiment is obtained. It was.

  Further, in each of the above embodiments, the case where a ceramic sintered body is bonded to a ceramic green sheet and then the ceramic green sheets are laminated in a predetermined order to produce an unfired ceramic laminated body has been described. After the ceramic green sheets are laminated to produce an unfired ceramic laminate, a ceramic sintered body may be mounted as an element body on the ceramic laminate.

Example 5
In this example, instead of the surface electrode 11C of each of the above examples, a bump electrode that connects the external terminal electrode of the chip-type electronic component is formed on the unfired ceramic laminate through a constraining layer, A chip-mounted substrate was produced in the same manner as in Example 1. In the present embodiment, the same or corresponding parts as those in the first embodiment will be described with the same reference numerals.

  As shown in FIG. 6C, for example, the chip mounting type substrate 10C of this embodiment is a bump electrode in which the external terminal electrodes 12D and 12E of the chip type electronic component 12 are formed so as to protrude from the upper surface of the ceramic multilayer substrate 11. Except for being connected to 11D and 11D, the configuration is the same as in the first embodiment. The bump electrode 11D is formed via a via-forming constraining layer 114B, as shown in FIGS.

Therefore, the characteristic part of the manufacturing method of the chip mounted substrate 10C of the present embodiment will be described. In this embodiment, as in the first embodiment, the constraining layers 114 and 114 disposed above and below the unfired ceramic laminate 111 are prepared, and as shown in FIGS. 6A and 6B, ceramic sintering is performed. A via formation constraining layer 114B having a via conductor portion 111D for connecting the external terminal electrodes 112D and 112E of the body 112 is prepared. When the via forming constraining layer 114B is prepared, after forming a sheet constraining layer using a slurry containing Al ₂ O ₃ as a main component and an organic binder as a sub component similar to that in Example 1. In the manner of forming the via conductor portion in the ceramic green sheet in Example 1, via holes are formed in a predetermined pattern in the via forming constraining layer 114B, and a conductive paste is filled in the via holes. A via formation constraining layer 114B is formed by forming via conductor portions 111D for the bump electrode 11D corresponding to the external terminal electrodes 112D and 112E of the ceramic sintered body 112 as shown in a) and (b). Can do. Further, in the same manner as in Example 1, a predetermined number of ceramic green sheets 111A having in-plane conductor portions 111C and via conductor portions 111D were produced.

  Next, as shown in FIG. 6A, the ceramic green sheets 111A are laminated in a predetermined order, and an unfired ceramic laminate 111 is formed on the constraining layer 114, and then the unfired ceramic laminate 111 is formed. A via formation constraining layer 114 </ b> B was laminated on the upper surface of the substrate, and a via conductor portion 111 </ b> D was formed on the unfired ceramic laminate 111. After an organic adhesive layer is formed on the upper surface of the via formation constraining layer 114B in the same manner as in the first embodiment, the via conductors 111D and 111D of the via formation constraining layer 114B and a ceramic sintered material serving as a chip-type electronic component are used. The body 112 is aligned with the external terminal electrodes 112D and 112E, and the ceramic sintered body 112 is placed on the via conductor portions 111D and 111D of the via forming constraining layer 114B as indicated by arrows in FIG. The external terminal electrodes 112D and 112E and the via conductor portions 111D and 111D of the via forming constraining layer 114B are joined and fixed via an organic adhesive layer. A constraining layer 114 was laminated thereon to form an unfired composite laminate 120C shown in FIG. An unfired chip mounting substrate 110C is formed between the upper and lower constraining layers 114, 114. This unfired composite laminate 120C was pressure-bonded in the same manner as in Example 1 and fired to obtain a chip-mounted substrate 10C shown in FIG. In FIG. 6B, reference numeral 110C denotes an unfired chip mounting type substrate.

  Warpage was measured for the chip mounted substrate 10C of this example having a thickness of 105 mm □ and a thickness of 0.5 mm. Further, the warpage of the chip-mounted substrate 10 of the same size obtained in Example 1 was measured in the same manner. The measurement results are shown in Table 2.

  According to the results shown in Table 2, it was found that the amount of warpage of the chip-mounted substrate 10C of this example was significantly suppressed as compared with the chip-mounted substrate 10 of Example 1. Therefore, when the bump electrode 11D is formed, since the shrinkage is also suppressed by the via forming constraining layer 114B in the immediate lower part of the chip-type electronic component 12, the ceramic multilayer substrate 11 is more effective than the case where the bump electrode 11D is formed by the ceramic green sheet 111A. It is possible to further suppress the warpage and undulation of the water.

Example 6
In this example, a chip-mounted substrate was fabricated in the same manner as in Example 1 except that chip-type electronic components were mounted on the upper and lower surfaces of the ceramic multilayer substrate. In the present embodiment, the same or corresponding parts as those in the first embodiment will be described with the same reference numerals.

  In this example, a predetermined number of ceramic green sheets 111A (four in FIG. 7A) are produced in the same manner as in Example 1 and in the same manner as in Example 1, and then as shown in FIG. In addition, an in-plane conductor portion 111C and a via conductor portion 111D were formed as a wiring pattern 111B on these ceramic green sheets 111A as necessary. The constraining layer 114 was also produced in the same manner as in Example 1. Next, a constraining layer 114 is disposed, an organic adhesive layer is formed on the upper surface of the constraining layer 114, and then a ceramic sintered body that is an element body of the chip-type electronic component 12 at a predetermined position on the upper surface of the constraining layer 114. A plurality of 112 were mounted, joined, and fixed.

  On the other hand, after four ceramic green sheets 111A are laminated in a predetermined order to form an unfired ceramic laminate 111, an organic adhesive layer (not shown) is formed on the upper surface thereof. Next, after aligning the in-plane conductor portions (surface electrode portions) 111C and 111C on the upper surface of the unfired ceramic laminate 111 with the external terminal electrodes 112D and 112E of the ceramic sintered body 112, a plurality of ceramic firings are performed. The bonded body 112 is bonded and fixed to the surface electrode portions 111C and 111C on the unfired ceramic laminate 111 via the external terminal electrodes 112D and 112E. A surface electrode portion 111C corresponding to the pattern of the external terminal electrodes 112D and 112E of the plurality of ceramic sintered bodies 112 disposed on the constraining layer 114 is formed on the lower surface of the unfired ceramic laminate 111 ( (See (a) of FIG. 7).

  As described above, the surface electrode portions 111C and 111C on the lower surface of the unfired ceramic laminate 111 and the ceramic sintered body 112 on the constraining layer 114 above the constraining layer 114 on which a plurality of ceramic sintered bodies 112 are previously mounted. After the alignment with the external terminal electrodes 112D and 112E, an unfired ceramic laminate 111 is laminated on the constraining layer 114, and another constraining layer 114 is further laminated thereon, as in Example 1. The constraining layer 114 and the ceramic laminate 111 were pressure-bonded to each other at a predetermined pressure to obtain an unfired composite laminate 120D shown in FIG. An unfired chip mounting substrate 110D is formed between the upper and lower constraining layers 114, 114. At this time, the ceramic sintered bodies 112 on both the upper and lower surfaces of the unfired ceramic laminate 111 are cut inward from the upper and lower surfaces of the unfired ceramic sintered body 111 to be lowered. This unfired composite laminate 120D was fired in the same manner as in Example 1 to obtain a chip-mounted substrate 10D shown in FIG.

  According to this embodiment, it is possible to obtain a chip-mounted substrate 10D in which the chip-type electronic component 12 is mounted on both the upper and lower surfaces of the ceramic multilayer substrate 11, and the external terminal electrodes of the chip-type electronic component 12 as in the first embodiment. 12D and 12E were sintered and integrated with the surface electrode portions 11C and 11C, and were firmly fixed to the surface electrode portions 11C and 11C, and the same effects as in Example 1 were obtained.

Example 7
In this example, the chip mounting type substrate is the same as Example 1 except that the amount of low temperature sintered ceramic material added to the constraining layer is changed and the amount of shrinkage of the ceramic layer is changed. Was made.

  In this example, the chip mounted substrate was evaluated by the X-ray flaw detection method, and the results are shown in Table 3. In Table 3, the substrate is a ceramic multilayer substrate, and the component is a multilayer ceramic capacitor.

According to the results shown in Table 3, when the shrinkage amount of the ceramic layer exceeds -5%, the chip-type electronic component 12 is cracked, and the chip-type electronic component 12 that exceeds + 5% is peeled off from the substrate. understood. In other words, it has been found that the shrinkage amount of the low-temperature sintered ceramic material needs to be suppressed within ± 5%. Therefore, the addition amount of the sintering aid of the low-temperature sintered ceramic material added to the constraining layer may be set to a range (0.1 to 1.6% by weight) showing a shrinkage within a range of ± 5%. It turned out to be preferable. In addition, the amount of shrinkage is a method of changing the particle size of Al ₂ O _{3 in} the shrinkage suppression layer, a method of changing the thickness of the shrinkage suppression layer, in addition to the amount of the sintering aid (borosilicate glass) added to the shrinkage suppression layer. It can be controlled in various ways.

Example 8
In this example, a chip-mounted substrate was fabricated in the same manner as in Example 6 except that a cavity for mounting a chip-type electronic component was provided. In the present embodiment, the same or corresponding parts as those in the first embodiment will be described with the same reference numerals.

  As estimated from FIG. 8, the chip-type electronic component of this embodiment has chip-type electronic components mounted on both upper and lower surfaces of the ceramic multilayer substrate, and the chip-type electronic components on the lower surface are accommodated in the cavity C. Other than this, the configuration is the same as that in the sixth embodiment. Therefore, in this example, a chip mounting type substrate was manufactured in the same manner as in Example 7 except that the chip type electronic component was mounted in the cavity on the lower surface of the ceramic multilayer substrate.

  In this example, as shown in FIG. 8, a predetermined number of ceramic green sheets 111A are produced in the same manner as in Example 1, and in-plane conductor portions 111C and wiring patterns 111B are formed on these ceramic green sheets 111A as necessary. A via conductor portion 111D was formed in a predetermined pattern. Each of these ceramic green sheets 111A had a thickness of 100 μm after firing. As shown in FIG. 8, one ceramic green sheet 111A is used for mounting the ceramic sintered body 112, and the other two ceramic green sheets are sized to accommodate the ceramic sintered body 112, respectively. The ceramic green sheets 111A ′ and 111A ″ are used to form the cavity C. The ceramic green sheet 111A ″ is used as one constraining layer 114A. A through hole H1 having the same size as that of the through hole was provided.

  Next, a constraining layer 114 having no through-hole is disposed, an organic adhesive layer is formed on the upper surface of the constraining layer 114, and then an element body of a chip-type electronic component is formed at a predetermined position on the upper surface of the constraining layer 114. The ceramic sintered body 112 was mounted, joined, and fixed. After the in-plane conductor portions 111C and 111C of the ceramic green sheet 111A and the external terminal electrodes 112D and 112E of the ceramic sintered body 112 on the constraining layer 114 are aligned on the constraining layer 114, the ceramic green sheet 111A is mounted. The upper surface of the constraining layer 114 was temporarily pressed with a predetermined pressure.

  Thereafter, two ceramic green sheets 111A ′ and 111A ″ having through-holes H and H1 are sequentially laminated on the ceramic green sheet 111A to form an unfired ceramic laminated body 111 with a cavity. A constraining layer 114C having a through-hole H1 was laminated thereon and subjected to main pressure bonding with a predetermined pressure to obtain an unfired composite laminate 120E shown in Fig. 8. In Fig. 8, the upper and lower sides are shown upside down. Yes, the cavity is formed as a down cavity in Fig. 8. This unfired composite laminate 120E was fired at 850 ° C to obtain a chip-mounted substrate having the down cavity C.

  According to the present embodiment, the ceramic sintered body 112 can be easily mounted on the ceramic green sheet 111A having a flat upper surface even if the ceramic multilayer substrate has a complicated surface shape such as a cavity. As in Example 1, the external terminal electrode of the chip-type electronic component was sintered integrally with the surface electrode part and firmly fixed to the surface electrode part, and the same effect as in Example 1 was obtained.

Example 9
In this example, a chip-mounted substrate was fabricated in the same manner as in Example 3, except that a cavity was provided on the upper surface of the chip-mounted substrate of Example 3. In the present embodiment, the same or corresponding parts as those in the third embodiment will be described with the same reference numerals.

  In this example, as shown in FIG. 9A, a predetermined number of composite sheets (5 in FIG. 9A) are obtained by laminating ceramic green sheets 111A and constraining layers 111E in the same manner as in Example 3. Sheet). In each of the composite sheets, in-plane conductor portions 111C and via conductor portions 111D are formed in a predetermined pattern as wiring patterns 111B as necessary. The in-plane conductor 111C was formed on the ceramic green sheet side. Two composite sheets are provided with through holes H of the same size, and one composite sheet is provided with through holes H1 larger than the two composite sheets, and these composite sheets form a cavity C. Therefore, the two composite sheets having no through-holes were used as a main layer forming the bottom surface of the cavity C. Further, a ceramic green sheet 111A was produced, and an in-plane conductor portion 111C and a via conductor portion 111D were formed as a wiring pattern 111B on the ceramic green sheet 111A.

  Next, as shown in FIG. 9A, two composite sheets were laminated on the ceramic green sheet 111A and temporarily bonded to form a main layer. An organic adhesive layer is formed on the main layer, and the external terminal electrodes 112D and 112E of the ceramic sintered body 112 and the surface electrode 111C are aligned in a region to be the bottom surface of the cavity C, and then sintered ceramic. The body 112 was joined and fixed to the surface electrodes 111C and 111C via the external terminal electrodes 112D and 112E. Next, two composite sheets having the through holes H and one composite sheet having the through holes H1 are sequentially laminated, and then press-bonded with a predetermined pressure to form a cavity C ((b in FIG. )) Was formed, and an unfired ceramic laminate 111 was produced. By firing this unfired ceramic laminate 111 at 850 ° C., a chip-mounted substrate 10F (see FIG. 9B) having a cavity C was obtained. The constraining layer 11E interposed between the upper and lower ceramic layers 11A and 11A by this firing solidifies the glass component diffused from the ceramic layer 11A and is firmly integrated as the ceramic multilayer substrate 11, and the outside of the chip-type electronic component 12 The terminal electrodes 12D and 12E and the surface electrodes 11C and 11C on the bottom surface of the cavity C are integrally sintered and firmly connected without using a bonding material such as solder.

  According to this embodiment, even in the case of the ceramic multilayer substrate 11 having a complicated surface shape such as the cavity C, the chip-type electronic component 12 can be obtained simply by mounting the ceramic sintered body 112 on the main layer having a flat upper surface. As well as being able to suppress warping and undulation of the ceramic multilayer substrate 11 having the cavity C, the same effects as those of Example 1 were obtained.

Example 10
In this example, a chip-mounted substrate was produced in the same manner as in Example 3 except that the constraining layer was disposed on the lower surface of the unfired ceramic laminated body containing the constraining layer. In the present embodiment, the same or corresponding parts as those in the third embodiment will be described with the same reference numerals.

  In this example, a constraining layer 114 is produced as shown in FIG. 10A, and one ceramic green sheet 111A and five sheets produced in the same manner as in Example 3 are formed on the constraining layer 114. Are laminated, the unfired ceramic laminate 111 and the constraining layer 114 are pressure-bonded at a predetermined pressure, and the unfired chip mounting type substrate 110G is fired at 850 ° C., as shown in FIG. A chip-mounted substrate 10G shown was obtained.

  Warpage was measured for the chip-mounted substrate 10G of this example having a thickness of 105 mm □ and a thickness of 0.5 mm. Further, the warpage of the chip-mounted substrate 10A having the same size obtained in Example 3 was measured in the same manner, and the measurement results are shown in Table 4.

  According to the results shown in Table 4, it was found that the chip mounted substrate 10G of the present example was further reduced in warpage and undulation compared with the chip mounted substrate 10A of Example 3. Therefore, by providing the constraining layer 114 on the lower surface of the unfired ceramic laminate containing the constraining layer 111E, warping and undulation can be further suppressed. As shown in Example 9, the upper surface of the ceramic multilayer substrate 11 is suppressed. It has been found that warpage and undulation of the ceramic multilayer substrate 11 can be further suppressed when forming the cavity.

Example 11
In this example, the chip mounting type substrate is substantially the same as the chip mounting type substrate of Example 9 except that the constraining layer is disposed on the lower surface of the unfired ceramic layer having the opening corresponding to the cavity. Produced. In the present embodiment, the same or corresponding parts as those in the ninth embodiment are denoted by the same reference numerals.

  In this example, as shown in FIG. 11 (a), two types of composite sheets having through holes H and H1 having different sizes in the same manner as in Example 9 were produced, and a ceramic green forming a main layer was formed. A sheet 111A and a composite sheet were produced. Each of the ceramic green sheet 111A and the composite sheet has a wiring pattern 111B (in-plane conductor portion 111C and via conductor portion 111D) formed in a predetermined pattern. Furthermore, in this example, the constraining layer 114 was produced in the same manner as in Example 1.

  Next, as shown in FIG. 11A, after an organic adhesive layer is formed on the upper surface of the constraining layer 114, a ceramic sintered body 112 is mounted at a predetermined position of the constraining layer 114, and bonded and fixed. did. After aligning the external terminal electrodes 112D and 112E of the ceramic sintered body 112 on the constraining layer 114 and the surface electrode portions 111C and 111C on the lower surface of the ceramic green sheet 111A, the ceramic green sheet 111A and the two composite sheets Were laminated and temporarily bonded to form a main layer. After an organic adhesive layer is formed on the upper surface of the main layer, the surface electrodes 111C and 111C and the external terminal electrodes 112D of the ceramic sintered body 112 in the region that becomes the bottom surface of the cavity C (see (b) of FIG. 5). , 112E, and the ceramic sintered body 112 was bonded to the upper surface of the main layer and fixed. Next, two composite sheets having through-holes H and one composite sheet having through-holes H1 are sequentially stacked, and then subjected to main pressure bonding with a predetermined pressure to form an opening serving as a cavity C on the upper surface of the main layer. Then, the unfired ceramic laminate 111 shown in FIG. 11A was formed on the constraining layer 114 to produce a composite laminate 120H. After firing the unfired composite laminate 120H at 850 ° C., the constraining layer 114 was removed to obtain a chip-mounted substrate 10H having a cavity C (see FIG. 11B). The constraining layer 11E interposed between the upper and lower ceramic layers 11A and 11A by this firing solidifies the glass component diffused from the ceramic layer 11A and is firmly integrated as the ceramic multilayer substrate 11, and the outside of the chip-type electronic component 12 The terminal electrodes 12D and 12E and the surface electrodes 11C and 11C on the bottom surface of the cavity C are integrally sintered and firmly connected without using a bonding material such as solder. Reference numeral 110H denotes an unfired chip mounting type substrate formed on the constraining layer 114.

  According to this embodiment, even in the case of the ceramic multilayer substrate 11 having a complicated surface shape such as the cavity C, the chip-type electronic component 12 can be obtained simply by mounting the ceramic sintered body 112 on the main layer having a flat upper surface. In addition to the fact that the ceramic multilayer substrate 11 can be prevented from warping and waviness, the same effects as in Example 1 were obtained.

Example 12
The present embodiment is configured in the same manner as the chip-mounted substrate 10 of the first embodiment, except that the external electrode structure of the multilayer ceramic capacitor as the chip-type electronic component is different. Therefore, since the chip-mounted substrate of this example can be manufactured in the same manner as in Example 1, only the structure of the chip-type electronic component will be described below. In the present embodiment, the same or corresponding parts as those in the ninth embodiment are denoted by the same reference numerals.

  The chip-type electronic component 12 used in the present embodiment is configured as a multilayer ceramic capacitor as shown in FIG. As shown in the figure, the chip-type electronic component 12 is disposed between a laminated body in which a plurality of dielectric ceramic layers 12A are laminated, and upper and lower dielectric ceramic layers 12A, and through the dielectric ceramic layers 12A. A plurality of opposed internal electrode layers 12B, 12C and a pair of left and right via conductors disposed at the left and right ends of the laminate and connected through the center of the ends of the plurality of internal electrode layers 12B, 12C And external terminal electrodes 12D and 12E. One external terminal electrode 12D formed as a via conductor is connected to all of the other internal electrode layers 12B arranged alternately, and the lower end surface is exposed on the lower surface of the multilayer body. The other external terminal electrode 12E is connected to all of the other internal electrode layers 12C arranged alternately, and the lower end surface is exposed on the lower surface of the multilayer body. Others are the same as those of the multilayer ceramic capacitor of the first embodiment.

  In this embodiment, the via conductors that are the external terminal electrodes 12D and 12E of the chip-type electronic component 12 are firmly connected by sintering integrally with the surface electrodes 11C and 11C on the surface of the ceramic multilayer substrate 11 at the lower end. Therefore, also in this example, the same effect as Example 1 was obtained. In other words, regardless of the form of the external terminal electrodes 12D and 12E of the chip-type electronic component 12, the surface electrodes 11C and 11C on the upper surface of the ceramic multilayer substrate 11 and the outside of the chip-type electronic component 12 without using a bonding material such as solder. It was found that the terminal electrodes 12D and 12E can be securely and firmly connected.

  In each of the above embodiments, the case where a low-temperature sintered ceramic material is used as the ceramic material of the ceramic substrate has been described. However, the ceramic material is not limited to the low-temperature sintered ceramic material, and alumina, aluminum nitride, A sintering aid may be added to a ceramic material such as mullite, and a high temperature sintered ceramic material fired at a high temperature of 1050 ° C. or higher may be used. When a high-temperature sintered ceramic material is used, for example, molybdenum, platinum, palladium, tungsten, nickel, an alloy containing these metals, or the like can be used as the electrode material. In each of the above embodiments, a ceramic multilayer substrate formed by laminating a plurality of ceramic layers has been described as an example. However, the ceramic layer may be a single layer.

  In short, the present invention is not limited to the above embodiments, and the external terminal electrode of the chip-type electronic component and the surface electrode of the ceramic substrate can be sintered without using a bonding material such as solder. And the surface electrode are included in the present invention.

  The present invention can be suitably used for, for example, a ceramic substrate on which chip-type electronic components used in various electronic devices are mounted.

(A), (b) is sectional drawing which expands and shows the principal part of one Embodiment of the chip mounting type | mold board | substrate of this invention, respectively, (a) is the sectional drawing, (b) is the same part before baking. It is sectional drawing shown. (A)-(e) is process drawing which shows one Embodiment of the manufacturing method of the chip mounting type | mold board | substrate shown in FIG. 1 in order of a process. (A)-(c) is process drawing which shows the continuation of the process drawing shown in FIG. 2, respectively. It is sectional drawing which shows other embodiment of the chip mounting type | mold board | substrate of this invention. It is a figure which shows other embodiment of the manufacturing method of the chip mounting type | mold board | substrate of this invention, and is a figure equivalent to (a) of FIG. (A)-(c) is process drawing which shows other embodiment of the manufacturing method of the ceramic substrate which mounts the chip-type electronic component of this invention in order of a process. (A), (b) is process drawing which shows other embodiment of the manufacturing method of the ceramic substrate which mounts the chip-type electronic component of this invention in order of a process. It is process drawing which shows the principal part of a process in other embodiment of the manufacturing method of the ceramic substrate which mounts the chip-type electronic component of this invention. (A), (b) is process drawing which shows the principal part of the process of further another embodiment of the manufacturing method of the ceramic substrate which mounts the chip-type electronic component of this invention, respectively. (A), (b) is process drawing which shows the principal part of the process of further another embodiment of the manufacturing method of the ceramic substrate which mounts the chip-type electronic component of this invention, respectively. (A), (b) is process drawing which shows the principal part of the process of further another embodiment of the manufacturing method of the ceramic substrate which mounts the chip-type electronic component of this invention, respectively. It is sectional drawing which shows the principal part of other embodiment of the ceramic substrate which mounts the chip-type electronic component of this invention.

Explanation of symbols

10, 10A, 10C, 10D, 10F, 10G10H, 10I Chip mounting substrate (ceramic substrate on which chip electronic components are mounted)
11 Ceramic multilayer substrate 11B Wiring pattern 11C In-plane conductor, surface electrode 11D Bump electrode 11E Constraining layer 12 Chip-type electronic component 12D, 12E External terminal electrode (terminal electrode)
111 Unfired ceramic laminate 111A Ceramic green sheet (ceramic green body)
111C Surface electrode part (conductor part)
111D via conductor (conductor)
112 Ceramic sintered bodies 112D, 112E External terminal electrode portions 114, 114B, 114C Constraining layer 114A Compact (constraining layer)

Claims (12)

Mounting a chip-type electronic component having a ceramic sintered body as a base body and a terminal electrode on a ceramic green body having a conductor portion on the surface so that the terminal electrode is in contact with the conductor portion;
The ceramic green body is sintered, the conductor part on the ceramic green body and the terminal electrode of the chip-type electronic component are integrated by sintering, and the dimensions of the ceramic green body in the planar direction Firing the ceramic green body on which the chip-type electronic component is mounted, so that the substrate does not substantially change. A method for producing a ceramic substrate mounted with a chip-type electronic component.   The ceramic green body is used as a ceramic green sheet, and an unfired ceramic laminate formed by laminating with other ceramic green sheets is fired so that the ceramic green sheet on which the chip-type electronic component is mounted is the outermost layer. A method for manufacturing a ceramic substrate on which the chip-type electronic component according to claim 1 is mounted.   Including a step of providing, on the outermost layer and / or inner layer of the unfired ceramic laminate, a constraining layer composed mainly of a hardly sinterable powder that does not substantially sinter at the sintering temperature of the ceramic green sheet. A method for manufacturing a ceramic substrate on which the chip-type electronic component according to claim 2 is mounted.   The method for manufacturing a ceramic substrate on which the chip-type electronic component according to claim 3 is mounted, wherein the constraining layer is a sheet-shaped constraining layer containing the hardly sinterable powder and an organic binder.   Characterized in that it comprises the step of applying the sheet-like constraining layer to the outermost layer of the unfired ceramic laminate and crimping the chip-type electronic component into the ceramic green sheet by pressing it. A method for manufacturing a ceramic substrate on which the chip-type electronic component according to claim 4 is mounted. 6. The method for producing a ceramic substrate mounted with a chip-type electronic component according to claim 5, wherein the unfired ceramic laminate provided with the constraining layer is fired while applying a pressure of 0.1 to 10 MPa. .   4. The chip-type electronic component according to claim 3, wherein the constraining layer is formed on the outermost surface of the green ceramic laminate as a constraining layer made of a green compact of the hardly sinterable powder. Method for manufacturing a ceramic substrate.   On the ceramic green body, there is a via conductor portion that includes a hardly sinterable powder and an organic binder that are not substantially sintered at the sintering temperature of the ceramic green body, and that corresponds to the terminal electrode of the chip-type electronic component. 2. The method for manufacturing a ceramic substrate on which a chip-type electronic component is mounted according to claim 1, further comprising a step of forming the conductor portion by the via conductor portion by providing a sheet-like constraining layer.   The chip-type electronic component according to any one of claims 1 to 8, wherein the chip-type electronic component is mounted on a conductor portion on the ceramic green body via an organic adhesive. Method for manufacturing ceramic substrate equipped with   The ceramic green body is a ceramic green sheet mainly composed of a low-temperature sintered ceramic powder, and the terminal electrode of the chip-type electronic component and the conductor portion on the ceramic green sheet are mainly composed of silver, copper or gold, respectively. The method for manufacturing a ceramic substrate on which the chip-type electronic component according to any one of claims 1 to 9 is mounted.   A chip-type electronic component having a ceramic sintered body as a base and a terminal electrode is mounted on the outermost surface of the ceramic substrate having the surface electrode, and at least a part of the chip-type electronic component is mounted on the ceramic substrate. A ceramic substrate on which a chip type electronic component is mounted, wherein the surface electrode of the ceramic substrate and the terminal electrode of the chip type electronic component are integrated by sintering.   The ceramic substrate is a ceramic multilayer substrate formed by laminating a plurality of low-temperature sintered ceramic layers, and the terminal electrode of the chip-type electronic component and the surface electrode of the ceramic multilayer substrate are each composed mainly of silver, copper, or gold. A ceramic substrate on which the chip-type electronic component according to claim 11 is mounted.

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