JP2006135195A - Process for producing ceramic multilayer substrate, and ceramic green sheet for use in that production process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the matter of a prior art that a cavity requires some margin for containing a chip electronic component and the strength of a substrate is lowered by an air gap in the substrate caused by the margin, and to solve the matter of other prior art that since the chip electronic component is pressure bonded while being mounted on a ceramic green sheet, irregularities appear on the surface of the substrate to cause deformation of internal wiring conductors or via conductors. <P>SOLUTION: In the production process of a ceramic multilayer substrate, a first ceramic green sheet 111A embedding a chip electronic component 112 is formed on a carrier film 100, the first ceramic green sheet 111A is stripped from the carrier film 100 and laid in layer together with a second ceramic green sheet 111B to form a multilayer green sheet 111 which is then sintered. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a ceramic multilayer substrate provided with chip-shaped electronic components, and more specifically, a method for manufacturing a ceramic multilayer substrate capable of improving the planarity of the substrate surface, and a ceramic green sheet used in the manufacturing method. It is about.

  Conventional techniques of this type include a multilayer ceramic substrate with built-in electronic components described in Patent Document 1, a multilayer ceramic substrate described in Patent Document 2, and a method for manufacturing the same.

  An electronic component built-in multilayer ceramic substrate described in Patent Document 1 includes a multilayer ceramic substrate, a chip-type electronic component housed in a space formed by a recess or a through hole in the multilayer ceramic substrate, and an interlayer between the multilayer ceramic substrates. Or it is provided with the conductor which has wired the above-mentioned chip type electronic component provided in the space. Thus, since the chip-type electronic component is accommodated in the space in the multilayer ceramic substrate, a multilayer ceramic substrate having a desired shape can be obtained without deteriorating the flatness.

  In the case of the method for manufacturing a multilayer ceramic substrate described in Patent Document 2, a functional element such as a capacitor element, an inductor element, or a resistance element is obtained by using a plate-like sintered body plate obtained by firing a ceramic functional element in advance. Then, these functional elements are built in the unsintered composite laminate. The unsintered composite laminate includes a base green layer, a constraining layer containing a hardly sinterable material, and a wiring conductor. When fired, the base green layer is formed by the action of the constraining layer. Shrinkage in the main surface direction is suppressed. Therefore, an unsintered composite laminate can be fired without any problem in a state in which the functional element is incorporated, and no mutual diffusion of components occurs between the functional element and the green layer for the substrate, and the characteristic of the functional element is fired. It will be maintained later.

JP-A-61-288498 JP 2002-84067 A

  However, in the case of the multilayer ceramic substrate described in Patent Document 1, a cavity is formed in advance in the multilayer ceramic substrate, and chip-type electronic components are accommodated in the cavity, so that planarity as the multilayer ceramic substrate is improved. However, the formation of the cavity is expensive, the wiring density in the substrate decreases due to the formation of the cavity, and a certain margin is required for the cavity to accommodate the chip-type electronic components. There are problems such as voids in the substrate caused by the decrease in substrate strength.

  Further, in the case of the multilayer ceramic substrate described in Patent Document 2, since the functional element made of the sintered plate is pressure-bonded in a state of being placed on the ceramic green sheet, the substrate surface is uneven, and the internal wiring There have been problems such as deformation of conductors and via conductors due to the influence of functional elements.

The present invention has been made to solve the above-described problems, and a method for manufacturing a ceramic multilayer substrate that can improve the planarity of the substrate surface and can suppress deformation of an internal conductor pattern, and the method for manufacturing the same. It aims at providing the ceramic green sheet used for the.

  The method for producing a ceramic multilayer substrate according to claim 1 of the present invention includes a step of producing a first ceramic green sheet in which at least a part of a chip-like electronic component having a terminal electrode is embedded on a support film; The first ceramic green sheet is peeled from the support film and laminated together with other ceramic green sheets to produce an unfired ceramic laminate, and the unfired ceramic laminate is fired. And a process.

  According to a second aspect of the present invention, there is provided a method for manufacturing a ceramic multilayer substrate according to the first aspect, wherein the chip-like electronic component is mounted on the support film and a ceramic slurry is applied thereon. Thus, the first ceramic green sheet is produced.

  According to a third aspect of the present invention, in the method for manufacturing a ceramic multilayer substrate according to the second aspect of the present invention, a conductor pattern is formed on the support film, and the terminal electrode is in contact with the conductor pattern. The chip-shaped electronic component is mounted.

  According to a fourth aspect of the present invention, there is provided a method for producing a ceramic multilayer substrate according to any one of the first to third aspects, wherein the main surface or inner layer of the unfired ceramic laminate is provided. Forming a shrinkage suppression layer that does not substantially sinter at the sintering temperature of the unfired ceramic laminate, and forming the unfired ceramic laminate and the composite laminate including the shrinkage suppression layer into the unfired ceramic laminate. It is characterized by firing at the sintering temperature of the body.

  According to a fifth aspect of the present invention, there is provided a method for producing a ceramic multilayer substrate according to any one of the first to fourth aspects, wherein a ceramic sintered body is used as the chip-shaped electronic component. A chip-shaped ceramic electronic component as a body is used.

  According to a sixth aspect of the present invention, there is provided a method for producing a ceramic multilayer substrate according to any one of the first to fifth aspects, wherein the first ceramic green sheet and the other ceramic green are provided. As the sheet, a low-temperature sintered ceramic green sheet mainly composed of a low-temperature sintered ceramic is used.

  According to a seventh aspect of the present invention, there is provided a ceramic green sheet including a chip-like electronic component having a terminal electrode, wherein at least a part thereof is embedded.

  According to the first to seventh aspects of the present invention, it is possible to improve the flatness of the substrate surface and to suppress the deformation of the internal conductor pattern, and to provide a method for manufacturing a ceramic multilayer substrate. A ceramic green sheet used in the manufacturing method can be provided.

  Hereinafter, the present invention will be described based on the embodiment shown in FIGS. 1A and 1B are views showing an embodiment of the ceramic multilayer substrate of the present invention, respectively, FIG. 1A is a sectional view thereof, and FIG. 1B is a first ceramic layer of FIG. FIG. 2 to FIG. 5 are process diagrams showing the main part of the manufacturing process of the ceramic multilayer substrate shown in FIG. 1, and FIGS. 6A to 6E are other embodiments of the present invention. FIG. 7A and FIG. 7B are cross-sectional views showing still another embodiment of the ceramic green sheet of the present invention, and FIG. c) is a sectional view showing a comparison between a ceramic multilayer substrate of Example 1 of the present invention and a conventional ceramic multilayer substrate.

  A ceramic multilayer substrate 10 of this embodiment includes, for example, as shown in FIG. 1A, a ceramic laminate 11 in which a plurality of ceramic layers are laminated, and a plurality of chips provided in the ceramic laminate 11. And a conductive pattern 13 connected to the chip-like electronic component 12 in a conductive manner.

  The ceramic laminate 11 is formed by laminating two types of first and second ceramic layers 11A and 11B. As shown in FIGS. 1A and 1B, a plurality of chip-shaped electronic components 12 are embedded in the first ceramic layer 11A, and the chip-shaped electronic components 12 are embedded in the second ceramic layer 11B. Although it may be embedded, it is not embedded in this embodiment. The bottom surfaces of the plurality of chip-like electronic components 12 embedded in the first ceramic layer 11A are all present at the interface between the first ceramic layer 11A and the second ceramic layer 11B. FIG. 1A shows an example in which a plurality of chip-like electronic components 12 are arranged together in one first ceramic layer 11A. The ceramic layer 11A can be arranged in a plurality of stages. The first ceramic layer 11 including the chip-like electronic component 12 can be formed by using the shellac green sheet of the present invention as will be described later.

  The chip-shaped electronic component 12 has external terminal electrodes 12A and 12A at both ends thereof, and the external terminal electrodes 12A and 12A existing at the interface between the first ceramic layer 11A and the second ceramic layer 11B. Similarly, it is connected to the conductor pattern 13 existing at the interface. As shown in FIG. 1A, the conductor pattern 13 includes an in-plane conductor 13A formed in a predetermined pattern at the interface between upper and lower ceramic layers in the ceramic laminate 11, and upper and lower in-plane conductors 13A, The via conductor 13B is formed by being arranged in a predetermined pattern so as to connect 13A, and the surface electrodes 13C and 13C are formed on the upper and lower surfaces of the ceramic laminate 11. The external terminal electrodes 12A and 12A of the chip-like electronic component 12 are connected to in-plane conductors 13A and 13A formed on the lower second ceramic layer 11B.

  One or more surface-mounted components can be mounted on the surface electrode 13C on the upper surface of the ceramic laminate 11 as necessary. As surface mount components, active elements such as semiconductor elements and gallium arsenide semiconductor elements and passive elements such as capacitors, inductors and resistors are connected via solder or conductive resin, or via bonding wires such as Au, Al and Cu. Can be electrically connected to the surface electrode 13C. By mounting the surface mount component, the multi-functionality of the ceramic multilayer substrate 10 can be further promoted.

Thus, for example, a low temperature co-fired ceramic (LTCC) material can be used as the ceramic material forming the ceramic laminate 11. The low-temperature sintered ceramic material is a ceramic material that can be sintered at a temperature of 1050 ° C. or less and can be simultaneously fired with silver, copper, or the like having a small specific resistance. Specifically, as the low-temperature sintered ceramic, a glass composite LTCC material obtained by mixing borosilicate glass with ceramic powder such as alumina or forsterite, ZnO-MgO-Al ₂ O ₃ -SiO ₂ crystal Non-glass using crystallized glass-based LTCC material using a crystallized glass, BaO—Al ₂ O ₃ —SiO ₂ ceramic powder, Al ₂ O ₃ —CaO—SiO ₂ —MgO—B ₂ O ₃ ceramic powder, etc. System LTCC materials and the like. By using a low-temperature sintered ceramic material as the material of the ceramic laminate 11, a low melting point metal having a low resistance and a low melting point such as Ag or Cu can be used as the conductor pattern 13, and the ceramic laminate 11 and the conductor pattern can be used. 13 can be co-fired at a low temperature of 1050 ° C. or lower.

  Although it does not restrict | limit especially as the chip-shaped electronic component 12, For example, what made the ceramic sintered body baked at 1200 degreeC or more, such as barium titanate and a ferrite, for example, a capacitor | condenser, an inductor, a filter, a balun, a coupler, etc. These chip-shaped electronic components can be used, and one or a plurality of these chip-shaped electronic components can be appropriately selected and used according to the purpose.

Next, a method for manufacturing the ceramic multilayer substrate 10 will be described with reference to FIGS.
In this embodiment, the case where the ceramic multilayer substrate 10 is produced using a non-shrinkage method will be described. The non-shrinkage construction method refers to a construction method in which the dimension in the plane direction of the multilayer substrate does not substantially change before and after the multilayer substrate is baked.

  In the present embodiment, for example, a first ceramic green sheet including a chip-shaped electronic component and a second ceramic green sheet not including the chip-shaped electronic component are manufactured using a slurry including a low-temperature sintered ceramic material and an organic vehicle. These are laminated and fired to produce a ceramic multilayer substrate. The chip-shaped ceramic multilayer component at the time of firing is denoted by reference numeral “112”, and the chip-shaped ceramic multilayer component after the temperature lowering after firing is denoted by reference numeral “12”.

  In order to produce the first ceramic green sheet, first, an organic adhesive is applied or sprayed on a carrier film such as a PET film to form an organic adhesive layer, and then, using a mounter, FIG. As shown in each of the three (a), the chip-shaped electronic component 112 prepared in advance has a predetermined pattern, that is, the pattern of the in-plane conductor portion formed on the second ceramic green sheet as will be described later. Are arranged and fixed on the carrier film 100 (see FIG. 3B). As the organic adhesive, synthetic rubber, a mixture of a synthetic resin and a plasticizer, or the like can be used. The thickness of the organic adhesive is preferably 3 μm or less in the case of coating and 1 μm or less in the case of spraying.

  Next, for example, as shown in FIG. 2B, using a doctor blade 200, the slurry S is applied onto the carrier film 100, and a plurality of chip-shaped electronic components 112 are embedded in the slurry S. The first ceramic green sheet 111A including a plurality of chip-shaped electronic components 112 shown in FIG. 3C is formed on the carrier film 100. When the carrier film 100 is peeled off from the ceramic green sheet 111A, a first ceramic green sheet 111A shown in FIG. 3D is obtained. The second ceramic green sheet 111B (see FIG. 4) can be formed by directly applying a slurry on a carrier film.

  Via holes are appropriately formed in each of the first and second ceramic green sheets 111A and 111B obtained as described above by a method such as punching or laser processing in a predetermined pattern. The via conductor portion 112B is formed by filling the via holes with a conductive paste mainly composed of Ag, Cu, Au, or the like. Further, the same type of conductive paste is applied in a predetermined pattern on the first and second ceramic green sheets 111A and 111B by using a screen printing method to form the in-plane conductor portion 113A.

Next, as shown in FIG. 4, the shrinkage suppression layer 115 is disposed, and the first and second ceramic green sheets 111A and 111B are laminated on the shrinkage suppression layer 115 in a predetermined order. (See FIG. 5). Further, the shrinkage suppression layer 115 is disposed on the upper surface of the green sheet laminate 111, and the green sheet laminate 111 is sandwiched between the upper and lower shrinkage suppression layers 115. And the green sheet laminated body 111 is crimped | bonded by predetermined temperature and pressure through the upper and lower shrinkage | contraction suppression layers 115 and 115, and the composite laminated body 110 shown in FIG. 5 is obtained. As the shrinkage suppression layer 115, a hardly sinterable powder that does not sinter at the sintering temperature of the green sheet laminate 111 (for example, a ceramic powder having a high sintering temperature such as Al ₂ O ₃ ), specifically, Al ₂ A slurry formed from a slurry containing O ₃ as a main component and an organic binder as a sub component as shown in FIG.

  Since the plurality of chip-like electronic components 112 are built in the first ceramic green sheet 111A in advance as described above, the first and second ceramics 112 are laminated together with the first ceramic green sheet 111B. Since the green sheets 111A and 111B are both stacked in an orderly manner with almost no disturbance in flatness, and a green sheet laminate 111 having a flat surface can be obtained, the green sheet laminate can be applied even when a predetermined pressure is applied at the time of pressure bonding. The conductor pattern 13 in 111 hardly deforms.

  Thereafter, when the composite laminate 110 is fired at 870 ° C. in an air atmosphere, for example, the ceramic multilayer substrate 10 shown in FIG. 1A is obtained between the upper and lower shrinkage suppression layers 115. In the present embodiment, since the firing is performed by a non-shrinkage method using the shrinkage suppression layer 115, the green sheet laminate 111 is greatly shrunk in a direction perpendicular to the surface direction (up and down direction) as the shrinkage in the surface direction is suppressed. To do. Due to this contraction, the contraction amount differs between the part including the chip-like electronic component 112 and the other part. That is, since the chip-shaped electronic component 112 does not contract in the first ceramic green sheet 111A, the amount of contraction of the ceramic green sheet corresponding to the thickness of the first ceramic green sheet 111A is smaller than other parts and bulges from other parts. However, since the thickness of the chip-like electronic component 112 is much thinner than the entire thickness of the green sheet laminate 111, the influence is negligible, and the surface of the ceramic multilayer substrate 10 is not attached to the chip-like electronic component 112. The resulting unevenness is relieved by the viscous flow of the glass component of the ceramic green sheet, and the unevenness is remarkably suppressed as compared with the conventional case, and the flatness is excellent.

  The firing temperature is preferably a temperature at which the low-temperature sintered ceramic material is sintered, for example, in the range of 800 to 1000 ° C. If the firing temperature is less than 800 ° C., the ceramic component of the green sheet laminate 111 may not be sufficiently sintered. If the firing temperature exceeds 1000 ° C., the metal particles of the conductor pattern portion 113 melt and the first and second ceramic green sheets There is a risk of diffusion to 111A and 111B. After firing, the upper and lower shrinkage suppression layers 115 can be removed by blasting or ultrasonic cleaning to obtain the ceramic multilayer substrate 10.

  In the present embodiment, since the ceramic multilayer substrate 10 is manufactured using the first ceramic green sheet 111A including the chip-shaped electronic component 112, the upper and lower surfaces of the ceramic multilayer substrate 10 are extremely flat and the deformation of the conductor pattern 13 is remarkably reduced. It is possible to obtain the ceramic multilayer substrate 10 with high connection reliability suppressed by the above. In the present embodiment, the external terminal electrode 112A of the ceramic sintered body 112 to be the chip-shaped electronic component 12 is coated with a conductive paste and dried even if it is applied and baked. It may be the one before baking.

  As described above, according to the present embodiment, the first ceramic green sheet 111A in which the chip-like electronic component 112 having the external terminal electrode 112A is embedded on the carrier film 100 is produced, and the first ceramic green is produced. The sheet 111A is peeled off from the carrier film 100, and the first ceramic green sheet 111A and the second ceramic green sheet 111B not including the chip-like electronic component 112 are laminated in a predetermined order to obtain a green sheet laminate 111. Since the green sheet laminate 111 is fired, the difference in the thickness of the green sheet laminate 111 between the portion in which the chip-like electronic component 112 is built and the portion in which the chip-like electronic component 112 is not built is extremely small. Unevenness on both sides can be remarkably suppressed, and eventually the conductor pattern Deformation parts 113 can be remarkably suppressed, it is possible to obtain a high connection reliability ceramic multilayer substrate 10. Moreover, since this ceramic multilayer substrate 10 has a flat surface and unevenness is remarkably suppressed, it is excellent in mountability of surface-mounted components.

  Further, according to the present embodiment, a plurality of chip-shaped electronic components 112 are mounted on the carrier film 100, and the first ceramic green sheet 111A is produced by applying the slurry S thereon. The first ceramic green sheet 111A including the electronic component 112 can be manufactured very easily.

  In addition, according to the present embodiment, the shrinkage suppression layers 115 and 115 that are not substantially sintered at the sintering temperature of the green sheet laminate 111 are formed on the upper and lower surfaces of the green sheet laminate 111 to form the composite laminate 110. Since the composite laminate 110 is fired at the sintering temperature of the green sheet laminate 111 after the production, the shrinkage in the planar direction of the first and second ceramic green sheets 111A and 111B in the green sheet laminate 111 is caused at the firing. It can be remarkably suppressed, and it is possible to prevent delamination due to a difference in thermal expansion coefficient between the first and second ceramic layers 11A and 11B and the chip-like electronic component 12 and cracks in the vicinity of the chip-like electronic component 12. it can.

  Further, according to the present embodiment, since the chip-shaped ceramic electronic component having a ceramic sintered body as a base is used as the chip-shaped electronic component 112, the ceramic multilayer substrate 10 in which the chip-shaped electronic component 12 is incorporated is fired. Can be produced.

  In the present embodiment, the first ceramic green sheet 111A including the chip-shaped electronic component 112 is manufactured. For example, as illustrated in FIG. 6, the first ceramic green sheet 111A including the chip-shaped electronic component to which the in-plane conductor portion is connected in advance is illustrated. Ceramic green sheets can also be produced. That is, on the carrier film 100 shown in FIG. 6A, an in-plane conductor 113A is formed in a predetermined pattern in advance as shown in FIG. 6B, and an organic adhesive is formed on the carrier film 100. Then, the chip-shaped electronic component 112 is joined and fixed to the in-plane conductor portion 113A as shown in FIG. Then, as shown in FIG. 4D, slurry is applied on the carrier film 100 and dried to form the first ceramic green sheet 111A including the chip-shaped electronic component 112 to which the in-plane conductor portion 113A is connected. To do. Then, it peels from the carrier film 100 and the 1st ceramic green sheet 111A shown to (e) of the figure is obtained. By using the first ceramic green sheet 111A, the ceramic multilayer substrate 10 can be manufactured as in the above embodiment. However, in this case, a second ceramic green sheet having no in-plane conductor portion can be used below the first ceramic green sheet 111A.

  Further, in each of the above-described embodiments, the case where the entire chip-shaped electronic component 112 is embedded in the first ceramic green sheet 111A has been described as an example, but it is illustrated in FIGS. 7A and 7B. Thus, as the first ceramic green sheet 111A, a part (upper part) of the chip-shaped electronic component 112 may be exposed. In this case, the arrangement state of the chip-like electronic component 112 in the first ceramic green sheet 111A can be easily confirmed visually.

  In each of the above embodiments, the case where the ceramic multilayer substrate 10 is manufactured by arranging the shrinkage suppression layers 115 on the upper and lower surfaces of the green sheet laminate 111 has been described. It may be appropriately interposed between the first and second ceramic green sheets. In this case, the shrinkage suppression layer remains in the ceramic multilayer substrate. However, when the first and second ceramic green sheets are sintered in the production process, the respective glass components are mixed into the shrinkage suppression layer and shrinkage occurs. The suppression layer remains as a ceramic layer in which the unsintered ceramic material is bonded and solidified by the glass component.

Example 1
In this example, a first ceramic green sheet in which chip-shaped electronic components were embedded in advance was produced, a ceramic multilayer substrate was produced using the first ceramic green sheet, and the uneven state of the substrate surface was examined. .

(1) Production of first ceramic green sheet First, an organic adhesive is applied on a carrier film using a spray to form an organic adhesive layer, and then a chip-like electron is formed at a predetermined position using a mounter. A multilayer ceramic capacitor was mounted as a component, and was bonded and fixed on a carrier film. The multilayer ceramic capacitor consists of a ceramic sintered body (size: 0.6 mm x 0.3 mm x 0.15 mm, internal electrode: Pd, capacity standard: 80 pF) fired at 1300 ° C, and Ag is the main component at both ends. The external terminal electrode is formed by applying and baking a conductive paste. The external terminal electrode is not plated. The multilayer ceramic capacitor uses a dielectric ceramic material made of BaTiO as a main component and Sr, W, Ca, and K as subcomponents as a ceramic raw material.

Next, a slurry containing a low-temperature sintered ceramic material (Al ₂ O ₃ as a filler and borosilicate glass as a sintering aid) is applied and dried on the carrier film, and then the carrier film is removed and 0.2 mm A thick first ceramic green sheet was obtained. A via hole was formed by punching the first ceramic green sheet, and a conductive paste mainly composed of Ag powder was filled in the via hole to form a via conductor portion. The same conductive paste was screen-printed on the first ceramic green sheet to form an in-plane conductor portion with a predetermined pattern.

(2) Production of second ceramic green sheet A slurry is applied on a carrier film and dried in the same manner as the first ceramic green sheet, and a predetermined number of 0.2 mm thick second ceramic green sheets are produced. Via conductor portions and in-plane conductor portions were respectively formed in a predetermined pattern on the second ceramic green sheet.

(3) Production of Ceramic Multilayer Substrate Next, three layers of the second ceramic green sheet are laminated on the shrinkage suppression layer, the first ceramic green sheet is laminated thereon, and the second ceramic green is further laminated thereon. 5 layers of ceramic green sheets were laminated and the first ceramic green sheet was placed 0.2 mm below the top surface (second layer). And after arrange | positioning the shrinkage | contraction suppression layer in the uppermost layer, a predetermined pressure is applied from the shrinkage | contraction suppression layer, the 1st, 2nd ceramic green sheet is temporarily press-bonded, and a green sheet laminated body is formed between shrinkage | contraction suppression layers did. The pressure during temporary pressure bonding is preferably 20 MPa or more. If this pressure is less than 20 MPa, the pressure bonding between the upper and lower ceramic green sheets is insufficient and there is a risk of delamination.

  Further, a predetermined pressure was applied to the green sheet laminate to perform main pressure bonding to produce a composite laminate. The pressure during the main pressure bonding is preferably 20 MPa or more and 250 MPa or less. If the pressure during the main pressure bonding is less than 20 MPa, the pressure bonding is insufficient, and there is a risk of delamination during firing, and if it exceeds 250 MPa, the multilayer ceramic capacitor may be damaged or the conductor pattern may be broken. Next, after firing the composite laminate in an air atmosphere at 870 ° C., the shrinkage suppression layer was removed to obtain a ceramic multilayer substrate shown in FIG. This ceramic multilayer substrate 10A has a ceramic multilayer body 11 having a first ceramic layer 11A including a multilayer ceramic capacitor 12 and a second ceramic layer 11B, and the thickness thereof was 0.5 mm.

  In this case, since the first ceramic green sheet including the multilayer ceramic capacitor is used, the thickness of the entire green sheet multilayer body before firing is 1.0 mm, and the built-in portion of the multilayer ceramic capacitor has a thickness of 0.15 mm. It is occupied by the thickness of the multilayer ceramic capacitor, and the remaining 0.85 mm is the thickness of the ceramic green sheet. Since the ceramic multilayer substrate after firing was 0.5 mm thick, the shrinkage ratio in the thickness direction of the green sheet laminate was about 50%. Therefore, the thickness of the built-in portion of the laminated ceramic capacitor after firing is theoretically 0.575 mm (= 0.85 mm × 50% + 0.15 mm) as shown in FIG. The thickness of the ceramic multilayer substrate 10A is increased by 75 μm with respect to the thickness of 0.5 mm, and a slight convex portion appears between this part and the other part as shown in FIG. The protrusions are relaxed by the viscous flow of glass in the substrate. As a result of measuring this convex part, the result shown in Table 1 was obtained.

Comparative Example 1
In this comparative example, five ceramic green sheets are laminated on the shrinkage suppression layer, a multilayer ceramic capacitor is mounted on the middle (third layer from the top and bottom), and a multilayer ceramic capacitor is built in the green sheet laminate. A ceramic multilayer substrate 10B shown in FIG. 8B was produced in the same manner as in Example 1 except for the above.

  In this case, as shown in FIG. 8B, the thickness of the green sheet laminate in the composite laminate before firing is 1.0 mm, but the portion including the multilayer ceramic capacitor has a thickness of 0.15 mm. Therefore, the thickness of the portion including the multilayer ceramic capacitor is 1.15 mm. Accordingly, the thickness of the built-in portion of the multilayer ceramic capacitor after firing is theoretically 0.65 mm (= 1.0 mm × 50% + 0.15 mm) as shown in FIG. It is 150 μm thicker than this part, and appears as a large convex part between this part and the other part as shown in FIG. Department is relaxed. As a result of measuring this convex part, the result shown in Table 1 was obtained.

Comparative Example 2
In this comparative example, a cavity is formed in the second ceramic green sheet from the top, and a multilayer ceramic capacitor is mounted so as to fit in the cavity. A multilayer ceramic substrate 10C shown in FIG. At this time, the opening of the cavity was formed 0.03 mm larger on all sides than the multilayer ceramic capacitor in order to ensure a margin.

In this case, as shown in FIG. 8C, since the multilayer ceramic capacitor is fitted in the cavity provided in the ceramic green sheet, the thickness of the ceramic green sheet is 4 in the portion including the multilayer ceramic capacitor. The thickness is 0.8 mm, which is 0.95 mm including the thickness of the multilayer ceramic capacitor of 0.15 mm.
Therefore, the thickness of the built-in portion of the multilayer ceramic capacitor after firing is theoretically 0.55 mm (= 0.8 mm × 50% + 0.15 mm), as shown in FIG. As shown in FIG. 5C, a convex portion appears between this portion and another portion. In this case, since there is a gap between the side wall of the cavity and the multilayer ceramic capacitor, the glass component viscously flows during firing and enters the gap to form a dent on the surface, and irregularities appear on the entire surface. Further, in this case, a crack caused by a gap in the cavity has occurred. Actually, as in Example 1, the unevenness is alleviated by the viscous flow of the glass component. As a result of measuring the irregularities, the results shown in Table 1 were obtained.

  According to the results shown in Table 1, the ceramic multilayer substrate 10A of Example 1 has smaller surface irregularities than the ceramic multilayer substrate 10B of Comparative Example 1 and the ceramic multilayer substrate 10C of Comparative Example 2, and cracks are also observed. There wasn't. In contrast, in Comparative Example 1, unevenness was large, and in Comparative Example 2, unevenness on the substrate surface was large, and cracks were also observed.

From these results, in the case of Example 1, since the surface unevenness is extremely suppressed and the flatness is excellent, it is considered that the conductor pattern inside is less deformed and a highly reliable conductor pattern can be obtained. On the other hand, in the case of the comparative example 1, the surface unevenness is large, and it is considered that the deformation of the internal conductor pattern is large accordingly. Moreover, in the case of the comparative example 2, it turned out that the crack resulting from a cavity generate | occur | produces and a board | substrate intensity | strength is weak.

Example 2
In this embodiment, the ceramic multilayer substrate is the same as that of Embodiment 1, except that the amount of low-temperature sintered ceramic material added to the shrinkage suppression layer is changed and the amount of shrinkage of the ceramic layer is changed. Was made.

  In this example, the ceramic multilayer substrate was evaluated by the X-ray flaw detection method, and the results are shown in Table 2. In Table 2, the substrate is a ceramic multilayer substrate, and the component is a multilayer ceramic capacitor.

According to the results shown in Table 2, when the shrinkage of the ceramic layer exceeds −5% and becomes larger on the negative side, cracks occur in the multilayer ceramic capacitor, and cracks occur in both the substrate and the multilayer ceramic capacitor that exceed + 5%. Was found to occur. In other words, it has been found that the shrinkage amount of the low-temperature sintered ceramic material needs to be suppressed within ± 5%. Therefore, the addition amount of the sintering aid of the low-temperature sintered ceramic material added to the shrinkage suppression layer should be set to a range (0.1 to 1.6% by weight) showing a shrinkage amount within a range of ± 5%. Was found to be preferable. In addition, the amount of shrinkage is a method of changing the particle size of Al ₂ O _{3 in} the shrinkage suppression layer, a method of changing the thickness of the shrinkage suppression layer, in addition to the amount of the sintering aid (borosilicate glass) added to the shrinkage suppression layer. It can be controlled in various ways.

  In addition, this invention is not restrict | limited at all to each said embodiment, Unless it is contrary to the meaning of this invention, it is contained in this invention.

  INDUSTRIAL APPLICABILITY The present invention can be suitably used when manufacturing a ceramic multilayer substrate that incorporates chip-shaped electronic components used in electronic devices and the like.

(A), (b) is a figure which shows one Embodiment of the ceramic multilayer substrate of this invention, respectively, (a) is the sectional drawing, (b) is the cross section which takes out and shows the 1st ceramic layer of (a) FIG. (A), (b) is sectional drawing which shows the principal part of the manufacturing process of the ceramic green sheet of this invention used for the ceramic multilayer substrate shown in FIG. 1, respectively. (A)-(d) is process drawing which shows the whole manufacturing process of the ceramic green sheet shown in FIG. 2, respectively. It is sectional drawing which shows the principal part of the manufacturing process of the ceramic multilayer substrate shown in FIG. FIG. 5 is a process diagram subsequent to the manufacturing process of FIG. 4, showing a main part of the manufacturing process of the ceramic multilayer substrate shown in FIG. 1. (A)-(e) is process drawing which shows the manufacturing process of the ceramic green sheet of other embodiment of this invention, respectively. (A), (b) is sectional drawing which shows other embodiment of the ceramic green sheet of this invention, respectively. (A)-(c) is sectional drawing which compares and shows the ceramic multilayer substrate of Example 1 of this invention, and the conventional ceramic multilayer substrate.

Explanation of symbols

100 Carrier film (support film)
111 Green sheet laminate (unfired ceramic laminate)
111A First ceramic green sheet 111B Second ceramic green sheet (other ceramic green sheets)
112 Chip-shaped electronic component 112A External terminal electrode (terminal electrode)
113 Conductor pattern (conductor pattern)
113A In-plane conductor (conductor pattern)

Claims (7)

Producing a first ceramic green sheet in which at least a part of a chip-like electronic component having a terminal electrode is embedded on a support film;
Peeling the first ceramic green sheet from the support film and laminating it with other ceramic green sheets to produce an unfired ceramic laminate;
Firing the unfired ceramic laminate;
A method for producing a ceramic multilayer substrate, comprising:   2. The ceramic multilayer substrate according to claim 1, wherein the first ceramic green sheet is manufactured by mounting the chip-shaped electronic component on the support film and applying a ceramic slurry thereon. Production method.   3. The method for producing a ceramic multilayer substrate according to claim 2, wherein a conductive pattern is formed on the support film, and the chip-shaped electronic component is mounted so that the terminal electrode is in contact with the conductive pattern.   A shrinkage suppression layer that does not substantially sinter at the sintering temperature of the unfired ceramic laminate is formed on the main surface or inner layer of the unfired ceramic laminate, and the unfired ceramic laminate and the shrinkage suppression are formed. The method for producing a ceramic multilayer substrate according to any one of claims 1 to 3, wherein the composite laminate including the layers is fired at a sintering temperature of the unfired ceramic laminate.   The method for manufacturing a ceramic multilayer substrate according to any one of claims 1 to 4, wherein a chip-shaped ceramic electronic component having a ceramic sintered body as an element is used as the chip-shaped electronic component.   The low-temperature sintered ceramic green sheet mainly composed of a low-temperature sintered ceramic is used as the first ceramic green sheet and the other ceramic green sheet. A method for producing a ceramic multilayer substrate as described in 1. above.   A ceramic green sheet comprising a chip-like electronic component having a terminal electrode, at least part of which is embedded.

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